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15#ifndef _ASM_TILE_BARRIER_H
16#define _ASM_TILE_BARRIER_H
17
18#ifndef __ASSEMBLY__
19
20#include <linux/types.h>
21#include <arch/chip.h>
22#include <arch/spr_def.h>
23#include <asm/timex.h>
24
25#define __sync() __insn_mf()
26
27#include <hv/syscall_public.h>
28
29
30
31
32static inline void __mb_incoherent(void)
33{
34 long clobber_r10;
35 asm volatile("swint2"
36 : "=R10" (clobber_r10)
37 : "R10" (HV_SYS_fence_incoherent)
38 : "r0", "r1", "r2", "r3", "r4",
39 "r5", "r6", "r7", "r8", "r9",
40 "r11", "r12", "r13", "r14",
41 "r15", "r16", "r17", "r18", "r19",
42 "r20", "r21", "r22", "r23", "r24",
43 "r25", "r26", "r27", "r28", "r29");
44}
45
46
47static inline void
48mb_incoherent(void)
49{
50 __insn_mf();
51
52 {
53#if CHIP_HAS_TILE_WRITE_PENDING()
54 const unsigned long WRITE_TIMEOUT_CYCLES = 400;
55 unsigned long start = get_cycles_low();
56 do {
57 if (__insn_mfspr(SPR_TILE_WRITE_PENDING) == 0)
58 return;
59 } while ((get_cycles_low() - start) < WRITE_TIMEOUT_CYCLES);
60#endif
61 (void) __mb_incoherent();
62 }
63}
64
65#define fast_wmb() __sync()
66#define fast_rmb() __sync()
67#define fast_mb() __sync()
68#define fast_iob() mb_incoherent()
69
70#define wmb() fast_wmb()
71#define rmb() fast_rmb()
72#define mb() fast_mb()
73#define iob() fast_iob()
74
75#ifndef __tilegx__
76
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81
82#define smp_mb__before_atomic() smp_mb()
83#define smp_mb__after_atomic() do { } while (0)
84#else
85#define smp_mb__before_atomic() smp_mb()
86#define smp_mb__after_atomic() smp_mb()
87#endif
88
89#include <asm-generic/barrier.h>
90
91#endif
92#endif
93