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47#ifndef ADF_ACCEL_DEVICES_H_
48#define ADF_ACCEL_DEVICES_H_
49#include <linux/module.h>
50#include <linux/list.h>
51#include <linux/io.h>
52#include "adf_cfg_common.h"
53
54#define ADF_DH895XCC_DEVICE_NAME "dh895xcc"
55#define ADF_DH895XCC_PCI_DEVICE_ID 0x435
56#define ADF_PCI_MAX_BARS 3
57#define ADF_DEVICE_NAME_LENGTH 32
58#define ADF_ETR_MAX_RINGS_PER_BANK 16
59#define ADF_MAX_MSIX_VECTOR_NAME 16
60#define ADF_DEVICE_NAME_PREFIX "qat_"
61
62enum adf_accel_capabilities {
63 ADF_ACCEL_CAPABILITIES_NULL = 0,
64 ADF_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC = 1,
65 ADF_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC = 2,
66 ADF_ACCEL_CAPABILITIES_CIPHER = 4,
67 ADF_ACCEL_CAPABILITIES_AUTHENTICATION = 8,
68 ADF_ACCEL_CAPABILITIES_COMPRESSION = 32,
69 ADF_ACCEL_CAPABILITIES_LZS_COMPRESSION = 64,
70 ADF_ACCEL_CAPABILITIES_RANDOM_NUMBER = 128
71};
72
73struct adf_bar {
74 resource_size_t base_addr;
75 void __iomem *virt_addr;
76 resource_size_t size;
77} __packed;
78
79struct adf_accel_msix {
80 struct msix_entry *entries;
81 char **names;
82} __packed;
83
84struct adf_accel_pci {
85 struct pci_dev *pci_dev;
86 struct adf_accel_msix msix_entries;
87 struct adf_bar pci_bars[ADF_PCI_MAX_BARS];
88 uint8_t revid;
89 uint8_t sku;
90} __packed;
91
92enum dev_state {
93 DEV_DOWN = 0,
94 DEV_UP
95};
96
97enum dev_sku_info {
98 DEV_SKU_1 = 0,
99 DEV_SKU_2,
100 DEV_SKU_3,
101 DEV_SKU_4,
102 DEV_SKU_UNKNOWN,
103};
104
105static inline const char *get_sku_info(enum dev_sku_info info)
106{
107 switch (info) {
108 case DEV_SKU_1:
109 return "SKU1";
110 case DEV_SKU_2:
111 return "SKU2";
112 case DEV_SKU_3:
113 return "SKU3";
114 case DEV_SKU_4:
115 return "SKU4";
116 case DEV_SKU_UNKNOWN:
117 default:
118 break;
119 }
120 return "Unknown SKU";
121}
122
123struct adf_hw_device_class {
124 const char *name;
125 const enum adf_device_type type;
126 uint32_t instances;
127} __packed;
128
129struct adf_cfg_device_data;
130struct adf_accel_dev;
131struct adf_etr_data;
132struct adf_etr_ring_data;
133
134struct adf_hw_device_data {
135 struct adf_hw_device_class *dev_class;
136 uint32_t (*get_accel_mask)(uint32_t fuse);
137 uint32_t (*get_ae_mask)(uint32_t fuse);
138 uint32_t (*get_misc_bar_id)(struct adf_hw_device_data *self);
139 uint32_t (*get_etr_bar_id)(struct adf_hw_device_data *self);
140 uint32_t (*get_num_aes)(struct adf_hw_device_data *self);
141 uint32_t (*get_num_accels)(struct adf_hw_device_data *self);
142 enum dev_sku_info (*get_sku)(struct adf_hw_device_data *self);
143 void (*hw_arb_ring_enable)(struct adf_etr_ring_data *ring);
144 void (*hw_arb_ring_disable)(struct adf_etr_ring_data *ring);
145 int (*alloc_irq)(struct adf_accel_dev *accel_dev);
146 void (*free_irq)(struct adf_accel_dev *accel_dev);
147 void (*enable_error_correction)(struct adf_accel_dev *accel_dev);
148 int (*init_admin_comms)(struct adf_accel_dev *accel_dev);
149 void (*exit_admin_comms)(struct adf_accel_dev *accel_dev);
150 int (*init_arb)(struct adf_accel_dev *accel_dev);
151 void (*exit_arb)(struct adf_accel_dev *accel_dev);
152 void (*enable_ints)(struct adf_accel_dev *accel_dev);
153 const char *fw_name;
154 uint32_t pci_dev_id;
155 uint32_t fuses;
156 uint32_t accel_capabilities_mask;
157 uint16_t accel_mask;
158 uint16_t ae_mask;
159 uint16_t tx_rings_mask;
160 uint8_t tx_rx_gap;
161 uint8_t instance_id;
162 uint8_t num_banks;
163 uint8_t num_accel;
164 uint8_t num_logical_accel;
165 uint8_t num_engines;
166} __packed;
167
168
169#define ADF_CSR_WR(csr_base, csr_offset, val) \
170 __raw_writel(val, csr_base + csr_offset)
171
172
173#define ADF_CSR_RD(csr_base, csr_offset) __raw_readl(csr_base + csr_offset)
174
175#define GET_DEV(accel_dev) ((accel_dev)->accel_pci_dev.pci_dev->dev)
176#define GET_BARS(accel_dev) ((accel_dev)->accel_pci_dev.pci_bars)
177#define GET_HW_DATA(accel_dev) (accel_dev->hw_device)
178#define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks)
179#define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines)
180#define accel_to_pci_dev(accel_ptr) accel_ptr->accel_pci_dev.pci_dev
181
182struct adf_admin_comms;
183struct icp_qat_fw_loader_handle;
184struct adf_fw_loader_data {
185 struct icp_qat_fw_loader_handle *fw_loader;
186 const struct firmware *uof_fw;
187};
188
189struct adf_accel_dev {
190 struct adf_etr_data *transport;
191 struct adf_hw_device_data *hw_device;
192 struct adf_cfg_device_data *cfg;
193 struct adf_fw_loader_data *fw_loader;
194 struct adf_admin_comms *admin;
195 struct list_head crypto_list;
196 unsigned long status;
197 atomic_t ref_count;
198 struct dentry *debugfs_dir;
199 struct list_head list;
200 struct module *owner;
201 struct adf_accel_pci accel_pci_dev;
202 uint8_t accel_id;
203} __packed;
204#endif
205
