1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26#include "nv04.h"
27
28void
29nv10_fb_tile_init(struct nvkm_fb *pfb, int i, u32 addr, u32 size, u32 pitch,
30 u32 flags, struct nvkm_fb_tile *tile)
31{
32 tile->addr = 0x80000000 | addr;
33 tile->limit = max(1u, addr + size) - 1;
34 tile->pitch = pitch;
35}
36
37void
38nv10_fb_tile_fini(struct nvkm_fb *pfb, int i, struct nvkm_fb_tile *tile)
39{
40 tile->addr = 0;
41 tile->limit = 0;
42 tile->pitch = 0;
43 tile->zcomp = 0;
44}
45
46void
47nv10_fb_tile_prog(struct nvkm_fb *pfb, int i, struct nvkm_fb_tile *tile)
48{
49 nv_wr32(pfb, 0x100244 + (i * 0x10), tile->limit);
50 nv_wr32(pfb, 0x100248 + (i * 0x10), tile->pitch);
51 nv_wr32(pfb, 0x100240 + (i * 0x10), tile->addr);
52 nv_rd32(pfb, 0x100240 + (i * 0x10));
53}
54
55struct nvkm_oclass *
56nv10_fb_oclass = &(struct nv04_fb_impl) {
57 .base.base.handle = NV_SUBDEV(FB, 0x10),
58 .base.base.ofuncs = &(struct nvkm_ofuncs) {
59 .ctor = nv04_fb_ctor,
60 .dtor = _nvkm_fb_dtor,
61 .init = _nvkm_fb_init,
62 .fini = _nvkm_fb_fini,
63 },
64 .base.memtype = nv04_fb_memtype_valid,
65 .base.ram = &nv10_ram_oclass,
66 .tile.regions = 8,
67 .tile.init = nv10_fb_tile_init,
68 .tile.fini = nv10_fb_tile_fini,
69 .tile.prog = nv10_fb_tile_prog,
70}.base.base;
71