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37#include <linux/debugfs.h>
38#include <linux/delay.h>
39#include <linux/i2c.h>
40#include <linux/interrupt.h>
41#include <linux/irq.h>
42#include <linux/irq_work.h>
43#include <linux/module.h>
44#include <linux/mutex.h>
45#include <linux/of.h>
46#include <linux/regmap.h>
47#include <linux/regulator/consumer.h>
48#include <linux/slab.h>
49#include <asm/unaligned.h>
50#include <linux/iio/buffer.h>
51#include <linux/iio/events.h>
52#include <linux/iio/iio.h>
53#include <linux/iio/sysfs.h>
54#include <linux/iio/trigger.h>
55#include <linux/iio/trigger_consumer.h>
56#include <linux/iio/triggered_buffer.h>
57
58#define GP2A_I2C_NAME "gp2ap020a00f"
59
60
61#define GP2AP020A00F_OP_REG 0x00
62#define GP2AP020A00F_ALS_REG 0x01
63#define GP2AP020A00F_PS_REG 0x02
64#define GP2AP020A00F_LED_REG 0x03
65#define GP2AP020A00F_TL_L_REG 0x04
66#define GP2AP020A00F_TL_H_REG 0x05
67#define GP2AP020A00F_TH_L_REG 0x06
68#define GP2AP020A00F_TH_H_REG 0x07
69#define GP2AP020A00F_PL_L_REG 0x08
70#define GP2AP020A00F_PL_H_REG 0x09
71#define GP2AP020A00F_PH_L_REG 0x0a
72#define GP2AP020A00F_PH_H_REG 0x0b
73#define GP2AP020A00F_D0_L_REG 0x0c
74#define GP2AP020A00F_D0_H_REG 0x0d
75#define GP2AP020A00F_D1_L_REG 0x0e
76#define GP2AP020A00F_D1_H_REG 0x0f
77#define GP2AP020A00F_D2_L_REG 0x10
78#define GP2AP020A00F_D2_H_REG 0x11
79#define GP2AP020A00F_NUM_REGS 0x12
80
81
82#define GP2AP020A00F_OP3_MASK 0x80
83#define GP2AP020A00F_OP3_SHUTDOWN 0x00
84#define GP2AP020A00F_OP3_OPERATION 0x80
85#define GP2AP020A00F_OP2_MASK 0x40
86#define GP2AP020A00F_OP2_AUTO_SHUTDOWN 0x00
87#define GP2AP020A00F_OP2_CONT_OPERATION 0x40
88#define GP2AP020A00F_OP_MASK 0x30
89#define GP2AP020A00F_OP_ALS_AND_PS 0x00
90#define GP2AP020A00F_OP_ALS 0x10
91#define GP2AP020A00F_OP_PS 0x20
92#define GP2AP020A00F_OP_DEBUG 0x30
93#define GP2AP020A00F_PROX_MASK 0x08
94#define GP2AP020A00F_PROX_NON_DETECT 0x00
95#define GP2AP020A00F_PROX_DETECT 0x08
96#define GP2AP020A00F_FLAG_P 0x04
97#define GP2AP020A00F_FLAG_A 0x02
98#define GP2AP020A00F_TYPE_MASK 0x01
99#define GP2AP020A00F_TYPE_MANUAL_CALC 0x00
100#define GP2AP020A00F_TYPE_AUTO_CALC 0x01
101
102
103#define GP2AP020A00F_PRST_MASK 0xc0
104#define GP2AP020A00F_PRST_ONCE 0x00
105#define GP2AP020A00F_PRST_4_CYCLES 0x40
106#define GP2AP020A00F_PRST_8_CYCLES 0x80
107#define GP2AP020A00F_PRST_16_CYCLES 0xc0
108#define GP2AP020A00F_RES_A_MASK 0x38
109#define GP2AP020A00F_RES_A_800ms 0x00
110#define GP2AP020A00F_RES_A_400ms 0x08
111#define GP2AP020A00F_RES_A_200ms 0x10
112#define GP2AP020A00F_RES_A_100ms 0x18
113#define GP2AP020A00F_RES_A_25ms 0x20
114#define GP2AP020A00F_RES_A_6_25ms 0x28
115#define GP2AP020A00F_RES_A_1_56ms 0x30
116#define GP2AP020A00F_RES_A_0_39ms 0x38
117#define GP2AP020A00F_RANGE_A_MASK 0x07
118#define GP2AP020A00F_RANGE_A_x1 0x00
119#define GP2AP020A00F_RANGE_A_x2 0x01
120#define GP2AP020A00F_RANGE_A_x4 0x02
121#define GP2AP020A00F_RANGE_A_x8 0x03
122#define GP2AP020A00F_RANGE_A_x16 0x04
123#define GP2AP020A00F_RANGE_A_x32 0x05
124#define GP2AP020A00F_RANGE_A_x64 0x06
125#define GP2AP020A00F_RANGE_A_x128 0x07
126
127
128#define GP2AP020A00F_ALC_MASK 0x80
129#define GP2AP020A00F_ALC_ON 0x80
130#define GP2AP020A00F_ALC_OFF 0x00
131#define GP2AP020A00F_INTTYPE_MASK 0x40
132#define GP2AP020A00F_INTTYPE_LEVEL 0x00
133#define GP2AP020A00F_INTTYPE_PULSE 0x40
134#define GP2AP020A00F_RES_P_MASK 0x38
135#define GP2AP020A00F_RES_P_800ms_x2 0x00
136#define GP2AP020A00F_RES_P_400ms_x2 0x08
137#define GP2AP020A00F_RES_P_200ms_x2 0x10
138#define GP2AP020A00F_RES_P_100ms_x2 0x18
139#define GP2AP020A00F_RES_P_25ms_x2 0x20
140#define GP2AP020A00F_RES_P_6_25ms_x2 0x28
141#define GP2AP020A00F_RES_P_1_56ms_x2 0x30
142#define GP2AP020A00F_RES_P_0_39ms_x2 0x38
143#define GP2AP020A00F_RANGE_P_MASK 0x07
144#define GP2AP020A00F_RANGE_P_x1 0x00
145#define GP2AP020A00F_RANGE_P_x2 0x01
146#define GP2AP020A00F_RANGE_P_x4 0x02
147#define GP2AP020A00F_RANGE_P_x8 0x03
148#define GP2AP020A00F_RANGE_P_x16 0x04
149#define GP2AP020A00F_RANGE_P_x32 0x05
150#define GP2AP020A00F_RANGE_P_x64 0x06
151#define GP2AP020A00F_RANGE_P_x128 0x07
152
153
154#define GP2AP020A00F_INTVAL_MASK 0xc0
155#define GP2AP020A00F_INTVAL_0 0x00
156#define GP2AP020A00F_INTVAL_4 0x40
157#define GP2AP020A00F_INTVAL_8 0x80
158#define GP2AP020A00F_INTVAL_16 0xc0
159#define GP2AP020A00F_IS_MASK 0x30
160#define GP2AP020A00F_IS_13_8mA 0x00
161#define GP2AP020A00F_IS_27_5mA 0x10
162#define GP2AP020A00F_IS_55mA 0x20
163#define GP2AP020A00F_IS_110mA 0x30
164#define GP2AP020A00F_PIN_MASK 0x0c
165#define GP2AP020A00F_PIN_ALS_OR_PS 0x00
166#define GP2AP020A00F_PIN_ALS 0x04
167#define GP2AP020A00F_PIN_PS 0x08
168#define GP2AP020A00F_PIN_PS_DETECT 0x0c
169#define GP2AP020A00F_FREQ_MASK 0x02
170#define GP2AP020A00F_FREQ_327_5kHz 0x00
171#define GP2AP020A00F_FREQ_81_8kHz 0x02
172#define GP2AP020A00F_RST 0x01
173
174#define GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR 0
175#define GP2AP020A00F_SCAN_MODE_LIGHT_IR 1
176#define GP2AP020A00F_SCAN_MODE_PROXIMITY 2
177#define GP2AP020A00F_CHAN_TIMESTAMP 3
178
179#define GP2AP020A00F_DATA_READY_TIMEOUT msecs_to_jiffies(1000)
180#define GP2AP020A00F_DATA_REG(chan) (GP2AP020A00F_D0_L_REG + \
181 (chan) * 2)
182#define GP2AP020A00F_THRESH_REG(th_val_id) (GP2AP020A00F_TL_L_REG + \
183 (th_val_id) * 2)
184#define GP2AP020A00F_THRESH_VAL_ID(reg_addr) ((reg_addr - 4) / 2)
185
186#define GP2AP020A00F_SUBTRACT_MODE 0
187#define GP2AP020A00F_ADD_MODE 1
188
189#define GP2AP020A00F_MAX_CHANNELS 3
190
191enum gp2ap020a00f_opmode {
192 GP2AP020A00F_OPMODE_READ_RAW_CLEAR,
193 GP2AP020A00F_OPMODE_READ_RAW_IR,
194 GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY,
195 GP2AP020A00F_OPMODE_ALS,
196 GP2AP020A00F_OPMODE_PS,
197 GP2AP020A00F_OPMODE_ALS_AND_PS,
198 GP2AP020A00F_OPMODE_PROX_DETECT,
199 GP2AP020A00F_OPMODE_SHUTDOWN,
200 GP2AP020A00F_NUM_OPMODES,
201};
202
203enum gp2ap020a00f_cmd {
204 GP2AP020A00F_CMD_READ_RAW_CLEAR,
205 GP2AP020A00F_CMD_READ_RAW_IR,
206 GP2AP020A00F_CMD_READ_RAW_PROXIMITY,
207 GP2AP020A00F_CMD_TRIGGER_CLEAR_EN,
208 GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS,
209 GP2AP020A00F_CMD_TRIGGER_IR_EN,
210 GP2AP020A00F_CMD_TRIGGER_IR_DIS,
211 GP2AP020A00F_CMD_TRIGGER_PROX_EN,
212 GP2AP020A00F_CMD_TRIGGER_PROX_DIS,
213 GP2AP020A00F_CMD_ALS_HIGH_EV_EN,
214 GP2AP020A00F_CMD_ALS_HIGH_EV_DIS,
215 GP2AP020A00F_CMD_ALS_LOW_EV_EN,
216 GP2AP020A00F_CMD_ALS_LOW_EV_DIS,
217 GP2AP020A00F_CMD_PROX_HIGH_EV_EN,
218 GP2AP020A00F_CMD_PROX_HIGH_EV_DIS,
219 GP2AP020A00F_CMD_PROX_LOW_EV_EN,
220 GP2AP020A00F_CMD_PROX_LOW_EV_DIS,
221};
222
223enum gp2ap020a00f_flags {
224 GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER,
225 GP2AP020A00F_FLAG_ALS_IR_TRIGGER,
226 GP2AP020A00F_FLAG_PROX_TRIGGER,
227 GP2AP020A00F_FLAG_PROX_RISING_EV,
228 GP2AP020A00F_FLAG_PROX_FALLING_EV,
229 GP2AP020A00F_FLAG_ALS_RISING_EV,
230 GP2AP020A00F_FLAG_ALS_FALLING_EV,
231 GP2AP020A00F_FLAG_LUX_MODE_HI,
232 GP2AP020A00F_FLAG_DATA_READY,
233};
234
235enum gp2ap020a00f_thresh_val_id {
236 GP2AP020A00F_THRESH_TL,
237 GP2AP020A00F_THRESH_TH,
238 GP2AP020A00F_THRESH_PL,
239 GP2AP020A00F_THRESH_PH,
240};
241
242struct gp2ap020a00f_data {
243 const struct gp2ap020a00f_platform_data *pdata;
244 struct i2c_client *client;
245 struct mutex lock;
246 char *buffer;
247 struct regulator *vled_reg;
248 unsigned long flags;
249 enum gp2ap020a00f_opmode cur_opmode;
250 struct iio_trigger *trig;
251 struct regmap *regmap;
252 unsigned int thresh_val[4];
253 u8 debug_reg_addr;
254 struct irq_work work;
255 wait_queue_head_t data_ready_queue;
256};
257
258static const u8 gp2ap020a00f_reg_init_tab[] = {
259 [GP2AP020A00F_OP_REG] = GP2AP020A00F_OP3_SHUTDOWN,
260 [GP2AP020A00F_ALS_REG] = GP2AP020A00F_RES_A_25ms |
261 GP2AP020A00F_RANGE_A_x8,
262 [GP2AP020A00F_PS_REG] = GP2AP020A00F_ALC_ON |
263 GP2AP020A00F_RES_P_1_56ms_x2 |
264 GP2AP020A00F_RANGE_P_x4,
265 [GP2AP020A00F_LED_REG] = GP2AP020A00F_INTVAL_0 |
266 GP2AP020A00F_IS_110mA |
267 GP2AP020A00F_FREQ_327_5kHz,
268 [GP2AP020A00F_TL_L_REG] = 0,
269 [GP2AP020A00F_TL_H_REG] = 0,
270 [GP2AP020A00F_TH_L_REG] = 0,
271 [GP2AP020A00F_TH_H_REG] = 0,
272 [GP2AP020A00F_PL_L_REG] = 0,
273 [GP2AP020A00F_PL_H_REG] = 0,
274 [GP2AP020A00F_PH_L_REG] = 0,
275 [GP2AP020A00F_PH_H_REG] = 0,
276};
277
278static bool gp2ap020a00f_is_volatile_reg(struct device *dev, unsigned int reg)
279{
280 switch (reg) {
281 case GP2AP020A00F_OP_REG:
282 case GP2AP020A00F_D0_L_REG:
283 case GP2AP020A00F_D0_H_REG:
284 case GP2AP020A00F_D1_L_REG:
285 case GP2AP020A00F_D1_H_REG:
286 case GP2AP020A00F_D2_L_REG:
287 case GP2AP020A00F_D2_H_REG:
288 return true;
289 default:
290 return false;
291 }
292}
293
294static const struct regmap_config gp2ap020a00f_regmap_config = {
295 .reg_bits = 8,
296 .val_bits = 8,
297
298 .max_register = GP2AP020A00F_D2_H_REG,
299 .cache_type = REGCACHE_RBTREE,
300
301 .volatile_reg = gp2ap020a00f_is_volatile_reg,
302};
303
304static const struct gp2ap020a00f_mutable_config_regs {
305 u8 op_reg;
306 u8 als_reg;
307 u8 ps_reg;
308 u8 led_reg;
309} opmode_regs_settings[GP2AP020A00F_NUM_OPMODES] = {
310 [GP2AP020A00F_OPMODE_READ_RAW_CLEAR] = {
311 GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
312 | GP2AP020A00F_OP3_OPERATION
313 | GP2AP020A00F_TYPE_AUTO_CALC,
314 GP2AP020A00F_PRST_ONCE,
315 GP2AP020A00F_INTTYPE_LEVEL,
316 GP2AP020A00F_PIN_ALS
317 },
318 [GP2AP020A00F_OPMODE_READ_RAW_IR] = {
319 GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
320 | GP2AP020A00F_OP3_OPERATION
321 | GP2AP020A00F_TYPE_MANUAL_CALC,
322 GP2AP020A00F_PRST_ONCE,
323 GP2AP020A00F_INTTYPE_LEVEL,
324 GP2AP020A00F_PIN_ALS
325 },
326 [GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY] = {
327 GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
328 | GP2AP020A00F_OP3_OPERATION
329 | GP2AP020A00F_TYPE_MANUAL_CALC,
330 GP2AP020A00F_PRST_ONCE,
331 GP2AP020A00F_INTTYPE_LEVEL,
332 GP2AP020A00F_PIN_PS
333 },
334 [GP2AP020A00F_OPMODE_PROX_DETECT] = {
335 GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
336 | GP2AP020A00F_OP3_OPERATION
337 | GP2AP020A00F_TYPE_MANUAL_CALC,
338 GP2AP020A00F_PRST_4_CYCLES,
339 GP2AP020A00F_INTTYPE_PULSE,
340 GP2AP020A00F_PIN_PS_DETECT
341 },
342 [GP2AP020A00F_OPMODE_ALS] = {
343 GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
344 | GP2AP020A00F_OP3_OPERATION
345 | GP2AP020A00F_TYPE_AUTO_CALC,
346 GP2AP020A00F_PRST_ONCE,
347 GP2AP020A00F_INTTYPE_LEVEL,
348 GP2AP020A00F_PIN_ALS
349 },
350 [GP2AP020A00F_OPMODE_PS] = {
351 GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
352 | GP2AP020A00F_OP3_OPERATION
353 | GP2AP020A00F_TYPE_MANUAL_CALC,
354 GP2AP020A00F_PRST_4_CYCLES,
355 GP2AP020A00F_INTTYPE_LEVEL,
356 GP2AP020A00F_PIN_PS
357 },
358 [GP2AP020A00F_OPMODE_ALS_AND_PS] = {
359 GP2AP020A00F_OP_ALS_AND_PS
360 | GP2AP020A00F_OP2_CONT_OPERATION
361 | GP2AP020A00F_OP3_OPERATION
362 | GP2AP020A00F_TYPE_AUTO_CALC,
363 GP2AP020A00F_PRST_4_CYCLES,
364 GP2AP020A00F_INTTYPE_LEVEL,
365 GP2AP020A00F_PIN_ALS_OR_PS
366 },
367 [GP2AP020A00F_OPMODE_SHUTDOWN] = { GP2AP020A00F_OP3_SHUTDOWN, },
368};
369
370static int gp2ap020a00f_set_operation_mode(struct gp2ap020a00f_data *data,
371 enum gp2ap020a00f_opmode op)
372{
373 unsigned int op_reg_val;
374 int err;
375
376 if (op != GP2AP020A00F_OPMODE_SHUTDOWN) {
377 err = regmap_read(data->regmap, GP2AP020A00F_OP_REG,
378 &op_reg_val);
379 if (err < 0)
380 return err;
381
382
383
384
385 if ((opmode_regs_settings[op].op_reg & GP2AP020A00F_OP_MASK) !=
386 (op_reg_val & GP2AP020A00F_OP_MASK)) {
387
388 err = regmap_update_bits(data->regmap,
389 GP2AP020A00F_OP_REG, GP2AP020A00F_OP3_MASK,
390 GP2AP020A00F_OP3_SHUTDOWN);
391 if (err < 0)
392 return err;
393 }
394
395 err = regmap_update_bits(data->regmap, GP2AP020A00F_ALS_REG,
396 GP2AP020A00F_PRST_MASK, opmode_regs_settings[op]
397 .als_reg);
398 if (err < 0)
399 return err;
400
401 err = regmap_update_bits(data->regmap, GP2AP020A00F_PS_REG,
402 GP2AP020A00F_INTTYPE_MASK, opmode_regs_settings[op]
403 .ps_reg);
404 if (err < 0)
405 return err;
406
407 err = regmap_update_bits(data->regmap, GP2AP020A00F_LED_REG,
408 GP2AP020A00F_PIN_MASK, opmode_regs_settings[op]
409 .led_reg);
410 if (err < 0)
411 return err;
412 }
413
414
415 err = regmap_update_bits(data->regmap,
416 GP2AP020A00F_OP_REG,
417 GP2AP020A00F_OP_MASK | GP2AP020A00F_OP2_MASK |
418 GP2AP020A00F_OP3_MASK | GP2AP020A00F_TYPE_MASK,
419 opmode_regs_settings[op].op_reg);
420 if (err < 0)
421 return err;
422
423 data->cur_opmode = op;
424
425 return 0;
426}
427
428static bool gp2ap020a00f_als_enabled(struct gp2ap020a00f_data *data)
429{
430 return test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags) ||
431 test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags) ||
432 test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags) ||
433 test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
434}
435
436static bool gp2ap020a00f_prox_detect_enabled(struct gp2ap020a00f_data *data)
437{
438 return test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags) ||
439 test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
440}
441
442static int gp2ap020a00f_write_event_threshold(struct gp2ap020a00f_data *data,
443 enum gp2ap020a00f_thresh_val_id th_val_id,
444 bool enable)
445{
446 __le16 thresh_buf = 0;
447 unsigned int thresh_reg_val;
448
449 if (!enable)
450 thresh_reg_val = 0;
451 else if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags) &&
452 th_val_id != GP2AP020A00F_THRESH_PL &&
453 th_val_id != GP2AP020A00F_THRESH_PH)
454
455
456
457
458 thresh_reg_val = data->thresh_val[th_val_id] / 16;
459 else
460 thresh_reg_val = data->thresh_val[th_val_id] > 16000 ?
461 16000 :
462 data->thresh_val[th_val_id];
463
464 thresh_buf = cpu_to_le16(thresh_reg_val);
465
466 return regmap_bulk_write(data->regmap,
467 GP2AP020A00F_THRESH_REG(th_val_id),
468 (u8 *)&thresh_buf, 2);
469}
470
471static int gp2ap020a00f_alter_opmode(struct gp2ap020a00f_data *data,
472 enum gp2ap020a00f_opmode diff_mode, int add_sub)
473{
474 enum gp2ap020a00f_opmode new_mode;
475
476 if (diff_mode != GP2AP020A00F_OPMODE_ALS &&
477 diff_mode != GP2AP020A00F_OPMODE_PS)
478 return -EINVAL;
479
480 if (add_sub == GP2AP020A00F_ADD_MODE) {
481 if (data->cur_opmode == GP2AP020A00F_OPMODE_SHUTDOWN)
482 new_mode = diff_mode;
483 else
484 new_mode = GP2AP020A00F_OPMODE_ALS_AND_PS;
485 } else {
486 if (data->cur_opmode == GP2AP020A00F_OPMODE_ALS_AND_PS)
487 new_mode = (diff_mode == GP2AP020A00F_OPMODE_ALS) ?
488 GP2AP020A00F_OPMODE_PS :
489 GP2AP020A00F_OPMODE_ALS;
490 else
491 new_mode = GP2AP020A00F_OPMODE_SHUTDOWN;
492 }
493
494 return gp2ap020a00f_set_operation_mode(data, new_mode);
495}
496
497static int gp2ap020a00f_exec_cmd(struct gp2ap020a00f_data *data,
498 enum gp2ap020a00f_cmd cmd)
499{
500 int err = 0;
501
502 switch (cmd) {
503 case GP2AP020A00F_CMD_READ_RAW_CLEAR:
504 if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
505 return -EBUSY;
506 err = gp2ap020a00f_set_operation_mode(data,
507 GP2AP020A00F_OPMODE_READ_RAW_CLEAR);
508 break;
509 case GP2AP020A00F_CMD_READ_RAW_IR:
510 if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
511 return -EBUSY;
512 err = gp2ap020a00f_set_operation_mode(data,
513 GP2AP020A00F_OPMODE_READ_RAW_IR);
514 break;
515 case GP2AP020A00F_CMD_READ_RAW_PROXIMITY:
516 if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
517 return -EBUSY;
518 err = gp2ap020a00f_set_operation_mode(data,
519 GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY);
520 break;
521 case GP2AP020A00F_CMD_TRIGGER_CLEAR_EN:
522 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
523 return -EBUSY;
524 if (!gp2ap020a00f_als_enabled(data))
525 err = gp2ap020a00f_alter_opmode(data,
526 GP2AP020A00F_OPMODE_ALS,
527 GP2AP020A00F_ADD_MODE);
528 set_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
529 break;
530 case GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS:
531 clear_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
532 if (gp2ap020a00f_als_enabled(data))
533 break;
534 err = gp2ap020a00f_alter_opmode(data,
535 GP2AP020A00F_OPMODE_ALS,
536 GP2AP020A00F_SUBTRACT_MODE);
537 break;
538 case GP2AP020A00F_CMD_TRIGGER_IR_EN:
539 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
540 return -EBUSY;
541 if (!gp2ap020a00f_als_enabled(data))
542 err = gp2ap020a00f_alter_opmode(data,
543 GP2AP020A00F_OPMODE_ALS,
544 GP2AP020A00F_ADD_MODE);
545 set_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
546 break;
547 case GP2AP020A00F_CMD_TRIGGER_IR_DIS:
548 clear_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
549 if (gp2ap020a00f_als_enabled(data))
550 break;
551 err = gp2ap020a00f_alter_opmode(data,
552 GP2AP020A00F_OPMODE_ALS,
553 GP2AP020A00F_SUBTRACT_MODE);
554 break;
555 case GP2AP020A00F_CMD_TRIGGER_PROX_EN:
556 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
557 return -EBUSY;
558 err = gp2ap020a00f_alter_opmode(data,
559 GP2AP020A00F_OPMODE_PS,
560 GP2AP020A00F_ADD_MODE);
561 set_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
562 break;
563 case GP2AP020A00F_CMD_TRIGGER_PROX_DIS:
564 clear_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
565 err = gp2ap020a00f_alter_opmode(data,
566 GP2AP020A00F_OPMODE_PS,
567 GP2AP020A00F_SUBTRACT_MODE);
568 break;
569 case GP2AP020A00F_CMD_ALS_HIGH_EV_EN:
570 if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
571 return 0;
572 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
573 return -EBUSY;
574 if (!gp2ap020a00f_als_enabled(data)) {
575 err = gp2ap020a00f_alter_opmode(data,
576 GP2AP020A00F_OPMODE_ALS,
577 GP2AP020A00F_ADD_MODE);
578 if (err < 0)
579 return err;
580 }
581 set_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
582 err = gp2ap020a00f_write_event_threshold(data,
583 GP2AP020A00F_THRESH_TH, true);
584 break;
585 case GP2AP020A00F_CMD_ALS_HIGH_EV_DIS:
586 if (!test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
587 return 0;
588 clear_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
589 if (!gp2ap020a00f_als_enabled(data)) {
590 err = gp2ap020a00f_alter_opmode(data,
591 GP2AP020A00F_OPMODE_ALS,
592 GP2AP020A00F_SUBTRACT_MODE);
593 if (err < 0)
594 return err;
595 }
596 err = gp2ap020a00f_write_event_threshold(data,
597 GP2AP020A00F_THRESH_TH, false);
598 break;
599 case GP2AP020A00F_CMD_ALS_LOW_EV_EN:
600 if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
601 return 0;
602 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
603 return -EBUSY;
604 if (!gp2ap020a00f_als_enabled(data)) {
605 err = gp2ap020a00f_alter_opmode(data,
606 GP2AP020A00F_OPMODE_ALS,
607 GP2AP020A00F_ADD_MODE);
608 if (err < 0)
609 return err;
610 }
611 set_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
612 err = gp2ap020a00f_write_event_threshold(data,
613 GP2AP020A00F_THRESH_TL, true);
614 break;
615 case GP2AP020A00F_CMD_ALS_LOW_EV_DIS:
616 if (!test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
617 return 0;
618 clear_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
619 if (!gp2ap020a00f_als_enabled(data)) {
620 err = gp2ap020a00f_alter_opmode(data,
621 GP2AP020A00F_OPMODE_ALS,
622 GP2AP020A00F_SUBTRACT_MODE);
623 if (err < 0)
624 return err;
625 }
626 err = gp2ap020a00f_write_event_threshold(data,
627 GP2AP020A00F_THRESH_TL, false);
628 break;
629 case GP2AP020A00F_CMD_PROX_HIGH_EV_EN:
630 if (test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
631 return 0;
632 if (gp2ap020a00f_als_enabled(data) ||
633 data->cur_opmode == GP2AP020A00F_OPMODE_PS)
634 return -EBUSY;
635 if (!gp2ap020a00f_prox_detect_enabled(data)) {
636 err = gp2ap020a00f_set_operation_mode(data,
637 GP2AP020A00F_OPMODE_PROX_DETECT);
638 if (err < 0)
639 return err;
640 }
641 set_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
642 err = gp2ap020a00f_write_event_threshold(data,
643 GP2AP020A00F_THRESH_PH, true);
644 break;
645 case GP2AP020A00F_CMD_PROX_HIGH_EV_DIS:
646 if (!test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
647 return 0;
648 clear_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
649 err = gp2ap020a00f_set_operation_mode(data,
650 GP2AP020A00F_OPMODE_SHUTDOWN);
651 if (err < 0)
652 return err;
653 err = gp2ap020a00f_write_event_threshold(data,
654 GP2AP020A00F_THRESH_PH, false);
655 break;
656 case GP2AP020A00F_CMD_PROX_LOW_EV_EN:
657 if (test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
658 return 0;
659 if (gp2ap020a00f_als_enabled(data) ||
660 data->cur_opmode == GP2AP020A00F_OPMODE_PS)
661 return -EBUSY;
662 if (!gp2ap020a00f_prox_detect_enabled(data)) {
663 err = gp2ap020a00f_set_operation_mode(data,
664 GP2AP020A00F_OPMODE_PROX_DETECT);
665 if (err < 0)
666 return err;
667 }
668 set_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
669 err = gp2ap020a00f_write_event_threshold(data,
670 GP2AP020A00F_THRESH_PL, true);
671 break;
672 case GP2AP020A00F_CMD_PROX_LOW_EV_DIS:
673 if (!test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
674 return 0;
675 clear_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
676 err = gp2ap020a00f_set_operation_mode(data,
677 GP2AP020A00F_OPMODE_SHUTDOWN);
678 if (err < 0)
679 return err;
680 err = gp2ap020a00f_write_event_threshold(data,
681 GP2AP020A00F_THRESH_PL, false);
682 break;
683 }
684
685 return err;
686}
687
688static int wait_conversion_complete_irq(struct gp2ap020a00f_data *data)
689{
690 int ret;
691
692 ret = wait_event_timeout(data->data_ready_queue,
693 test_bit(GP2AP020A00F_FLAG_DATA_READY,
694 &data->flags),
695 GP2AP020A00F_DATA_READY_TIMEOUT);
696 clear_bit(GP2AP020A00F_FLAG_DATA_READY, &data->flags);
697
698 return ret > 0 ? 0 : -ETIME;
699}
700
701static int gp2ap020a00f_read_output(struct gp2ap020a00f_data *data,
702 unsigned int output_reg, int *val)
703{
704 u8 reg_buf[2];
705 int err;
706
707 err = wait_conversion_complete_irq(data);
708 if (err < 0)
709 dev_dbg(&data->client->dev, "data ready timeout\n");
710
711 err = regmap_bulk_read(data->regmap, output_reg, reg_buf, 2);
712 if (err < 0)
713 return err;
714
715 *val = le16_to_cpup((__le16 *)reg_buf);
716
717 return err;
718}
719
720static bool gp2ap020a00f_adjust_lux_mode(struct gp2ap020a00f_data *data,
721 int output_val)
722{
723 u8 new_range = 0xff;
724 int err;
725
726 if (!test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags)) {
727 if (output_val > 16000) {
728 set_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
729 new_range = GP2AP020A00F_RANGE_A_x128;
730 }
731 } else {
732 if (output_val < 1000) {
733 clear_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
734 new_range = GP2AP020A00F_RANGE_A_x8;
735 }
736 }
737
738 if (new_range != 0xff) {
739
740
741
742 err = gp2ap020a00f_write_event_threshold(data,
743 GP2AP020A00F_THRESH_TH, false);
744 if (err < 0) {
745 dev_err(&data->client->dev,
746 "Clearing als threshold register failed.\n");
747 return false;
748 }
749
750 err = gp2ap020a00f_write_event_threshold(data,
751 GP2AP020A00F_THRESH_TL, false);
752 if (err < 0) {
753 dev_err(&data->client->dev,
754 "Clearing als threshold register failed.\n");
755 return false;
756 }
757
758
759 err = regmap_update_bits(data->regmap,
760 GP2AP020A00F_OP_REG,
761 GP2AP020A00F_OP3_MASK,
762 GP2AP020A00F_OP3_SHUTDOWN);
763
764 if (err < 0) {
765 dev_err(&data->client->dev,
766 "Shutting down the device failed.\n");
767 return false;
768 }
769
770 err = regmap_update_bits(data->regmap,
771 GP2AP020A00F_ALS_REG,
772 GP2AP020A00F_RANGE_A_MASK,
773 new_range);
774
775 if (err < 0) {
776 dev_err(&data->client->dev,
777 "Adjusting device lux mode failed.\n");
778 return false;
779 }
780
781 err = regmap_update_bits(data->regmap,
782 GP2AP020A00F_OP_REG,
783 GP2AP020A00F_OP3_MASK,
784 GP2AP020A00F_OP3_OPERATION);
785
786 if (err < 0) {
787 dev_err(&data->client->dev,
788 "Powering up the device failed.\n");
789 return false;
790 }
791
792
793 if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags)) {
794 err = gp2ap020a00f_write_event_threshold(data,
795 GP2AP020A00F_THRESH_TH, true);
796 if (err < 0) {
797 dev_err(&data->client->dev,
798 "Adjusting als threshold value failed.\n");
799 return false;
800 }
801 }
802
803 if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags)) {
804 err = gp2ap020a00f_write_event_threshold(data,
805 GP2AP020A00F_THRESH_TL, true);
806 if (err < 0) {
807 dev_err(&data->client->dev,
808 "Adjusting als threshold value failed.\n");
809 return false;
810 }
811 }
812
813 return true;
814 }
815
816 return false;
817}
818
819static void gp2ap020a00f_output_to_lux(struct gp2ap020a00f_data *data,
820 int *output_val)
821{
822 if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags))
823 *output_val *= 16;
824}
825
826static void gp2ap020a00f_iio_trigger_work(struct irq_work *work)
827{
828 struct gp2ap020a00f_data *data =
829 container_of(work, struct gp2ap020a00f_data, work);
830
831 iio_trigger_poll(data->trig);
832}
833
834static irqreturn_t gp2ap020a00f_prox_sensing_handler(int irq, void *data)
835{
836 struct iio_dev *indio_dev = data;
837 struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
838 unsigned int op_reg_val;
839 int ret;
840
841
842 ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG, &op_reg_val);
843 if (ret < 0)
844 return IRQ_HANDLED;
845
846 if (gp2ap020a00f_prox_detect_enabled(priv)) {
847 if (op_reg_val & GP2AP020A00F_PROX_DETECT) {
848 iio_push_event(indio_dev,
849 IIO_UNMOD_EVENT_CODE(
850 IIO_PROXIMITY,
851 GP2AP020A00F_SCAN_MODE_PROXIMITY,
852 IIO_EV_TYPE_ROC,
853 IIO_EV_DIR_RISING),
854 iio_get_time_ns());
855 } else {
856 iio_push_event(indio_dev,
857 IIO_UNMOD_EVENT_CODE(
858 IIO_PROXIMITY,
859 GP2AP020A00F_SCAN_MODE_PROXIMITY,
860 IIO_EV_TYPE_ROC,
861 IIO_EV_DIR_FALLING),
862 iio_get_time_ns());
863 }
864 }
865
866 return IRQ_HANDLED;
867}
868
869static irqreturn_t gp2ap020a00f_thresh_event_handler(int irq, void *data)
870{
871 struct iio_dev *indio_dev = data;
872 struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
873 u8 op_reg_flags, d0_reg_buf[2];
874 unsigned int output_val, op_reg_val;
875 int thresh_val_id, ret;
876
877
878 ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG,
879 &op_reg_val);
880 if (ret < 0)
881 goto done;
882
883 op_reg_flags = op_reg_val & (GP2AP020A00F_FLAG_A | GP2AP020A00F_FLAG_P
884 | GP2AP020A00F_PROX_DETECT);
885
886 op_reg_val &= (~GP2AP020A00F_FLAG_A & ~GP2AP020A00F_FLAG_P
887 & ~GP2AP020A00F_PROX_DETECT);
888
889
890 if (priv->cur_opmode != GP2AP020A00F_OPMODE_PROX_DETECT) {
891 ret = regmap_write(priv->regmap, GP2AP020A00F_OP_REG,
892 op_reg_val);
893 if (ret < 0)
894 goto done;
895 }
896
897 if (op_reg_flags & GP2AP020A00F_FLAG_A) {
898
899
900
901 ret = regmap_bulk_read(priv->regmap, GP2AP020A00F_D0_L_REG,
902 d0_reg_buf, 2);
903 if (ret < 0)
904 goto done;
905
906 output_val = le16_to_cpup((__le16 *)d0_reg_buf);
907
908 if (gp2ap020a00f_adjust_lux_mode(priv, output_val))
909 goto done;
910
911 gp2ap020a00f_output_to_lux(priv, &output_val);
912
913
914
915
916
917 if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &priv->flags)) {
918 thresh_val_id =
919 GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TH_L_REG);
920 if (output_val > priv->thresh_val[thresh_val_id])
921 iio_push_event(indio_dev,
922 IIO_MOD_EVENT_CODE(
923 IIO_LIGHT,
924 GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
925 IIO_MOD_LIGHT_CLEAR,
926 IIO_EV_TYPE_THRESH,
927 IIO_EV_DIR_RISING),
928 iio_get_time_ns());
929 }
930
931 if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &priv->flags)) {
932 thresh_val_id =
933 GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TL_L_REG);
934 if (output_val < priv->thresh_val[thresh_val_id])
935 iio_push_event(indio_dev,
936 IIO_MOD_EVENT_CODE(
937 IIO_LIGHT,
938 GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
939 IIO_MOD_LIGHT_CLEAR,
940 IIO_EV_TYPE_THRESH,
941 IIO_EV_DIR_FALLING),
942 iio_get_time_ns());
943 }
944 }
945
946 if (priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_CLEAR ||
947 priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_IR ||
948 priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY) {
949 set_bit(GP2AP020A00F_FLAG_DATA_READY, &priv->flags);
950 wake_up(&priv->data_ready_queue);
951 goto done;
952 }
953
954 if (test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &priv->flags) ||
955 test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &priv->flags) ||
956 test_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &priv->flags))
957
958 irq_work_queue(&priv->work);
959
960done:
961 return IRQ_HANDLED;
962}
963
964static irqreturn_t gp2ap020a00f_trigger_handler(int irq, void *data)
965{
966 struct iio_poll_func *pf = data;
967 struct iio_dev *indio_dev = pf->indio_dev;
968 struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
969 size_t d_size = 0;
970 int i, out_val, ret;
971
972 for_each_set_bit(i, indio_dev->active_scan_mask,
973 indio_dev->masklength) {
974 ret = regmap_bulk_read(priv->regmap,
975 GP2AP020A00F_DATA_REG(i),
976 &priv->buffer[d_size], 2);
977 if (ret < 0)
978 goto done;
979
980 if (i == GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR ||
981 i == GP2AP020A00F_SCAN_MODE_LIGHT_IR) {
982 out_val = le16_to_cpup((__le16 *)&priv->buffer[d_size]);
983 gp2ap020a00f_output_to_lux(priv, &out_val);
984
985 put_unaligned_le32(out_val, &priv->buffer[d_size]);
986 d_size += 4;
987 } else {
988 d_size += 2;
989 }
990 }
991
992 iio_push_to_buffers_with_timestamp(indio_dev, priv->buffer,
993 pf->timestamp);
994done:
995 iio_trigger_notify_done(indio_dev->trig);
996
997 return IRQ_HANDLED;
998}
999
1000static u8 gp2ap020a00f_get_thresh_reg(const struct iio_chan_spec *chan,
1001 enum iio_event_direction event_dir)
1002{
1003 switch (chan->type) {
1004 case IIO_PROXIMITY:
1005 if (event_dir == IIO_EV_DIR_RISING)
1006 return GP2AP020A00F_PH_L_REG;
1007 else
1008 return GP2AP020A00F_PL_L_REG;
1009 case IIO_LIGHT:
1010 if (event_dir == IIO_EV_DIR_RISING)
1011 return GP2AP020A00F_TH_L_REG;
1012 else
1013 return GP2AP020A00F_TL_L_REG;
1014 default:
1015 break;
1016 }
1017
1018 return -EINVAL;
1019}
1020
1021static int gp2ap020a00f_write_event_val(struct iio_dev *indio_dev,
1022 const struct iio_chan_spec *chan,
1023 enum iio_event_type type,
1024 enum iio_event_direction dir,
1025 enum iio_event_info info,
1026 int val, int val2)
1027{
1028 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1029 bool event_en = false;
1030 u8 thresh_val_id;
1031 u8 thresh_reg_l;
1032 int err = 0;
1033
1034 mutex_lock(&data->lock);
1035
1036 thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
1037 thresh_val_id = GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l);
1038
1039 if (thresh_val_id > GP2AP020A00F_THRESH_PH) {
1040 err = -EINVAL;
1041 goto error_unlock;
1042 }
1043
1044 switch (thresh_reg_l) {
1045 case GP2AP020A00F_TH_L_REG:
1046 event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV,
1047 &data->flags);
1048 break;
1049 case GP2AP020A00F_TL_L_REG:
1050 event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV,
1051 &data->flags);
1052 break;
1053 case GP2AP020A00F_PH_L_REG:
1054 if (val == 0) {
1055 err = -EINVAL;
1056 goto error_unlock;
1057 }
1058 event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV,
1059 &data->flags);
1060 break;
1061 case GP2AP020A00F_PL_L_REG:
1062 if (val == 0) {
1063 err = -EINVAL;
1064 goto error_unlock;
1065 }
1066 event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV,
1067 &data->flags);
1068 break;
1069 }
1070
1071 data->thresh_val[thresh_val_id] = val;
1072 err = gp2ap020a00f_write_event_threshold(data, thresh_val_id,
1073 event_en);
1074error_unlock:
1075 mutex_unlock(&data->lock);
1076
1077 return err;
1078}
1079
1080static int gp2ap020a00f_read_event_val(struct iio_dev *indio_dev,
1081 const struct iio_chan_spec *chan,
1082 enum iio_event_type type,
1083 enum iio_event_direction dir,
1084 enum iio_event_info info,
1085 int *val, int *val2)
1086{
1087 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1088 u8 thresh_reg_l;
1089 int err = IIO_VAL_INT;
1090
1091 mutex_lock(&data->lock);
1092
1093 thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
1094
1095 if (thresh_reg_l > GP2AP020A00F_PH_L_REG) {
1096 err = -EINVAL;
1097 goto error_unlock;
1098 }
1099
1100 *val = data->thresh_val[GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l)];
1101
1102error_unlock:
1103 mutex_unlock(&data->lock);
1104
1105 return err;
1106}
1107
1108static int gp2ap020a00f_write_prox_event_config(struct iio_dev *indio_dev,
1109 int state)
1110{
1111 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1112 enum gp2ap020a00f_cmd cmd_high_ev, cmd_low_ev;
1113 int err;
1114
1115 cmd_high_ev = state ? GP2AP020A00F_CMD_PROX_HIGH_EV_EN :
1116 GP2AP020A00F_CMD_PROX_HIGH_EV_DIS;
1117 cmd_low_ev = state ? GP2AP020A00F_CMD_PROX_LOW_EV_EN :
1118 GP2AP020A00F_CMD_PROX_LOW_EV_DIS;
1119
1120
1121
1122
1123
1124
1125 if (state) {
1126 if (data->thresh_val[GP2AP020A00F_THRESH_PL] == 0)
1127 return -EINVAL;
1128
1129 if (data->thresh_val[GP2AP020A00F_THRESH_PH] == 0)
1130 return -EINVAL;
1131 }
1132
1133 err = gp2ap020a00f_exec_cmd(data, cmd_high_ev);
1134 if (err < 0)
1135 return err;
1136
1137 err = gp2ap020a00f_exec_cmd(data, cmd_low_ev);
1138 if (err < 0)
1139 return err;
1140
1141 free_irq(data->client->irq, indio_dev);
1142
1143 if (state)
1144 err = request_threaded_irq(data->client->irq, NULL,
1145 &gp2ap020a00f_prox_sensing_handler,
1146 IRQF_TRIGGER_RISING |
1147 IRQF_TRIGGER_FALLING |
1148 IRQF_ONESHOT,
1149 "gp2ap020a00f_prox_sensing",
1150 indio_dev);
1151 else {
1152 err = request_threaded_irq(data->client->irq, NULL,
1153 &gp2ap020a00f_thresh_event_handler,
1154 IRQF_TRIGGER_FALLING |
1155 IRQF_ONESHOT,
1156 "gp2ap020a00f_thresh_event",
1157 indio_dev);
1158 }
1159
1160 return err;
1161}
1162
1163static int gp2ap020a00f_write_event_config(struct iio_dev *indio_dev,
1164 const struct iio_chan_spec *chan,
1165 enum iio_event_type type,
1166 enum iio_event_direction dir,
1167 int state)
1168{
1169 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1170 enum gp2ap020a00f_cmd cmd;
1171 int err;
1172
1173 mutex_lock(&data->lock);
1174
1175 switch (chan->type) {
1176 case IIO_PROXIMITY:
1177 err = gp2ap020a00f_write_prox_event_config(indio_dev, state);
1178 break;
1179 case IIO_LIGHT:
1180 if (dir == IIO_EV_DIR_RISING) {
1181 cmd = state ? GP2AP020A00F_CMD_ALS_HIGH_EV_EN :
1182 GP2AP020A00F_CMD_ALS_HIGH_EV_DIS;
1183 err = gp2ap020a00f_exec_cmd(data, cmd);
1184 } else {
1185 cmd = state ? GP2AP020A00F_CMD_ALS_LOW_EV_EN :
1186 GP2AP020A00F_CMD_ALS_LOW_EV_DIS;
1187 err = gp2ap020a00f_exec_cmd(data, cmd);
1188 }
1189 break;
1190 default:
1191 err = -EINVAL;
1192 }
1193
1194 mutex_unlock(&data->lock);
1195
1196 return err;
1197}
1198
1199static int gp2ap020a00f_read_event_config(struct iio_dev *indio_dev,
1200 const struct iio_chan_spec *chan,
1201 enum iio_event_type type,
1202 enum iio_event_direction dir)
1203{
1204 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1205 int event_en = 0;
1206
1207 mutex_lock(&data->lock);
1208
1209 switch (chan->type) {
1210 case IIO_PROXIMITY:
1211 if (dir == IIO_EV_DIR_RISING)
1212 event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV,
1213 &data->flags);
1214 else
1215 event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV,
1216 &data->flags);
1217 break;
1218 case IIO_LIGHT:
1219 if (dir == IIO_EV_DIR_RISING)
1220 event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV,
1221 &data->flags);
1222 else
1223 event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV,
1224 &data->flags);
1225 break;
1226 default:
1227 event_en = -EINVAL;
1228 break;
1229 }
1230
1231 mutex_unlock(&data->lock);
1232
1233 return event_en;
1234}
1235
1236static int gp2ap020a00f_read_channel(struct gp2ap020a00f_data *data,
1237 struct iio_chan_spec const *chan, int *val)
1238{
1239 enum gp2ap020a00f_cmd cmd;
1240 int err;
1241
1242 switch (chan->scan_index) {
1243 case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
1244 cmd = GP2AP020A00F_CMD_READ_RAW_CLEAR;
1245 break;
1246 case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
1247 cmd = GP2AP020A00F_CMD_READ_RAW_IR;
1248 break;
1249 case GP2AP020A00F_SCAN_MODE_PROXIMITY:
1250 cmd = GP2AP020A00F_CMD_READ_RAW_PROXIMITY;
1251 break;
1252 default:
1253 return -EINVAL;
1254 }
1255
1256 err = gp2ap020a00f_exec_cmd(data, cmd);
1257 if (err < 0) {
1258 dev_err(&data->client->dev,
1259 "gp2ap020a00f_exec_cmd failed\n");
1260 goto error_ret;
1261 }
1262
1263 err = gp2ap020a00f_read_output(data, chan->address, val);
1264 if (err < 0)
1265 dev_err(&data->client->dev,
1266 "gp2ap020a00f_read_output failed\n");
1267
1268 err = gp2ap020a00f_set_operation_mode(data,
1269 GP2AP020A00F_OPMODE_SHUTDOWN);
1270 if (err < 0)
1271 dev_err(&data->client->dev,
1272 "Failed to shut down the device.\n");
1273
1274 if (cmd == GP2AP020A00F_CMD_READ_RAW_CLEAR ||
1275 cmd == GP2AP020A00F_CMD_READ_RAW_IR)
1276 gp2ap020a00f_output_to_lux(data, val);
1277
1278error_ret:
1279 return err;
1280}
1281
1282static int gp2ap020a00f_read_raw(struct iio_dev *indio_dev,
1283 struct iio_chan_spec const *chan,
1284 int *val, int *val2,
1285 long mask)
1286{
1287 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1288 int err = -EINVAL;
1289
1290 mutex_lock(&data->lock);
1291
1292 switch (mask) {
1293 case IIO_CHAN_INFO_RAW:
1294 if (iio_buffer_enabled(indio_dev)) {
1295 err = -EBUSY;
1296 goto error_unlock;
1297 }
1298
1299 err = gp2ap020a00f_read_channel(data, chan, val);
1300 break;
1301 }
1302
1303error_unlock:
1304 mutex_unlock(&data->lock);
1305
1306 return err < 0 ? err : IIO_VAL_INT;
1307}
1308
1309static const struct iio_event_spec gp2ap020a00f_event_spec_light[] = {
1310 {
1311 .type = IIO_EV_TYPE_THRESH,
1312 .dir = IIO_EV_DIR_RISING,
1313 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1314 BIT(IIO_EV_INFO_ENABLE),
1315 }, {
1316 .type = IIO_EV_TYPE_THRESH,
1317 .dir = IIO_EV_DIR_FALLING,
1318 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1319 BIT(IIO_EV_INFO_ENABLE),
1320 },
1321};
1322
1323static const struct iio_event_spec gp2ap020a00f_event_spec_prox[] = {
1324 {
1325 .type = IIO_EV_TYPE_ROC,
1326 .dir = IIO_EV_DIR_RISING,
1327 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1328 BIT(IIO_EV_INFO_ENABLE),
1329 }, {
1330 .type = IIO_EV_TYPE_ROC,
1331 .dir = IIO_EV_DIR_FALLING,
1332 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1333 BIT(IIO_EV_INFO_ENABLE),
1334 },
1335};
1336
1337static const struct iio_chan_spec gp2ap020a00f_channels[] = {
1338 {
1339 .type = IIO_LIGHT,
1340 .channel2 = IIO_MOD_LIGHT_CLEAR,
1341 .modified = 1,
1342 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
1343 .scan_type = {
1344 .sign = 'u',
1345 .realbits = 24,
1346 .shift = 0,
1347 .storagebits = 32,
1348 .endianness = IIO_LE,
1349 },
1350 .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
1351 .address = GP2AP020A00F_D0_L_REG,
1352 .event_spec = gp2ap020a00f_event_spec_light,
1353 .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_light),
1354 },
1355 {
1356 .type = IIO_LIGHT,
1357 .channel2 = IIO_MOD_LIGHT_IR,
1358 .modified = 1,
1359 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
1360 .scan_type = {
1361 .sign = 'u',
1362 .realbits = 24,
1363 .shift = 0,
1364 .storagebits = 32,
1365 .endianness = IIO_LE,
1366 },
1367 .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_IR,
1368 .address = GP2AP020A00F_D1_L_REG,
1369 },
1370 {
1371 .type = IIO_PROXIMITY,
1372 .modified = 0,
1373 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
1374 .scan_type = {
1375 .sign = 'u',
1376 .realbits = 16,
1377 .shift = 0,
1378 .storagebits = 16,
1379 .endianness = IIO_LE,
1380 },
1381 .scan_index = GP2AP020A00F_SCAN_MODE_PROXIMITY,
1382 .address = GP2AP020A00F_D2_L_REG,
1383 .event_spec = gp2ap020a00f_event_spec_prox,
1384 .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_prox),
1385 },
1386 IIO_CHAN_SOFT_TIMESTAMP(GP2AP020A00F_CHAN_TIMESTAMP),
1387};
1388
1389static const struct iio_info gp2ap020a00f_info = {
1390 .read_raw = &gp2ap020a00f_read_raw,
1391 .read_event_value = &gp2ap020a00f_read_event_val,
1392 .read_event_config = &gp2ap020a00f_read_event_config,
1393 .write_event_value = &gp2ap020a00f_write_event_val,
1394 .write_event_config = &gp2ap020a00f_write_event_config,
1395 .driver_module = THIS_MODULE,
1396};
1397
1398static int gp2ap020a00f_buffer_postenable(struct iio_dev *indio_dev)
1399{
1400 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1401 int i, err = 0;
1402
1403 mutex_lock(&data->lock);
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413 for_each_set_bit(i, indio_dev->active_scan_mask,
1414 indio_dev->masklength) {
1415 switch (i) {
1416 case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
1417 err = gp2ap020a00f_exec_cmd(data,
1418 GP2AP020A00F_CMD_TRIGGER_CLEAR_EN);
1419 break;
1420 case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
1421 err = gp2ap020a00f_exec_cmd(data,
1422 GP2AP020A00F_CMD_TRIGGER_IR_EN);
1423 break;
1424 case GP2AP020A00F_SCAN_MODE_PROXIMITY:
1425 err = gp2ap020a00f_exec_cmd(data,
1426 GP2AP020A00F_CMD_TRIGGER_PROX_EN);
1427 break;
1428 }
1429 }
1430
1431 if (err < 0)
1432 goto error_unlock;
1433
1434 data->buffer = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
1435 if (!data->buffer) {
1436 err = -ENOMEM;
1437 goto error_unlock;
1438 }
1439
1440 err = iio_triggered_buffer_postenable(indio_dev);
1441
1442error_unlock:
1443 mutex_unlock(&data->lock);
1444
1445 return err;
1446}
1447
1448static int gp2ap020a00f_buffer_predisable(struct iio_dev *indio_dev)
1449{
1450 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1451 int i, err;
1452
1453 mutex_lock(&data->lock);
1454
1455 err = iio_triggered_buffer_predisable(indio_dev);
1456 if (err < 0)
1457 goto error_unlock;
1458
1459 for_each_set_bit(i, indio_dev->active_scan_mask,
1460 indio_dev->masklength) {
1461 switch (i) {
1462 case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
1463 err = gp2ap020a00f_exec_cmd(data,
1464 GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS);
1465 break;
1466 case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
1467 err = gp2ap020a00f_exec_cmd(data,
1468 GP2AP020A00F_CMD_TRIGGER_IR_DIS);
1469 break;
1470 case GP2AP020A00F_SCAN_MODE_PROXIMITY:
1471 err = gp2ap020a00f_exec_cmd(data,
1472 GP2AP020A00F_CMD_TRIGGER_PROX_DIS);
1473 break;
1474 }
1475 }
1476
1477 if (err == 0)
1478 kfree(data->buffer);
1479
1480error_unlock:
1481 mutex_unlock(&data->lock);
1482
1483 return err;
1484}
1485
1486static const struct iio_buffer_setup_ops gp2ap020a00f_buffer_setup_ops = {
1487 .postenable = &gp2ap020a00f_buffer_postenable,
1488 .predisable = &gp2ap020a00f_buffer_predisable,
1489};
1490
1491static const struct iio_trigger_ops gp2ap020a00f_trigger_ops = {
1492 .owner = THIS_MODULE,
1493};
1494
1495static int gp2ap020a00f_probe(struct i2c_client *client,
1496 const struct i2c_device_id *id)
1497{
1498 struct gp2ap020a00f_data *data;
1499 struct iio_dev *indio_dev;
1500 struct regmap *regmap;
1501 int err;
1502
1503 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1504 if (!indio_dev)
1505 return -ENOMEM;
1506
1507 data = iio_priv(indio_dev);
1508
1509 data->vled_reg = devm_regulator_get(&client->dev, "vled");
1510 if (IS_ERR(data->vled_reg))
1511 return PTR_ERR(data->vled_reg);
1512
1513 err = regulator_enable(data->vled_reg);
1514 if (err)
1515 return err;
1516
1517 regmap = devm_regmap_init_i2c(client, &gp2ap020a00f_regmap_config);
1518 if (IS_ERR(regmap)) {
1519 dev_err(&client->dev, "Regmap initialization failed.\n");
1520 err = PTR_ERR(regmap);
1521 goto error_regulator_disable;
1522 }
1523
1524
1525 err = regmap_bulk_write(regmap, GP2AP020A00F_OP_REG,
1526 gp2ap020a00f_reg_init_tab,
1527 ARRAY_SIZE(gp2ap020a00f_reg_init_tab));
1528
1529 if (err < 0) {
1530 dev_err(&client->dev, "Device initialization failed.\n");
1531 goto error_regulator_disable;
1532 }
1533
1534 i2c_set_clientdata(client, indio_dev);
1535
1536 data->client = client;
1537 data->cur_opmode = GP2AP020A00F_OPMODE_SHUTDOWN;
1538 data->regmap = regmap;
1539 init_waitqueue_head(&data->data_ready_queue);
1540
1541 mutex_init(&data->lock);
1542 indio_dev->dev.parent = &client->dev;
1543 indio_dev->channels = gp2ap020a00f_channels;
1544 indio_dev->num_channels = ARRAY_SIZE(gp2ap020a00f_channels);
1545 indio_dev->info = &gp2ap020a00f_info;
1546 indio_dev->name = id->name;
1547 indio_dev->modes = INDIO_DIRECT_MODE;
1548
1549
1550 err = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
1551 &gp2ap020a00f_trigger_handler, &gp2ap020a00f_buffer_setup_ops);
1552 if (err < 0)
1553 goto error_regulator_disable;
1554
1555
1556 data->trig = devm_iio_trigger_alloc(&client->dev, "%s-trigger",
1557 indio_dev->name);
1558 if (data->trig == NULL) {
1559 err = -ENOMEM;
1560 dev_err(&indio_dev->dev, "Failed to allocate iio trigger.\n");
1561 goto error_uninit_buffer;
1562 }
1563
1564
1565 err = request_threaded_irq(client->irq, NULL,
1566 &gp2ap020a00f_thresh_event_handler,
1567 IRQF_TRIGGER_FALLING |
1568 IRQF_ONESHOT,
1569 "gp2ap020a00f_als_event",
1570 indio_dev);
1571 if (err < 0) {
1572 dev_err(&client->dev, "Irq request failed.\n");
1573 goto error_uninit_buffer;
1574 }
1575
1576 data->trig->ops = &gp2ap020a00f_trigger_ops;
1577 data->trig->dev.parent = &data->client->dev;
1578
1579 init_irq_work(&data->work, gp2ap020a00f_iio_trigger_work);
1580
1581 err = iio_trigger_register(data->trig);
1582 if (err < 0) {
1583 dev_err(&client->dev, "Failed to register iio trigger.\n");
1584 goto error_free_irq;
1585 }
1586
1587 err = iio_device_register(indio_dev);
1588 if (err < 0)
1589 goto error_trigger_unregister;
1590
1591 return 0;
1592
1593error_trigger_unregister:
1594 iio_trigger_unregister(data->trig);
1595error_free_irq:
1596 free_irq(client->irq, indio_dev);
1597error_uninit_buffer:
1598 iio_triggered_buffer_cleanup(indio_dev);
1599error_regulator_disable:
1600 regulator_disable(data->vled_reg);
1601
1602 return err;
1603}
1604
1605static int gp2ap020a00f_remove(struct i2c_client *client)
1606{
1607 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1608 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1609 int err;
1610
1611 err = gp2ap020a00f_set_operation_mode(data,
1612 GP2AP020A00F_OPMODE_SHUTDOWN);
1613 if (err < 0)
1614 dev_err(&indio_dev->dev, "Failed to power off the device.\n");
1615
1616 iio_device_unregister(indio_dev);
1617 iio_trigger_unregister(data->trig);
1618 free_irq(client->irq, indio_dev);
1619 iio_triggered_buffer_cleanup(indio_dev);
1620 regulator_disable(data->vled_reg);
1621
1622 return 0;
1623}
1624
1625static const struct i2c_device_id gp2ap020a00f_id[] = {
1626 { GP2A_I2C_NAME, 0 },
1627 { }
1628};
1629
1630MODULE_DEVICE_TABLE(i2c, gp2ap020a00f_id);
1631
1632#ifdef CONFIG_OF
1633static const struct of_device_id gp2ap020a00f_of_match[] = {
1634 { .compatible = "sharp,gp2ap020a00f" },
1635 { }
1636};
1637#endif
1638
1639static struct i2c_driver gp2ap020a00f_driver = {
1640 .driver = {
1641 .name = GP2A_I2C_NAME,
1642 .of_match_table = of_match_ptr(gp2ap020a00f_of_match),
1643 .owner = THIS_MODULE,
1644 },
1645 .probe = gp2ap020a00f_probe,
1646 .remove = gp2ap020a00f_remove,
1647 .id_table = gp2ap020a00f_id,
1648};
1649
1650module_i2c_driver(gp2ap020a00f_driver);
1651
1652MODULE_AUTHOR("Jacek Anaszewski <j.anaszewski@samsung.com>");
1653MODULE_DESCRIPTION("Sharp GP2AP020A00F Proximity/ALS sensor driver");
1654MODULE_LICENSE("GPL v2");
1655
