linux/drivers/infiniband/hw/mlx4/mad.c
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   1/*
   2 * Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
   3 *
   4 * This software is available to you under a choice of one of two
   5 * licenses.  You may choose to be licensed under the terms of the GNU
   6 * General Public License (GPL) Version 2, available from the file
   7 * COPYING in the main directory of this source tree, or the
   8 * OpenIB.org BSD license below:
   9 *
  10 *     Redistribution and use in source and binary forms, with or
  11 *     without modification, are permitted provided that the following
  12 *     conditions are met:
  13 *
  14 *      - Redistributions of source code must retain the above
  15 *        copyright notice, this list of conditions and the following
  16 *        disclaimer.
  17 *
  18 *      - Redistributions in binary form must reproduce the above
  19 *        copyright notice, this list of conditions and the following
  20 *        disclaimer in the documentation and/or other materials
  21 *        provided with the distribution.
  22 *
  23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30 * SOFTWARE.
  31 */
  32
  33#include <rdma/ib_mad.h>
  34#include <rdma/ib_smi.h>
  35#include <rdma/ib_sa.h>
  36#include <rdma/ib_cache.h>
  37
  38#include <linux/random.h>
  39#include <linux/mlx4/cmd.h>
  40#include <linux/gfp.h>
  41#include <rdma/ib_pma.h>
  42
  43#include "mlx4_ib.h"
  44
  45enum {
  46        MLX4_IB_VENDOR_CLASS1 = 0x9,
  47        MLX4_IB_VENDOR_CLASS2 = 0xa
  48};
  49
  50#define MLX4_TUN_SEND_WRID_SHIFT 34
  51#define MLX4_TUN_QPN_SHIFT 32
  52#define MLX4_TUN_WRID_RECV (((u64) 1) << MLX4_TUN_SEND_WRID_SHIFT)
  53#define MLX4_TUN_SET_WRID_QPN(a) (((u64) ((a) & 0x3)) << MLX4_TUN_QPN_SHIFT)
  54
  55#define MLX4_TUN_IS_RECV(a)  (((a) >>  MLX4_TUN_SEND_WRID_SHIFT) & 0x1)
  56#define MLX4_TUN_WRID_QPN(a) (((a) >> MLX4_TUN_QPN_SHIFT) & 0x3)
  57
  58 /* Port mgmt change event handling */
  59
  60#define GET_BLK_PTR_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.block_ptr)
  61#define GET_MASK_FROM_EQE(eqe) be32_to_cpu(eqe->event.port_mgmt_change.params.tbl_change_info.tbl_entries_mask)
  62#define NUM_IDX_IN_PKEY_TBL_BLK 32
  63#define GUID_TBL_ENTRY_SIZE 8      /* size in bytes */
  64#define GUID_TBL_BLK_NUM_ENTRIES 8
  65#define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
  66
  67struct mlx4_mad_rcv_buf {
  68        struct ib_grh grh;
  69        u8 payload[256];
  70} __packed;
  71
  72struct mlx4_mad_snd_buf {
  73        u8 payload[256];
  74} __packed;
  75
  76struct mlx4_tunnel_mad {
  77        struct ib_grh grh;
  78        struct mlx4_ib_tunnel_header hdr;
  79        struct ib_mad mad;
  80} __packed;
  81
  82struct mlx4_rcv_tunnel_mad {
  83        struct mlx4_rcv_tunnel_hdr hdr;
  84        struct ib_grh grh;
  85        struct ib_mad mad;
  86} __packed;
  87
  88static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num);
  89static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num);
  90static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
  91                                int block, u32 change_bitmap);
  92
  93__be64 mlx4_ib_gen_node_guid(void)
  94{
  95#define NODE_GUID_HI    ((u64) (((u64)IB_OPENIB_OUI) << 40))
  96        return cpu_to_be64(NODE_GUID_HI | prandom_u32());
  97}
  98
  99__be64 mlx4_ib_get_new_demux_tid(struct mlx4_ib_demux_ctx *ctx)
 100{
 101        return cpu_to_be64(atomic_inc_return(&ctx->tid)) |
 102                cpu_to_be64(0xff00000000000000LL);
 103}
 104
 105int mlx4_MAD_IFC(struct mlx4_ib_dev *dev, int mad_ifc_flags,
 106                 int port, const struct ib_wc *in_wc,
 107                 const struct ib_grh *in_grh,
 108                 const void *in_mad, void *response_mad)
 109{
 110        struct mlx4_cmd_mailbox *inmailbox, *outmailbox;
 111        void *inbox;
 112        int err;
 113        u32 in_modifier = port;
 114        u8 op_modifier = 0;
 115
 116        inmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 117        if (IS_ERR(inmailbox))
 118                return PTR_ERR(inmailbox);
 119        inbox = inmailbox->buf;
 120
 121        outmailbox = mlx4_alloc_cmd_mailbox(dev->dev);
 122        if (IS_ERR(outmailbox)) {
 123                mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 124                return PTR_ERR(outmailbox);
 125        }
 126
 127        memcpy(inbox, in_mad, 256);
 128
 129        /*
 130         * Key check traps can't be generated unless we have in_wc to
 131         * tell us where to send the trap.
 132         */
 133        if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_MKEY) || !in_wc)
 134                op_modifier |= 0x1;
 135        if ((mad_ifc_flags & MLX4_MAD_IFC_IGNORE_BKEY) || !in_wc)
 136                op_modifier |= 0x2;
 137        if (mlx4_is_mfunc(dev->dev) &&
 138            (mad_ifc_flags & MLX4_MAD_IFC_NET_VIEW || in_wc))
 139                op_modifier |= 0x8;
 140
 141        if (in_wc) {
 142                struct {
 143                        __be32          my_qpn;
 144                        u32             reserved1;
 145                        __be32          rqpn;
 146                        u8              sl;
 147                        u8              g_path;
 148                        u16             reserved2[2];
 149                        __be16          pkey;
 150                        u32             reserved3[11];
 151                        u8              grh[40];
 152                } *ext_info;
 153
 154                memset(inbox + 256, 0, 256);
 155                ext_info = inbox + 256;
 156
 157                ext_info->my_qpn = cpu_to_be32(in_wc->qp->qp_num);
 158                ext_info->rqpn   = cpu_to_be32(in_wc->src_qp);
 159                ext_info->sl     = in_wc->sl << 4;
 160                ext_info->g_path = in_wc->dlid_path_bits |
 161                        (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
 162                ext_info->pkey   = cpu_to_be16(in_wc->pkey_index);
 163
 164                if (in_grh)
 165                        memcpy(ext_info->grh, in_grh, 40);
 166
 167                op_modifier |= 0x4;
 168
 169                in_modifier |= in_wc->slid << 16;
 170        }
 171
 172        err = mlx4_cmd_box(dev->dev, inmailbox->dma, outmailbox->dma, in_modifier,
 173                           mlx4_is_master(dev->dev) ? (op_modifier & ~0x8) : op_modifier,
 174                           MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C,
 175                           (op_modifier & 0x8) ? MLX4_CMD_NATIVE : MLX4_CMD_WRAPPED);
 176
 177        if (!err)
 178                memcpy(response_mad, outmailbox->buf, 256);
 179
 180        mlx4_free_cmd_mailbox(dev->dev, inmailbox);
 181        mlx4_free_cmd_mailbox(dev->dev, outmailbox);
 182
 183        return err;
 184}
 185
 186static void update_sm_ah(struct mlx4_ib_dev *dev, u8 port_num, u16 lid, u8 sl)
 187{
 188        struct ib_ah *new_ah;
 189        struct ib_ah_attr ah_attr;
 190        unsigned long flags;
 191
 192        if (!dev->send_agent[port_num - 1][0])
 193                return;
 194
 195        memset(&ah_attr, 0, sizeof ah_attr);
 196        ah_attr.dlid     = lid;
 197        ah_attr.sl       = sl;
 198        ah_attr.port_num = port_num;
 199
 200        new_ah = ib_create_ah(dev->send_agent[port_num - 1][0]->qp->pd,
 201                              &ah_attr);
 202        if (IS_ERR(new_ah))
 203                return;
 204
 205        spin_lock_irqsave(&dev->sm_lock, flags);
 206        if (dev->sm_ah[port_num - 1])
 207                ib_destroy_ah(dev->sm_ah[port_num - 1]);
 208        dev->sm_ah[port_num - 1] = new_ah;
 209        spin_unlock_irqrestore(&dev->sm_lock, flags);
 210}
 211
 212/*
 213 * Snoop SM MADs for port info, GUID info, and  P_Key table sets, so we can
 214 * synthesize LID change, Client-Rereg, GID change, and P_Key change events.
 215 */
 216static void smp_snoop(struct ib_device *ibdev, u8 port_num, const struct ib_mad *mad,
 217                      u16 prev_lid)
 218{
 219        struct ib_port_info *pinfo;
 220        u16 lid;
 221        __be16 *base;
 222        u32 bn, pkey_change_bitmap;
 223        int i;
 224
 225
 226        struct mlx4_ib_dev *dev = to_mdev(ibdev);
 227        if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 228             mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 229            mad->mad_hdr.method == IB_MGMT_METHOD_SET)
 230                switch (mad->mad_hdr.attr_id) {
 231                case IB_SMP_ATTR_PORT_INFO:
 232                        pinfo = (struct ib_port_info *) ((struct ib_smp *) mad)->data;
 233                        lid = be16_to_cpu(pinfo->lid);
 234
 235                        update_sm_ah(dev, port_num,
 236                                     be16_to_cpu(pinfo->sm_lid),
 237                                     pinfo->neighbormtu_mastersmsl & 0xf);
 238
 239                        if (pinfo->clientrereg_resv_subnetto & 0x80)
 240                                handle_client_rereg_event(dev, port_num);
 241
 242                        if (prev_lid != lid)
 243                                handle_lid_change_event(dev, port_num);
 244                        break;
 245
 246                case IB_SMP_ATTR_PKEY_TABLE:
 247                        if (!mlx4_is_mfunc(dev->dev)) {
 248                                mlx4_ib_dispatch_event(dev, port_num,
 249                                                       IB_EVENT_PKEY_CHANGE);
 250                                break;
 251                        }
 252
 253                        /* at this point, we are running in the master.
 254                         * Slaves do not receive SMPs.
 255                         */
 256                        bn  = be32_to_cpu(((struct ib_smp *)mad)->attr_mod) & 0xFFFF;
 257                        base = (__be16 *) &(((struct ib_smp *)mad)->data[0]);
 258                        pkey_change_bitmap = 0;
 259                        for (i = 0; i < 32; i++) {
 260                                pr_debug("PKEY[%d] = x%x\n",
 261                                         i + bn*32, be16_to_cpu(base[i]));
 262                                if (be16_to_cpu(base[i]) !=
 263                                    dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32]) {
 264                                        pkey_change_bitmap |= (1 << i);
 265                                        dev->pkeys.phys_pkey_cache[port_num - 1][i + bn*32] =
 266                                                be16_to_cpu(base[i]);
 267                                }
 268                        }
 269                        pr_debug("PKEY Change event: port=%d, "
 270                                 "block=0x%x, change_bitmap=0x%x\n",
 271                                 port_num, bn, pkey_change_bitmap);
 272
 273                        if (pkey_change_bitmap) {
 274                                mlx4_ib_dispatch_event(dev, port_num,
 275                                                       IB_EVENT_PKEY_CHANGE);
 276                                if (!dev->sriov.is_going_down)
 277                                        __propagate_pkey_ev(dev, port_num, bn,
 278                                                            pkey_change_bitmap);
 279                        }
 280                        break;
 281
 282                case IB_SMP_ATTR_GUID_INFO:
 283                        /* paravirtualized master's guid is guid 0 -- does not change */
 284                        if (!mlx4_is_master(dev->dev))
 285                                mlx4_ib_dispatch_event(dev, port_num,
 286                                                       IB_EVENT_GID_CHANGE);
 287                        /*if master, notify relevant slaves*/
 288                        if (mlx4_is_master(dev->dev) &&
 289                            !dev->sriov.is_going_down) {
 290                                bn = be32_to_cpu(((struct ib_smp *)mad)->attr_mod);
 291                                mlx4_ib_update_cache_on_guid_change(dev, bn, port_num,
 292                                                                    (u8 *)(&((struct ib_smp *)mad)->data));
 293                                mlx4_ib_notify_slaves_on_guid_change(dev, bn, port_num,
 294                                                                     (u8 *)(&((struct ib_smp *)mad)->data));
 295                        }
 296                        break;
 297
 298                default:
 299                        break;
 300                }
 301}
 302
 303static void __propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 304                                int block, u32 change_bitmap)
 305{
 306        int i, ix, slave, err;
 307        int have_event = 0;
 308
 309        for (slave = 0; slave < dev->dev->caps.sqp_demux; slave++) {
 310                if (slave == mlx4_master_func_num(dev->dev))
 311                        continue;
 312                if (!mlx4_is_slave_active(dev->dev, slave))
 313                        continue;
 314
 315                have_event = 0;
 316                for (i = 0; i < 32; i++) {
 317                        if (!(change_bitmap & (1 << i)))
 318                                continue;
 319                        for (ix = 0;
 320                             ix < dev->dev->caps.pkey_table_len[port_num]; ix++) {
 321                                if (dev->pkeys.virt2phys_pkey[slave][port_num - 1]
 322                                    [ix] == i + 32 * block) {
 323                                        err = mlx4_gen_pkey_eqe(dev->dev, slave, port_num);
 324                                        pr_debug("propagate_pkey_ev: slave %d,"
 325                                                 " port %d, ix %d (%d)\n",
 326                                                 slave, port_num, ix, err);
 327                                        have_event = 1;
 328                                        break;
 329                                }
 330                        }
 331                        if (have_event)
 332                                break;
 333                }
 334        }
 335}
 336
 337static void node_desc_override(struct ib_device *dev,
 338                               struct ib_mad *mad)
 339{
 340        unsigned long flags;
 341
 342        if ((mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 343             mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 344            mad->mad_hdr.method == IB_MGMT_METHOD_GET_RESP &&
 345            mad->mad_hdr.attr_id == IB_SMP_ATTR_NODE_DESC) {
 346                spin_lock_irqsave(&to_mdev(dev)->sm_lock, flags);
 347                memcpy(((struct ib_smp *) mad)->data, dev->node_desc, 64);
 348                spin_unlock_irqrestore(&to_mdev(dev)->sm_lock, flags);
 349        }
 350}
 351
 352static void forward_trap(struct mlx4_ib_dev *dev, u8 port_num, const struct ib_mad *mad)
 353{
 354        int qpn = mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_SUBN_LID_ROUTED;
 355        struct ib_mad_send_buf *send_buf;
 356        struct ib_mad_agent *agent = dev->send_agent[port_num - 1][qpn];
 357        int ret;
 358        unsigned long flags;
 359
 360        if (agent) {
 361                send_buf = ib_create_send_mad(agent, qpn, 0, 0, IB_MGMT_MAD_HDR,
 362                                              IB_MGMT_MAD_DATA, GFP_ATOMIC,
 363                                              IB_MGMT_BASE_VERSION);
 364                if (IS_ERR(send_buf))
 365                        return;
 366                /*
 367                 * We rely here on the fact that MLX QPs don't use the
 368                 * address handle after the send is posted (this is
 369                 * wrong following the IB spec strictly, but we know
 370                 * it's OK for our devices).
 371                 */
 372                spin_lock_irqsave(&dev->sm_lock, flags);
 373                memcpy(send_buf->mad, mad, sizeof *mad);
 374                if ((send_buf->ah = dev->sm_ah[port_num - 1]))
 375                        ret = ib_post_send_mad(send_buf, NULL);
 376                else
 377                        ret = -EINVAL;
 378                spin_unlock_irqrestore(&dev->sm_lock, flags);
 379
 380                if (ret)
 381                        ib_free_send_mad(send_buf);
 382        }
 383}
 384
 385static int mlx4_ib_demux_sa_handler(struct ib_device *ibdev, int port, int slave,
 386                                                             struct ib_sa_mad *sa_mad)
 387{
 388        int ret = 0;
 389
 390        /* dispatch to different sa handlers */
 391        switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
 392        case IB_SA_ATTR_MC_MEMBER_REC:
 393                ret = mlx4_ib_mcg_demux_handler(ibdev, port, slave, sa_mad);
 394                break;
 395        default:
 396                break;
 397        }
 398        return ret;
 399}
 400
 401int mlx4_ib_find_real_gid(struct ib_device *ibdev, u8 port, __be64 guid)
 402{
 403        struct mlx4_ib_dev *dev = to_mdev(ibdev);
 404        int i;
 405
 406        for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
 407                if (dev->sriov.demux[port - 1].guid_cache[i] == guid)
 408                        return i;
 409        }
 410        return -1;
 411}
 412
 413
 414static int find_slave_port_pkey_ix(struct mlx4_ib_dev *dev, int slave,
 415                                   u8 port, u16 pkey, u16 *ix)
 416{
 417        int i, ret;
 418        u8 unassigned_pkey_ix, pkey_ix, partial_ix = 0xFF;
 419        u16 slot_pkey;
 420
 421        if (slave == mlx4_master_func_num(dev->dev))
 422                return ib_find_cached_pkey(&dev->ib_dev, port, pkey, ix);
 423
 424        unassigned_pkey_ix = dev->dev->phys_caps.pkey_phys_table_len[port] - 1;
 425
 426        for (i = 0; i < dev->dev->caps.pkey_table_len[port]; i++) {
 427                if (dev->pkeys.virt2phys_pkey[slave][port - 1][i] == unassigned_pkey_ix)
 428                        continue;
 429
 430                pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][i];
 431
 432                ret = ib_get_cached_pkey(&dev->ib_dev, port, pkey_ix, &slot_pkey);
 433                if (ret)
 434                        continue;
 435                if ((slot_pkey & 0x7FFF) == (pkey & 0x7FFF)) {
 436                        if (slot_pkey & 0x8000) {
 437                                *ix = (u16) pkey_ix;
 438                                return 0;
 439                        } else {
 440                                /* take first partial pkey index found */
 441                                if (partial_ix == 0xFF)
 442                                        partial_ix = pkey_ix;
 443                        }
 444                }
 445        }
 446
 447        if (partial_ix < 0xFF) {
 448                *ix = (u16) partial_ix;
 449                return 0;
 450        }
 451
 452        return -EINVAL;
 453}
 454
 455int mlx4_ib_send_to_slave(struct mlx4_ib_dev *dev, int slave, u8 port,
 456                          enum ib_qp_type dest_qpt, struct ib_wc *wc,
 457                          struct ib_grh *grh, struct ib_mad *mad)
 458{
 459        struct ib_sge list;
 460        struct ib_send_wr wr, *bad_wr;
 461        struct mlx4_ib_demux_pv_ctx *tun_ctx;
 462        struct mlx4_ib_demux_pv_qp *tun_qp;
 463        struct mlx4_rcv_tunnel_mad *tun_mad;
 464        struct ib_ah_attr attr;
 465        struct ib_ah *ah;
 466        struct ib_qp *src_qp = NULL;
 467        unsigned tun_tx_ix = 0;
 468        int dqpn;
 469        int ret = 0;
 470        u16 tun_pkey_ix;
 471        u16 cached_pkey;
 472        u8 is_eth = dev->dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH;
 473
 474        if (dest_qpt > IB_QPT_GSI)
 475                return -EINVAL;
 476
 477        tun_ctx = dev->sriov.demux[port-1].tun[slave];
 478
 479        /* check if proxy qp created */
 480        if (!tun_ctx || tun_ctx->state != DEMUX_PV_STATE_ACTIVE)
 481                return -EAGAIN;
 482
 483        if (!dest_qpt)
 484                tun_qp = &tun_ctx->qp[0];
 485        else
 486                tun_qp = &tun_ctx->qp[1];
 487
 488        /* compute P_Key index to put in tunnel header for slave */
 489        if (dest_qpt) {
 490                u16 pkey_ix;
 491                ret = ib_get_cached_pkey(&dev->ib_dev, port, wc->pkey_index, &cached_pkey);
 492                if (ret)
 493                        return -EINVAL;
 494
 495                ret = find_slave_port_pkey_ix(dev, slave, port, cached_pkey, &pkey_ix);
 496                if (ret)
 497                        return -EINVAL;
 498                tun_pkey_ix = pkey_ix;
 499        } else
 500                tun_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
 501
 502        dqpn = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave + port + (dest_qpt * 2) - 1;
 503
 504        /* get tunnel tx data buf for slave */
 505        src_qp = tun_qp->qp;
 506
 507        /* create ah. Just need an empty one with the port num for the post send.
 508         * The driver will set the force loopback bit in post_send */
 509        memset(&attr, 0, sizeof attr);
 510        attr.port_num = port;
 511        if (is_eth) {
 512                memcpy(&attr.grh.dgid.raw[0], &grh->dgid.raw[0], 16);
 513                attr.ah_flags = IB_AH_GRH;
 514        }
 515        ah = ib_create_ah(tun_ctx->pd, &attr);
 516        if (IS_ERR(ah))
 517                return -ENOMEM;
 518
 519        /* allocate tunnel tx buf after pass failure returns */
 520        spin_lock(&tun_qp->tx_lock);
 521        if (tun_qp->tx_ix_head - tun_qp->tx_ix_tail >=
 522            (MLX4_NUM_TUNNEL_BUFS - 1))
 523                ret = -EAGAIN;
 524        else
 525                tun_tx_ix = (++tun_qp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
 526        spin_unlock(&tun_qp->tx_lock);
 527        if (ret)
 528                goto out;
 529
 530        tun_mad = (struct mlx4_rcv_tunnel_mad *) (tun_qp->tx_ring[tun_tx_ix].buf.addr);
 531        if (tun_qp->tx_ring[tun_tx_ix].ah)
 532                ib_destroy_ah(tun_qp->tx_ring[tun_tx_ix].ah);
 533        tun_qp->tx_ring[tun_tx_ix].ah = ah;
 534        ib_dma_sync_single_for_cpu(&dev->ib_dev,
 535                                   tun_qp->tx_ring[tun_tx_ix].buf.map,
 536                                   sizeof (struct mlx4_rcv_tunnel_mad),
 537                                   DMA_TO_DEVICE);
 538
 539        /* copy over to tunnel buffer */
 540        if (grh)
 541                memcpy(&tun_mad->grh, grh, sizeof *grh);
 542        memcpy(&tun_mad->mad, mad, sizeof *mad);
 543
 544        /* adjust tunnel data */
 545        tun_mad->hdr.pkey_index = cpu_to_be16(tun_pkey_ix);
 546        tun_mad->hdr.flags_src_qp = cpu_to_be32(wc->src_qp & 0xFFFFFF);
 547        tun_mad->hdr.g_ml_path = (grh && (wc->wc_flags & IB_WC_GRH)) ? 0x80 : 0;
 548
 549        if (is_eth) {
 550                u16 vlan = 0;
 551                if (mlx4_get_slave_default_vlan(dev->dev, port, slave, &vlan,
 552                                                NULL)) {
 553                        /* VST mode */
 554                        if (vlan != wc->vlan_id)
 555                                /* Packet vlan is not the VST-assigned vlan.
 556                                 * Drop the packet.
 557                                 */
 558                                goto out;
 559                         else
 560                                /* Remove the vlan tag before forwarding
 561                                 * the packet to the VF.
 562                                 */
 563                                vlan = 0xffff;
 564                } else {
 565                        vlan = wc->vlan_id;
 566                }
 567
 568                tun_mad->hdr.sl_vid = cpu_to_be16(vlan);
 569                memcpy((char *)&tun_mad->hdr.mac_31_0, &(wc->smac[0]), 4);
 570                memcpy((char *)&tun_mad->hdr.slid_mac_47_32, &(wc->smac[4]), 2);
 571        } else {
 572                tun_mad->hdr.sl_vid = cpu_to_be16(((u16)(wc->sl)) << 12);
 573                tun_mad->hdr.slid_mac_47_32 = cpu_to_be16(wc->slid);
 574        }
 575
 576        ib_dma_sync_single_for_device(&dev->ib_dev,
 577                                      tun_qp->tx_ring[tun_tx_ix].buf.map,
 578                                      sizeof (struct mlx4_rcv_tunnel_mad),
 579                                      DMA_TO_DEVICE);
 580
 581        list.addr = tun_qp->tx_ring[tun_tx_ix].buf.map;
 582        list.length = sizeof (struct mlx4_rcv_tunnel_mad);
 583        list.lkey = tun_ctx->mr->lkey;
 584
 585        wr.wr.ud.ah = ah;
 586        wr.wr.ud.port_num = port;
 587        wr.wr.ud.remote_qkey = IB_QP_SET_QKEY;
 588        wr.wr.ud.remote_qpn = dqpn;
 589        wr.next = NULL;
 590        wr.wr_id = ((u64) tun_tx_ix) | MLX4_TUN_SET_WRID_QPN(dest_qpt);
 591        wr.sg_list = &list;
 592        wr.num_sge = 1;
 593        wr.opcode = IB_WR_SEND;
 594        wr.send_flags = IB_SEND_SIGNALED;
 595
 596        ret = ib_post_send(src_qp, &wr, &bad_wr);
 597out:
 598        if (ret)
 599                ib_destroy_ah(ah);
 600        return ret;
 601}
 602
 603static int mlx4_ib_demux_mad(struct ib_device *ibdev, u8 port,
 604                        struct ib_wc *wc, struct ib_grh *grh,
 605                        struct ib_mad *mad)
 606{
 607        struct mlx4_ib_dev *dev = to_mdev(ibdev);
 608        int err;
 609        int slave;
 610        u8 *slave_id;
 611        int is_eth = 0;
 612
 613        if (rdma_port_get_link_layer(ibdev, port) == IB_LINK_LAYER_INFINIBAND)
 614                is_eth = 0;
 615        else
 616                is_eth = 1;
 617
 618        if (is_eth) {
 619                if (!(wc->wc_flags & IB_WC_GRH)) {
 620                        mlx4_ib_warn(ibdev, "RoCE grh not present.\n");
 621                        return -EINVAL;
 622                }
 623                if (mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_CM) {
 624                        mlx4_ib_warn(ibdev, "RoCE mgmt class is not CM\n");
 625                        return -EINVAL;
 626                }
 627                if (mlx4_get_slave_from_roce_gid(dev->dev, port, grh->dgid.raw, &slave)) {
 628                        mlx4_ib_warn(ibdev, "failed matching grh\n");
 629                        return -ENOENT;
 630                }
 631                if (slave >= dev->dev->caps.sqp_demux) {
 632                        mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 633                                     slave, dev->dev->caps.sqp_demux);
 634                        return -ENOENT;
 635                }
 636
 637                if (mlx4_ib_demux_cm_handler(ibdev, port, NULL, mad))
 638                        return 0;
 639
 640                err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 641                if (err)
 642                        pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 643                                 slave, err);
 644                return 0;
 645        }
 646
 647        /* Initially assume that this mad is for us */
 648        slave = mlx4_master_func_num(dev->dev);
 649
 650        /* See if the slave id is encoded in a response mad */
 651        if (mad->mad_hdr.method & 0x80) {
 652                slave_id = (u8 *) &mad->mad_hdr.tid;
 653                slave = *slave_id;
 654                if (slave != 255) /*255 indicates the dom0*/
 655                        *slave_id = 0; /* remap tid */
 656        }
 657
 658        /* If a grh is present, we demux according to it */
 659        if (wc->wc_flags & IB_WC_GRH) {
 660                slave = mlx4_ib_find_real_gid(ibdev, port, grh->dgid.global.interface_id);
 661                if (slave < 0) {
 662                        mlx4_ib_warn(ibdev, "failed matching grh\n");
 663                        return -ENOENT;
 664                }
 665        }
 666        /* Class-specific handling */
 667        switch (mad->mad_hdr.mgmt_class) {
 668        case IB_MGMT_CLASS_SUBN_LID_ROUTED:
 669        case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
 670                /* 255 indicates the dom0 */
 671                if (slave != 255 && slave != mlx4_master_func_num(dev->dev)) {
 672                        if (!mlx4_vf_smi_enabled(dev->dev, slave, port))
 673                                return -EPERM;
 674                        /* for a VF. drop unsolicited MADs */
 675                        if (!(mad->mad_hdr.method & IB_MGMT_METHOD_RESP)) {
 676                                mlx4_ib_warn(ibdev, "demux QP0. rejecting unsolicited mad for slave %d class 0x%x, method 0x%x\n",
 677                                             slave, mad->mad_hdr.mgmt_class,
 678                                             mad->mad_hdr.method);
 679                                return -EINVAL;
 680                        }
 681                }
 682                break;
 683        case IB_MGMT_CLASS_SUBN_ADM:
 684                if (mlx4_ib_demux_sa_handler(ibdev, port, slave,
 685                                             (struct ib_sa_mad *) mad))
 686                        return 0;
 687                break;
 688        case IB_MGMT_CLASS_CM:
 689                if (mlx4_ib_demux_cm_handler(ibdev, port, &slave, mad))
 690                        return 0;
 691                break;
 692        case IB_MGMT_CLASS_DEVICE_MGMT:
 693                if (mad->mad_hdr.method != IB_MGMT_METHOD_GET_RESP)
 694                        return 0;
 695                break;
 696        default:
 697                /* Drop unsupported classes for slaves in tunnel mode */
 698                if (slave != mlx4_master_func_num(dev->dev)) {
 699                        pr_debug("dropping unsupported ingress mad from class:%d "
 700                                 "for slave:%d\n", mad->mad_hdr.mgmt_class, slave);
 701                        return 0;
 702                }
 703        }
 704        /*make sure that no slave==255 was not handled yet.*/
 705        if (slave >= dev->dev->caps.sqp_demux) {
 706                mlx4_ib_warn(ibdev, "slave id: %d is bigger than allowed:%d\n",
 707                             slave, dev->dev->caps.sqp_demux);
 708                return -ENOENT;
 709        }
 710
 711        err = mlx4_ib_send_to_slave(dev, slave, port, wc->qp->qp_type, wc, grh, mad);
 712        if (err)
 713                pr_debug("failed sending to slave %d via tunnel qp (%d)\n",
 714                         slave, err);
 715        return 0;
 716}
 717
 718static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 719                        const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 720                        const struct ib_mad *in_mad, struct ib_mad *out_mad)
 721{
 722        u16 slid, prev_lid = 0;
 723        int err;
 724        struct ib_port_attr pattr;
 725
 726        if (in_wc && in_wc->qp->qp_num) {
 727                pr_debug("received MAD: slid:%d sqpn:%d "
 728                        "dlid_bits:%d dqpn:%d wc_flags:0x%x, cls %x, mtd %x, atr %x\n",
 729                        in_wc->slid, in_wc->src_qp,
 730                        in_wc->dlid_path_bits,
 731                        in_wc->qp->qp_num,
 732                        in_wc->wc_flags,
 733                        in_mad->mad_hdr.mgmt_class, in_mad->mad_hdr.method,
 734                        be16_to_cpu(in_mad->mad_hdr.attr_id));
 735                if (in_wc->wc_flags & IB_WC_GRH) {
 736                        pr_debug("sgid_hi:0x%016llx sgid_lo:0x%016llx\n",
 737                                 be64_to_cpu(in_grh->sgid.global.subnet_prefix),
 738                                 be64_to_cpu(in_grh->sgid.global.interface_id));
 739                        pr_debug("dgid_hi:0x%016llx dgid_lo:0x%016llx\n",
 740                                 be64_to_cpu(in_grh->dgid.global.subnet_prefix),
 741                                 be64_to_cpu(in_grh->dgid.global.interface_id));
 742                }
 743        }
 744
 745        slid = in_wc ? in_wc->slid : be16_to_cpu(IB_LID_PERMISSIVE);
 746
 747        if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP && slid == 0) {
 748                forward_trap(to_mdev(ibdev), port_num, in_mad);
 749                return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 750        }
 751
 752        if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 753            in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) {
 754                if (in_mad->mad_hdr.method   != IB_MGMT_METHOD_GET &&
 755                    in_mad->mad_hdr.method   != IB_MGMT_METHOD_SET &&
 756                    in_mad->mad_hdr.method   != IB_MGMT_METHOD_TRAP_REPRESS)
 757                        return IB_MAD_RESULT_SUCCESS;
 758
 759                /*
 760                 * Don't process SMInfo queries -- the SMA can't handle them.
 761                 */
 762                if (in_mad->mad_hdr.attr_id == IB_SMP_ATTR_SM_INFO)
 763                        return IB_MAD_RESULT_SUCCESS;
 764        } else if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT ||
 765                   in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS1   ||
 766                   in_mad->mad_hdr.mgmt_class == MLX4_IB_VENDOR_CLASS2   ||
 767                   in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_CONG_MGMT) {
 768                if (in_mad->mad_hdr.method  != IB_MGMT_METHOD_GET &&
 769                    in_mad->mad_hdr.method  != IB_MGMT_METHOD_SET)
 770                        return IB_MAD_RESULT_SUCCESS;
 771        } else
 772                return IB_MAD_RESULT_SUCCESS;
 773
 774        if ((in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_LID_ROUTED ||
 775             in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE) &&
 776            in_mad->mad_hdr.method == IB_MGMT_METHOD_SET &&
 777            in_mad->mad_hdr.attr_id == IB_SMP_ATTR_PORT_INFO &&
 778            !ib_query_port(ibdev, port_num, &pattr))
 779                prev_lid = pattr.lid;
 780
 781        err = mlx4_MAD_IFC(to_mdev(ibdev),
 782                           (mad_flags & IB_MAD_IGNORE_MKEY ? MLX4_MAD_IFC_IGNORE_MKEY : 0) |
 783                           (mad_flags & IB_MAD_IGNORE_BKEY ? MLX4_MAD_IFC_IGNORE_BKEY : 0) |
 784                           MLX4_MAD_IFC_NET_VIEW,
 785                           port_num, in_wc, in_grh, in_mad, out_mad);
 786        if (err)
 787                return IB_MAD_RESULT_FAILURE;
 788
 789        if (!out_mad->mad_hdr.status) {
 790                if (!(to_mdev(ibdev)->dev->caps.flags & MLX4_DEV_CAP_FLAG_PORT_MNG_CHG_EV))
 791                        smp_snoop(ibdev, port_num, in_mad, prev_lid);
 792                /* slaves get node desc from FW */
 793                if (!mlx4_is_slave(to_mdev(ibdev)->dev))
 794                        node_desc_override(ibdev, out_mad);
 795        }
 796
 797        /* set return bit in status of directed route responses */
 798        if (in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE)
 799                out_mad->mad_hdr.status |= cpu_to_be16(1 << 15);
 800
 801        if (in_mad->mad_hdr.method == IB_MGMT_METHOD_TRAP_REPRESS)
 802                /* no response for trap repress */
 803                return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_CONSUMED;
 804
 805        return IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 806}
 807
 808static void edit_counter(struct mlx4_counter *cnt,
 809                                        struct ib_pma_portcounters *pma_cnt)
 810{
 811        ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
 812                             (be64_to_cpu(cnt->tx_bytes) >> 2));
 813        ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
 814                             (be64_to_cpu(cnt->rx_bytes) >> 2));
 815        ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
 816                             be64_to_cpu(cnt->tx_frames));
 817        ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
 818                             be64_to_cpu(cnt->rx_frames));
 819}
 820
 821static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 822                        const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 823                        const struct ib_mad *in_mad, struct ib_mad *out_mad)
 824{
 825        struct mlx4_counter counter_stats;
 826        struct mlx4_ib_dev *dev = to_mdev(ibdev);
 827        int err;
 828
 829        if (in_mad->mad_hdr.mgmt_class != IB_MGMT_CLASS_PERF_MGMT)
 830                return -EINVAL;
 831
 832        memset(&counter_stats, 0, sizeof(counter_stats));
 833        err = mlx4_get_counter_stats(dev->dev,
 834                                     dev->counters[port_num - 1].index,
 835                                     &counter_stats, 0);
 836        if (err)
 837                err = IB_MAD_RESULT_FAILURE;
 838        else {
 839                memset(out_mad->data, 0, sizeof out_mad->data);
 840                switch (counter_stats.counter_mode & 0xf) {
 841                case 0:
 842                        edit_counter(&counter_stats,
 843                                     (void *)(out_mad->data + 40));
 844                        err = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
 845                        break;
 846                default:
 847                        err = IB_MAD_RESULT_FAILURE;
 848                }
 849        }
 850
 851        return err;
 852}
 853
 854int mlx4_ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
 855                        const struct ib_wc *in_wc, const struct ib_grh *in_grh,
 856                        const struct ib_mad_hdr *in, size_t in_mad_size,
 857                        struct ib_mad_hdr *out, size_t *out_mad_size,
 858                        u16 *out_mad_pkey_index)
 859{
 860        struct mlx4_ib_dev *dev = to_mdev(ibdev);
 861        const struct ib_mad *in_mad = (const struct ib_mad *)in;
 862        struct ib_mad *out_mad = (struct ib_mad *)out;
 863        enum rdma_link_layer link = rdma_port_get_link_layer(ibdev, port_num);
 864
 865        if (WARN_ON_ONCE(in_mad_size != sizeof(*in_mad) ||
 866                         *out_mad_size != sizeof(*out_mad)))
 867                return IB_MAD_RESULT_FAILURE;
 868
 869        /* iboe_process_mad() which uses the HCA flow-counters to implement IB PMA
 870         * queries, should be called only by VFs and for that specific purpose
 871         */
 872        if (link == IB_LINK_LAYER_INFINIBAND) {
 873                if (mlx4_is_slave(dev->dev) &&
 874                    in_mad->mad_hdr.mgmt_class == IB_MGMT_CLASS_PERF_MGMT &&
 875                    in_mad->mad_hdr.attr_id == IB_PMA_PORT_COUNTERS)
 876                        return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
 877                                                in_grh, in_mad, out_mad);
 878
 879                return ib_process_mad(ibdev, mad_flags, port_num, in_wc,
 880                                      in_grh, in_mad, out_mad);
 881        }
 882
 883        if (link == IB_LINK_LAYER_ETHERNET)
 884                return iboe_process_mad(ibdev, mad_flags, port_num, in_wc,
 885                                        in_grh, in_mad, out_mad);
 886
 887        return -EINVAL;
 888}
 889
 890static void send_handler(struct ib_mad_agent *agent,
 891                         struct ib_mad_send_wc *mad_send_wc)
 892{
 893        if (mad_send_wc->send_buf->context[0])
 894                ib_destroy_ah(mad_send_wc->send_buf->context[0]);
 895        ib_free_send_mad(mad_send_wc->send_buf);
 896}
 897
 898int mlx4_ib_mad_init(struct mlx4_ib_dev *dev)
 899{
 900        struct ib_mad_agent *agent;
 901        int p, q;
 902        int ret;
 903        enum rdma_link_layer ll;
 904
 905        for (p = 0; p < dev->num_ports; ++p) {
 906                ll = rdma_port_get_link_layer(&dev->ib_dev, p + 1);
 907                for (q = 0; q <= 1; ++q) {
 908                        if (ll == IB_LINK_LAYER_INFINIBAND) {
 909                                agent = ib_register_mad_agent(&dev->ib_dev, p + 1,
 910                                                              q ? IB_QPT_GSI : IB_QPT_SMI,
 911                                                              NULL, 0, send_handler,
 912                                                              NULL, NULL, 0);
 913                                if (IS_ERR(agent)) {
 914                                        ret = PTR_ERR(agent);
 915                                        goto err;
 916                                }
 917                                dev->send_agent[p][q] = agent;
 918                        } else
 919                                dev->send_agent[p][q] = NULL;
 920                }
 921        }
 922
 923        return 0;
 924
 925err:
 926        for (p = 0; p < dev->num_ports; ++p)
 927                for (q = 0; q <= 1; ++q)
 928                        if (dev->send_agent[p][q])
 929                                ib_unregister_mad_agent(dev->send_agent[p][q]);
 930
 931        return ret;
 932}
 933
 934void mlx4_ib_mad_cleanup(struct mlx4_ib_dev *dev)
 935{
 936        struct ib_mad_agent *agent;
 937        int p, q;
 938
 939        for (p = 0; p < dev->num_ports; ++p) {
 940                for (q = 0; q <= 1; ++q) {
 941                        agent = dev->send_agent[p][q];
 942                        if (agent) {
 943                                dev->send_agent[p][q] = NULL;
 944                                ib_unregister_mad_agent(agent);
 945                        }
 946                }
 947
 948                if (dev->sm_ah[p])
 949                        ib_destroy_ah(dev->sm_ah[p]);
 950        }
 951}
 952
 953static void handle_lid_change_event(struct mlx4_ib_dev *dev, u8 port_num)
 954{
 955        mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_LID_CHANGE);
 956
 957        if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
 958                mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 959                                            MLX4_EQ_PORT_INFO_LID_CHANGE_MASK);
 960}
 961
 962static void handle_client_rereg_event(struct mlx4_ib_dev *dev, u8 port_num)
 963{
 964        /* re-configure the alias-guid and mcg's */
 965        if (mlx4_is_master(dev->dev)) {
 966                mlx4_ib_invalidate_all_guid_record(dev, port_num);
 967
 968                if (!dev->sriov.is_going_down) {
 969                        mlx4_ib_mcg_port_cleanup(&dev->sriov.demux[port_num - 1], 0);
 970                        mlx4_gen_slaves_port_mgt_ev(dev->dev, port_num,
 971                                                    MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK);
 972                }
 973        }
 974        mlx4_ib_dispatch_event(dev, port_num, IB_EVENT_CLIENT_REREGISTER);
 975}
 976
 977static void propagate_pkey_ev(struct mlx4_ib_dev *dev, int port_num,
 978                              struct mlx4_eqe *eqe)
 979{
 980        __propagate_pkey_ev(dev, port_num, GET_BLK_PTR_FROM_EQE(eqe),
 981                            GET_MASK_FROM_EQE(eqe));
 982}
 983
 984static void handle_slaves_guid_change(struct mlx4_ib_dev *dev, u8 port_num,
 985                                      u32 guid_tbl_blk_num, u32 change_bitmap)
 986{
 987        struct ib_smp *in_mad  = NULL;
 988        struct ib_smp *out_mad  = NULL;
 989        u16 i;
 990
 991        if (!mlx4_is_mfunc(dev->dev) || !mlx4_is_master(dev->dev))
 992                return;
 993
 994        in_mad  = kmalloc(sizeof *in_mad, GFP_KERNEL);
 995        out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
 996        if (!in_mad || !out_mad) {
 997                mlx4_ib_warn(&dev->ib_dev, "failed to allocate memory for guid info mads\n");
 998                goto out;
 999        }
1000
1001        guid_tbl_blk_num  *= 4;
1002
1003        for (i = 0; i < 4; i++) {
1004                if (change_bitmap && (!((change_bitmap >> (8 * i)) & 0xff)))
1005                        continue;
1006                memset(in_mad, 0, sizeof *in_mad);
1007                memset(out_mad, 0, sizeof *out_mad);
1008
1009                in_mad->base_version  = 1;
1010                in_mad->mgmt_class    = IB_MGMT_CLASS_SUBN_LID_ROUTED;
1011                in_mad->class_version = 1;
1012                in_mad->method        = IB_MGMT_METHOD_GET;
1013                in_mad->attr_id       = IB_SMP_ATTR_GUID_INFO;
1014                in_mad->attr_mod      = cpu_to_be32(guid_tbl_blk_num + i);
1015
1016                if (mlx4_MAD_IFC(dev,
1017                                 MLX4_MAD_IFC_IGNORE_KEYS | MLX4_MAD_IFC_NET_VIEW,
1018                                 port_num, NULL, NULL, in_mad, out_mad)) {
1019                        mlx4_ib_warn(&dev->ib_dev, "Failed in get GUID INFO MAD_IFC\n");
1020                        goto out;
1021                }
1022
1023                mlx4_ib_update_cache_on_guid_change(dev, guid_tbl_blk_num + i,
1024                                                    port_num,
1025                                                    (u8 *)(&((struct ib_smp *)out_mad)->data));
1026                mlx4_ib_notify_slaves_on_guid_change(dev, guid_tbl_blk_num + i,
1027                                                     port_num,
1028                                                     (u8 *)(&((struct ib_smp *)out_mad)->data));
1029        }
1030
1031out:
1032        kfree(in_mad);
1033        kfree(out_mad);
1034        return;
1035}
1036
1037void handle_port_mgmt_change_event(struct work_struct *work)
1038{
1039        struct ib_event_work *ew = container_of(work, struct ib_event_work, work);
1040        struct mlx4_ib_dev *dev = ew->ib_dev;
1041        struct mlx4_eqe *eqe = &(ew->ib_eqe);
1042        u8 port = eqe->event.port_mgmt_change.port;
1043        u32 changed_attr;
1044        u32 tbl_block;
1045        u32 change_bitmap;
1046
1047        switch (eqe->subtype) {
1048        case MLX4_DEV_PMC_SUBTYPE_PORT_INFO:
1049                changed_attr = be32_to_cpu(eqe->event.port_mgmt_change.params.port_info.changed_attr);
1050
1051                /* Update the SM ah - This should be done before handling
1052                   the other changed attributes so that MADs can be sent to the SM */
1053                if (changed_attr & MSTR_SM_CHANGE_MASK) {
1054                        u16 lid = be16_to_cpu(eqe->event.port_mgmt_change.params.port_info.mstr_sm_lid);
1055                        u8 sl = eqe->event.port_mgmt_change.params.port_info.mstr_sm_sl & 0xf;
1056                        update_sm_ah(dev, port, lid, sl);
1057                }
1058
1059                /* Check if it is a lid change event */
1060                if (changed_attr & MLX4_EQ_PORT_INFO_LID_CHANGE_MASK)
1061                        handle_lid_change_event(dev, port);
1062
1063                /* Generate GUID changed event */
1064                if (changed_attr & MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK) {
1065                        mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1066                        /*if master, notify all slaves*/
1067                        if (mlx4_is_master(dev->dev))
1068                                mlx4_gen_slaves_port_mgt_ev(dev->dev, port,
1069                                                            MLX4_EQ_PORT_INFO_GID_PFX_CHANGE_MASK);
1070                }
1071
1072                if (changed_attr & MLX4_EQ_PORT_INFO_CLIENT_REREG_MASK)
1073                        handle_client_rereg_event(dev, port);
1074                break;
1075
1076        case MLX4_DEV_PMC_SUBTYPE_PKEY_TABLE:
1077                mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
1078                if (mlx4_is_master(dev->dev) && !dev->sriov.is_going_down)
1079                        propagate_pkey_ev(dev, port, eqe);
1080                break;
1081        case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
1082                /* paravirtualized master's guid is guid 0 -- does not change */
1083                if (!mlx4_is_master(dev->dev))
1084                        mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
1085                /*if master, notify relevant slaves*/
1086                else if (!dev->sriov.is_going_down) {
1087                        tbl_block = GET_BLK_PTR_FROM_EQE(eqe);
1088                        change_bitmap = GET_MASK_FROM_EQE(eqe);
1089                        handle_slaves_guid_change(dev, port, tbl_block, change_bitmap);
1090                }
1091                break;
1092        default:
1093                pr_warn("Unsupported subtype 0x%x for "
1094                        "Port Management Change event\n", eqe->subtype);
1095        }
1096
1097        kfree(ew);
1098}
1099
1100void mlx4_ib_dispatch_event(struct mlx4_ib_dev *dev, u8 port_num,
1101                            enum ib_event_type type)
1102{
1103        struct ib_event event;
1104
1105        event.device            = &dev->ib_dev;
1106        event.element.port_num  = port_num;
1107        event.event             = type;
1108
1109        ib_dispatch_event(&event);
1110}
1111
1112static void mlx4_ib_tunnel_comp_handler(struct ib_cq *cq, void *arg)
1113{
1114        unsigned long flags;
1115        struct mlx4_ib_demux_pv_ctx *ctx = cq->cq_context;
1116        struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1117        spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
1118        if (!dev->sriov.is_going_down && ctx->state == DEMUX_PV_STATE_ACTIVE)
1119                queue_work(ctx->wq, &ctx->work);
1120        spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
1121}
1122
1123static int mlx4_ib_post_pv_qp_buf(struct mlx4_ib_demux_pv_ctx *ctx,
1124                                  struct mlx4_ib_demux_pv_qp *tun_qp,
1125                                  int index)
1126{
1127        struct ib_sge sg_list;
1128        struct ib_recv_wr recv_wr, *bad_recv_wr;
1129        int size;
1130
1131        size = (tun_qp->qp->qp_type == IB_QPT_UD) ?
1132                sizeof (struct mlx4_tunnel_mad) : sizeof (struct mlx4_mad_rcv_buf);
1133
1134        sg_list.addr = tun_qp->ring[index].map;
1135        sg_list.length = size;
1136        sg_list.lkey = ctx->mr->lkey;
1137
1138        recv_wr.next = NULL;
1139        recv_wr.sg_list = &sg_list;
1140        recv_wr.num_sge = 1;
1141        recv_wr.wr_id = (u64) index | MLX4_TUN_WRID_RECV |
1142                MLX4_TUN_SET_WRID_QPN(tun_qp->proxy_qpt);
1143        ib_dma_sync_single_for_device(ctx->ib_dev, tun_qp->ring[index].map,
1144                                      size, DMA_FROM_DEVICE);
1145        return ib_post_recv(tun_qp->qp, &recv_wr, &bad_recv_wr);
1146}
1147
1148static int mlx4_ib_multiplex_sa_handler(struct ib_device *ibdev, int port,
1149                int slave, struct ib_sa_mad *sa_mad)
1150{
1151        int ret = 0;
1152
1153        /* dispatch to different sa handlers */
1154        switch (be16_to_cpu(sa_mad->mad_hdr.attr_id)) {
1155        case IB_SA_ATTR_MC_MEMBER_REC:
1156                ret = mlx4_ib_mcg_multiplex_handler(ibdev, port, slave, sa_mad);
1157                break;
1158        default:
1159                break;
1160        }
1161        return ret;
1162}
1163
1164static int is_proxy_qp0(struct mlx4_ib_dev *dev, int qpn, int slave)
1165{
1166        int proxy_start = dev->dev->phys_caps.base_proxy_sqpn + 8 * slave;
1167
1168        return (qpn >= proxy_start && qpn <= proxy_start + 1);
1169}
1170
1171
1172int mlx4_ib_send_to_wire(struct mlx4_ib_dev *dev, int slave, u8 port,
1173                         enum ib_qp_type dest_qpt, u16 pkey_index,
1174                         u32 remote_qpn, u32 qkey, struct ib_ah_attr *attr,
1175                         u8 *s_mac, struct ib_mad *mad)
1176{
1177        struct ib_sge list;
1178        struct ib_send_wr wr, *bad_wr;
1179        struct mlx4_ib_demux_pv_ctx *sqp_ctx;
1180        struct mlx4_ib_demux_pv_qp *sqp;
1181        struct mlx4_mad_snd_buf *sqp_mad;
1182        struct ib_ah *ah;
1183        struct ib_qp *send_qp = NULL;
1184        unsigned wire_tx_ix = 0;
1185        int ret = 0;
1186        u16 wire_pkey_ix;
1187        int src_qpnum;
1188        u8 sgid_index;
1189
1190
1191        sqp_ctx = dev->sriov.sqps[port-1];
1192
1193        /* check if proxy qp created */
1194        if (!sqp_ctx || sqp_ctx->state != DEMUX_PV_STATE_ACTIVE)
1195                return -EAGAIN;
1196
1197        if (dest_qpt == IB_QPT_SMI) {
1198                src_qpnum = 0;
1199                sqp = &sqp_ctx->qp[0];
1200                wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][0];
1201        } else {
1202                src_qpnum = 1;
1203                sqp = &sqp_ctx->qp[1];
1204                wire_pkey_ix = dev->pkeys.virt2phys_pkey[slave][port - 1][pkey_index];
1205        }
1206
1207        send_qp = sqp->qp;
1208
1209        /* create ah */
1210        sgid_index = attr->grh.sgid_index;
1211        attr->grh.sgid_index = 0;
1212        ah = ib_create_ah(sqp_ctx->pd, attr);
1213        if (IS_ERR(ah))
1214                return -ENOMEM;
1215        attr->grh.sgid_index = sgid_index;
1216        to_mah(ah)->av.ib.gid_index = sgid_index;
1217        /* get rid of force-loopback bit */
1218        to_mah(ah)->av.ib.port_pd &= cpu_to_be32(0x7FFFFFFF);
1219        spin_lock(&sqp->tx_lock);
1220        if (sqp->tx_ix_head - sqp->tx_ix_tail >=
1221            (MLX4_NUM_TUNNEL_BUFS - 1))
1222                ret = -EAGAIN;
1223        else
1224                wire_tx_ix = (++sqp->tx_ix_head) & (MLX4_NUM_TUNNEL_BUFS - 1);
1225        spin_unlock(&sqp->tx_lock);
1226        if (ret)
1227                goto out;
1228
1229        sqp_mad = (struct mlx4_mad_snd_buf *) (sqp->tx_ring[wire_tx_ix].buf.addr);
1230        if (sqp->tx_ring[wire_tx_ix].ah)
1231                ib_destroy_ah(sqp->tx_ring[wire_tx_ix].ah);
1232        sqp->tx_ring[wire_tx_ix].ah = ah;
1233        ib_dma_sync_single_for_cpu(&dev->ib_dev,
1234                                   sqp->tx_ring[wire_tx_ix].buf.map,
1235                                   sizeof (struct mlx4_mad_snd_buf),
1236                                   DMA_TO_DEVICE);
1237
1238        memcpy(&sqp_mad->payload, mad, sizeof *mad);
1239
1240        ib_dma_sync_single_for_device(&dev->ib_dev,
1241                                      sqp->tx_ring[wire_tx_ix].buf.map,
1242                                      sizeof (struct mlx4_mad_snd_buf),
1243                                      DMA_TO_DEVICE);
1244
1245        list.addr = sqp->tx_ring[wire_tx_ix].buf.map;
1246        list.length = sizeof (struct mlx4_mad_snd_buf);
1247        list.lkey = sqp_ctx->mr->lkey;
1248
1249        wr.wr.ud.ah = ah;
1250        wr.wr.ud.port_num = port;
1251        wr.wr.ud.pkey_index = wire_pkey_ix;
1252        wr.wr.ud.remote_qkey = qkey;
1253        wr.wr.ud.remote_qpn = remote_qpn;
1254        wr.next = NULL;
1255        wr.wr_id = ((u64) wire_tx_ix) | MLX4_TUN_SET_WRID_QPN(src_qpnum);
1256        wr.sg_list = &list;
1257        wr.num_sge = 1;
1258        wr.opcode = IB_WR_SEND;
1259        wr.send_flags = IB_SEND_SIGNALED;
1260        if (s_mac)
1261                memcpy(to_mah(ah)->av.eth.s_mac, s_mac, 6);
1262
1263
1264        ret = ib_post_send(send_qp, &wr, &bad_wr);
1265out:
1266        if (ret)
1267                ib_destroy_ah(ah);
1268        return ret;
1269}
1270
1271static int get_slave_base_gid_ix(struct mlx4_ib_dev *dev, int slave, int port)
1272{
1273        if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1274                return slave;
1275        return mlx4_get_base_gid_ix(dev->dev, slave, port);
1276}
1277
1278static void fill_in_real_sgid_index(struct mlx4_ib_dev *dev, int slave, int port,
1279                                    struct ib_ah_attr *ah_attr)
1280{
1281        if (rdma_port_get_link_layer(&dev->ib_dev, port) == IB_LINK_LAYER_INFINIBAND)
1282                ah_attr->grh.sgid_index = slave;
1283        else
1284                ah_attr->grh.sgid_index += get_slave_base_gid_ix(dev, slave, port);
1285}
1286
1287static void mlx4_ib_multiplex_mad(struct mlx4_ib_demux_pv_ctx *ctx, struct ib_wc *wc)
1288{
1289        struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
1290        struct mlx4_ib_demux_pv_qp *tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc->wr_id)];
1291        int wr_ix = wc->wr_id & (MLX4_NUM_TUNNEL_BUFS - 1);
1292        struct mlx4_tunnel_mad *tunnel = tun_qp->ring[wr_ix].addr;
1293        struct mlx4_ib_ah ah;
1294        struct ib_ah_attr ah_attr;
1295        u8 *slave_id;
1296        int slave;
1297        int port;
1298
1299        /* Get slave that sent this packet */
1300        if (wc->src_qp < dev->dev->phys_caps.base_proxy_sqpn ||
1301            wc->src_qp >= dev->dev->phys_caps.base_proxy_sqpn + 8 * MLX4_MFUNC_MAX ||
1302            (wc->src_qp & 0x1) != ctx->port - 1 ||
1303            wc->src_qp & 0x4) {
1304                mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d\n", wc->src_qp);
1305                return;
1306        }
1307        slave = ((wc->src_qp & ~0x7) - dev->dev->phys_caps.base_proxy_sqpn) / 8;
1308        if (slave != ctx->slave) {
1309                mlx4_ib_warn(ctx->ib_dev, "can't multiplex bad sqp:%d: "
1310                             "belongs to another slave\n", wc->src_qp);
1311                return;
1312        }
1313
1314        /* Map transaction ID */
1315        ib_dma_sync_single_for_cpu(ctx->ib_dev, tun_qp->ring[wr_ix].map,
1316                                   sizeof (struct mlx4_tunnel_mad),
1317                                   DMA_FROM_DEVICE);
1318        switch (tunnel->mad.mad_hdr.method) {
1319        case IB_MGMT_METHOD_SET:
1320        case IB_MGMT_METHOD_GET:
1321        case IB_MGMT_METHOD_REPORT:
1322        case IB_SA_METHOD_GET_TABLE:
1323        case IB_SA_METHOD_DELETE:
1324        case IB_SA_METHOD_GET_MULTI:
1325        case IB_SA_METHOD_GET_TRACE_TBL:
1326                slave_id = (u8 *) &tunnel->mad.mad_hdr.tid;
1327                if (*slave_id) {
1328                        mlx4_ib_warn(ctx->ib_dev, "egress mad has non-null tid msb:%d "
1329                                     "class:%d slave:%d\n", *slave_id,
1330                                     tunnel->mad.mad_hdr.mgmt_class, slave);
1331                        return;
1332                } else
1333                        *slave_id = slave;
1334        default:
1335                /* nothing */;
1336        }
1337
1338        /* Class-specific handling */
1339        switch (tunnel->mad.mad_hdr.mgmt_class) {
1340        case IB_MGMT_CLASS_SUBN_LID_ROUTED:
1341        case IB_MGMT_CLASS_SUBN_DIRECTED_ROUTE:
1342                if (slave != mlx4_master_func_num(dev->dev) &&
1343                    !mlx4_vf_smi_enabled(dev->dev, slave, ctx->port))
1344                        return;
1345                break;
1346        case IB_MGMT_CLASS_SUBN_ADM:
1347                if (mlx4_ib_multiplex_sa_handler(ctx->ib_dev, ctx->port, slave,
1348                              (struct ib_sa_mad *) &tunnel->mad))
1349                        return;
1350                break;
1351        case IB_MGMT_CLASS_CM:
1352                if (mlx4_ib_multiplex_cm_handler(ctx->ib_dev, ctx->port, slave,
1353                              (struct ib_mad *) &tunnel->mad))
1354                        return;
1355                break;
1356        case IB_MGMT_CLASS_DEVICE_MGMT:
1357                if (tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_GET &&
1358                    tunnel->mad.mad_hdr.method != IB_MGMT_METHOD_SET)
1359                        return;
1360                break;
1361        default:
1362                /* Drop unsupported classes for slaves in tunnel mode */
1363                if (slave != mlx4_master_func_num(dev->dev)) {
1364                        mlx4_ib_warn(ctx->ib_dev, "dropping unsupported egress mad from class:%d "
1365                                     "for slave:%d\n", tunnel->mad.mad_hdr.mgmt_class, slave);
1366                        return;
1367                }
1368        }
1369
1370        /* We are using standard ib_core services to send the mad, so generate a
1371         * stadard address handle by decoding the tunnelled mlx4_ah fields */
1372        memcpy(&ah.av, &tunnel->hdr.av, sizeof (struct mlx4_av));
1373        ah.ibah.device = ctx->ib_dev;
1374
1375        port = be32_to_cpu(ah.av.ib.port_pd) >> 24;
1376        port = mlx4_slave_convert_port(dev->dev, slave, port);
1377        if (port < 0)
1378                return;
1379        ah.av.ib.port_pd = cpu_to_be32(port << 24 | (be32_to_cpu(ah.av.ib.port_pd) & 0xffffff));
1380
1381        mlx4_ib_query_ah(&ah.ibah, &ah_attr);
1382        if (ah_attr.ah_flags & IB_AH_GRH)
1383                fill_in_real_sgid_index(dev, slave, ctx->port, &ah_attr);
1384
1385        memcpy(ah_attr.dmac, tunnel->hdr.mac, 6);
1386        ah_attr.vlan_id = be16_to_cpu(tunnel->hdr.vlan);
1387        /* if slave have default vlan use it */
1388        mlx4_get_slave_default_vlan(dev->dev, ctx->port, slave,
1389                                    &ah_attr.vlan_id, &ah_attr.sl);
1390
1391        mlx4_ib_send_to_wire(dev, slave, ctx->port,
1392                             is_proxy_qp0(dev, wc->src_qp, slave) ?
1393                             IB_QPT_SMI : IB_QPT_GSI,
1394                             be16_to_cpu(tunnel->hdr.pkey_index),
1395                             be32_to_cpu(tunnel->hdr.remote_qpn),
1396                             be32_to_cpu(tunnel->hdr.qkey),
1397                             &ah_attr, wc->smac, &tunnel->mad);
1398}
1399
1400static int mlx4_ib_alloc_pv_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1401                                 enum ib_qp_type qp_type, int is_tun)
1402{
1403        int i;
1404        struct mlx4_ib_demux_pv_qp *tun_qp;
1405        int rx_buf_size, tx_buf_size;
1406
1407        if (qp_type > IB_QPT_GSI)
1408                return -EINVAL;
1409
1410        tun_qp = &ctx->qp[qp_type];
1411
1412        tun_qp->ring = kzalloc(sizeof (struct mlx4_ib_buf) * MLX4_NUM_TUNNEL_BUFS,
1413                               GFP_KERNEL);
1414        if (!tun_qp->ring)
1415                return -ENOMEM;
1416
1417        tun_qp->tx_ring = kcalloc(MLX4_NUM_TUNNEL_BUFS,
1418                                  sizeof (struct mlx4_ib_tun_tx_buf),
1419                                  GFP_KERNEL);
1420        if (!tun_qp->tx_ring) {
1421                kfree(tun_qp->ring);
1422                tun_qp->ring = NULL;
1423                return -ENOMEM;
1424        }
1425
1426        if (is_tun) {
1427                rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1428                tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1429        } else {
1430                rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1431                tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1432        }
1433
1434        for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1435                tun_qp->ring[i].addr = kmalloc(rx_buf_size, GFP_KERNEL);
1436                if (!tun_qp->ring[i].addr)
1437                        goto err;
1438                tun_qp->ring[i].map = ib_dma_map_single(ctx->ib_dev,
1439                                                        tun_qp->ring[i].addr,
1440                                                        rx_buf_size,
1441                                                        DMA_FROM_DEVICE);
1442                if (ib_dma_mapping_error(ctx->ib_dev, tun_qp->ring[i].map)) {
1443                        kfree(tun_qp->ring[i].addr);
1444                        goto err;
1445                }
1446        }
1447
1448        for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1449                tun_qp->tx_ring[i].buf.addr =
1450                        kmalloc(tx_buf_size, GFP_KERNEL);
1451                if (!tun_qp->tx_ring[i].buf.addr)
1452                        goto tx_err;
1453                tun_qp->tx_ring[i].buf.map =
1454                        ib_dma_map_single(ctx->ib_dev,
1455                                          tun_qp->tx_ring[i].buf.addr,
1456                                          tx_buf_size,
1457                                          DMA_TO_DEVICE);
1458                if (ib_dma_mapping_error(ctx->ib_dev,
1459                                         tun_qp->tx_ring[i].buf.map)) {
1460                        kfree(tun_qp->tx_ring[i].buf.addr);
1461                        goto tx_err;
1462                }
1463                tun_qp->tx_ring[i].ah = NULL;
1464        }
1465        spin_lock_init(&tun_qp->tx_lock);
1466        tun_qp->tx_ix_head = 0;
1467        tun_qp->tx_ix_tail = 0;
1468        tun_qp->proxy_qpt = qp_type;
1469
1470        return 0;
1471
1472tx_err:
1473        while (i > 0) {
1474                --i;
1475                ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1476                                    tx_buf_size, DMA_TO_DEVICE);
1477                kfree(tun_qp->tx_ring[i].buf.addr);
1478        }
1479        kfree(tun_qp->tx_ring);
1480        tun_qp->tx_ring = NULL;
1481        i = MLX4_NUM_TUNNEL_BUFS;
1482err:
1483        while (i > 0) {
1484                --i;
1485                ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1486                                    rx_buf_size, DMA_FROM_DEVICE);
1487                kfree(tun_qp->ring[i].addr);
1488        }
1489        kfree(tun_qp->ring);
1490        tun_qp->ring = NULL;
1491        return -ENOMEM;
1492}
1493
1494static void mlx4_ib_free_pv_qp_bufs(struct mlx4_ib_demux_pv_ctx *ctx,
1495                                     enum ib_qp_type qp_type, int is_tun)
1496{
1497        int i;
1498        struct mlx4_ib_demux_pv_qp *tun_qp;
1499        int rx_buf_size, tx_buf_size;
1500
1501        if (qp_type > IB_QPT_GSI)
1502                return;
1503
1504        tun_qp = &ctx->qp[qp_type];
1505        if (is_tun) {
1506                rx_buf_size = sizeof (struct mlx4_tunnel_mad);
1507                tx_buf_size = sizeof (struct mlx4_rcv_tunnel_mad);
1508        } else {
1509                rx_buf_size = sizeof (struct mlx4_mad_rcv_buf);
1510                tx_buf_size = sizeof (struct mlx4_mad_snd_buf);
1511        }
1512
1513
1514        for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1515                ib_dma_unmap_single(ctx->ib_dev, tun_qp->ring[i].map,
1516                                    rx_buf_size, DMA_FROM_DEVICE);
1517                kfree(tun_qp->ring[i].addr);
1518        }
1519
1520        for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1521                ib_dma_unmap_single(ctx->ib_dev, tun_qp->tx_ring[i].buf.map,
1522                                    tx_buf_size, DMA_TO_DEVICE);
1523                kfree(tun_qp->tx_ring[i].buf.addr);
1524                if (tun_qp->tx_ring[i].ah)
1525                        ib_destroy_ah(tun_qp->tx_ring[i].ah);
1526        }
1527        kfree(tun_qp->tx_ring);
1528        kfree(tun_qp->ring);
1529}
1530
1531static void mlx4_ib_tunnel_comp_worker(struct work_struct *work)
1532{
1533        struct mlx4_ib_demux_pv_ctx *ctx;
1534        struct mlx4_ib_demux_pv_qp *tun_qp;
1535        struct ib_wc wc;
1536        int ret;
1537        ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1538        ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1539
1540        while (ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1541                tun_qp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1542                if (wc.status == IB_WC_SUCCESS) {
1543                        switch (wc.opcode) {
1544                        case IB_WC_RECV:
1545                                mlx4_ib_multiplex_mad(ctx, &wc);
1546                                ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp,
1547                                                             wc.wr_id &
1548                                                             (MLX4_NUM_TUNNEL_BUFS - 1));
1549                                if (ret)
1550                                        pr_err("Failed reposting tunnel "
1551                                               "buf:%lld\n", wc.wr_id);
1552                                break;
1553                        case IB_WC_SEND:
1554                                pr_debug("received tunnel send completion:"
1555                                         "wrid=0x%llx, status=0x%x\n",
1556                                         wc.wr_id, wc.status);
1557                                ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1558                                              (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1559                                tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1560                                        = NULL;
1561                                spin_lock(&tun_qp->tx_lock);
1562                                tun_qp->tx_ix_tail++;
1563                                spin_unlock(&tun_qp->tx_lock);
1564
1565                                break;
1566                        default:
1567                                break;
1568                        }
1569                } else  {
1570                        pr_debug("mlx4_ib: completion error in tunnel: %d."
1571                                 " status = %d, wrid = 0x%llx\n",
1572                                 ctx->slave, wc.status, wc.wr_id);
1573                        if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1574                                ib_destroy_ah(tun_qp->tx_ring[wc.wr_id &
1575                                              (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1576                                tun_qp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1577                                        = NULL;
1578                                spin_lock(&tun_qp->tx_lock);
1579                                tun_qp->tx_ix_tail++;
1580                                spin_unlock(&tun_qp->tx_lock);
1581                        }
1582                }
1583        }
1584}
1585
1586static void pv_qp_event_handler(struct ib_event *event, void *qp_context)
1587{
1588        struct mlx4_ib_demux_pv_ctx *sqp = qp_context;
1589
1590        /* It's worse than that! He's dead, Jim! */
1591        pr_err("Fatal error (%d) on a MAD QP on port %d\n",
1592               event->event, sqp->port);
1593}
1594
1595static int create_pv_sqp(struct mlx4_ib_demux_pv_ctx *ctx,
1596                            enum ib_qp_type qp_type, int create_tun)
1597{
1598        int i, ret;
1599        struct mlx4_ib_demux_pv_qp *tun_qp;
1600        struct mlx4_ib_qp_tunnel_init_attr qp_init_attr;
1601        struct ib_qp_attr attr;
1602        int qp_attr_mask_INIT;
1603
1604        if (qp_type > IB_QPT_GSI)
1605                return -EINVAL;
1606
1607        tun_qp = &ctx->qp[qp_type];
1608
1609        memset(&qp_init_attr, 0, sizeof qp_init_attr);
1610        qp_init_attr.init_attr.send_cq = ctx->cq;
1611        qp_init_attr.init_attr.recv_cq = ctx->cq;
1612        qp_init_attr.init_attr.sq_sig_type = IB_SIGNAL_ALL_WR;
1613        qp_init_attr.init_attr.cap.max_send_wr = MLX4_NUM_TUNNEL_BUFS;
1614        qp_init_attr.init_attr.cap.max_recv_wr = MLX4_NUM_TUNNEL_BUFS;
1615        qp_init_attr.init_attr.cap.max_send_sge = 1;
1616        qp_init_attr.init_attr.cap.max_recv_sge = 1;
1617        if (create_tun) {
1618                qp_init_attr.init_attr.qp_type = IB_QPT_UD;
1619                qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_TUNNEL_QP;
1620                qp_init_attr.port = ctx->port;
1621                qp_init_attr.slave = ctx->slave;
1622                qp_init_attr.proxy_qp_type = qp_type;
1623                qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX |
1624                           IB_QP_QKEY | IB_QP_PORT;
1625        } else {
1626                qp_init_attr.init_attr.qp_type = qp_type;
1627                qp_init_attr.init_attr.create_flags = MLX4_IB_SRIOV_SQP;
1628                qp_attr_mask_INIT = IB_QP_STATE | IB_QP_PKEY_INDEX | IB_QP_QKEY;
1629        }
1630        qp_init_attr.init_attr.port_num = ctx->port;
1631        qp_init_attr.init_attr.qp_context = ctx;
1632        qp_init_attr.init_attr.event_handler = pv_qp_event_handler;
1633        tun_qp->qp = ib_create_qp(ctx->pd, &qp_init_attr.init_attr);
1634        if (IS_ERR(tun_qp->qp)) {
1635                ret = PTR_ERR(tun_qp->qp);
1636                tun_qp->qp = NULL;
1637                pr_err("Couldn't create %s QP (%d)\n",
1638                       create_tun ? "tunnel" : "special", ret);
1639                return ret;
1640        }
1641
1642        memset(&attr, 0, sizeof attr);
1643        attr.qp_state = IB_QPS_INIT;
1644        ret = 0;
1645        if (create_tun)
1646                ret = find_slave_port_pkey_ix(to_mdev(ctx->ib_dev), ctx->slave,
1647                                              ctx->port, IB_DEFAULT_PKEY_FULL,
1648                                              &attr.pkey_index);
1649        if (ret || !create_tun)
1650                attr.pkey_index =
1651                        to_mdev(ctx->ib_dev)->pkeys.virt2phys_pkey[ctx->slave][ctx->port - 1][0];
1652        attr.qkey = IB_QP1_QKEY;
1653        attr.port_num = ctx->port;
1654        ret = ib_modify_qp(tun_qp->qp, &attr, qp_attr_mask_INIT);
1655        if (ret) {
1656                pr_err("Couldn't change %s qp state to INIT (%d)\n",
1657                       create_tun ? "tunnel" : "special", ret);
1658                goto err_qp;
1659        }
1660        attr.qp_state = IB_QPS_RTR;
1661        ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE);
1662        if (ret) {
1663                pr_err("Couldn't change %s qp state to RTR (%d)\n",
1664                       create_tun ? "tunnel" : "special", ret);
1665                goto err_qp;
1666        }
1667        attr.qp_state = IB_QPS_RTS;
1668        attr.sq_psn = 0;
1669        ret = ib_modify_qp(tun_qp->qp, &attr, IB_QP_STATE | IB_QP_SQ_PSN);
1670        if (ret) {
1671                pr_err("Couldn't change %s qp state to RTS (%d)\n",
1672                       create_tun ? "tunnel" : "special", ret);
1673                goto err_qp;
1674        }
1675
1676        for (i = 0; i < MLX4_NUM_TUNNEL_BUFS; i++) {
1677                ret = mlx4_ib_post_pv_qp_buf(ctx, tun_qp, i);
1678                if (ret) {
1679                        pr_err(" mlx4_ib_post_pv_buf error"
1680                               " (err = %d, i = %d)\n", ret, i);
1681                        goto err_qp;
1682                }
1683        }
1684        return 0;
1685
1686err_qp:
1687        ib_destroy_qp(tun_qp->qp);
1688        tun_qp->qp = NULL;
1689        return ret;
1690}
1691
1692/*
1693 * IB MAD completion callback for real SQPs
1694 */
1695static void mlx4_ib_sqp_comp_worker(struct work_struct *work)
1696{
1697        struct mlx4_ib_demux_pv_ctx *ctx;
1698        struct mlx4_ib_demux_pv_qp *sqp;
1699        struct ib_wc wc;
1700        struct ib_grh *grh;
1701        struct ib_mad *mad;
1702
1703        ctx = container_of(work, struct mlx4_ib_demux_pv_ctx, work);
1704        ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1705
1706        while (mlx4_ib_poll_cq(ctx->cq, 1, &wc) == 1) {
1707                sqp = &ctx->qp[MLX4_TUN_WRID_QPN(wc.wr_id)];
1708                if (wc.status == IB_WC_SUCCESS) {
1709                        switch (wc.opcode) {
1710                        case IB_WC_SEND:
1711                                ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1712                                              (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1713                                sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1714                                        = NULL;
1715                                spin_lock(&sqp->tx_lock);
1716                                sqp->tx_ix_tail++;
1717                                spin_unlock(&sqp->tx_lock);
1718                                break;
1719                        case IB_WC_RECV:
1720                                mad = (struct ib_mad *) &(((struct mlx4_mad_rcv_buf *)
1721                                                (sqp->ring[wc.wr_id &
1722                                                (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->payload);
1723                                grh = &(((struct mlx4_mad_rcv_buf *)
1724                                                (sqp->ring[wc.wr_id &
1725                                                (MLX4_NUM_TUNNEL_BUFS - 1)].addr))->grh);
1726                                mlx4_ib_demux_mad(ctx->ib_dev, ctx->port, &wc, grh, mad);
1727                                if (mlx4_ib_post_pv_qp_buf(ctx, sqp, wc.wr_id &
1728                                                           (MLX4_NUM_TUNNEL_BUFS - 1)))
1729                                        pr_err("Failed reposting SQP "
1730                                               "buf:%lld\n", wc.wr_id);
1731                                break;
1732                        default:
1733                                BUG_ON(1);
1734                                break;
1735                        }
1736                } else  {
1737                        pr_debug("mlx4_ib: completion error in tunnel: %d."
1738                                 " status = %d, wrid = 0x%llx\n",
1739                                 ctx->slave, wc.status, wc.wr_id);
1740                        if (!MLX4_TUN_IS_RECV(wc.wr_id)) {
1741                                ib_destroy_ah(sqp->tx_ring[wc.wr_id &
1742                                              (MLX4_NUM_TUNNEL_BUFS - 1)].ah);
1743                                sqp->tx_ring[wc.wr_id & (MLX4_NUM_TUNNEL_BUFS - 1)].ah
1744                                        = NULL;
1745                                spin_lock(&sqp->tx_lock);
1746                                sqp->tx_ix_tail++;
1747                                spin_unlock(&sqp->tx_lock);
1748                        }
1749                }
1750        }
1751}
1752
1753static int alloc_pv_object(struct mlx4_ib_dev *dev, int slave, int port,
1754                               struct mlx4_ib_demux_pv_ctx **ret_ctx)
1755{
1756        struct mlx4_ib_demux_pv_ctx *ctx;
1757
1758        *ret_ctx = NULL;
1759        ctx = kzalloc(sizeof (struct mlx4_ib_demux_pv_ctx), GFP_KERNEL);
1760        if (!ctx) {
1761                pr_err("failed allocating pv resource context "
1762                       "for port %d, slave %d\n", port, slave);
1763                return -ENOMEM;
1764        }
1765
1766        ctx->ib_dev = &dev->ib_dev;
1767        ctx->port = port;
1768        ctx->slave = slave;
1769        *ret_ctx = ctx;
1770        return 0;
1771}
1772
1773static void free_pv_object(struct mlx4_ib_dev *dev, int slave, int port)
1774{
1775        if (dev->sriov.demux[port - 1].tun[slave]) {
1776                kfree(dev->sriov.demux[port - 1].tun[slave]);
1777                dev->sriov.demux[port - 1].tun[slave] = NULL;
1778        }
1779}
1780
1781static int create_pv_resources(struct ib_device *ibdev, int slave, int port,
1782                               int create_tun, struct mlx4_ib_demux_pv_ctx *ctx)
1783{
1784        int ret, cq_size;
1785        struct ib_cq_init_attr cq_attr = {};
1786
1787        if (ctx->state != DEMUX_PV_STATE_DOWN)
1788                return -EEXIST;
1789
1790        ctx->state = DEMUX_PV_STATE_STARTING;
1791        /* have QP0 only if link layer is IB */
1792        if (rdma_port_get_link_layer(ibdev, ctx->port) ==
1793            IB_LINK_LAYER_INFINIBAND)
1794                ctx->has_smi = 1;
1795
1796        if (ctx->has_smi) {
1797                ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_SMI, create_tun);
1798                if (ret) {
1799                        pr_err("Failed allocating qp0 tunnel bufs (%d)\n", ret);
1800                        goto err_out;
1801                }
1802        }
1803
1804        ret = mlx4_ib_alloc_pv_bufs(ctx, IB_QPT_GSI, create_tun);
1805        if (ret) {
1806                pr_err("Failed allocating qp1 tunnel bufs (%d)\n", ret);
1807                goto err_out_qp0;
1808        }
1809
1810        cq_size = 2 * MLX4_NUM_TUNNEL_BUFS;
1811        if (ctx->has_smi)
1812                cq_size *= 2;
1813
1814        cq_attr.cqe = cq_size;
1815        ctx->cq = ib_create_cq(ctx->ib_dev, mlx4_ib_tunnel_comp_handler,
1816                               NULL, ctx, &cq_attr);
1817        if (IS_ERR(ctx->cq)) {
1818                ret = PTR_ERR(ctx->cq);
1819                pr_err("Couldn't create tunnel CQ (%d)\n", ret);
1820                goto err_buf;
1821        }
1822
1823        ctx->pd = ib_alloc_pd(ctx->ib_dev);
1824        if (IS_ERR(ctx->pd)) {
1825                ret = PTR_ERR(ctx->pd);
1826                pr_err("Couldn't create tunnel PD (%d)\n", ret);
1827                goto err_cq;
1828        }
1829
1830        ctx->mr = ib_get_dma_mr(ctx->pd, IB_ACCESS_LOCAL_WRITE);
1831        if (IS_ERR(ctx->mr)) {
1832                ret = PTR_ERR(ctx->mr);
1833                pr_err("Couldn't get tunnel DMA MR (%d)\n", ret);
1834                goto err_pd;
1835        }
1836
1837        if (ctx->has_smi) {
1838                ret = create_pv_sqp(ctx, IB_QPT_SMI, create_tun);
1839                if (ret) {
1840                        pr_err("Couldn't create %s QP0 (%d)\n",
1841                               create_tun ? "tunnel for" : "",  ret);
1842                        goto err_mr;
1843                }
1844        }
1845
1846        ret = create_pv_sqp(ctx, IB_QPT_GSI, create_tun);
1847        if (ret) {
1848                pr_err("Couldn't create %s QP1 (%d)\n",
1849                       create_tun ? "tunnel for" : "",  ret);
1850                goto err_qp0;
1851        }
1852
1853        if (create_tun)
1854                INIT_WORK(&ctx->work, mlx4_ib_tunnel_comp_worker);
1855        else
1856                INIT_WORK(&ctx->work, mlx4_ib_sqp_comp_worker);
1857
1858        ctx->wq = to_mdev(ibdev)->sriov.demux[port - 1].wq;
1859
1860        ret = ib_req_notify_cq(ctx->cq, IB_CQ_NEXT_COMP);
1861        if (ret) {
1862                pr_err("Couldn't arm tunnel cq (%d)\n", ret);
1863                goto err_wq;
1864        }
1865        ctx->state = DEMUX_PV_STATE_ACTIVE;
1866        return 0;
1867
1868err_wq:
1869        ctx->wq = NULL;
1870        ib_destroy_qp(ctx->qp[1].qp);
1871        ctx->qp[1].qp = NULL;
1872
1873
1874err_qp0:
1875        if (ctx->has_smi)
1876                ib_destroy_qp(ctx->qp[0].qp);
1877        ctx->qp[0].qp = NULL;
1878
1879err_mr:
1880        ib_dereg_mr(ctx->mr);
1881        ctx->mr = NULL;
1882
1883err_pd:
1884        ib_dealloc_pd(ctx->pd);
1885        ctx->pd = NULL;
1886
1887err_cq:
1888        ib_destroy_cq(ctx->cq);
1889        ctx->cq = NULL;
1890
1891err_buf:
1892        mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, create_tun);
1893
1894err_out_qp0:
1895        if (ctx->has_smi)
1896                mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, create_tun);
1897err_out:
1898        ctx->state = DEMUX_PV_STATE_DOWN;
1899        return ret;
1900}
1901
1902static void destroy_pv_resources(struct mlx4_ib_dev *dev, int slave, int port,
1903                                 struct mlx4_ib_demux_pv_ctx *ctx, int flush)
1904{
1905        if (!ctx)
1906                return;
1907        if (ctx->state > DEMUX_PV_STATE_DOWN) {
1908                ctx->state = DEMUX_PV_STATE_DOWNING;
1909                if (flush)
1910                        flush_workqueue(ctx->wq);
1911                if (ctx->has_smi) {
1912                        ib_destroy_qp(ctx->qp[0].qp);
1913                        ctx->qp[0].qp = NULL;
1914                        mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_SMI, 1);
1915                }
1916                ib_destroy_qp(ctx->qp[1].qp);
1917                ctx->qp[1].qp = NULL;
1918                mlx4_ib_free_pv_qp_bufs(ctx, IB_QPT_GSI, 1);
1919                ib_dereg_mr(ctx->mr);
1920                ctx->mr = NULL;
1921                ib_dealloc_pd(ctx->pd);
1922                ctx->pd = NULL;
1923                ib_destroy_cq(ctx->cq);
1924                ctx->cq = NULL;
1925                ctx->state = DEMUX_PV_STATE_DOWN;
1926        }
1927}
1928
1929static int mlx4_ib_tunnels_update(struct mlx4_ib_dev *dev, int slave,
1930                                  int port, int do_init)
1931{
1932        int ret = 0;
1933
1934        if (!do_init) {
1935                clean_vf_mcast(&dev->sriov.demux[port - 1], slave);
1936                /* for master, destroy real sqp resources */
1937                if (slave == mlx4_master_func_num(dev->dev))
1938                        destroy_pv_resources(dev, slave, port,
1939                                             dev->sriov.sqps[port - 1], 1);
1940                /* destroy the tunnel qp resources */
1941                destroy_pv_resources(dev, slave, port,
1942                                     dev->sriov.demux[port - 1].tun[slave], 1);
1943                return 0;
1944        }
1945
1946        /* create the tunnel qp resources */
1947        ret = create_pv_resources(&dev->ib_dev, slave, port, 1,
1948                                  dev->sriov.demux[port - 1].tun[slave]);
1949
1950        /* for master, create the real sqp resources */
1951        if (!ret && slave == mlx4_master_func_num(dev->dev))
1952                ret = create_pv_resources(&dev->ib_dev, slave, port, 0,
1953                                          dev->sriov.sqps[port - 1]);
1954        return ret;
1955}
1956
1957void mlx4_ib_tunnels_update_work(struct work_struct *work)
1958{
1959        struct mlx4_ib_demux_work *dmxw;
1960
1961        dmxw = container_of(work, struct mlx4_ib_demux_work, work);
1962        mlx4_ib_tunnels_update(dmxw->dev, dmxw->slave, (int) dmxw->port,
1963                               dmxw->do_init);
1964        kfree(dmxw);
1965        return;
1966}
1967
1968static int mlx4_ib_alloc_demux_ctx(struct mlx4_ib_dev *dev,
1969                                       struct mlx4_ib_demux_ctx *ctx,
1970                                       int port)
1971{
1972        char name[12];
1973        int ret = 0;
1974        int i;
1975
1976        ctx->tun = kcalloc(dev->dev->caps.sqp_demux,
1977                           sizeof (struct mlx4_ib_demux_pv_ctx *), GFP_KERNEL);
1978        if (!ctx->tun)
1979                return -ENOMEM;
1980
1981        ctx->dev = dev;
1982        ctx->port = port;
1983        ctx->ib_dev = &dev->ib_dev;
1984
1985        for (i = 0;
1986             i < min(dev->dev->caps.sqp_demux,
1987             (u16)(dev->dev->persist->num_vfs + 1));
1988             i++) {
1989                struct mlx4_active_ports actv_ports =
1990                        mlx4_get_active_ports(dev->dev, i);
1991
1992                if (!test_bit(port - 1, actv_ports.ports))
1993                        continue;
1994
1995                ret = alloc_pv_object(dev, i, port, &ctx->tun[i]);
1996                if (ret) {
1997                        ret = -ENOMEM;
1998                        goto err_mcg;
1999                }
2000        }
2001
2002        ret = mlx4_ib_mcg_port_init(ctx);
2003        if (ret) {
2004                pr_err("Failed initializing mcg para-virt (%d)\n", ret);
2005                goto err_mcg;
2006        }
2007
2008        snprintf(name, sizeof name, "mlx4_ibt%d", port);
2009        ctx->wq = create_singlethread_workqueue(name);
2010        if (!ctx->wq) {
2011                pr_err("Failed to create tunnelling WQ for port %d\n", port);
2012                ret = -ENOMEM;
2013                goto err_wq;
2014        }
2015
2016        snprintf(name, sizeof name, "mlx4_ibud%d", port);
2017        ctx->ud_wq = create_singlethread_workqueue(name);
2018        if (!ctx->ud_wq) {
2019                pr_err("Failed to create up/down WQ for port %d\n", port);
2020                ret = -ENOMEM;
2021                goto err_udwq;
2022        }
2023
2024        return 0;
2025
2026err_udwq:
2027        destroy_workqueue(ctx->wq);
2028        ctx->wq = NULL;
2029
2030err_wq:
2031        mlx4_ib_mcg_port_cleanup(ctx, 1);
2032err_mcg:
2033        for (i = 0; i < dev->dev->caps.sqp_demux; i++)
2034                free_pv_object(dev, i, port);
2035        kfree(ctx->tun);
2036        ctx->tun = NULL;
2037        return ret;
2038}
2039
2040static void mlx4_ib_free_sqp_ctx(struct mlx4_ib_demux_pv_ctx *sqp_ctx)
2041{
2042        if (sqp_ctx->state > DEMUX_PV_STATE_DOWN) {
2043                sqp_ctx->state = DEMUX_PV_STATE_DOWNING;
2044                flush_workqueue(sqp_ctx->wq);
2045                if (sqp_ctx->has_smi) {
2046                        ib_destroy_qp(sqp_ctx->qp[0].qp);
2047                        sqp_ctx->qp[0].qp = NULL;
2048                        mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_SMI, 0);
2049                }
2050                ib_destroy_qp(sqp_ctx->qp[1].qp);
2051                sqp_ctx->qp[1].qp = NULL;
2052                mlx4_ib_free_pv_qp_bufs(sqp_ctx, IB_QPT_GSI, 0);
2053                ib_dereg_mr(sqp_ctx->mr);
2054                sqp_ctx->mr = NULL;
2055                ib_dealloc_pd(sqp_ctx->pd);
2056                sqp_ctx->pd = NULL;
2057                ib_destroy_cq(sqp_ctx->cq);
2058                sqp_ctx->cq = NULL;
2059                sqp_ctx->state = DEMUX_PV_STATE_DOWN;
2060        }
2061}
2062
2063static void mlx4_ib_free_demux_ctx(struct mlx4_ib_demux_ctx *ctx)
2064{
2065        int i;
2066        if (ctx) {
2067                struct mlx4_ib_dev *dev = to_mdev(ctx->ib_dev);
2068                mlx4_ib_mcg_port_cleanup(ctx, 1);
2069                for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2070                        if (!ctx->tun[i])
2071                                continue;
2072                        if (ctx->tun[i]->state > DEMUX_PV_STATE_DOWN)
2073                                ctx->tun[i]->state = DEMUX_PV_STATE_DOWNING;
2074                }
2075                flush_workqueue(ctx->wq);
2076                for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2077                        destroy_pv_resources(dev, i, ctx->port, ctx->tun[i], 0);
2078                        free_pv_object(dev, i, ctx->port);
2079                }
2080                kfree(ctx->tun);
2081                destroy_workqueue(ctx->ud_wq);
2082                destroy_workqueue(ctx->wq);
2083        }
2084}
2085
2086static void mlx4_ib_master_tunnels(struct mlx4_ib_dev *dev, int do_init)
2087{
2088        int i;
2089
2090        if (!mlx4_is_master(dev->dev))
2091                return;
2092        /* initialize or tear down tunnel QPs for the master */
2093        for (i = 0; i < dev->dev->caps.num_ports; i++)
2094                mlx4_ib_tunnels_update(dev, mlx4_master_func_num(dev->dev), i + 1, do_init);
2095        return;
2096}
2097
2098int mlx4_ib_init_sriov(struct mlx4_ib_dev *dev)
2099{
2100        int i = 0;
2101        int err;
2102
2103        if (!mlx4_is_mfunc(dev->dev))
2104                return 0;
2105
2106        dev->sriov.is_going_down = 0;
2107        spin_lock_init(&dev->sriov.going_down_lock);
2108        mlx4_ib_cm_paravirt_init(dev);
2109
2110        mlx4_ib_warn(&dev->ib_dev, "multi-function enabled\n");
2111
2112        if (mlx4_is_slave(dev->dev)) {
2113                mlx4_ib_warn(&dev->ib_dev, "operating in qp1 tunnel mode\n");
2114                return 0;
2115        }
2116
2117        for (i = 0; i < dev->dev->caps.sqp_demux; i++) {
2118                if (i == mlx4_master_func_num(dev->dev))
2119                        mlx4_put_slave_node_guid(dev->dev, i, dev->ib_dev.node_guid);
2120                else
2121                        mlx4_put_slave_node_guid(dev->dev, i, mlx4_ib_gen_node_guid());
2122        }
2123
2124        err = mlx4_ib_init_alias_guid_service(dev);
2125        if (err) {
2126                mlx4_ib_warn(&dev->ib_dev, "Failed init alias guid process.\n");
2127                goto paravirt_err;
2128        }
2129        err = mlx4_ib_device_register_sysfs(dev);
2130        if (err) {
2131                mlx4_ib_warn(&dev->ib_dev, "Failed to register sysfs\n");
2132                goto sysfs_err;
2133        }
2134
2135        mlx4_ib_warn(&dev->ib_dev, "initializing demux service for %d qp1 clients\n",
2136                     dev->dev->caps.sqp_demux);
2137        for (i = 0; i < dev->num_ports; i++) {
2138                union ib_gid gid;
2139                err = __mlx4_ib_query_gid(&dev->ib_dev, i + 1, 0, &gid, 1);
2140                if (err)
2141                        goto demux_err;
2142                dev->sriov.demux[i].guid_cache[0] = gid.global.interface_id;
2143                err = alloc_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1,
2144                                      &dev->sriov.sqps[i]);
2145                if (err)
2146                        goto demux_err;
2147                err = mlx4_ib_alloc_demux_ctx(dev, &dev->sriov.demux[i], i + 1);
2148                if (err)
2149                        goto free_pv;
2150        }
2151        mlx4_ib_master_tunnels(dev, 1);
2152        return 0;
2153
2154free_pv:
2155        free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2156demux_err:
2157        while (--i >= 0) {
2158                free_pv_object(dev, mlx4_master_func_num(dev->dev), i + 1);
2159                mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2160        }
2161        mlx4_ib_device_unregister_sysfs(dev);
2162
2163sysfs_err:
2164        mlx4_ib_destroy_alias_guid_service(dev);
2165
2166paravirt_err:
2167        mlx4_ib_cm_paravirt_clean(dev, -1);
2168
2169        return err;
2170}
2171
2172void mlx4_ib_close_sriov(struct mlx4_ib_dev *dev)
2173{
2174        int i;
2175        unsigned long flags;
2176
2177        if (!mlx4_is_mfunc(dev->dev))
2178                return;
2179
2180        spin_lock_irqsave(&dev->sriov.going_down_lock, flags);
2181        dev->sriov.is_going_down = 1;
2182        spin_unlock_irqrestore(&dev->sriov.going_down_lock, flags);
2183        if (mlx4_is_master(dev->dev)) {
2184                for (i = 0; i < dev->num_ports; i++) {
2185                        flush_workqueue(dev->sriov.demux[i].ud_wq);
2186                        mlx4_ib_free_sqp_ctx(dev->sriov.sqps[i]);
2187                        kfree(dev->sriov.sqps[i]);
2188                        dev->sriov.sqps[i] = NULL;
2189                        mlx4_ib_free_demux_ctx(&dev->sriov.demux[i]);
2190                }
2191
2192                mlx4_ib_cm_paravirt_clean(dev, -1);
2193                mlx4_ib_destroy_alias_guid_service(dev);
2194                mlx4_ib_device_unregister_sysfs(dev);
2195        }
2196}
2197