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18#ifndef _CORE_H_
19#define _CORE_H_
20
21#include <linux/completion.h>
22#include <linux/if_ether.h>
23#include <linux/types.h>
24#include <linux/pci.h>
25#include <linux/uuid.h>
26#include <linux/time.h>
27
28#include "htt.h"
29#include "htc.h"
30#include "hw.h"
31#include "targaddrs.h"
32#include "wmi.h"
33#include "../ath.h"
34#include "../regd.h"
35#include "../dfs_pattern_detector.h"
36#include "spectral.h"
37#include "thermal.h"
38#include "wow.h"
39
40#define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
41#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
42#define WO(_f) ((_f##_OFFSET) >> 2)
43
44#define ATH10K_SCAN_ID 0
45#define WMI_READY_TIMEOUT (5 * HZ)
46#define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ)
47#define ATH10K_CONNECTION_LOSS_HZ (3*HZ)
48#define ATH10K_NUM_CHANS 39
49
50
51#define ATH10K_DEFAULT_NOISE_FLOOR -95
52
53#define ATH10K_MAX_NUM_MGMT_PENDING 128
54
55
56#define ATH10K_KICKOUT_THRESHOLD (20 * 16)
57
58
59
60
61
62
63#define ATH10K_KEEPALIVE_MIN_IDLE 3747
64#define ATH10K_KEEPALIVE_MAX_IDLE 3895
65#define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
66
67struct ath10k;
68
69enum ath10k_bus {
70 ATH10K_BUS_PCI,
71};
72
73static inline const char *ath10k_bus_str(enum ath10k_bus bus)
74{
75 switch (bus) {
76 case ATH10K_BUS_PCI:
77 return "pci";
78 }
79
80 return "unknown";
81}
82
83struct ath10k_skb_cb {
84 dma_addr_t paddr;
85 u8 eid;
86 u8 vdev_id;
87 enum ath10k_hw_txrx_mode txmode;
88 bool is_protected;
89
90 struct {
91 u8 tid;
92 u16 freq;
93 bool is_offchan;
94 struct ath10k_htt_txbuf *txbuf;
95 u32 txbuf_paddr;
96 } __packed htt;
97
98 struct {
99 bool dtim_zero;
100 bool deliver_cab;
101 } bcn;
102} __packed;
103
104struct ath10k_skb_rxcb {
105 dma_addr_t paddr;
106 struct hlist_node hlist;
107};
108
109static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
110{
111 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
112 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
113 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
114}
115
116static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
117{
118 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
119 return (struct ath10k_skb_rxcb *)skb->cb;
120}
121
122#define ATH10K_RXCB_SKB(rxcb) \
123 container_of((void *)rxcb, struct sk_buff, cb)
124
125static inline u32 host_interest_item_address(u32 item_offset)
126{
127 return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
128}
129
130struct ath10k_bmi {
131 bool done_sent;
132};
133
134struct ath10k_mem_chunk {
135 void *vaddr;
136 dma_addr_t paddr;
137 u32 len;
138 u32 req_id;
139};
140
141struct ath10k_wmi {
142 enum ath10k_fw_wmi_op_version op_version;
143 enum ath10k_htc_ep_id eid;
144 struct completion service_ready;
145 struct completion unified_ready;
146 wait_queue_head_t tx_credits_wq;
147 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
148 struct wmi_cmd_map *cmd;
149 struct wmi_vdev_param_map *vdev_param;
150 struct wmi_pdev_param_map *pdev_param;
151 const struct wmi_ops *ops;
152
153 u32 num_mem_chunks;
154 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
155};
156
157struct ath10k_fw_stats_peer {
158 struct list_head list;
159
160 u8 peer_macaddr[ETH_ALEN];
161 u32 peer_rssi;
162 u32 peer_tx_rate;
163 u32 peer_rx_rate;
164};
165
166struct ath10k_fw_stats_vdev {
167 struct list_head list;
168
169 u32 vdev_id;
170 u32 beacon_snr;
171 u32 data_snr;
172 u32 num_tx_frames[4];
173 u32 num_rx_frames;
174 u32 num_tx_frames_retries[4];
175 u32 num_tx_frames_failures[4];
176 u32 num_rts_fail;
177 u32 num_rts_success;
178 u32 num_rx_err;
179 u32 num_rx_discard;
180 u32 num_tx_not_acked;
181 u32 tx_rate_history[10];
182 u32 beacon_rssi_history[10];
183};
184
185struct ath10k_fw_stats_pdev {
186 struct list_head list;
187
188
189 s32 ch_noise_floor;
190 u32 tx_frame_count;
191 u32 rx_frame_count;
192 u32 rx_clear_count;
193 u32 cycle_count;
194 u32 phy_err_count;
195 u32 chan_tx_power;
196 u32 ack_rx_bad;
197 u32 rts_bad;
198 u32 rts_good;
199 u32 fcs_bad;
200 u32 no_beacons;
201 u32 mib_int_count;
202
203
204 s32 comp_queued;
205 s32 comp_delivered;
206 s32 msdu_enqued;
207 s32 mpdu_enqued;
208 s32 wmm_drop;
209 s32 local_enqued;
210 s32 local_freed;
211 s32 hw_queued;
212 s32 hw_reaped;
213 s32 underrun;
214 s32 tx_abort;
215 s32 mpdus_requed;
216 u32 tx_ko;
217 u32 data_rc;
218 u32 self_triggers;
219 u32 sw_retry_failure;
220 u32 illgl_rate_phy_err;
221 u32 pdev_cont_xretry;
222 u32 pdev_tx_timeout;
223 u32 pdev_resets;
224 u32 phy_underrun;
225 u32 txop_ovf;
226
227
228 s32 mid_ppdu_route_change;
229 s32 status_rcvd;
230 s32 r0_frags;
231 s32 r1_frags;
232 s32 r2_frags;
233 s32 r3_frags;
234 s32 htt_msdus;
235 s32 htt_mpdus;
236 s32 loc_msdus;
237 s32 loc_mpdus;
238 s32 oversize_amsdu;
239 s32 phy_errs;
240 s32 phy_err_drop;
241 s32 mpdu_errs;
242};
243
244struct ath10k_fw_stats {
245 struct list_head pdevs;
246 struct list_head vdevs;
247 struct list_head peers;
248};
249
250struct ath10k_dfs_stats {
251 u32 phy_errors;
252 u32 pulses_total;
253 u32 pulses_detected;
254 u32 pulses_discarded;
255 u32 radar_detected;
256};
257
258#define ATH10K_MAX_NUM_PEER_IDS (1 << 11)
259
260struct ath10k_peer {
261 struct list_head list;
262 int vdev_id;
263 u8 addr[ETH_ALEN];
264 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
265
266
267 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
268};
269
270struct ath10k_sta {
271 struct ath10k_vif *arvif;
272
273
274 u32 changed;
275 u32 bw;
276 u32 nss;
277 u32 smps;
278
279 struct work_struct update_wk;
280
281#ifdef CONFIG_MAC80211_DEBUGFS
282
283 bool aggr_mode;
284#endif
285};
286
287#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ)
288
289enum ath10k_beacon_state {
290 ATH10K_BEACON_SCHEDULED = 0,
291 ATH10K_BEACON_SENDING,
292 ATH10K_BEACON_SENT,
293};
294
295struct ath10k_vif {
296 struct list_head list;
297
298 u32 vdev_id;
299 enum wmi_vdev_type vdev_type;
300 enum wmi_vdev_subtype vdev_subtype;
301 u32 beacon_interval;
302 u32 dtim_period;
303 struct sk_buff *beacon;
304
305 enum ath10k_beacon_state beacon_state;
306 void *beacon_buf;
307 dma_addr_t beacon_paddr;
308 unsigned long tx_paused;
309
310 struct ath10k *ar;
311 struct ieee80211_vif *vif;
312
313 bool is_started;
314 bool is_up;
315 bool spectral_enabled;
316 bool ps;
317 u32 aid;
318 u8 bssid[ETH_ALEN];
319
320 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
321 s8 def_wep_key_idx;
322
323 u16 tx_seq_no;
324
325 union {
326 struct {
327 u32 uapsd;
328 } sta;
329 struct {
330
331 u8 tim_bitmap[16];
332 u8 tim_len;
333 u32 ssid_len;
334 u8 ssid[IEEE80211_MAX_SSID_LEN];
335 bool hidden_ssid;
336
337 u32 noa_len;
338 u8 *noa_data;
339 } ap;
340 } u;
341
342 bool use_cts_prot;
343 int num_legacy_stations;
344 int txpower;
345 struct wmi_wmm_params_all_arg wmm_params;
346 struct work_struct ap_csa_work;
347 struct delayed_work connection_loss_work;
348 struct cfg80211_bitrate_mask bitrate_mask;
349};
350
351struct ath10k_vif_iter {
352 u32 vdev_id;
353 struct ath10k_vif *arvif;
354};
355
356
357struct ath10k_fw_crash_data {
358 bool crashed_since_read;
359
360 uuid_le uuid;
361 struct timespec timestamp;
362 __le32 registers[REG_DUMP_COUNT_QCA988X];
363};
364
365struct ath10k_debug {
366 struct dentry *debugfs_phy;
367
368 struct ath10k_fw_stats fw_stats;
369 struct completion fw_stats_complete;
370 bool fw_stats_done;
371
372 unsigned long htt_stats_mask;
373 struct delayed_work htt_stats_dwork;
374 struct ath10k_dfs_stats dfs_stats;
375 struct ath_dfs_pool_stats dfs_pool_stats;
376
377
378 u32 fw_dbglog_mask;
379 u32 fw_dbglog_level;
380 u32 pktlog_filter;
381 u32 reg_addr;
382 u32 nf_cal_period;
383
384 u8 htt_max_amsdu;
385 u8 htt_max_ampdu;
386
387 struct ath10k_fw_crash_data *fw_crash_data;
388};
389
390enum ath10k_state {
391 ATH10K_STATE_OFF = 0,
392 ATH10K_STATE_ON,
393
394
395
396
397
398
399
400
401
402 ATH10K_STATE_RESTARTING,
403 ATH10K_STATE_RESTARTED,
404
405
406
407
408
409 ATH10K_STATE_WEDGED,
410
411
412 ATH10K_STATE_UTF,
413};
414
415enum ath10k_firmware_mode {
416
417 ATH10K_FIRMWARE_MODE_NORMAL,
418
419
420 ATH10K_FIRMWARE_MODE_UTF,
421};
422
423enum ath10k_fw_features {
424
425 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
426
427
428 ATH10K_FW_FEATURE_WMI_10X = 1,
429
430
431 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
432
433
434 ATH10K_FW_FEATURE_NO_P2P = 3,
435
436
437
438
439
440 ATH10K_FW_FEATURE_WMI_10_2 = 4,
441
442
443
444
445
446 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
447
448
449
450
451
452 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
453
454
455 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
456
457
458
459
460 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING,
461
462
463 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
464
465
466 ATH10K_FW_FEATURE_COUNT,
467};
468
469enum ath10k_dev_flags {
470
471 ATH10K_CAC_RUNNING,
472 ATH10K_FLAG_CORE_REGISTERED,
473
474
475
476
477 ATH10K_FLAG_CRASH_FLUSH,
478};
479
480enum ath10k_cal_mode {
481 ATH10K_CAL_MODE_FILE,
482 ATH10K_CAL_MODE_OTP,
483 ATH10K_CAL_MODE_DT,
484};
485
486static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
487{
488 switch (mode) {
489 case ATH10K_CAL_MODE_FILE:
490 return "file";
491 case ATH10K_CAL_MODE_OTP:
492 return "otp";
493 case ATH10K_CAL_MODE_DT:
494 return "dt";
495 }
496
497 return "unknown";
498}
499
500enum ath10k_scan_state {
501 ATH10K_SCAN_IDLE,
502 ATH10K_SCAN_STARTING,
503 ATH10K_SCAN_RUNNING,
504 ATH10K_SCAN_ABORTING,
505};
506
507static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
508{
509 switch (state) {
510 case ATH10K_SCAN_IDLE:
511 return "idle";
512 case ATH10K_SCAN_STARTING:
513 return "starting";
514 case ATH10K_SCAN_RUNNING:
515 return "running";
516 case ATH10K_SCAN_ABORTING:
517 return "aborting";
518 }
519
520 return "unknown";
521}
522
523enum ath10k_tx_pause_reason {
524 ATH10K_TX_PAUSE_Q_FULL,
525 ATH10K_TX_PAUSE_MAX,
526};
527
528struct ath10k {
529 struct ath_common ath_common;
530 struct ieee80211_hw *hw;
531 struct device *dev;
532 u8 mac_addr[ETH_ALEN];
533
534 enum ath10k_hw_rev hw_rev;
535 u32 chip_id;
536 u32 target_version;
537 u8 fw_version_major;
538 u32 fw_version_minor;
539 u16 fw_version_release;
540 u16 fw_version_build;
541 u32 fw_stats_req_mask;
542 u32 phy_capability;
543 u32 hw_min_tx_power;
544 u32 hw_max_tx_power;
545 u32 ht_cap_info;
546 u32 vht_cap_info;
547 u32 num_rf_chains;
548
549 bool ani_enabled;
550
551 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
552
553 bool p2p;
554
555 struct {
556 enum ath10k_bus bus;
557 const struct ath10k_hif_ops *ops;
558 } hif;
559
560 struct completion target_suspend;
561
562 const struct ath10k_hw_regs *regs;
563 struct ath10k_bmi bmi;
564 struct ath10k_wmi wmi;
565 struct ath10k_htc htc;
566 struct ath10k_htt htt;
567
568 struct ath10k_hw_params {
569 u32 id;
570 const char *name;
571 u32 patch_load_addr;
572 int uart_pin;
573
574
575
576
577
578
579 bool has_shifted_cc_wraparound;
580
581 struct ath10k_hw_params_fw {
582 const char *dir;
583 const char *fw;
584 const char *otp;
585 const char *board;
586 size_t board_size;
587 size_t board_ext_size;
588 } fw;
589 } hw_params;
590
591 const struct firmware *board;
592 const void *board_data;
593 size_t board_len;
594
595 const struct firmware *otp;
596 const void *otp_data;
597 size_t otp_len;
598
599 const struct firmware *firmware;
600 const void *firmware_data;
601 size_t firmware_len;
602
603 const struct firmware *cal_file;
604
605 char spec_board_id[100];
606 bool spec_board_loaded;
607
608 int fw_api;
609 enum ath10k_cal_mode cal_mode;
610
611 struct {
612 struct completion started;
613 struct completion completed;
614 struct completion on_channel;
615 struct delayed_work timeout;
616 enum ath10k_scan_state state;
617 bool is_roc;
618 int vdev_id;
619 int roc_freq;
620 } scan;
621
622 struct {
623 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
624 } mac;
625
626
627 struct ieee80211_channel *rx_channel;
628
629
630 struct ieee80211_channel *scan_channel;
631
632
633 struct cfg80211_chan_def chandef;
634
635 unsigned long long free_vdev_map;
636 struct ath10k_vif *monitor_arvif;
637 bool monitor;
638 int monitor_vdev_id;
639 bool monitor_started;
640 unsigned int filter_flags;
641 unsigned long dev_flags;
642 u32 dfs_block_radar_events;
643
644
645 bool radar_enabled;
646 int num_started_vdevs;
647
648
649 u8 supp_tx_chainmask;
650 u8 supp_rx_chainmask;
651 u8 cfg_tx_chainmask;
652 u8 cfg_rx_chainmask;
653
654 struct completion install_key_done;
655
656 struct completion vdev_setup_done;
657
658 struct workqueue_struct *workqueue;
659
660
661 struct mutex conf_mutex;
662
663
664 spinlock_t data_lock;
665
666 struct list_head arvifs;
667 struct list_head peers;
668 wait_queue_head_t peer_mapping_wq;
669
670
671 int num_peers;
672 int num_stations;
673
674 int max_num_peers;
675 int max_num_stations;
676 int max_num_vdevs;
677 int max_num_tdls_vdevs;
678
679 struct work_struct offchan_tx_work;
680 struct sk_buff_head offchan_tx_queue;
681 struct completion offchan_tx_completed;
682 struct sk_buff *offchan_tx_skb;
683
684 struct work_struct wmi_mgmt_tx_work;
685 struct sk_buff_head wmi_mgmt_tx_queue;
686
687 enum ath10k_state state;
688
689 struct work_struct register_work;
690 struct work_struct restart_work;
691
692
693
694 u32 survey_last_rx_clear_count;
695 u32 survey_last_cycle_count;
696 struct survey_info survey[ATH10K_NUM_CHANS];
697
698
699
700
701
702
703
704 bool ch_info_can_report_survey;
705
706 struct dfs_pattern_detector *dfs_detector;
707
708 unsigned long tx_paused;
709
710#ifdef CONFIG_ATH10K_DEBUGFS
711 struct ath10k_debug debug;
712#endif
713
714 struct {
715
716 struct rchan *rfs_chan_spec_scan;
717
718
719 enum ath10k_spectral_mode mode;
720 struct ath10k_spec_scan config;
721 } spectral;
722
723 struct {
724
725 const struct firmware *utf;
726 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT);
727 enum ath10k_fw_wmi_op_version orig_wmi_op_version;
728
729
730 bool utf_monitor;
731 } testmode;
732
733 struct {
734
735 u32 fw_crash_counter;
736 u32 fw_warm_reset_counter;
737 u32 fw_cold_reset_counter;
738 } stats;
739
740 struct ath10k_thermal thermal;
741 struct ath10k_wow wow;
742
743
744 u8 drv_priv[0] __aligned(sizeof(void *));
745};
746
747struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
748 enum ath10k_bus bus,
749 enum ath10k_hw_rev hw_rev,
750 const struct ath10k_hif_ops *hif_ops);
751void ath10k_core_destroy(struct ath10k *ar);
752
753int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode);
754int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
755void ath10k_core_stop(struct ath10k *ar);
756int ath10k_core_register(struct ath10k *ar, u32 chip_id);
757void ath10k_core_unregister(struct ath10k *ar);
758
759#endif
760