linux/drivers/net/wireless/ath/ath6kl/init.c
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   1
   2/*
   3 * Copyright (c) 2011 Atheros Communications Inc.
   4 * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
   5 *
   6 * Permission to use, copy, modify, and/or distribute this software for any
   7 * purpose with or without fee is hereby granted, provided that the above
   8 * copyright notice and this permission notice appear in all copies.
   9 *
  10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17 */
  18
  19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20
  21#include <linux/moduleparam.h>
  22#include <linux/errno.h>
  23#include <linux/export.h>
  24#include <linux/of.h>
  25#include <linux/mmc/sdio_func.h>
  26#include <linux/vmalloc.h>
  27
  28#include "core.h"
  29#include "cfg80211.h"
  30#include "target.h"
  31#include "debug.h"
  32#include "hif-ops.h"
  33#include "htc-ops.h"
  34
  35static const struct ath6kl_hw hw_list[] = {
  36        {
  37                .id                             = AR6003_HW_2_0_VERSION,
  38                .name                           = "ar6003 hw 2.0",
  39                .dataset_patch_addr             = 0x57e884,
  40                .app_load_addr                  = 0x543180,
  41                .board_ext_data_addr            = 0x57e500,
  42                .reserved_ram_size              = 6912,
  43                .refclk_hz                      = 26000000,
  44                .uarttx_pin                     = 8,
  45                .flags                          = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
  46
  47                /* hw2.0 needs override address hardcoded */
  48                .app_start_override_addr        = 0x944C00,
  49
  50                .fw = {
  51                        .dir            = AR6003_HW_2_0_FW_DIR,
  52                        .otp            = AR6003_HW_2_0_OTP_FILE,
  53                        .fw             = AR6003_HW_2_0_FIRMWARE_FILE,
  54                        .tcmd           = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
  55                        .patch          = AR6003_HW_2_0_PATCH_FILE,
  56                },
  57
  58                .fw_board               = AR6003_HW_2_0_BOARD_DATA_FILE,
  59                .fw_default_board       = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
  60        },
  61        {
  62                .id                             = AR6003_HW_2_1_1_VERSION,
  63                .name                           = "ar6003 hw 2.1.1",
  64                .dataset_patch_addr             = 0x57ff74,
  65                .app_load_addr                  = 0x1234,
  66                .board_ext_data_addr            = 0x542330,
  67                .reserved_ram_size              = 512,
  68                .refclk_hz                      = 26000000,
  69                .uarttx_pin                     = 8,
  70                .testscript_addr                = 0x57ef74,
  71                .flags                          = ATH6KL_HW_SDIO_CRC_ERROR_WAR,
  72
  73                .fw = {
  74                        .dir            = AR6003_HW_2_1_1_FW_DIR,
  75                        .otp            = AR6003_HW_2_1_1_OTP_FILE,
  76                        .fw             = AR6003_HW_2_1_1_FIRMWARE_FILE,
  77                        .tcmd           = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
  78                        .patch          = AR6003_HW_2_1_1_PATCH_FILE,
  79                        .utf            = AR6003_HW_2_1_1_UTF_FIRMWARE_FILE,
  80                        .testscript     = AR6003_HW_2_1_1_TESTSCRIPT_FILE,
  81                },
  82
  83                .fw_board               = AR6003_HW_2_1_1_BOARD_DATA_FILE,
  84                .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
  85        },
  86        {
  87                .id                             = AR6004_HW_1_0_VERSION,
  88                .name                           = "ar6004 hw 1.0",
  89                .dataset_patch_addr             = 0x57e884,
  90                .app_load_addr                  = 0x1234,
  91                .board_ext_data_addr            = 0x437000,
  92                .reserved_ram_size              = 19456,
  93                .board_addr                     = 0x433900,
  94                .refclk_hz                      = 26000000,
  95                .uarttx_pin                     = 11,
  96                .flags                          = 0,
  97
  98                .fw = {
  99                        .dir            = AR6004_HW_1_0_FW_DIR,
 100                        .fw             = AR6004_HW_1_0_FIRMWARE_FILE,
 101                },
 102
 103                .fw_board               = AR6004_HW_1_0_BOARD_DATA_FILE,
 104                .fw_default_board       = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
 105        },
 106        {
 107                .id                             = AR6004_HW_1_1_VERSION,
 108                .name                           = "ar6004 hw 1.1",
 109                .dataset_patch_addr             = 0x57e884,
 110                .app_load_addr                  = 0x1234,
 111                .board_ext_data_addr            = 0x437000,
 112                .reserved_ram_size              = 11264,
 113                .board_addr                     = 0x43d400,
 114                .refclk_hz                      = 40000000,
 115                .uarttx_pin                     = 11,
 116                .flags                          = 0,
 117                .fw = {
 118                        .dir            = AR6004_HW_1_1_FW_DIR,
 119                        .fw             = AR6004_HW_1_1_FIRMWARE_FILE,
 120                },
 121
 122                .fw_board               = AR6004_HW_1_1_BOARD_DATA_FILE,
 123                .fw_default_board       = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
 124        },
 125        {
 126                .id                             = AR6004_HW_1_2_VERSION,
 127                .name                           = "ar6004 hw 1.2",
 128                .dataset_patch_addr             = 0x436ecc,
 129                .app_load_addr                  = 0x1234,
 130                .board_ext_data_addr            = 0x437000,
 131                .reserved_ram_size              = 9216,
 132                .board_addr                     = 0x435c00,
 133                .refclk_hz                      = 40000000,
 134                .uarttx_pin                     = 11,
 135                .flags                          = 0,
 136
 137                .fw = {
 138                        .dir            = AR6004_HW_1_2_FW_DIR,
 139                        .fw             = AR6004_HW_1_2_FIRMWARE_FILE,
 140                },
 141                .fw_board               = AR6004_HW_1_2_BOARD_DATA_FILE,
 142                .fw_default_board       = AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE,
 143        },
 144        {
 145                .id                             = AR6004_HW_1_3_VERSION,
 146                .name                           = "ar6004 hw 1.3",
 147                .dataset_patch_addr             = 0x437860,
 148                .app_load_addr                  = 0x1234,
 149                .board_ext_data_addr            = 0x437000,
 150                .reserved_ram_size              = 7168,
 151                .board_addr                     = 0x436400,
 152                .refclk_hz                      = 0,
 153                .uarttx_pin                     = 11,
 154                .flags                          = 0,
 155
 156                .fw = {
 157                        .dir            = AR6004_HW_1_3_FW_DIR,
 158                        .fw             = AR6004_HW_1_3_FIRMWARE_FILE,
 159                        .tcmd           = AR6004_HW_1_3_TCMD_FIRMWARE_FILE,
 160                        .utf            = AR6004_HW_1_3_UTF_FIRMWARE_FILE,
 161                        .testscript     = AR6004_HW_1_3_TESTSCRIPT_FILE,
 162                },
 163
 164                .fw_board               = AR6004_HW_1_3_BOARD_DATA_FILE,
 165                .fw_default_board       = AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE,
 166        },
 167        {
 168                .id                             = AR6004_HW_3_0_VERSION,
 169                .name                           = "ar6004 hw 3.0",
 170                .dataset_patch_addr             = 0,
 171                .app_load_addr                  = 0x1234,
 172                .board_ext_data_addr            = 0,
 173                .reserved_ram_size              = 7168,
 174                .board_addr                     = 0x436400,
 175                .testscript_addr                = 0,
 176                .flags                          = 0,
 177
 178                .fw = {
 179                        .dir            = AR6004_HW_3_0_FW_DIR,
 180                        .fw             = AR6004_HW_3_0_FIRMWARE_FILE,
 181                        .tcmd           = AR6004_HW_3_0_TCMD_FIRMWARE_FILE,
 182                        .utf            = AR6004_HW_3_0_UTF_FIRMWARE_FILE,
 183                        .testscript     = AR6004_HW_3_0_TESTSCRIPT_FILE,
 184                },
 185
 186                .fw_board               = AR6004_HW_3_0_BOARD_DATA_FILE,
 187                .fw_default_board       = AR6004_HW_3_0_DEFAULT_BOARD_DATA_FILE,
 188        },
 189};
 190
 191/*
 192 * Include definitions here that can be used to tune the WLAN module
 193 * behavior. Different customers can tune the behavior as per their needs,
 194 * here.
 195 */
 196
 197/*
 198 * This configuration item enable/disable keepalive support.
 199 * Keepalive support: In the absence of any data traffic to AP, null
 200 * frames will be sent to the AP at periodic interval, to keep the association
 201 * active. This configuration item defines the periodic interval.
 202 * Use value of zero to disable keepalive support
 203 * Default: 60 seconds
 204 */
 205#define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
 206
 207/*
 208 * This configuration item sets the value of disconnect timeout
 209 * Firmware delays sending the disconnec event to the host for this
 210 * timeout after is gets disconnected from the current AP.
 211 * If the firmware successly roams within the disconnect timeout
 212 * it sends a new connect event
 213 */
 214#define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
 215
 216
 217#define ATH6KL_DATA_OFFSET    64
 218struct sk_buff *ath6kl_buf_alloc(int size)
 219{
 220        struct sk_buff *skb;
 221        u16 reserved;
 222
 223        /* Add chacheline space at front and back of buffer */
 224        reserved = roundup((2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
 225                   sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES, 4);
 226        skb = dev_alloc_skb(size + reserved);
 227
 228        if (skb)
 229                skb_reserve(skb, reserved - L1_CACHE_BYTES);
 230        return skb;
 231}
 232
 233void ath6kl_init_profile_info(struct ath6kl_vif *vif)
 234{
 235        vif->ssid_len = 0;
 236        memset(vif->ssid, 0, sizeof(vif->ssid));
 237
 238        vif->dot11_auth_mode = OPEN_AUTH;
 239        vif->auth_mode = NONE_AUTH;
 240        vif->prwise_crypto = NONE_CRYPT;
 241        vif->prwise_crypto_len = 0;
 242        vif->grp_crypto = NONE_CRYPT;
 243        vif->grp_crypto_len = 0;
 244        memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
 245        memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
 246        memset(vif->bssid, 0, sizeof(vif->bssid));
 247        vif->bss_ch = 0;
 248}
 249
 250static int ath6kl_set_host_app_area(struct ath6kl *ar)
 251{
 252        u32 address, data;
 253        struct host_app_area host_app_area;
 254
 255        /* Fetch the address of the host_app_area_s
 256         * instance in the host interest area */
 257        address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
 258        address = TARG_VTOP(ar->target_type, address);
 259
 260        if (ath6kl_diag_read32(ar, address, &data))
 261                return -EIO;
 262
 263        address = TARG_VTOP(ar->target_type, data);
 264        host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
 265        if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
 266                              sizeof(struct host_app_area)))
 267                return -EIO;
 268
 269        return 0;
 270}
 271
 272static inline void set_ac2_ep_map(struct ath6kl *ar,
 273                                  u8 ac,
 274                                  enum htc_endpoint_id ep)
 275{
 276        ar->ac2ep_map[ac] = ep;
 277        ar->ep2ac_map[ep] = ac;
 278}
 279
 280/* connect to a service */
 281static int ath6kl_connectservice(struct ath6kl *ar,
 282                                 struct htc_service_connect_req  *con_req,
 283                                 char *desc)
 284{
 285        int status;
 286        struct htc_service_connect_resp response;
 287
 288        memset(&response, 0, sizeof(response));
 289
 290        status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
 291        if (status) {
 292                ath6kl_err("failed to connect to %s service status:%d\n",
 293                           desc, status);
 294                return status;
 295        }
 296
 297        switch (con_req->svc_id) {
 298        case WMI_CONTROL_SVC:
 299                if (test_bit(WMI_ENABLED, &ar->flag))
 300                        ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
 301                ar->ctrl_ep = response.endpoint;
 302                break;
 303        case WMI_DATA_BE_SVC:
 304                set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
 305                break;
 306        case WMI_DATA_BK_SVC:
 307                set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
 308                break;
 309        case WMI_DATA_VI_SVC:
 310                set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
 311                break;
 312        case WMI_DATA_VO_SVC:
 313                set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
 314                break;
 315        default:
 316                ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
 317                return -EINVAL;
 318        }
 319
 320        return 0;
 321}
 322
 323static int ath6kl_init_service_ep(struct ath6kl *ar)
 324{
 325        struct htc_service_connect_req connect;
 326
 327        memset(&connect, 0, sizeof(connect));
 328
 329        /* these fields are the same for all service endpoints */
 330        connect.ep_cb.tx_comp_multi = ath6kl_tx_complete;
 331        connect.ep_cb.rx = ath6kl_rx;
 332        connect.ep_cb.rx_refill = ath6kl_rx_refill;
 333        connect.ep_cb.tx_full = ath6kl_tx_queue_full;
 334
 335        /*
 336         * Set the max queue depth so that our ath6kl_tx_queue_full handler
 337         * gets called.
 338        */
 339        connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
 340        connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
 341        if (!connect.ep_cb.rx_refill_thresh)
 342                connect.ep_cb.rx_refill_thresh++;
 343
 344        /* connect to control service */
 345        connect.svc_id = WMI_CONTROL_SVC;
 346        if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
 347                return -EIO;
 348
 349        connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
 350
 351        /*
 352         * Limit the HTC message size on the send path, although e can
 353         * receive A-MSDU frames of 4K, we will only send ethernet-sized
 354         * (802.3) frames on the send path.
 355         */
 356        connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
 357
 358        /*
 359         * To reduce the amount of committed memory for larger A_MSDU
 360         * frames, use the recv-alloc threshold mechanism for larger
 361         * packets.
 362         */
 363        connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
 364        connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
 365
 366        /*
 367         * For the remaining data services set the connection flag to
 368         * reduce dribbling, if configured to do so.
 369         */
 370        connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
 371        connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
 372        connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
 373
 374        connect.svc_id = WMI_DATA_BE_SVC;
 375
 376        if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
 377                return -EIO;
 378
 379        /* connect to back-ground map this to WMI LOW_PRI */
 380        connect.svc_id = WMI_DATA_BK_SVC;
 381        if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
 382                return -EIO;
 383
 384        /* connect to Video service, map this to HI PRI */
 385        connect.svc_id = WMI_DATA_VI_SVC;
 386        if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
 387                return -EIO;
 388
 389        /*
 390         * Connect to VO service, this is currently not mapped to a WMI
 391         * priority stream due to historical reasons. WMI originally
 392         * defined 3 priorities over 3 mailboxes We can change this when
 393         * WMI is reworked so that priorities are not dependent on
 394         * mailboxes.
 395         */
 396        connect.svc_id = WMI_DATA_VO_SVC;
 397        if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
 398                return -EIO;
 399
 400        return 0;
 401}
 402
 403void ath6kl_init_control_info(struct ath6kl_vif *vif)
 404{
 405        ath6kl_init_profile_info(vif);
 406        vif->def_txkey_index = 0;
 407        memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
 408        vif->ch_hint = 0;
 409}
 410
 411/*
 412 * Set HTC/Mbox operational parameters, this can only be called when the
 413 * target is in the BMI phase.
 414 */
 415static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
 416                                 u8 htc_ctrl_buf)
 417{
 418        int status;
 419        u32 blk_size;
 420
 421        blk_size = ar->mbox_info.block_size;
 422
 423        if (htc_ctrl_buf)
 424                blk_size |=  ((u32)htc_ctrl_buf) << 16;
 425
 426        /* set the host interest area for the block size */
 427        status = ath6kl_bmi_write_hi32(ar, hi_mbox_io_block_sz, blk_size);
 428        if (status) {
 429                ath6kl_err("bmi_write_memory for IO block size failed\n");
 430                goto out;
 431        }
 432
 433        ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
 434                   blk_size,
 435                   ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
 436
 437        if (mbox_isr_yield_val) {
 438                /* set the host interest area for the mbox ISR yield limit */
 439                status = ath6kl_bmi_write_hi32(ar, hi_mbox_isr_yield_limit,
 440                                               mbox_isr_yield_val);
 441                if (status) {
 442                        ath6kl_err("bmi_write_memory for yield limit failed\n");
 443                        goto out;
 444                }
 445        }
 446
 447out:
 448        return status;
 449}
 450
 451static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
 452{
 453        int ret;
 454
 455        /*
 456         * Configure the device for rx dot11 header rules. "0,0" are the
 457         * default values. Required if checksum offload is needed. Set
 458         * RxMetaVersion to 2.
 459         */
 460        ret = ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
 461                                                 ar->rx_meta_ver, 0, 0);
 462        if (ret) {
 463                ath6kl_err("unable to set the rx frame format: %d\n", ret);
 464                return ret;
 465        }
 466
 467        if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN) {
 468                ret = ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
 469                                              IGNORE_PS_FAIL_DURING_SCAN);
 470                if (ret) {
 471                        ath6kl_err("unable to set power save fail event policy: %d\n",
 472                                   ret);
 473                        return ret;
 474                }
 475        }
 476
 477        if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER)) {
 478                ret = ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
 479                                                   WMI_FOLLOW_BARKER_IN_ERP);
 480                if (ret) {
 481                        ath6kl_err("unable to set barker preamble policy: %d\n",
 482                                   ret);
 483                        return ret;
 484                }
 485        }
 486
 487        ret = ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
 488                                           WLAN_CONFIG_KEEP_ALIVE_INTERVAL);
 489        if (ret) {
 490                ath6kl_err("unable to set keep alive interval: %d\n", ret);
 491                return ret;
 492        }
 493
 494        ret = ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
 495                                         WLAN_CONFIG_DISCONNECT_TIMEOUT);
 496        if (ret) {
 497                ath6kl_err("unable to set disconnect timeout: %d\n", ret);
 498                return ret;
 499        }
 500
 501        if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST)) {
 502                ret = ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED);
 503                if (ret) {
 504                        ath6kl_err("unable to set txop bursting: %d\n", ret);
 505                        return ret;
 506                }
 507        }
 508
 509        if (ar->p2p && (ar->vif_max == 1 || idx)) {
 510                ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
 511                                              P2P_FLAG_CAPABILITIES_REQ |
 512                                              P2P_FLAG_MACADDR_REQ |
 513                                              P2P_FLAG_HMODEL_REQ);
 514                if (ret) {
 515                        ath6kl_dbg(ATH6KL_DBG_TRC,
 516                                   "failed to request P2P capabilities (%d) - assuming P2P not supported\n",
 517                                   ret);
 518                        ar->p2p = false;
 519                }
 520        }
 521
 522        if (ar->p2p && (ar->vif_max == 1 || idx)) {
 523                /* Enable Probe Request reporting for P2P */
 524                ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
 525                if (ret) {
 526                        ath6kl_dbg(ATH6KL_DBG_TRC,
 527                                   "failed to enable Probe Request reporting (%d)\n",
 528                                   ret);
 529                }
 530        }
 531
 532        return ret;
 533}
 534
 535int ath6kl_configure_target(struct ath6kl *ar)
 536{
 537        u32 param, ram_reserved_size;
 538        u8 fw_iftype, fw_mode = 0, fw_submode = 0;
 539        int i, status;
 540
 541        param = !!(ar->conf_flags & ATH6KL_CONF_UART_DEBUG);
 542        if (ath6kl_bmi_write_hi32(ar, hi_serial_enable, param)) {
 543                ath6kl_err("bmi_write_memory for uart debug failed\n");
 544                return -EIO;
 545        }
 546
 547        /*
 548         * Note: Even though the firmware interface type is
 549         * chosen as BSS_STA for all three interfaces, can
 550         * be configured to IBSS/AP as long as the fw submode
 551         * remains normal mode (0 - AP, STA and IBSS). But
 552         * due to an target assert in firmware only one interface is
 553         * configured for now.
 554         */
 555        fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
 556
 557        for (i = 0; i < ar->vif_max; i++)
 558                fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
 559
 560        /*
 561         * Submodes when fw does not support dynamic interface
 562         * switching:
 563         *              vif[0] - AP/STA/IBSS
 564         *              vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
 565         *              vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
 566         * Otherwise, All the interface are initialized to p2p dev.
 567         */
 568
 569        if (test_bit(ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
 570                     ar->fw_capabilities)) {
 571                for (i = 0; i < ar->vif_max; i++)
 572                        fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
 573                                (i * HI_OPTION_FW_SUBMODE_BITS);
 574        } else {
 575                for (i = 0; i < ar->max_norm_iface; i++)
 576                        fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
 577                                (i * HI_OPTION_FW_SUBMODE_BITS);
 578
 579                for (i = ar->max_norm_iface; i < ar->vif_max; i++)
 580                        fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
 581                                (i * HI_OPTION_FW_SUBMODE_BITS);
 582
 583                if (ar->p2p && ar->vif_max == 1)
 584                        fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
 585        }
 586
 587        if (ath6kl_bmi_write_hi32(ar, hi_app_host_interest,
 588                                  HTC_PROTOCOL_VERSION) != 0) {
 589                ath6kl_err("bmi_write_memory for htc version failed\n");
 590                return -EIO;
 591        }
 592
 593        /* set the firmware mode to STA/IBSS/AP */
 594        param = 0;
 595
 596        if (ath6kl_bmi_read_hi32(ar, hi_option_flag, &param) != 0) {
 597                ath6kl_err("bmi_read_memory for setting fwmode failed\n");
 598                return -EIO;
 599        }
 600
 601        param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
 602        param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
 603        param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
 604
 605        param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 606        param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 607
 608        if (ath6kl_bmi_write_hi32(ar, hi_option_flag, param) != 0) {
 609                ath6kl_err("bmi_write_memory for setting fwmode failed\n");
 610                return -EIO;
 611        }
 612
 613        ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
 614
 615        /*
 616         * Hardcode the address use for the extended board data
 617         * Ideally this should be pre-allocate by the OS at boot time
 618         * But since it is a new feature and board data is loaded
 619         * at init time, we have to workaround this from host.
 620         * It is difficult to patch the firmware boot code,
 621         * but possible in theory.
 622         */
 623
 624        if ((ar->target_type == TARGET_TYPE_AR6003) ||
 625            (ar->version.target_ver == AR6004_HW_1_3_VERSION) ||
 626            (ar->version.target_ver == AR6004_HW_3_0_VERSION)) {
 627                param = ar->hw.board_ext_data_addr;
 628                ram_reserved_size = ar->hw.reserved_ram_size;
 629
 630                if (ath6kl_bmi_write_hi32(ar, hi_board_ext_data, param) != 0) {
 631                        ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
 632                        return -EIO;
 633                }
 634
 635                if (ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz,
 636                                          ram_reserved_size) != 0) {
 637                        ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
 638                        return -EIO;
 639                }
 640        }
 641
 642        /* set the block size for the target */
 643        if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
 644                /* use default number of control buffers */
 645                return -EIO;
 646
 647        /* Configure GPIO AR600x UART */
 648        status = ath6kl_bmi_write_hi32(ar, hi_dbg_uart_txpin,
 649                                       ar->hw.uarttx_pin);
 650        if (status)
 651                return status;
 652
 653        /* Configure target refclk_hz */
 654        if (ar->hw.refclk_hz != 0) {
 655                status = ath6kl_bmi_write_hi32(ar, hi_refclk_hz,
 656                                               ar->hw.refclk_hz);
 657                if (status)
 658                        return status;
 659        }
 660
 661        return 0;
 662}
 663
 664/* firmware upload */
 665static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
 666                         u8 **fw, size_t *fw_len)
 667{
 668        const struct firmware *fw_entry;
 669        int ret;
 670
 671        ret = request_firmware(&fw_entry, filename, ar->dev);
 672        if (ret)
 673                return ret;
 674
 675        *fw_len = fw_entry->size;
 676        *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
 677
 678        if (*fw == NULL)
 679                ret = -ENOMEM;
 680
 681        release_firmware(fw_entry);
 682
 683        return ret;
 684}
 685
 686#ifdef CONFIG_OF
 687/*
 688 * Check the device tree for a board-id and use it to construct
 689 * the pathname to the firmware file.  Used (for now) to find a
 690 * fallback to the "bdata.bin" file--typically a symlink to the
 691 * appropriate board-specific file.
 692 */
 693static bool check_device_tree(struct ath6kl *ar)
 694{
 695        static const char *board_id_prop = "atheros,board-id";
 696        struct device_node *node;
 697        char board_filename[64];
 698        const char *board_id;
 699        int ret;
 700
 701        for_each_compatible_node(node, NULL, "atheros,ath6kl") {
 702                board_id = of_get_property(node, board_id_prop, NULL);
 703                if (board_id == NULL) {
 704                        ath6kl_warn("No \"%s\" property on %s node.\n",
 705                                    board_id_prop, node->name);
 706                        continue;
 707                }
 708                snprintf(board_filename, sizeof(board_filename),
 709                         "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
 710
 711                ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
 712                                    &ar->fw_board_len);
 713                if (ret) {
 714                        ath6kl_err("Failed to get DT board file %s: %d\n",
 715                                   board_filename, ret);
 716                        continue;
 717                }
 718                return true;
 719        }
 720        return false;
 721}
 722#else
 723static bool check_device_tree(struct ath6kl *ar)
 724{
 725        return false;
 726}
 727#endif /* CONFIG_OF */
 728
 729static int ath6kl_fetch_board_file(struct ath6kl *ar)
 730{
 731        const char *filename;
 732        int ret;
 733
 734        if (ar->fw_board != NULL)
 735                return 0;
 736
 737        if (WARN_ON(ar->hw.fw_board == NULL))
 738                return -EINVAL;
 739
 740        filename = ar->hw.fw_board;
 741
 742        ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
 743                            &ar->fw_board_len);
 744        if (ret == 0) {
 745                /* managed to get proper board file */
 746                return 0;
 747        }
 748
 749        if (check_device_tree(ar)) {
 750                /* got board file from device tree */
 751                return 0;
 752        }
 753
 754        /* there was no proper board file, try to use default instead */
 755        ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
 756                    filename, ret);
 757
 758        filename = ar->hw.fw_default_board;
 759
 760        ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
 761                            &ar->fw_board_len);
 762        if (ret) {
 763                ath6kl_err("Failed to get default board file %s: %d\n",
 764                           filename, ret);
 765                return ret;
 766        }
 767
 768        ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
 769        ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
 770
 771        return 0;
 772}
 773
 774static int ath6kl_fetch_otp_file(struct ath6kl *ar)
 775{
 776        char filename[100];
 777        int ret;
 778
 779        if (ar->fw_otp != NULL)
 780                return 0;
 781
 782        if (ar->hw.fw.otp == NULL) {
 783                ath6kl_dbg(ATH6KL_DBG_BOOT,
 784                           "no OTP file configured for this hw\n");
 785                return 0;
 786        }
 787
 788        snprintf(filename, sizeof(filename), "%s/%s",
 789                 ar->hw.fw.dir, ar->hw.fw.otp);
 790
 791        ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
 792                            &ar->fw_otp_len);
 793        if (ret) {
 794                ath6kl_err("Failed to get OTP file %s: %d\n",
 795                           filename, ret);
 796                return ret;
 797        }
 798
 799        return 0;
 800}
 801
 802static int ath6kl_fetch_testmode_file(struct ath6kl *ar)
 803{
 804        char filename[100];
 805        int ret;
 806
 807        if (ar->testmode == 0)
 808                return 0;
 809
 810        ath6kl_dbg(ATH6KL_DBG_BOOT, "testmode %d\n", ar->testmode);
 811
 812        if (ar->testmode == 2) {
 813                if (ar->hw.fw.utf == NULL) {
 814                        ath6kl_warn("testmode 2 not supported\n");
 815                        return -EOPNOTSUPP;
 816                }
 817
 818                snprintf(filename, sizeof(filename), "%s/%s",
 819                         ar->hw.fw.dir, ar->hw.fw.utf);
 820        } else {
 821                if (ar->hw.fw.tcmd == NULL) {
 822                        ath6kl_warn("testmode 1 not supported\n");
 823                        return -EOPNOTSUPP;
 824                }
 825
 826                snprintf(filename, sizeof(filename), "%s/%s",
 827                         ar->hw.fw.dir, ar->hw.fw.tcmd);
 828        }
 829
 830        set_bit(TESTMODE, &ar->flag);
 831
 832        ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
 833        if (ret) {
 834                ath6kl_err("Failed to get testmode %d firmware file %s: %d\n",
 835                           ar->testmode, filename, ret);
 836                return ret;
 837        }
 838
 839        return 0;
 840}
 841
 842static int ath6kl_fetch_fw_file(struct ath6kl *ar)
 843{
 844        char filename[100];
 845        int ret;
 846
 847        if (ar->fw != NULL)
 848                return 0;
 849
 850        /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
 851        if (WARN_ON(ar->hw.fw.fw == NULL))
 852                return -EINVAL;
 853
 854        snprintf(filename, sizeof(filename), "%s/%s",
 855                 ar->hw.fw.dir, ar->hw.fw.fw);
 856
 857        ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
 858        if (ret) {
 859                ath6kl_err("Failed to get firmware file %s: %d\n",
 860                           filename, ret);
 861                return ret;
 862        }
 863
 864        return 0;
 865}
 866
 867static int ath6kl_fetch_patch_file(struct ath6kl *ar)
 868{
 869        char filename[100];
 870        int ret;
 871
 872        if (ar->fw_patch != NULL)
 873                return 0;
 874
 875        if (ar->hw.fw.patch == NULL)
 876                return 0;
 877
 878        snprintf(filename, sizeof(filename), "%s/%s",
 879                 ar->hw.fw.dir, ar->hw.fw.patch);
 880
 881        ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
 882                            &ar->fw_patch_len);
 883        if (ret) {
 884                ath6kl_err("Failed to get patch file %s: %d\n",
 885                           filename, ret);
 886                return ret;
 887        }
 888
 889        return 0;
 890}
 891
 892static int ath6kl_fetch_testscript_file(struct ath6kl *ar)
 893{
 894        char filename[100];
 895        int ret;
 896
 897        if (ar->testmode != 2)
 898                return 0;
 899
 900        if (ar->fw_testscript != NULL)
 901                return 0;
 902
 903        if (ar->hw.fw.testscript == NULL)
 904                return 0;
 905
 906        snprintf(filename, sizeof(filename), "%s/%s",
 907                 ar->hw.fw.dir, ar->hw.fw.testscript);
 908
 909        ret = ath6kl_get_fw(ar, filename, &ar->fw_testscript,
 910                                &ar->fw_testscript_len);
 911        if (ret) {
 912                ath6kl_err("Failed to get testscript file %s: %d\n",
 913                           filename, ret);
 914                return ret;
 915        }
 916
 917        return 0;
 918}
 919
 920static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
 921{
 922        int ret;
 923
 924        ret = ath6kl_fetch_otp_file(ar);
 925        if (ret)
 926                return ret;
 927
 928        ret = ath6kl_fetch_fw_file(ar);
 929        if (ret)
 930                return ret;
 931
 932        ret = ath6kl_fetch_patch_file(ar);
 933        if (ret)
 934                return ret;
 935
 936        ret = ath6kl_fetch_testscript_file(ar);
 937        if (ret)
 938                return ret;
 939
 940        return 0;
 941}
 942
 943static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
 944{
 945        size_t magic_len, len, ie_len;
 946        const struct firmware *fw;
 947        struct ath6kl_fw_ie *hdr;
 948        char filename[100];
 949        const u8 *data;
 950        int ret, ie_id, i, index, bit;
 951        __le32 *val;
 952
 953        snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
 954
 955        ret = request_firmware(&fw, filename, ar->dev);
 956        if (ret)
 957                return ret;
 958
 959        data = fw->data;
 960        len = fw->size;
 961
 962        /* magic also includes the null byte, check that as well */
 963        magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
 964
 965        if (len < magic_len) {
 966                ret = -EINVAL;
 967                goto out;
 968        }
 969
 970        if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
 971                ret = -EINVAL;
 972                goto out;
 973        }
 974
 975        len -= magic_len;
 976        data += magic_len;
 977
 978        /* loop elements */
 979        while (len > sizeof(struct ath6kl_fw_ie)) {
 980                /* hdr is unaligned! */
 981                hdr = (struct ath6kl_fw_ie *) data;
 982
 983                ie_id = le32_to_cpup(&hdr->id);
 984                ie_len = le32_to_cpup(&hdr->len);
 985
 986                len -= sizeof(*hdr);
 987                data += sizeof(*hdr);
 988
 989                if (len < ie_len) {
 990                        ret = -EINVAL;
 991                        goto out;
 992                }
 993
 994                switch (ie_id) {
 995                case ATH6KL_FW_IE_FW_VERSION:
 996                        strlcpy(ar->wiphy->fw_version, data,
 997                                sizeof(ar->wiphy->fw_version));
 998
 999                        ath6kl_dbg(ATH6KL_DBG_BOOT,
1000                                   "found fw version %s\n",
1001                                    ar->wiphy->fw_version);
1002                        break;
1003                case ATH6KL_FW_IE_OTP_IMAGE:
1004                        ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
1005                                   ie_len);
1006
1007                        ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
1008
1009                        if (ar->fw_otp == NULL) {
1010                                ret = -ENOMEM;
1011                                goto out;
1012                        }
1013
1014                        ar->fw_otp_len = ie_len;
1015                        break;
1016                case ATH6KL_FW_IE_FW_IMAGE:
1017                        ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
1018                                   ie_len);
1019
1020                        /* in testmode we already might have a fw file */
1021                        if (ar->fw != NULL)
1022                                break;
1023
1024                        ar->fw = vmalloc(ie_len);
1025
1026                        if (ar->fw == NULL) {
1027                                ret = -ENOMEM;
1028                                goto out;
1029                        }
1030
1031                        memcpy(ar->fw, data, ie_len);
1032                        ar->fw_len = ie_len;
1033                        break;
1034                case ATH6KL_FW_IE_PATCH_IMAGE:
1035                        ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
1036                                   ie_len);
1037
1038                        ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
1039
1040                        if (ar->fw_patch == NULL) {
1041                                ret = -ENOMEM;
1042                                goto out;
1043                        }
1044
1045                        ar->fw_patch_len = ie_len;
1046                        break;
1047                case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
1048                        val = (__le32 *) data;
1049                        ar->hw.reserved_ram_size = le32_to_cpup(val);
1050
1051                        ath6kl_dbg(ATH6KL_DBG_BOOT,
1052                                   "found reserved ram size ie %d\n",
1053                                   ar->hw.reserved_ram_size);
1054                        break;
1055                case ATH6KL_FW_IE_CAPABILITIES:
1056                        ath6kl_dbg(ATH6KL_DBG_BOOT,
1057                                   "found firmware capabilities ie (%zd B)\n",
1058                                   ie_len);
1059
1060                        for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1061                                index = i / 8;
1062                                bit = i % 8;
1063
1064                                if (index == ie_len)
1065                                        break;
1066
1067                                if (data[index] & (1 << bit))
1068                                        __set_bit(i, ar->fw_capabilities);
1069                        }
1070
1071                        ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
1072                                        ar->fw_capabilities,
1073                                        sizeof(ar->fw_capabilities));
1074                        break;
1075                case ATH6KL_FW_IE_PATCH_ADDR:
1076                        if (ie_len != sizeof(*val))
1077                                break;
1078
1079                        val = (__le32 *) data;
1080                        ar->hw.dataset_patch_addr = le32_to_cpup(val);
1081
1082                        ath6kl_dbg(ATH6KL_DBG_BOOT,
1083                                   "found patch address ie 0x%x\n",
1084                                   ar->hw.dataset_patch_addr);
1085                        break;
1086                case ATH6KL_FW_IE_BOARD_ADDR:
1087                        if (ie_len != sizeof(*val))
1088                                break;
1089
1090                        val = (__le32 *) data;
1091                        ar->hw.board_addr = le32_to_cpup(val);
1092
1093                        ath6kl_dbg(ATH6KL_DBG_BOOT,
1094                                   "found board address ie 0x%x\n",
1095                                   ar->hw.board_addr);
1096                        break;
1097                case ATH6KL_FW_IE_VIF_MAX:
1098                        if (ie_len != sizeof(*val))
1099                                break;
1100
1101                        val = (__le32 *) data;
1102                        ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
1103                                            ATH6KL_VIF_MAX);
1104
1105                        if (ar->vif_max > 1 && !ar->p2p)
1106                                ar->max_norm_iface = 2;
1107
1108                        ath6kl_dbg(ATH6KL_DBG_BOOT,
1109                                   "found vif max ie %d\n", ar->vif_max);
1110                        break;
1111                default:
1112                        ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
1113                                   le32_to_cpup(&hdr->id));
1114                        break;
1115                }
1116
1117                len -= ie_len;
1118                data += ie_len;
1119        };
1120
1121        ret = 0;
1122out:
1123        release_firmware(fw);
1124
1125        return ret;
1126}
1127
1128int ath6kl_init_fetch_firmwares(struct ath6kl *ar)
1129{
1130        int ret;
1131
1132        ret = ath6kl_fetch_board_file(ar);
1133        if (ret)
1134                return ret;
1135
1136        ret = ath6kl_fetch_testmode_file(ar);
1137        if (ret)
1138                return ret;
1139
1140        ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API5_FILE);
1141        if (ret == 0) {
1142                ar->fw_api = 5;
1143                goto out;
1144        }
1145
1146        ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API4_FILE);
1147        if (ret == 0) {
1148                ar->fw_api = 4;
1149                goto out;
1150        }
1151
1152        ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
1153        if (ret == 0) {
1154                ar->fw_api = 3;
1155                goto out;
1156        }
1157
1158        ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
1159        if (ret == 0) {
1160                ar->fw_api = 2;
1161                goto out;
1162        }
1163
1164        ret = ath6kl_fetch_fw_api1(ar);
1165        if (ret)
1166                return ret;
1167
1168        ar->fw_api = 1;
1169
1170out:
1171        ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1172
1173        return 0;
1174}
1175
1176static int ath6kl_upload_board_file(struct ath6kl *ar)
1177{
1178        u32 board_address, board_ext_address, param;
1179        u32 board_data_size, board_ext_data_size;
1180        int ret;
1181
1182        if (WARN_ON(ar->fw_board == NULL))
1183                return -ENOENT;
1184
1185        /*
1186         * Determine where in Target RAM to write Board Data.
1187         * For AR6004, host determine Target RAM address for
1188         * writing board data.
1189         */
1190        if (ar->hw.board_addr != 0) {
1191                board_address = ar->hw.board_addr;
1192                ath6kl_bmi_write_hi32(ar, hi_board_data,
1193                                      board_address);
1194        } else {
1195                ret = ath6kl_bmi_read_hi32(ar, hi_board_data, &board_address);
1196                if (ret) {
1197                        ath6kl_err("Failed to get board file target address.\n");
1198                        return ret;
1199                }
1200        }
1201
1202        /* determine where in target ram to write extended board data */
1203        ret = ath6kl_bmi_read_hi32(ar, hi_board_ext_data, &board_ext_address);
1204        if (ret) {
1205                ath6kl_err("Failed to get extended board file target address.\n");
1206                return ret;
1207        }
1208
1209        if (ar->target_type == TARGET_TYPE_AR6003 &&
1210            board_ext_address == 0) {
1211                ath6kl_err("Failed to get board file target address.\n");
1212                return -EINVAL;
1213        }
1214
1215        switch (ar->target_type) {
1216        case TARGET_TYPE_AR6003:
1217                board_data_size = AR6003_BOARD_DATA_SZ;
1218                board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
1219                if (ar->fw_board_len > (board_data_size + board_ext_data_size))
1220                        board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ_V2;
1221                break;
1222        case TARGET_TYPE_AR6004:
1223                board_data_size = AR6004_BOARD_DATA_SZ;
1224                board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
1225                break;
1226        default:
1227                WARN_ON(1);
1228                return -EINVAL;
1229        }
1230
1231        if (board_ext_address &&
1232            ar->fw_board_len == (board_data_size + board_ext_data_size)) {
1233                /* write extended board data */
1234                ath6kl_dbg(ATH6KL_DBG_BOOT,
1235                           "writing extended board data to 0x%x (%d B)\n",
1236                           board_ext_address, board_ext_data_size);
1237
1238                ret = ath6kl_bmi_write(ar, board_ext_address,
1239                                       ar->fw_board + board_data_size,
1240                                       board_ext_data_size);
1241                if (ret) {
1242                        ath6kl_err("Failed to write extended board data: %d\n",
1243                                   ret);
1244                        return ret;
1245                }
1246
1247                /* record that extended board data is initialized */
1248                param = (board_ext_data_size << 16) | 1;
1249
1250                ath6kl_bmi_write_hi32(ar, hi_board_ext_data_config, param);
1251        }
1252
1253        if (ar->fw_board_len < board_data_size) {
1254                ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
1255                ret = -EINVAL;
1256                return ret;
1257        }
1258
1259        ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
1260                   board_address, board_data_size);
1261
1262        ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
1263                               board_data_size);
1264
1265        if (ret) {
1266                ath6kl_err("Board file bmi write failed: %d\n", ret);
1267                return ret;
1268        }
1269
1270        /* record the fact that Board Data IS initialized */
1271        if ((ar->version.target_ver == AR6004_HW_1_3_VERSION) ||
1272            (ar->version.target_ver == AR6004_HW_3_0_VERSION))
1273                param = board_data_size;
1274        else
1275                param = 1;
1276
1277        ath6kl_bmi_write_hi32(ar, hi_board_data_initialized, param);
1278
1279        return ret;
1280}
1281
1282static int ath6kl_upload_otp(struct ath6kl *ar)
1283{
1284        u32 address, param;
1285        bool from_hw = false;
1286        int ret;
1287
1288        if (ar->fw_otp == NULL)
1289                return 0;
1290
1291        address = ar->hw.app_load_addr;
1292
1293        ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
1294                   ar->fw_otp_len);
1295
1296        ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
1297                                       ar->fw_otp_len);
1298        if (ret) {
1299                ath6kl_err("Failed to upload OTP file: %d\n", ret);
1300                return ret;
1301        }
1302
1303        /* read firmware start address */
1304        ret = ath6kl_bmi_read_hi32(ar, hi_app_start, &address);
1305
1306        if (ret) {
1307                ath6kl_err("Failed to read hi_app_start: %d\n", ret);
1308                return ret;
1309        }
1310
1311        if (ar->hw.app_start_override_addr == 0) {
1312                ar->hw.app_start_override_addr = address;
1313                from_hw = true;
1314        }
1315
1316        ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
1317                   from_hw ? " (from hw)" : "",
1318                   ar->hw.app_start_override_addr);
1319
1320        /* execute the OTP code */
1321        ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
1322                   ar->hw.app_start_override_addr);
1323        param = 0;
1324        ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
1325
1326        return ret;
1327}
1328
1329static int ath6kl_upload_firmware(struct ath6kl *ar)
1330{
1331        u32 address;
1332        int ret;
1333
1334        if (WARN_ON(ar->fw == NULL))
1335                return 0;
1336
1337        address = ar->hw.app_load_addr;
1338
1339        ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
1340                   address, ar->fw_len);
1341
1342        ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
1343
1344        if (ret) {
1345                ath6kl_err("Failed to write firmware: %d\n", ret);
1346                return ret;
1347        }
1348
1349        /*
1350         * Set starting address for firmware
1351         * Don't need to setup app_start override addr on AR6004
1352         */
1353        if (ar->target_type != TARGET_TYPE_AR6004) {
1354                address = ar->hw.app_start_override_addr;
1355                ath6kl_bmi_set_app_start(ar, address);
1356        }
1357        return ret;
1358}
1359
1360static int ath6kl_upload_patch(struct ath6kl *ar)
1361{
1362        u32 address;
1363        int ret;
1364
1365        if (ar->fw_patch == NULL)
1366                return 0;
1367
1368        address = ar->hw.dataset_patch_addr;
1369
1370        ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
1371                   address, ar->fw_patch_len);
1372
1373        ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
1374        if (ret) {
1375                ath6kl_err("Failed to write patch file: %d\n", ret);
1376                return ret;
1377        }
1378
1379        ath6kl_bmi_write_hi32(ar, hi_dset_list_head, address);
1380
1381        return 0;
1382}
1383
1384static int ath6kl_upload_testscript(struct ath6kl *ar)
1385{
1386        u32 address;
1387        int ret;
1388
1389        if (ar->testmode != 2)
1390                return 0;
1391
1392        if (ar->fw_testscript == NULL)
1393                return 0;
1394
1395        address = ar->hw.testscript_addr;
1396
1397        ath6kl_dbg(ATH6KL_DBG_BOOT, "writing testscript to 0x%x (%zd B)\n",
1398                   address, ar->fw_testscript_len);
1399
1400        ret = ath6kl_bmi_write(ar, address, ar->fw_testscript,
1401                ar->fw_testscript_len);
1402        if (ret) {
1403                ath6kl_err("Failed to write testscript file: %d\n", ret);
1404                return ret;
1405        }
1406
1407        ath6kl_bmi_write_hi32(ar, hi_ota_testscript, address);
1408
1409        if ((ar->version.target_ver != AR6004_HW_1_3_VERSION) &&
1410            (ar->version.target_ver != AR6004_HW_3_0_VERSION))
1411                ath6kl_bmi_write_hi32(ar, hi_end_ram_reserve_sz, 4096);
1412
1413        ath6kl_bmi_write_hi32(ar, hi_test_apps_related, 1);
1414
1415        return 0;
1416}
1417
1418static int ath6kl_init_upload(struct ath6kl *ar)
1419{
1420        u32 param, options, sleep, address;
1421        int status = 0;
1422
1423        if (ar->target_type != TARGET_TYPE_AR6003 &&
1424            ar->target_type != TARGET_TYPE_AR6004)
1425                return -EINVAL;
1426
1427        /* temporarily disable system sleep */
1428        address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1429        status = ath6kl_bmi_reg_read(ar, address, &param);
1430        if (status)
1431                return status;
1432
1433        options = param;
1434
1435        param |= ATH6KL_OPTION_SLEEP_DISABLE;
1436        status = ath6kl_bmi_reg_write(ar, address, param);
1437        if (status)
1438                return status;
1439
1440        address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1441        status = ath6kl_bmi_reg_read(ar, address, &param);
1442        if (status)
1443                return status;
1444
1445        sleep = param;
1446
1447        param |= SM(SYSTEM_SLEEP_DISABLE, 1);
1448        status = ath6kl_bmi_reg_write(ar, address, param);
1449        if (status)
1450                return status;
1451
1452        ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
1453                   options, sleep);
1454
1455        /* program analog PLL register */
1456        /* no need to control 40/44MHz clock on AR6004 */
1457        if (ar->target_type != TARGET_TYPE_AR6004) {
1458                status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
1459                                              0xF9104001);
1460
1461                if (status)
1462                        return status;
1463
1464                /* Run at 80/88MHz by default */
1465                param = SM(CPU_CLOCK_STANDARD, 1);
1466
1467                address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
1468                status = ath6kl_bmi_reg_write(ar, address, param);
1469                if (status)
1470                        return status;
1471        }
1472
1473        param = 0;
1474        address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
1475        param = SM(LPO_CAL_ENABLE, 1);
1476        status = ath6kl_bmi_reg_write(ar, address, param);
1477        if (status)
1478                return status;
1479
1480        /* WAR to avoid SDIO CRC err */
1481        if (ar->hw.flags & ATH6KL_HW_SDIO_CRC_ERROR_WAR) {
1482                ath6kl_err("temporary war to avoid sdio crc error\n");
1483
1484                param = 0x28;
1485                address = GPIO_BASE_ADDRESS + GPIO_PIN9_ADDRESS;
1486                status = ath6kl_bmi_reg_write(ar, address, param);
1487                if (status)
1488                        return status;
1489
1490                param = 0x20;
1491
1492                address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
1493                status = ath6kl_bmi_reg_write(ar, address, param);
1494                if (status)
1495                        return status;
1496
1497                address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
1498                status = ath6kl_bmi_reg_write(ar, address, param);
1499                if (status)
1500                        return status;
1501
1502                address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
1503                status = ath6kl_bmi_reg_write(ar, address, param);
1504                if (status)
1505                        return status;
1506
1507                address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
1508                status = ath6kl_bmi_reg_write(ar, address, param);
1509                if (status)
1510                        return status;
1511        }
1512
1513        /* write EEPROM data to Target RAM */
1514        status = ath6kl_upload_board_file(ar);
1515        if (status)
1516                return status;
1517
1518        /* transfer One time Programmable data */
1519        status = ath6kl_upload_otp(ar);
1520        if (status)
1521                return status;
1522
1523        /* Download Target firmware */
1524        status = ath6kl_upload_firmware(ar);
1525        if (status)
1526                return status;
1527
1528        status = ath6kl_upload_patch(ar);
1529        if (status)
1530                return status;
1531
1532        /* Download the test script */
1533        status = ath6kl_upload_testscript(ar);
1534        if (status)
1535                return status;
1536
1537        /* Restore system sleep */
1538        address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
1539        status = ath6kl_bmi_reg_write(ar, address, sleep);
1540        if (status)
1541                return status;
1542
1543        address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
1544        param = options | 0x20;
1545        status = ath6kl_bmi_reg_write(ar, address, param);
1546        if (status)
1547                return status;
1548
1549        return status;
1550}
1551
1552int ath6kl_init_hw_params(struct ath6kl *ar)
1553{
1554        const struct ath6kl_hw *uninitialized_var(hw);
1555        int i;
1556
1557        for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
1558                hw = &hw_list[i];
1559
1560                if (hw->id == ar->version.target_ver)
1561                        break;
1562        }
1563
1564        if (i == ARRAY_SIZE(hw_list)) {
1565                ath6kl_err("Unsupported hardware version: 0x%x\n",
1566                           ar->version.target_ver);
1567                return -EINVAL;
1568        }
1569
1570        ar->hw = *hw;
1571
1572        ath6kl_dbg(ATH6KL_DBG_BOOT,
1573                   "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
1574                   ar->version.target_ver, ar->target_type,
1575                   ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
1576        ath6kl_dbg(ATH6KL_DBG_BOOT,
1577                   "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
1578                   ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
1579                   ar->hw.reserved_ram_size);
1580        ath6kl_dbg(ATH6KL_DBG_BOOT,
1581                   "refclk_hz %d uarttx_pin %d",
1582                   ar->hw.refclk_hz, ar->hw.uarttx_pin);
1583
1584        return 0;
1585}
1586
1587static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
1588{
1589        switch (type) {
1590        case ATH6KL_HIF_TYPE_SDIO:
1591                return "sdio";
1592        case ATH6KL_HIF_TYPE_USB:
1593                return "usb";
1594        }
1595
1596        return NULL;
1597}
1598
1599
1600static const struct fw_capa_str_map {
1601        int id;
1602        const char *name;
1603} fw_capa_map[] = {
1604        { ATH6KL_FW_CAPABILITY_HOST_P2P, "host-p2p" },
1605        { ATH6KL_FW_CAPABILITY_SCHED_SCAN, "sched-scan" },
1606        { ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX, "sta-p2pdev-duplex" },
1607        { ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT, "inactivity-timeout" },
1608        { ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE, "rsn-cap-override" },
1609        { ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER, "wow-mc-filter" },
1610        { ATH6KL_FW_CAPABILITY_BMISS_ENHANCE, "bmiss-enhance" },
1611        { ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST, "sscan-match-list" },
1612        { ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD, "rssi-scan-thold" },
1613        { ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR, "custom-mac-addr" },
1614        { ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY, "tx-err-notify" },
1615        { ATH6KL_FW_CAPABILITY_REGDOMAIN, "regdomain" },
1616        { ATH6KL_FW_CAPABILITY_SCHED_SCAN_V2, "sched-scan-v2" },
1617        { ATH6KL_FW_CAPABILITY_HEART_BEAT_POLL, "hb-poll" },
1618        { ATH6KL_FW_CAPABILITY_64BIT_RATES, "64bit-rates" },
1619        { ATH6KL_FW_CAPABILITY_AP_INACTIVITY_MINS, "ap-inactivity-mins" },
1620        { ATH6KL_FW_CAPABILITY_MAP_LP_ENDPOINT, "map-lp-endpoint" },
1621        { ATH6KL_FW_CAPABILITY_RATETABLE_MCS15, "ratetable-mcs15" },
1622        { ATH6KL_FW_CAPABILITY_NO_IP_CHECKSUM, "no-ip-checksum" },
1623};
1624
1625static const char *ath6kl_init_get_fw_capa_name(unsigned int id)
1626{
1627        int i;
1628
1629        for (i = 0; i < ARRAY_SIZE(fw_capa_map); i++) {
1630                if (fw_capa_map[i].id == id)
1631                        return fw_capa_map[i].name;
1632        }
1633
1634        return "<unknown>";
1635}
1636
1637static void ath6kl_init_get_fwcaps(struct ath6kl *ar, char *buf, size_t buf_len)
1638{
1639        u8 *data = (u8 *) ar->fw_capabilities;
1640        size_t trunc_len, len = 0;
1641        int i, index, bit;
1642        char *trunc = "...";
1643
1644        for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
1645                index = i / 8;
1646                bit = i % 8;
1647
1648                if (index >= sizeof(ar->fw_capabilities) * 4)
1649                        break;
1650
1651                if (buf_len - len < 4) {
1652                        ath6kl_warn("firmware capability buffer too small!\n");
1653
1654                        /* add "..." to the end of string */
1655                        trunc_len = strlen(trunc) + 1;
1656                        strncpy(buf + buf_len - trunc_len, trunc, trunc_len);
1657
1658                        return;
1659                }
1660
1661                if (data[index] & (1 << bit)) {
1662                        len += scnprintf(buf + len, buf_len - len, "%s,",
1663                                            ath6kl_init_get_fw_capa_name(i));
1664                }
1665        }
1666
1667        /* overwrite the last comma */
1668        if (len > 0)
1669                len--;
1670
1671        buf[len] = '\0';
1672}
1673
1674static int ath6kl_init_hw_reset(struct ath6kl *ar)
1675{
1676        ath6kl_dbg(ATH6KL_DBG_BOOT, "cold resetting the device");
1677
1678        return ath6kl_diag_write32(ar, RESET_CONTROL_ADDRESS,
1679                                   cpu_to_le32(RESET_CONTROL_COLD_RST));
1680}
1681
1682static int __ath6kl_init_hw_start(struct ath6kl *ar)
1683{
1684        long timeleft;
1685        int ret, i;
1686        char buf[200];
1687
1688        ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
1689
1690        ret = ath6kl_hif_power_on(ar);
1691        if (ret)
1692                return ret;
1693
1694        ret = ath6kl_configure_target(ar);
1695        if (ret)
1696                goto err_power_off;
1697
1698        ret = ath6kl_init_upload(ar);
1699        if (ret)
1700                goto err_power_off;
1701
1702        /* Do we need to finish the BMI phase */
1703        ret = ath6kl_bmi_done(ar);
1704        if (ret)
1705                goto err_power_off;
1706
1707        /*
1708         * The reason we have to wait for the target here is that the
1709         * driver layer has to init BMI in order to set the host block
1710         * size.
1711         */
1712        ret = ath6kl_htc_wait_target(ar->htc_target);
1713
1714        if (ret == -ETIMEDOUT) {
1715                /*
1716                 * Most likely USB target is in odd state after reboot and
1717                 * needs a reset. A cold reset makes the whole device
1718                 * disappear from USB bus and initialisation starts from
1719                 * beginning.
1720                 */
1721                ath6kl_warn("htc wait target timed out, resetting device\n");
1722                ath6kl_init_hw_reset(ar);
1723                goto err_power_off;
1724        } else if (ret) {
1725                ath6kl_err("htc wait target failed: %d\n", ret);
1726                goto err_power_off;
1727        }
1728
1729        ret = ath6kl_init_service_ep(ar);
1730        if (ret) {
1731                ath6kl_err("Endpoint service initilisation failed: %d\n", ret);
1732                goto err_cleanup_scatter;
1733        }
1734
1735        /* setup credit distribution */
1736        ath6kl_htc_credit_setup(ar->htc_target, &ar->credit_state_info);
1737
1738        /* start HTC */
1739        ret = ath6kl_htc_start(ar->htc_target);
1740        if (ret) {
1741                /* FIXME: call this */
1742                ath6kl_cookie_cleanup(ar);
1743                goto err_cleanup_scatter;
1744        }
1745
1746        /* Wait for Wmi event to be ready */
1747        timeleft = wait_event_interruptible_timeout(ar->event_wq,
1748                                                    test_bit(WMI_READY,
1749                                                             &ar->flag),
1750                                                    WMI_TIMEOUT);
1751        if (timeleft <= 0) {
1752                clear_bit(WMI_READY, &ar->flag);
1753                ath6kl_err("wmi is not ready or wait was interrupted: %ld\n",
1754                           timeleft);
1755                ret = -EIO;
1756                goto err_htc_stop;
1757        }
1758
1759        ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
1760
1761        if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
1762                ath6kl_info("%s %s fw %s api %d%s\n",
1763                            ar->hw.name,
1764                            ath6kl_init_get_hif_name(ar->hif_type),
1765                            ar->wiphy->fw_version,
1766                            ar->fw_api,
1767                            test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
1768                ath6kl_init_get_fwcaps(ar, buf, sizeof(buf));
1769                ath6kl_info("firmware supports: %s\n", buf);
1770        }
1771
1772        if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
1773                ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
1774                           ATH6KL_ABI_VERSION, ar->version.abi_ver);
1775                ret = -EIO;
1776                goto err_htc_stop;
1777        }
1778
1779        ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
1780
1781        /* communicate the wmi protocol verision to the target */
1782        /* FIXME: return error */
1783        if ((ath6kl_set_host_app_area(ar)) != 0)
1784                ath6kl_err("unable to set the host app area\n");
1785
1786        for (i = 0; i < ar->vif_max; i++) {
1787                ret = ath6kl_target_config_wlan_params(ar, i);
1788                if (ret)
1789                        goto err_htc_stop;
1790        }
1791
1792        return 0;
1793
1794err_htc_stop:
1795        ath6kl_htc_stop(ar->htc_target);
1796err_cleanup_scatter:
1797        ath6kl_hif_cleanup_scatter(ar);
1798err_power_off:
1799        ath6kl_hif_power_off(ar);
1800
1801        return ret;
1802}
1803
1804int ath6kl_init_hw_start(struct ath6kl *ar)
1805{
1806        int err;
1807
1808        err = __ath6kl_init_hw_start(ar);
1809        if (err)
1810                return err;
1811        ar->state = ATH6KL_STATE_ON;
1812        return 0;
1813}
1814
1815static int __ath6kl_init_hw_stop(struct ath6kl *ar)
1816{
1817        int ret;
1818
1819        ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
1820
1821        ath6kl_htc_stop(ar->htc_target);
1822
1823        ath6kl_hif_stop(ar);
1824
1825        ath6kl_bmi_reset(ar);
1826
1827        ret = ath6kl_hif_power_off(ar);
1828        if (ret)
1829                ath6kl_warn("failed to power off hif: %d\n", ret);
1830
1831        return 0;
1832}
1833
1834int ath6kl_init_hw_stop(struct ath6kl *ar)
1835{
1836        int err;
1837
1838        err = __ath6kl_init_hw_stop(ar);
1839        if (err)
1840                return err;
1841        ar->state = ATH6KL_STATE_OFF;
1842        return 0;
1843}
1844
1845void ath6kl_init_hw_restart(struct ath6kl *ar)
1846{
1847        clear_bit(WMI_READY, &ar->flag);
1848
1849        ath6kl_cfg80211_stop_all(ar);
1850
1851        if (__ath6kl_init_hw_stop(ar)) {
1852                ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to stop during fw error recovery\n");
1853                return;
1854        }
1855
1856        if (__ath6kl_init_hw_start(ar)) {
1857                ath6kl_dbg(ATH6KL_DBG_RECOVERY, "Failed to restart during fw error recovery\n");
1858                return;
1859        }
1860}
1861
1862void ath6kl_stop_txrx(struct ath6kl *ar)
1863{
1864        struct ath6kl_vif *vif, *tmp_vif;
1865        int i;
1866
1867        set_bit(DESTROY_IN_PROGRESS, &ar->flag);
1868
1869        if (down_interruptible(&ar->sem)) {
1870                ath6kl_err("down_interruptible failed\n");
1871                return;
1872        }
1873
1874        for (i = 0; i < AP_MAX_NUM_STA; i++)
1875                aggr_reset_state(ar->sta_list[i].aggr_conn);
1876
1877        spin_lock_bh(&ar->list_lock);
1878        list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
1879                list_del(&vif->list);
1880                spin_unlock_bh(&ar->list_lock);
1881                ath6kl_cfg80211_vif_stop(vif, test_bit(WMI_READY, &ar->flag));
1882                rtnl_lock();
1883                ath6kl_cfg80211_vif_cleanup(vif);
1884                rtnl_unlock();
1885                spin_lock_bh(&ar->list_lock);
1886        }
1887        spin_unlock_bh(&ar->list_lock);
1888
1889        clear_bit(WMI_READY, &ar->flag);
1890
1891        if (ar->fw_recovery.enable)
1892                del_timer_sync(&ar->fw_recovery.hb_timer);
1893
1894        /*
1895         * After wmi_shudown all WMI events will be dropped. We
1896         * need to cleanup the buffers allocated in AP mode and
1897         * give disconnect notification to stack, which usually
1898         * happens in the disconnect_event. Simulate the disconnect
1899         * event by calling the function directly. Sometimes
1900         * disconnect_event will be received when the debug logs
1901         * are collected.
1902         */
1903        ath6kl_wmi_shutdown(ar->wmi);
1904
1905        clear_bit(WMI_ENABLED, &ar->flag);
1906        if (ar->htc_target) {
1907                ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
1908                ath6kl_htc_stop(ar->htc_target);
1909        }
1910
1911        /*
1912         * Try to reset the device if we can. The driver may have been
1913         * configure NOT to reset the target during a debug session.
1914         */
1915        ath6kl_init_hw_reset(ar);
1916
1917        up(&ar->sem);
1918}
1919EXPORT_SYMBOL(ath6kl_stop_txrx);
1920