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8
9#define KMSG_COMPONENT "qeth"
10#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/string.h>
15#include <linux/errno.h>
16#include <linux/kernel.h>
17#include <linux/ip.h>
18#include <linux/tcp.h>
19#include <linux/mii.h>
20#include <linux/kthread.h>
21#include <linux/slab.h>
22#include <net/iucv/af_iucv.h>
23#include <net/dsfield.h>
24
25#include <asm/ebcdic.h>
26#include <asm/chpid.h>
27#include <asm/io.h>
28#include <asm/sysinfo.h>
29#include <asm/compat.h>
30
31#include "qeth_core.h"
32
33struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
34
35
36 [QETH_DBF_SETUP] = {"qeth_setup",
37 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
39 &debug_sprintf_view, NULL},
40 [QETH_DBF_CTRL] = {"qeth_control",
41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
42};
43EXPORT_SYMBOL_GPL(qeth_dbf);
44
45struct qeth_card_list_struct qeth_core_card_list;
46EXPORT_SYMBOL_GPL(qeth_core_card_list);
47struct kmem_cache *qeth_core_header_cache;
48EXPORT_SYMBOL_GPL(qeth_core_header_cache);
49static struct kmem_cache *qeth_qdio_outbuf_cache;
50
51static struct device *qeth_core_root_dev;
52static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
53static struct lock_class_key qdio_out_skb_queue_key;
54static struct mutex qeth_mod_mutex;
55
56static void qeth_send_control_data_cb(struct qeth_channel *,
57 struct qeth_cmd_buffer *);
58static int qeth_issue_next_read(struct qeth_card *);
59static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
60static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
61static void qeth_free_buffer_pool(struct qeth_card *);
62static int qeth_qdio_establish(struct qeth_card *);
63static void qeth_free_qdio_buffers(struct qeth_card *);
64static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
65 struct qeth_qdio_out_buffer *buf,
66 enum iucv_tx_notify notification);
67static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
68static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
69 struct qeth_qdio_out_buffer *buf,
70 enum qeth_qdio_buffer_states newbufstate);
71static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
72
73struct workqueue_struct *qeth_wq;
74EXPORT_SYMBOL_GPL(qeth_wq);
75
76int qeth_card_hw_is_reachable(struct qeth_card *card)
77{
78 return (card->state == CARD_STATE_SOFTSETUP) ||
79 (card->state == CARD_STATE_UP);
80}
81EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
82
83static void qeth_close_dev_handler(struct work_struct *work)
84{
85 struct qeth_card *card;
86
87 card = container_of(work, struct qeth_card, close_dev_work);
88 QETH_CARD_TEXT(card, 2, "cldevhdl");
89 rtnl_lock();
90 dev_close(card->dev);
91 rtnl_unlock();
92 ccwgroup_set_offline(card->gdev);
93}
94
95void qeth_close_dev(struct qeth_card *card)
96{
97 QETH_CARD_TEXT(card, 2, "cldevsubm");
98 queue_work(qeth_wq, &card->close_dev_work);
99}
100EXPORT_SYMBOL_GPL(qeth_close_dev);
101
102static inline const char *qeth_get_cardname(struct qeth_card *card)
103{
104 if (card->info.guestlan) {
105 switch (card->info.type) {
106 case QETH_CARD_TYPE_OSD:
107 return " Virtual NIC QDIO";
108 case QETH_CARD_TYPE_IQD:
109 return " Virtual NIC Hiper";
110 case QETH_CARD_TYPE_OSM:
111 return " Virtual NIC QDIO - OSM";
112 case QETH_CARD_TYPE_OSX:
113 return " Virtual NIC QDIO - OSX";
114 default:
115 return " unknown";
116 }
117 } else {
118 switch (card->info.type) {
119 case QETH_CARD_TYPE_OSD:
120 return " OSD Express";
121 case QETH_CARD_TYPE_IQD:
122 return " HiperSockets";
123 case QETH_CARD_TYPE_OSN:
124 return " OSN QDIO";
125 case QETH_CARD_TYPE_OSM:
126 return " OSM QDIO";
127 case QETH_CARD_TYPE_OSX:
128 return " OSX QDIO";
129 default:
130 return " unknown";
131 }
132 }
133 return " n/a";
134}
135
136
137const char *qeth_get_cardname_short(struct qeth_card *card)
138{
139 if (card->info.guestlan) {
140 switch (card->info.type) {
141 case QETH_CARD_TYPE_OSD:
142 return "Virt.NIC QDIO";
143 case QETH_CARD_TYPE_IQD:
144 return "Virt.NIC Hiper";
145 case QETH_CARD_TYPE_OSM:
146 return "Virt.NIC OSM";
147 case QETH_CARD_TYPE_OSX:
148 return "Virt.NIC OSX";
149 default:
150 return "unknown";
151 }
152 } else {
153 switch (card->info.type) {
154 case QETH_CARD_TYPE_OSD:
155 switch (card->info.link_type) {
156 case QETH_LINK_TYPE_FAST_ETH:
157 return "OSD_100";
158 case QETH_LINK_TYPE_HSTR:
159 return "HSTR";
160 case QETH_LINK_TYPE_GBIT_ETH:
161 return "OSD_1000";
162 case QETH_LINK_TYPE_10GBIT_ETH:
163 return "OSD_10GIG";
164 case QETH_LINK_TYPE_LANE_ETH100:
165 return "OSD_FE_LANE";
166 case QETH_LINK_TYPE_LANE_TR:
167 return "OSD_TR_LANE";
168 case QETH_LINK_TYPE_LANE_ETH1000:
169 return "OSD_GbE_LANE";
170 case QETH_LINK_TYPE_LANE:
171 return "OSD_ATM_LANE";
172 default:
173 return "OSD_Express";
174 }
175 case QETH_CARD_TYPE_IQD:
176 return "HiperSockets";
177 case QETH_CARD_TYPE_OSN:
178 return "OSN";
179 case QETH_CARD_TYPE_OSM:
180 return "OSM_1000";
181 case QETH_CARD_TYPE_OSX:
182 return "OSX_10GIG";
183 default:
184 return "unknown";
185 }
186 }
187 return "n/a";
188}
189
190void qeth_set_recovery_task(struct qeth_card *card)
191{
192 card->recovery_task = current;
193}
194EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
195
196void qeth_clear_recovery_task(struct qeth_card *card)
197{
198 card->recovery_task = NULL;
199}
200EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
201
202static bool qeth_is_recovery_task(const struct qeth_card *card)
203{
204 return card->recovery_task == current;
205}
206
207void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
208 int clear_start_mask)
209{
210 unsigned long flags;
211
212 spin_lock_irqsave(&card->thread_mask_lock, flags);
213 card->thread_allowed_mask = threads;
214 if (clear_start_mask)
215 card->thread_start_mask &= threads;
216 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
217 wake_up(&card->wait_q);
218}
219EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
220
221int qeth_threads_running(struct qeth_card *card, unsigned long threads)
222{
223 unsigned long flags;
224 int rc = 0;
225
226 spin_lock_irqsave(&card->thread_mask_lock, flags);
227 rc = (card->thread_running_mask & threads);
228 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
229 return rc;
230}
231EXPORT_SYMBOL_GPL(qeth_threads_running);
232
233int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
234{
235 if (qeth_is_recovery_task(card))
236 return 0;
237 return wait_event_interruptible(card->wait_q,
238 qeth_threads_running(card, threads) == 0);
239}
240EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
241
242void qeth_clear_working_pool_list(struct qeth_card *card)
243{
244 struct qeth_buffer_pool_entry *pool_entry, *tmp;
245
246 QETH_CARD_TEXT(card, 5, "clwrklst");
247 list_for_each_entry_safe(pool_entry, tmp,
248 &card->qdio.in_buf_pool.entry_list, list){
249 list_del(&pool_entry->list);
250 }
251}
252EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
253
254static int qeth_alloc_buffer_pool(struct qeth_card *card)
255{
256 struct qeth_buffer_pool_entry *pool_entry;
257 void *ptr;
258 int i, j;
259
260 QETH_CARD_TEXT(card, 5, "alocpool");
261 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
262 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
263 if (!pool_entry) {
264 qeth_free_buffer_pool(card);
265 return -ENOMEM;
266 }
267 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
268 ptr = (void *) __get_free_page(GFP_KERNEL);
269 if (!ptr) {
270 while (j > 0)
271 free_page((unsigned long)
272 pool_entry->elements[--j]);
273 kfree(pool_entry);
274 qeth_free_buffer_pool(card);
275 return -ENOMEM;
276 }
277 pool_entry->elements[j] = ptr;
278 }
279 list_add(&pool_entry->init_list,
280 &card->qdio.init_pool.entry_list);
281 }
282 return 0;
283}
284
285int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
286{
287 QETH_CARD_TEXT(card, 2, "realcbp");
288
289 if ((card->state != CARD_STATE_DOWN) &&
290 (card->state != CARD_STATE_RECOVER))
291 return -EPERM;
292
293
294 qeth_clear_working_pool_list(card);
295 qeth_free_buffer_pool(card);
296 card->qdio.in_buf_pool.buf_count = bufcnt;
297 card->qdio.init_pool.buf_count = bufcnt;
298 return qeth_alloc_buffer_pool(card);
299}
300EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
301
302static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
303{
304 if (!q)
305 return;
306
307 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
308 kfree(q);
309}
310
311static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
312{
313 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
314 int i;
315
316 if (!q)
317 return NULL;
318
319 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
320 kfree(q);
321 return NULL;
322 }
323
324 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
325 q->bufs[i].buffer = q->qdio_bufs[i];
326
327 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
328 return q;
329}
330
331static inline int qeth_cq_init(struct qeth_card *card)
332{
333 int rc;
334
335 if (card->options.cq == QETH_CQ_ENABLED) {
336 QETH_DBF_TEXT(SETUP, 2, "cqinit");
337 qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
338 QDIO_MAX_BUFFERS_PER_Q);
339 card->qdio.c_q->next_buf_to_init = 127;
340 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
341 card->qdio.no_in_queues - 1, 0,
342 127);
343 if (rc) {
344 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
345 goto out;
346 }
347 }
348 rc = 0;
349out:
350 return rc;
351}
352
353static inline int qeth_alloc_cq(struct qeth_card *card)
354{
355 int rc;
356
357 if (card->options.cq == QETH_CQ_ENABLED) {
358 int i;
359 struct qdio_outbuf_state *outbuf_states;
360
361 QETH_DBF_TEXT(SETUP, 2, "cqon");
362 card->qdio.c_q = qeth_alloc_qdio_queue();
363 if (!card->qdio.c_q) {
364 rc = -1;
365 goto kmsg_out;
366 }
367 card->qdio.no_in_queues = 2;
368 card->qdio.out_bufstates =
369 kzalloc(card->qdio.no_out_queues *
370 QDIO_MAX_BUFFERS_PER_Q *
371 sizeof(struct qdio_outbuf_state), GFP_KERNEL);
372 outbuf_states = card->qdio.out_bufstates;
373 if (outbuf_states == NULL) {
374 rc = -1;
375 goto free_cq_out;
376 }
377 for (i = 0; i < card->qdio.no_out_queues; ++i) {
378 card->qdio.out_qs[i]->bufstates = outbuf_states;
379 outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
380 }
381 } else {
382 QETH_DBF_TEXT(SETUP, 2, "nocq");
383 card->qdio.c_q = NULL;
384 card->qdio.no_in_queues = 1;
385 }
386 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
387 rc = 0;
388out:
389 return rc;
390free_cq_out:
391 qeth_free_qdio_queue(card->qdio.c_q);
392 card->qdio.c_q = NULL;
393kmsg_out:
394 dev_err(&card->gdev->dev, "Failed to create completion queue\n");
395 goto out;
396}
397
398static inline void qeth_free_cq(struct qeth_card *card)
399{
400 if (card->qdio.c_q) {
401 --card->qdio.no_in_queues;
402 qeth_free_qdio_queue(card->qdio.c_q);
403 card->qdio.c_q = NULL;
404 }
405 kfree(card->qdio.out_bufstates);
406 card->qdio.out_bufstates = NULL;
407}
408
409static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
410 int delayed) {
411 enum iucv_tx_notify n;
412
413 switch (sbalf15) {
414 case 0:
415 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
416 break;
417 case 4:
418 case 16:
419 case 17:
420 case 18:
421 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
422 TX_NOTIFY_UNREACHABLE;
423 break;
424 default:
425 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
426 TX_NOTIFY_GENERALERROR;
427 break;
428 }
429
430 return n;
431}
432
433static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
434 int bidx, int forced_cleanup)
435{
436 if (q->card->options.cq != QETH_CQ_ENABLED)
437 return;
438
439 if (q->bufs[bidx]->next_pending != NULL) {
440 struct qeth_qdio_out_buffer *head = q->bufs[bidx];
441 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
442
443 while (c) {
444 if (forced_cleanup ||
445 atomic_read(&c->state) ==
446 QETH_QDIO_BUF_HANDLED_DELAYED) {
447 struct qeth_qdio_out_buffer *f = c;
448 QETH_CARD_TEXT(f->q->card, 5, "fp");
449 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
450
451
452
453 qeth_release_skbs(c);
454
455 c = f->next_pending;
456 WARN_ON_ONCE(head->next_pending != f);
457 head->next_pending = c;
458 kmem_cache_free(qeth_qdio_outbuf_cache, f);
459 } else {
460 head = c;
461 c = c->next_pending;
462 }
463
464 }
465 }
466 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
467 QETH_QDIO_BUF_HANDLED_DELAYED)) {
468
469 q->bufs[bidx]->aob = q->bufstates[bidx].aob;
470 qeth_init_qdio_out_buf(q, bidx);
471 QETH_CARD_TEXT(q->card, 2, "clprecov");
472 }
473}
474
475
476static inline void qeth_qdio_handle_aob(struct qeth_card *card,
477 unsigned long phys_aob_addr) {
478 struct qaob *aob;
479 struct qeth_qdio_out_buffer *buffer;
480 enum iucv_tx_notify notification;
481
482 aob = (struct qaob *) phys_to_virt(phys_aob_addr);
483 QETH_CARD_TEXT(card, 5, "haob");
484 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
485 buffer = (struct qeth_qdio_out_buffer *) aob->user1;
486 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
487
488 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
489 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
490 notification = TX_NOTIFY_OK;
491 } else {
492 WARN_ON_ONCE(atomic_read(&buffer->state) !=
493 QETH_QDIO_BUF_PENDING);
494 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
495 notification = TX_NOTIFY_DELAYED_OK;
496 }
497
498 if (aob->aorc != 0) {
499 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
500 notification = qeth_compute_cq_notification(aob->aorc, 1);
501 }
502 qeth_notify_skbs(buffer->q, buffer, notification);
503
504 buffer->aob = NULL;
505 qeth_clear_output_buffer(buffer->q, buffer,
506 QETH_QDIO_BUF_HANDLED_DELAYED);
507
508
509 qdio_release_aob(aob);
510}
511
512static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
513{
514 return card->options.cq == QETH_CQ_ENABLED &&
515 card->qdio.c_q != NULL &&
516 queue != 0 &&
517 queue == card->qdio.no_in_queues - 1;
518}
519
520
521static int qeth_issue_next_read(struct qeth_card *card)
522{
523 int rc;
524 struct qeth_cmd_buffer *iob;
525
526 QETH_CARD_TEXT(card, 5, "issnxrd");
527 if (card->read.state != CH_STATE_UP)
528 return -EIO;
529 iob = qeth_get_buffer(&card->read);
530 if (!iob) {
531 dev_warn(&card->gdev->dev, "The qeth device driver "
532 "failed to recover an error on the device\n");
533 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
534 "available\n", dev_name(&card->gdev->dev));
535 return -ENOMEM;
536 }
537 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
538 QETH_CARD_TEXT(card, 6, "noirqpnd");
539 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
540 (addr_t) iob, 0, 0);
541 if (rc) {
542 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
543 "rc=%i\n", dev_name(&card->gdev->dev), rc);
544 atomic_set(&card->read.irq_pending, 0);
545 card->read_or_write_problem = 1;
546 qeth_schedule_recovery(card);
547 wake_up(&card->wait_q);
548 }
549 return rc;
550}
551
552static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
553{
554 struct qeth_reply *reply;
555
556 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
557 if (reply) {
558 atomic_set(&reply->refcnt, 1);
559 atomic_set(&reply->received, 0);
560 reply->card = card;
561 }
562 return reply;
563}
564
565static void qeth_get_reply(struct qeth_reply *reply)
566{
567 WARN_ON(atomic_read(&reply->refcnt) <= 0);
568 atomic_inc(&reply->refcnt);
569}
570
571static void qeth_put_reply(struct qeth_reply *reply)
572{
573 WARN_ON(atomic_read(&reply->refcnt) <= 0);
574 if (atomic_dec_and_test(&reply->refcnt))
575 kfree(reply);
576}
577
578static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
579 struct qeth_card *card)
580{
581 char *ipa_name;
582 int com = cmd->hdr.command;
583 ipa_name = qeth_get_ipa_cmd_name(com);
584 if (rc)
585 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
586 "x%X \"%s\"\n",
587 ipa_name, com, dev_name(&card->gdev->dev),
588 QETH_CARD_IFNAME(card), rc,
589 qeth_get_ipa_msg(rc));
590 else
591 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
592 ipa_name, com, dev_name(&card->gdev->dev),
593 QETH_CARD_IFNAME(card));
594}
595
596static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
597 struct qeth_cmd_buffer *iob)
598{
599 struct qeth_ipa_cmd *cmd = NULL;
600
601 QETH_CARD_TEXT(card, 5, "chkipad");
602 if (IS_IPA(iob->data)) {
603 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
604 if (IS_IPA_REPLY(cmd)) {
605 if (cmd->hdr.command != IPA_CMD_SETCCID &&
606 cmd->hdr.command != IPA_CMD_DELCCID &&
607 cmd->hdr.command != IPA_CMD_MODCCID &&
608 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
609 qeth_issue_ipa_msg(cmd,
610 cmd->hdr.return_code, card);
611 return cmd;
612 } else {
613 switch (cmd->hdr.command) {
614 case IPA_CMD_STOPLAN:
615 if (cmd->hdr.return_code ==
616 IPA_RC_VEPA_TO_VEB_TRANSITION) {
617 dev_err(&card->gdev->dev,
618 "Interface %s is down because the "
619 "adjacent port is no longer in "
620 "reflective relay mode\n",
621 QETH_CARD_IFNAME(card));
622 qeth_close_dev(card);
623 } else {
624 dev_warn(&card->gdev->dev,
625 "The link for interface %s on CHPID"
626 " 0x%X failed\n",
627 QETH_CARD_IFNAME(card),
628 card->info.chpid);
629 qeth_issue_ipa_msg(cmd,
630 cmd->hdr.return_code, card);
631 }
632 card->lan_online = 0;
633 if (card->dev && netif_carrier_ok(card->dev))
634 netif_carrier_off(card->dev);
635 return NULL;
636 case IPA_CMD_STARTLAN:
637 dev_info(&card->gdev->dev,
638 "The link for %s on CHPID 0x%X has"
639 " been restored\n",
640 QETH_CARD_IFNAME(card),
641 card->info.chpid);
642 netif_carrier_on(card->dev);
643 card->lan_online = 1;
644 if (card->info.hwtrap)
645 card->info.hwtrap = 2;
646 qeth_schedule_recovery(card);
647 return NULL;
648 case IPA_CMD_SETBRIDGEPORT_IQD:
649 case IPA_CMD_SETBRIDGEPORT_OSA:
650 case IPA_CMD_ADDRESS_CHANGE_NOTIF:
651 if (card->discipline->control_event_handler
652 (card, cmd))
653 return cmd;
654 else
655 return NULL;
656 case IPA_CMD_MODCCID:
657 return cmd;
658 case IPA_CMD_REGISTER_LOCAL_ADDR:
659 QETH_CARD_TEXT(card, 3, "irla");
660 break;
661 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
662 QETH_CARD_TEXT(card, 3, "urla");
663 break;
664 default:
665 QETH_DBF_MESSAGE(2, "Received data is IPA "
666 "but not a reply!\n");
667 break;
668 }
669 }
670 }
671 return cmd;
672}
673
674void qeth_clear_ipacmd_list(struct qeth_card *card)
675{
676 struct qeth_reply *reply, *r;
677 unsigned long flags;
678
679 QETH_CARD_TEXT(card, 4, "clipalst");
680
681 spin_lock_irqsave(&card->lock, flags);
682 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
683 qeth_get_reply(reply);
684 reply->rc = -EIO;
685 atomic_inc(&reply->received);
686 list_del_init(&reply->list);
687 wake_up(&reply->wait_q);
688 qeth_put_reply(reply);
689 }
690 spin_unlock_irqrestore(&card->lock, flags);
691 atomic_set(&card->write.irq_pending, 0);
692}
693EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
694
695static int qeth_check_idx_response(struct qeth_card *card,
696 unsigned char *buffer)
697{
698 if (!buffer)
699 return 0;
700
701 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
702 if ((buffer[2] & 0xc0) == 0xc0) {
703 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
704 "with cause code 0x%02x%s\n",
705 buffer[4],
706 ((buffer[4] == 0x22) ?
707 " -- try another portname" : ""));
708 QETH_CARD_TEXT(card, 2, "ckidxres");
709 QETH_CARD_TEXT(card, 2, " idxterm");
710 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
711 if (buffer[4] == 0xf6) {
712 dev_err(&card->gdev->dev,
713 "The qeth device is not configured "
714 "for the OSI layer required by z/VM\n");
715 return -EPERM;
716 }
717 return -EIO;
718 }
719 return 0;
720}
721
722static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
723{
724 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
725 dev_get_drvdata(&cdev->dev))->dev);
726 return card;
727}
728
729static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
730 __u32 len)
731{
732 struct qeth_card *card;
733
734 card = CARD_FROM_CDEV(channel->ccwdev);
735 QETH_CARD_TEXT(card, 4, "setupccw");
736 if (channel == &card->read)
737 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
738 else
739 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
740 channel->ccw.count = len;
741 channel->ccw.cda = (__u32) __pa(iob);
742}
743
744static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
745{
746 __u8 index;
747
748 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
749 index = channel->io_buf_no;
750 do {
751 if (channel->iob[index].state == BUF_STATE_FREE) {
752 channel->iob[index].state = BUF_STATE_LOCKED;
753 channel->io_buf_no = (channel->io_buf_no + 1) %
754 QETH_CMD_BUFFER_NO;
755 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
756 return channel->iob + index;
757 }
758 index = (index + 1) % QETH_CMD_BUFFER_NO;
759 } while (index != channel->io_buf_no);
760
761 return NULL;
762}
763
764void qeth_release_buffer(struct qeth_channel *channel,
765 struct qeth_cmd_buffer *iob)
766{
767 unsigned long flags;
768
769 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
770 spin_lock_irqsave(&channel->iob_lock, flags);
771 memset(iob->data, 0, QETH_BUFSIZE);
772 iob->state = BUF_STATE_FREE;
773 iob->callback = qeth_send_control_data_cb;
774 iob->rc = 0;
775 spin_unlock_irqrestore(&channel->iob_lock, flags);
776 wake_up(&channel->wait_q);
777}
778EXPORT_SYMBOL_GPL(qeth_release_buffer);
779
780static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
781{
782 struct qeth_cmd_buffer *buffer = NULL;
783 unsigned long flags;
784
785 spin_lock_irqsave(&channel->iob_lock, flags);
786 buffer = __qeth_get_buffer(channel);
787 spin_unlock_irqrestore(&channel->iob_lock, flags);
788 return buffer;
789}
790
791struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
792{
793 struct qeth_cmd_buffer *buffer;
794 wait_event(channel->wait_q,
795 ((buffer = qeth_get_buffer(channel)) != NULL));
796 return buffer;
797}
798EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
799
800void qeth_clear_cmd_buffers(struct qeth_channel *channel)
801{
802 int cnt;
803
804 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
805 qeth_release_buffer(channel, &channel->iob[cnt]);
806 channel->buf_no = 0;
807 channel->io_buf_no = 0;
808}
809EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
810
811static void qeth_send_control_data_cb(struct qeth_channel *channel,
812 struct qeth_cmd_buffer *iob)
813{
814 struct qeth_card *card;
815 struct qeth_reply *reply, *r;
816 struct qeth_ipa_cmd *cmd;
817 unsigned long flags;
818 int keep_reply;
819 int rc = 0;
820
821 card = CARD_FROM_CDEV(channel->ccwdev);
822 QETH_CARD_TEXT(card, 4, "sndctlcb");
823 rc = qeth_check_idx_response(card, iob->data);
824 switch (rc) {
825 case 0:
826 break;
827 case -EIO:
828 qeth_clear_ipacmd_list(card);
829 qeth_schedule_recovery(card);
830
831 default:
832 goto out;
833 }
834
835 cmd = qeth_check_ipa_data(card, iob);
836 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
837 goto out;
838
839 if (card->info.type == QETH_CARD_TYPE_OSN &&
840 cmd &&
841 cmd->hdr.command != IPA_CMD_STARTLAN &&
842 card->osn_info.assist_cb != NULL) {
843 card->osn_info.assist_cb(card->dev, cmd);
844 goto out;
845 }
846
847 spin_lock_irqsave(&card->lock, flags);
848 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
849 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
850 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
851 qeth_get_reply(reply);
852 list_del_init(&reply->list);
853 spin_unlock_irqrestore(&card->lock, flags);
854 keep_reply = 0;
855 if (reply->callback != NULL) {
856 if (cmd) {
857 reply->offset = (__u16)((char *)cmd -
858 (char *)iob->data);
859 keep_reply = reply->callback(card,
860 reply,
861 (unsigned long)cmd);
862 } else
863 keep_reply = reply->callback(card,
864 reply,
865 (unsigned long)iob);
866 }
867 if (cmd)
868 reply->rc = (u16) cmd->hdr.return_code;
869 else if (iob->rc)
870 reply->rc = iob->rc;
871 if (keep_reply) {
872 spin_lock_irqsave(&card->lock, flags);
873 list_add_tail(&reply->list,
874 &card->cmd_waiter_list);
875 spin_unlock_irqrestore(&card->lock, flags);
876 } else {
877 atomic_inc(&reply->received);
878 wake_up(&reply->wait_q);
879 }
880 qeth_put_reply(reply);
881 goto out;
882 }
883 }
884 spin_unlock_irqrestore(&card->lock, flags);
885out:
886 memcpy(&card->seqno.pdu_hdr_ack,
887 QETH_PDU_HEADER_SEQ_NO(iob->data),
888 QETH_SEQ_NO_LENGTH);
889 qeth_release_buffer(channel, iob);
890}
891
892static int qeth_setup_channel(struct qeth_channel *channel)
893{
894 int cnt;
895
896 QETH_DBF_TEXT(SETUP, 2, "setupch");
897 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
898 channel->iob[cnt].data =
899 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
900 if (channel->iob[cnt].data == NULL)
901 break;
902 channel->iob[cnt].state = BUF_STATE_FREE;
903 channel->iob[cnt].channel = channel;
904 channel->iob[cnt].callback = qeth_send_control_data_cb;
905 channel->iob[cnt].rc = 0;
906 }
907 if (cnt < QETH_CMD_BUFFER_NO) {
908 while (cnt-- > 0)
909 kfree(channel->iob[cnt].data);
910 return -ENOMEM;
911 }
912 channel->buf_no = 0;
913 channel->io_buf_no = 0;
914 atomic_set(&channel->irq_pending, 0);
915 spin_lock_init(&channel->iob_lock);
916
917 init_waitqueue_head(&channel->wait_q);
918 return 0;
919}
920
921static int qeth_set_thread_start_bit(struct qeth_card *card,
922 unsigned long thread)
923{
924 unsigned long flags;
925
926 spin_lock_irqsave(&card->thread_mask_lock, flags);
927 if (!(card->thread_allowed_mask & thread) ||
928 (card->thread_start_mask & thread)) {
929 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
930 return -EPERM;
931 }
932 card->thread_start_mask |= thread;
933 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
934 return 0;
935}
936
937void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
938{
939 unsigned long flags;
940
941 spin_lock_irqsave(&card->thread_mask_lock, flags);
942 card->thread_start_mask &= ~thread;
943 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
944 wake_up(&card->wait_q);
945}
946EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
947
948void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
949{
950 unsigned long flags;
951
952 spin_lock_irqsave(&card->thread_mask_lock, flags);
953 card->thread_running_mask &= ~thread;
954 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
955 wake_up(&card->wait_q);
956}
957EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
958
959static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
960{
961 unsigned long flags;
962 int rc = 0;
963
964 spin_lock_irqsave(&card->thread_mask_lock, flags);
965 if (card->thread_start_mask & thread) {
966 if ((card->thread_allowed_mask & thread) &&
967 !(card->thread_running_mask & thread)) {
968 rc = 1;
969 card->thread_start_mask &= ~thread;
970 card->thread_running_mask |= thread;
971 } else
972 rc = -EPERM;
973 }
974 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
975 return rc;
976}
977
978int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
979{
980 int rc = 0;
981
982 wait_event(card->wait_q,
983 (rc = __qeth_do_run_thread(card, thread)) >= 0);
984 return rc;
985}
986EXPORT_SYMBOL_GPL(qeth_do_run_thread);
987
988void qeth_schedule_recovery(struct qeth_card *card)
989{
990 QETH_CARD_TEXT(card, 2, "startrec");
991 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
992 schedule_work(&card->kernel_thread_starter);
993}
994EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
995
996static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
997{
998 int dstat, cstat;
999 char *sense;
1000 struct qeth_card *card;
1001
1002 sense = (char *) irb->ecw;
1003 cstat = irb->scsw.cmd.cstat;
1004 dstat = irb->scsw.cmd.dstat;
1005 card = CARD_FROM_CDEV(cdev);
1006
1007 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
1008 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
1009 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
1010 QETH_CARD_TEXT(card, 2, "CGENCHK");
1011 dev_warn(&cdev->dev, "The qeth device driver "
1012 "failed to recover an error on the device\n");
1013 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
1014 dev_name(&cdev->dev), dstat, cstat);
1015 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
1016 16, 1, irb, 64, 1);
1017 return 1;
1018 }
1019
1020 if (dstat & DEV_STAT_UNIT_CHECK) {
1021 if (sense[SENSE_RESETTING_EVENT_BYTE] &
1022 SENSE_RESETTING_EVENT_FLAG) {
1023 QETH_CARD_TEXT(card, 2, "REVIND");
1024 return 1;
1025 }
1026 if (sense[SENSE_COMMAND_REJECT_BYTE] &
1027 SENSE_COMMAND_REJECT_FLAG) {
1028 QETH_CARD_TEXT(card, 2, "CMDREJi");
1029 return 1;
1030 }
1031 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
1032 QETH_CARD_TEXT(card, 2, "AFFE");
1033 return 1;
1034 }
1035 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
1036 QETH_CARD_TEXT(card, 2, "ZEROSEN");
1037 return 0;
1038 }
1039 QETH_CARD_TEXT(card, 2, "DGENCHK");
1040 return 1;
1041 }
1042 return 0;
1043}
1044
1045static long __qeth_check_irb_error(struct ccw_device *cdev,
1046 unsigned long intparm, struct irb *irb)
1047{
1048 struct qeth_card *card;
1049
1050 card = CARD_FROM_CDEV(cdev);
1051
1052 if (!card || !IS_ERR(irb))
1053 return 0;
1054
1055 switch (PTR_ERR(irb)) {
1056 case -EIO:
1057 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
1058 dev_name(&cdev->dev));
1059 QETH_CARD_TEXT(card, 2, "ckirberr");
1060 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
1061 break;
1062 case -ETIMEDOUT:
1063 dev_warn(&cdev->dev, "A hardware operation timed out"
1064 " on the device\n");
1065 QETH_CARD_TEXT(card, 2, "ckirberr");
1066 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
1067 if (intparm == QETH_RCD_PARM) {
1068 if (card->data.ccwdev == cdev) {
1069 card->data.state = CH_STATE_DOWN;
1070 wake_up(&card->wait_q);
1071 }
1072 }
1073 break;
1074 default:
1075 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
1076 dev_name(&cdev->dev), PTR_ERR(irb));
1077 QETH_CARD_TEXT(card, 2, "ckirberr");
1078 QETH_CARD_TEXT(card, 2, " rc???");
1079 }
1080 return PTR_ERR(irb);
1081}
1082
1083static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
1084 struct irb *irb)
1085{
1086 int rc;
1087 int cstat, dstat;
1088 struct qeth_cmd_buffer *buffer;
1089 struct qeth_channel *channel;
1090 struct qeth_card *card;
1091 struct qeth_cmd_buffer *iob;
1092 __u8 index;
1093
1094 if (__qeth_check_irb_error(cdev, intparm, irb))
1095 return;
1096 cstat = irb->scsw.cmd.cstat;
1097 dstat = irb->scsw.cmd.dstat;
1098
1099 card = CARD_FROM_CDEV(cdev);
1100 if (!card)
1101 return;
1102
1103 QETH_CARD_TEXT(card, 5, "irq");
1104
1105 if (card->read.ccwdev == cdev) {
1106 channel = &card->read;
1107 QETH_CARD_TEXT(card, 5, "read");
1108 } else if (card->write.ccwdev == cdev) {
1109 channel = &card->write;
1110 QETH_CARD_TEXT(card, 5, "write");
1111 } else {
1112 channel = &card->data;
1113 QETH_CARD_TEXT(card, 5, "data");
1114 }
1115 atomic_set(&channel->irq_pending, 0);
1116
1117 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
1118 channel->state = CH_STATE_STOPPED;
1119
1120 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
1121 channel->state = CH_STATE_HALTED;
1122
1123
1124 if ((channel == &card->data) && (intparm != 0) &&
1125 (intparm != QETH_RCD_PARM))
1126 goto out;
1127
1128 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
1129 QETH_CARD_TEXT(card, 6, "clrchpar");
1130
1131 intparm = 0;
1132 }
1133 if (intparm == QETH_HALT_CHANNEL_PARM) {
1134 QETH_CARD_TEXT(card, 6, "hltchpar");
1135
1136 intparm = 0;
1137 }
1138 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
1139 (dstat & DEV_STAT_UNIT_CHECK) ||
1140 (cstat)) {
1141 if (irb->esw.esw0.erw.cons) {
1142 dev_warn(&channel->ccwdev->dev,
1143 "The qeth device driver failed to recover "
1144 "an error on the device\n");
1145 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
1146 "0x%X dstat 0x%X\n",
1147 dev_name(&channel->ccwdev->dev), cstat, dstat);
1148 print_hex_dump(KERN_WARNING, "qeth: irb ",
1149 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
1150 print_hex_dump(KERN_WARNING, "qeth: sense data ",
1151 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
1152 }
1153 if (intparm == QETH_RCD_PARM) {
1154 channel->state = CH_STATE_DOWN;
1155 goto out;
1156 }
1157 rc = qeth_get_problem(cdev, irb);
1158 if (rc) {
1159 qeth_clear_ipacmd_list(card);
1160 qeth_schedule_recovery(card);
1161 goto out;
1162 }
1163 }
1164
1165 if (intparm == QETH_RCD_PARM) {
1166 channel->state = CH_STATE_RCD_DONE;
1167 goto out;
1168 }
1169 if (intparm) {
1170 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
1171 buffer->state = BUF_STATE_PROCESSED;
1172 }
1173 if (channel == &card->data)
1174 return;
1175 if (channel == &card->read &&
1176 channel->state == CH_STATE_UP)
1177 qeth_issue_next_read(card);
1178
1179 iob = channel->iob;
1180 index = channel->buf_no;
1181 while (iob[index].state == BUF_STATE_PROCESSED) {
1182 if (iob[index].callback != NULL)
1183 iob[index].callback(channel, iob + index);
1184
1185 index = (index + 1) % QETH_CMD_BUFFER_NO;
1186 }
1187 channel->buf_no = index;
1188out:
1189 wake_up(&card->wait_q);
1190 return;
1191}
1192
1193static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
1194 struct qeth_qdio_out_buffer *buf,
1195 enum iucv_tx_notify notification)
1196{
1197 struct sk_buff *skb;
1198
1199 if (skb_queue_empty(&buf->skb_list))
1200 goto out;
1201 skb = skb_peek(&buf->skb_list);
1202 while (skb) {
1203 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
1204 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
1205 if (skb->protocol == ETH_P_AF_IUCV) {
1206 if (skb->sk) {
1207 struct iucv_sock *iucv = iucv_sk(skb->sk);
1208 iucv->sk_txnotify(skb, notification);
1209 }
1210 }
1211 if (skb_queue_is_last(&buf->skb_list, skb))
1212 skb = NULL;
1213 else
1214 skb = skb_queue_next(&buf->skb_list, skb);
1215 }
1216out:
1217 return;
1218}
1219
1220static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
1221{
1222 struct sk_buff *skb;
1223 struct iucv_sock *iucv;
1224 int notify_general_error = 0;
1225
1226 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
1227 notify_general_error = 1;
1228
1229
1230 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
1231
1232 skb = skb_dequeue(&buf->skb_list);
1233 while (skb) {
1234 QETH_CARD_TEXT(buf->q->card, 5, "skbr");
1235 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
1236 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) {
1237 if (skb->sk) {
1238 iucv = iucv_sk(skb->sk);
1239 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
1240 }
1241 }
1242 atomic_dec(&skb->users);
1243 dev_kfree_skb_any(skb);
1244 skb = skb_dequeue(&buf->skb_list);
1245 }
1246}
1247
1248static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
1249 struct qeth_qdio_out_buffer *buf,
1250 enum qeth_qdio_buffer_states newbufstate)
1251{
1252 int i;
1253
1254
1255 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
1256 atomic_dec(&queue->set_pci_flags_count);
1257
1258 if (newbufstate == QETH_QDIO_BUF_EMPTY) {
1259 qeth_release_skbs(buf);
1260 }
1261 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
1262 if (buf->buffer->element[i].addr && buf->is_header[i])
1263 kmem_cache_free(qeth_core_header_cache,
1264 buf->buffer->element[i].addr);
1265 buf->is_header[i] = 0;
1266 buf->buffer->element[i].length = 0;
1267 buf->buffer->element[i].addr = NULL;
1268 buf->buffer->element[i].eflags = 0;
1269 buf->buffer->element[i].sflags = 0;
1270 }
1271 buf->buffer->element[15].eflags = 0;
1272 buf->buffer->element[15].sflags = 0;
1273 buf->next_element_to_fill = 0;
1274 atomic_set(&buf->state, newbufstate);
1275}
1276
1277static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
1278{
1279 int j;
1280
1281 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
1282 if (!q->bufs[j])
1283 continue;
1284 qeth_cleanup_handled_pending(q, j, 1);
1285 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
1286 if (free) {
1287 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
1288 q->bufs[j] = NULL;
1289 }
1290 }
1291}
1292
1293void qeth_clear_qdio_buffers(struct qeth_card *card)
1294{
1295 int i;
1296
1297 QETH_CARD_TEXT(card, 2, "clearqdbf");
1298
1299 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1300 if (card->qdio.out_qs[i]) {
1301 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
1302 }
1303 }
1304}
1305EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
1306
1307static void qeth_free_buffer_pool(struct qeth_card *card)
1308{
1309 struct qeth_buffer_pool_entry *pool_entry, *tmp;
1310 int i = 0;
1311 list_for_each_entry_safe(pool_entry, tmp,
1312 &card->qdio.init_pool.entry_list, init_list){
1313 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
1314 free_page((unsigned long)pool_entry->elements[i]);
1315 list_del(&pool_entry->init_list);
1316 kfree(pool_entry);
1317 }
1318}
1319
1320static void qeth_clean_channel(struct qeth_channel *channel)
1321{
1322 int cnt;
1323
1324 QETH_DBF_TEXT(SETUP, 2, "freech");
1325 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1326 kfree(channel->iob[cnt].data);
1327}
1328
1329static void qeth_set_single_write_queues(struct qeth_card *card)
1330{
1331 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1332 (card->qdio.no_out_queues == 4))
1333 qeth_free_qdio_buffers(card);
1334
1335 card->qdio.no_out_queues = 1;
1336 if (card->qdio.default_out_queue != 0)
1337 dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
1338
1339 card->qdio.default_out_queue = 0;
1340}
1341
1342static void qeth_set_multiple_write_queues(struct qeth_card *card)
1343{
1344 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
1345 (card->qdio.no_out_queues == 1)) {
1346 qeth_free_qdio_buffers(card);
1347 card->qdio.default_out_queue = 2;
1348 }
1349 card->qdio.no_out_queues = 4;
1350}
1351
1352static void qeth_update_from_chp_desc(struct qeth_card *card)
1353{
1354 struct ccw_device *ccwdev;
1355 struct channel_path_desc *chp_dsc;
1356
1357 QETH_DBF_TEXT(SETUP, 2, "chp_desc");
1358
1359 ccwdev = card->data.ccwdev;
1360 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
1361 if (!chp_dsc)
1362 goto out;
1363
1364 card->info.func_level = 0x4100 + chp_dsc->desc;
1365 if (card->info.type == QETH_CARD_TYPE_IQD)
1366 goto out;
1367
1368
1369 if ((chp_dsc->chpp & 0x02) == 0x02)
1370 qeth_set_single_write_queues(card);
1371 else
1372 qeth_set_multiple_write_queues(card);
1373out:
1374 kfree(chp_dsc);
1375 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
1376 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
1377}
1378
1379static void qeth_init_qdio_info(struct qeth_card *card)
1380{
1381 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1382 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1383
1384 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1385 if (card->info.type == QETH_CARD_TYPE_IQD)
1386 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
1387 else
1388 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1389 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1390 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1391 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1392}
1393
1394static void qeth_set_intial_options(struct qeth_card *card)
1395{
1396 card->options.route4.type = NO_ROUTER;
1397 card->options.route6.type = NO_ROUTER;
1398 card->options.fake_broadcast = 0;
1399 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1400 card->options.performance_stats = 0;
1401 card->options.rx_sg_cb = QETH_RX_SG_CB;
1402 card->options.isolation = ISOLATION_MODE_NONE;
1403 card->options.cq = QETH_CQ_DISABLED;
1404}
1405
1406static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1407{
1408 unsigned long flags;
1409 int rc = 0;
1410
1411 spin_lock_irqsave(&card->thread_mask_lock, flags);
1412 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
1413 (u8) card->thread_start_mask,
1414 (u8) card->thread_allowed_mask,
1415 (u8) card->thread_running_mask);
1416 rc = (card->thread_start_mask & thread);
1417 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1418 return rc;
1419}
1420
1421static void qeth_start_kernel_thread(struct work_struct *work)
1422{
1423 struct task_struct *ts;
1424 struct qeth_card *card = container_of(work, struct qeth_card,
1425 kernel_thread_starter);
1426 QETH_CARD_TEXT(card , 2, "strthrd");
1427
1428 if (card->read.state != CH_STATE_UP &&
1429 card->write.state != CH_STATE_UP)
1430 return;
1431 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
1432 ts = kthread_run(card->discipline->recover, (void *)card,
1433 "qeth_recover");
1434 if (IS_ERR(ts)) {
1435 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
1436 qeth_clear_thread_running_bit(card,
1437 QETH_RECOVER_THREAD);
1438 }
1439 }
1440}
1441
1442static void qeth_buffer_reclaim_work(struct work_struct *);
1443static int qeth_setup_card(struct qeth_card *card)
1444{
1445
1446 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1447 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1448
1449 card->read.state = CH_STATE_DOWN;
1450 card->write.state = CH_STATE_DOWN;
1451 card->data.state = CH_STATE_DOWN;
1452 card->state = CARD_STATE_DOWN;
1453 card->lan_online = 0;
1454 card->read_or_write_problem = 0;
1455 card->dev = NULL;
1456 spin_lock_init(&card->vlanlock);
1457 spin_lock_init(&card->mclock);
1458 spin_lock_init(&card->lock);
1459 spin_lock_init(&card->ip_lock);
1460 spin_lock_init(&card->thread_mask_lock);
1461 mutex_init(&card->conf_mutex);
1462 mutex_init(&card->discipline_mutex);
1463 card->thread_start_mask = 0;
1464 card->thread_allowed_mask = 0;
1465 card->thread_running_mask = 0;
1466 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1467 INIT_LIST_HEAD(&card->ip_list);
1468 INIT_LIST_HEAD(card->ip_tbd_list);
1469 INIT_LIST_HEAD(&card->cmd_waiter_list);
1470 init_waitqueue_head(&card->wait_q);
1471
1472 qeth_set_intial_options(card);
1473
1474 INIT_LIST_HEAD(&card->ipato.entries);
1475 card->ipato.enabled = 0;
1476 card->ipato.invert4 = 0;
1477 card->ipato.invert6 = 0;
1478
1479 qeth_init_qdio_info(card);
1480 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
1481 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
1482 return 0;
1483}
1484
1485static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1486{
1487 struct qeth_card *card = container_of(slr, struct qeth_card,
1488 qeth_service_level);
1489 if (card->info.mcl_level[0])
1490 seq_printf(m, "qeth: %s firmware level %s\n",
1491 CARD_BUS_ID(card), card->info.mcl_level);
1492}
1493
1494static struct qeth_card *qeth_alloc_card(void)
1495{
1496 struct qeth_card *card;
1497
1498 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1499 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1500 if (!card)
1501 goto out;
1502 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1503 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL);
1504 if (!card->ip_tbd_list) {
1505 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1506 goto out_card;
1507 }
1508 if (qeth_setup_channel(&card->read))
1509 goto out_ip;
1510 if (qeth_setup_channel(&card->write))
1511 goto out_channel;
1512 card->options.layer2 = -1;
1513 card->qeth_service_level.seq_print = qeth_core_sl_print;
1514 register_service_level(&card->qeth_service_level);
1515 return card;
1516
1517out_channel:
1518 qeth_clean_channel(&card->read);
1519out_ip:
1520 kfree(card->ip_tbd_list);
1521out_card:
1522 kfree(card);
1523out:
1524 return NULL;
1525}
1526
1527static int qeth_determine_card_type(struct qeth_card *card)
1528{
1529 int i = 0;
1530
1531 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1532
1533 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1534 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1535 while (known_devices[i][QETH_DEV_MODEL_IND]) {
1536 if ((CARD_RDEV(card)->id.dev_type ==
1537 known_devices[i][QETH_DEV_TYPE_IND]) &&
1538 (CARD_RDEV(card)->id.dev_model ==
1539 known_devices[i][QETH_DEV_MODEL_IND])) {
1540 card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
1541 card->qdio.no_out_queues =
1542 known_devices[i][QETH_QUEUE_NO_IND];
1543 card->qdio.no_in_queues = 1;
1544 card->info.is_multicast_different =
1545 known_devices[i][QETH_MULTICAST_IND];
1546 qeth_update_from_chp_desc(card);
1547 return 0;
1548 }
1549 i++;
1550 }
1551 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1552 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1553 "unknown type\n");
1554 return -ENOENT;
1555}
1556
1557static int qeth_clear_channel(struct qeth_channel *channel)
1558{
1559 unsigned long flags;
1560 struct qeth_card *card;
1561 int rc;
1562
1563 card = CARD_FROM_CDEV(channel->ccwdev);
1564 QETH_CARD_TEXT(card, 3, "clearch");
1565 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1566 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1567 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1568
1569 if (rc)
1570 return rc;
1571 rc = wait_event_interruptible_timeout(card->wait_q,
1572 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1573 if (rc == -ERESTARTSYS)
1574 return rc;
1575 if (channel->state != CH_STATE_STOPPED)
1576 return -ETIME;
1577 channel->state = CH_STATE_DOWN;
1578 return 0;
1579}
1580
1581static int qeth_halt_channel(struct qeth_channel *channel)
1582{
1583 unsigned long flags;
1584 struct qeth_card *card;
1585 int rc;
1586
1587 card = CARD_FROM_CDEV(channel->ccwdev);
1588 QETH_CARD_TEXT(card, 3, "haltch");
1589 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1590 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1591 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1592
1593 if (rc)
1594 return rc;
1595 rc = wait_event_interruptible_timeout(card->wait_q,
1596 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1597 if (rc == -ERESTARTSYS)
1598 return rc;
1599 if (channel->state != CH_STATE_HALTED)
1600 return -ETIME;
1601 return 0;
1602}
1603
1604static int qeth_halt_channels(struct qeth_card *card)
1605{
1606 int rc1 = 0, rc2 = 0, rc3 = 0;
1607
1608 QETH_CARD_TEXT(card, 3, "haltchs");
1609 rc1 = qeth_halt_channel(&card->read);
1610 rc2 = qeth_halt_channel(&card->write);
1611 rc3 = qeth_halt_channel(&card->data);
1612 if (rc1)
1613 return rc1;
1614 if (rc2)
1615 return rc2;
1616 return rc3;
1617}
1618
1619static int qeth_clear_channels(struct qeth_card *card)
1620{
1621 int rc1 = 0, rc2 = 0, rc3 = 0;
1622
1623 QETH_CARD_TEXT(card, 3, "clearchs");
1624 rc1 = qeth_clear_channel(&card->read);
1625 rc2 = qeth_clear_channel(&card->write);
1626 rc3 = qeth_clear_channel(&card->data);
1627 if (rc1)
1628 return rc1;
1629 if (rc2)
1630 return rc2;
1631 return rc3;
1632}
1633
1634static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1635{
1636 int rc = 0;
1637
1638 QETH_CARD_TEXT(card, 3, "clhacrd");
1639
1640 if (halt)
1641 rc = qeth_halt_channels(card);
1642 if (rc)
1643 return rc;
1644 return qeth_clear_channels(card);
1645}
1646
1647int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1648{
1649 int rc = 0;
1650
1651 QETH_CARD_TEXT(card, 3, "qdioclr");
1652 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1653 QETH_QDIO_CLEANING)) {
1654 case QETH_QDIO_ESTABLISHED:
1655 if (card->info.type == QETH_CARD_TYPE_IQD)
1656 rc = qdio_shutdown(CARD_DDEV(card),
1657 QDIO_FLAG_CLEANUP_USING_HALT);
1658 else
1659 rc = qdio_shutdown(CARD_DDEV(card),
1660 QDIO_FLAG_CLEANUP_USING_CLEAR);
1661 if (rc)
1662 QETH_CARD_TEXT_(card, 3, "1err%d", rc);
1663 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1664 break;
1665 case QETH_QDIO_CLEANING:
1666 return rc;
1667 default:
1668 break;
1669 }
1670 rc = qeth_clear_halt_card(card, use_halt);
1671 if (rc)
1672 QETH_CARD_TEXT_(card, 3, "2err%d", rc);
1673 card->state = CARD_STATE_DOWN;
1674 return rc;
1675}
1676EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1677
1678static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1679 int *length)
1680{
1681 struct ciw *ciw;
1682 char *rcd_buf;
1683 int ret;
1684 struct qeth_channel *channel = &card->data;
1685 unsigned long flags;
1686
1687
1688
1689
1690 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1691 if (!ciw || ciw->cmd == 0)
1692 return -EOPNOTSUPP;
1693 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1694 if (!rcd_buf)
1695 return -ENOMEM;
1696
1697 channel->ccw.cmd_code = ciw->cmd;
1698 channel->ccw.cda = (__u32) __pa(rcd_buf);
1699 channel->ccw.count = ciw->count;
1700 channel->ccw.flags = CCW_FLAG_SLI;
1701 channel->state = CH_STATE_RCD;
1702 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1703 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1704 QETH_RCD_PARM, LPM_ANYPATH, 0,
1705 QETH_RCD_TIMEOUT);
1706 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1707 if (!ret)
1708 wait_event(card->wait_q,
1709 (channel->state == CH_STATE_RCD_DONE ||
1710 channel->state == CH_STATE_DOWN));
1711 if (channel->state == CH_STATE_DOWN)
1712 ret = -EIO;
1713 else
1714 channel->state = CH_STATE_DOWN;
1715 if (ret) {
1716 kfree(rcd_buf);
1717 *buffer = NULL;
1718 *length = 0;
1719 } else {
1720 *length = ciw->count;
1721 *buffer = rcd_buf;
1722 }
1723 return ret;
1724}
1725
1726static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
1727{
1728 QETH_DBF_TEXT(SETUP, 2, "cfgunit");
1729 card->info.chpid = prcd[30];
1730 card->info.unit_addr2 = prcd[31];
1731 card->info.cula = prcd[63];
1732 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1733 (prcd[0x11] == _ascebc['M']));
1734}
1735
1736static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
1737{
1738 QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
1739
1740 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
1741 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
1742 card->info.blkt.time_total = 0;
1743 card->info.blkt.inter_packet = 0;
1744 card->info.blkt.inter_packet_jumbo = 0;
1745 } else {
1746 card->info.blkt.time_total = 250;
1747 card->info.blkt.inter_packet = 5;
1748 card->info.blkt.inter_packet_jumbo = 15;
1749 }
1750}
1751
1752static void qeth_init_tokens(struct qeth_card *card)
1753{
1754 card->token.issuer_rm_w = 0x00010103UL;
1755 card->token.cm_filter_w = 0x00010108UL;
1756 card->token.cm_connection_w = 0x0001010aUL;
1757 card->token.ulp_filter_w = 0x0001010bUL;
1758 card->token.ulp_connection_w = 0x0001010dUL;
1759}
1760
1761static void qeth_init_func_level(struct qeth_card *card)
1762{
1763 switch (card->info.type) {
1764 case QETH_CARD_TYPE_IQD:
1765 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
1766 break;
1767 case QETH_CARD_TYPE_OSD:
1768 case QETH_CARD_TYPE_OSN:
1769 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
1770 break;
1771 default:
1772 break;
1773 }
1774}
1775
1776static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1777 void (*idx_reply_cb)(struct qeth_channel *,
1778 struct qeth_cmd_buffer *))
1779{
1780 struct qeth_cmd_buffer *iob;
1781 unsigned long flags;
1782 int rc;
1783 struct qeth_card *card;
1784
1785 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1786 card = CARD_FROM_CDEV(channel->ccwdev);
1787 iob = qeth_get_buffer(channel);
1788 if (!iob)
1789 return -ENOMEM;
1790 iob->callback = idx_reply_cb;
1791 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1792 channel->ccw.count = QETH_BUFSIZE;
1793 channel->ccw.cda = (__u32) __pa(iob->data);
1794
1795 wait_event(card->wait_q,
1796 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1797 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1798 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1799 rc = ccw_device_start(channel->ccwdev,
1800 &channel->ccw, (addr_t) iob, 0, 0);
1801 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1802
1803 if (rc) {
1804 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1805 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1806 atomic_set(&channel->irq_pending, 0);
1807 wake_up(&card->wait_q);
1808 return rc;
1809 }
1810 rc = wait_event_interruptible_timeout(card->wait_q,
1811 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1812 if (rc == -ERESTARTSYS)
1813 return rc;
1814 if (channel->state != CH_STATE_UP) {
1815 rc = -ETIME;
1816 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1817 qeth_clear_cmd_buffers(channel);
1818 } else
1819 rc = 0;
1820 return rc;
1821}
1822
1823static int qeth_idx_activate_channel(struct qeth_channel *channel,
1824 void (*idx_reply_cb)(struct qeth_channel *,
1825 struct qeth_cmd_buffer *))
1826{
1827 struct qeth_card *card;
1828 struct qeth_cmd_buffer *iob;
1829 unsigned long flags;
1830 __u16 temp;
1831 __u8 tmp;
1832 int rc;
1833 struct ccw_dev_id temp_devid;
1834
1835 card = CARD_FROM_CDEV(channel->ccwdev);
1836
1837 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1838
1839 iob = qeth_get_buffer(channel);
1840 if (!iob)
1841 return -ENOMEM;
1842 iob->callback = idx_reply_cb;
1843 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1844 channel->ccw.count = IDX_ACTIVATE_SIZE;
1845 channel->ccw.cda = (__u32) __pa(iob->data);
1846 if (channel == &card->write) {
1847 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1848 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1849 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1850 card->seqno.trans_hdr++;
1851 } else {
1852 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1853 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1854 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1855 }
1856 tmp = ((__u8)card->info.portno) | 0x80;
1857 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1858 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1859 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1860 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1861 &card->info.func_level, sizeof(__u16));
1862 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1863 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1864 temp = (card->info.cula << 8) + card->info.unit_addr2;
1865 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1866
1867 wait_event(card->wait_q,
1868 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1869 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1870 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1871 rc = ccw_device_start(channel->ccwdev,
1872 &channel->ccw, (addr_t) iob, 0, 0);
1873 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1874
1875 if (rc) {
1876 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1877 rc);
1878 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1879 atomic_set(&channel->irq_pending, 0);
1880 wake_up(&card->wait_q);
1881 return rc;
1882 }
1883 rc = wait_event_interruptible_timeout(card->wait_q,
1884 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1885 if (rc == -ERESTARTSYS)
1886 return rc;
1887 if (channel->state != CH_STATE_ACTIVATING) {
1888 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1889 " failed to recover an error on the device\n");
1890 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1891 dev_name(&channel->ccwdev->dev));
1892 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1893 qeth_clear_cmd_buffers(channel);
1894 return -ETIME;
1895 }
1896 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1897}
1898
1899static int qeth_peer_func_level(int level)
1900{
1901 if ((level & 0xff) == 8)
1902 return (level & 0xff) + 0x400;
1903 if (((level >> 8) & 3) == 1)
1904 return (level & 0xff) + 0x200;
1905 return level;
1906}
1907
1908static void qeth_idx_write_cb(struct qeth_channel *channel,
1909 struct qeth_cmd_buffer *iob)
1910{
1911 struct qeth_card *card;
1912 __u16 temp;
1913
1914 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1915
1916 if (channel->state == CH_STATE_DOWN) {
1917 channel->state = CH_STATE_ACTIVATING;
1918 goto out;
1919 }
1920 card = CARD_FROM_CDEV(channel->ccwdev);
1921
1922 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1923 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
1924 dev_err(&card->write.ccwdev->dev,
1925 "The adapter is used exclusively by another "
1926 "host\n");
1927 else
1928 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1929 " negative reply\n",
1930 dev_name(&card->write.ccwdev->dev));
1931 goto out;
1932 }
1933 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1934 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1935 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1936 "function level mismatch (sent: 0x%x, received: "
1937 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1938 card->info.func_level, temp);
1939 goto out;
1940 }
1941 channel->state = CH_STATE_UP;
1942out:
1943 qeth_release_buffer(channel, iob);
1944}
1945
1946static void qeth_idx_read_cb(struct qeth_channel *channel,
1947 struct qeth_cmd_buffer *iob)
1948{
1949 struct qeth_card *card;
1950 __u16 temp;
1951
1952 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1953 if (channel->state == CH_STATE_DOWN) {
1954 channel->state = CH_STATE_ACTIVATING;
1955 goto out;
1956 }
1957
1958 card = CARD_FROM_CDEV(channel->ccwdev);
1959 if (qeth_check_idx_response(card, iob->data))
1960 goto out;
1961
1962 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1963 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
1964 case QETH_IDX_ACT_ERR_EXCL:
1965 dev_err(&card->write.ccwdev->dev,
1966 "The adapter is used exclusively by another "
1967 "host\n");
1968 break;
1969 case QETH_IDX_ACT_ERR_AUTH:
1970 case QETH_IDX_ACT_ERR_AUTH_USER:
1971 dev_err(&card->read.ccwdev->dev,
1972 "Setting the device online failed because of "
1973 "insufficient authorization\n");
1974 break;
1975 default:
1976 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1977 " negative reply\n",
1978 dev_name(&card->read.ccwdev->dev));
1979 }
1980 QETH_CARD_TEXT_(card, 2, "idxread%c",
1981 QETH_IDX_ACT_CAUSE_CODE(iob->data));
1982 goto out;
1983 }
1984
1985
1986
1987
1988
1989 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1990 (card->info.type == QETH_CARD_TYPE_OSD))
1991 card->info.portname_required = 1;
1992
1993 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1994 if (temp != qeth_peer_func_level(card->info.func_level)) {
1995 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1996 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1997 dev_name(&card->read.ccwdev->dev),
1998 card->info.func_level, temp);
1999 goto out;
2000 }
2001 memcpy(&card->token.issuer_rm_r,
2002 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
2003 QETH_MPC_TOKEN_LENGTH);
2004 memcpy(&card->info.mcl_level[0],
2005 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
2006 channel->state = CH_STATE_UP;
2007out:
2008 qeth_release_buffer(channel, iob);
2009}
2010
2011void qeth_prepare_control_data(struct qeth_card *card, int len,
2012 struct qeth_cmd_buffer *iob)
2013{
2014 qeth_setup_ccw(&card->write, iob->data, len);
2015 iob->callback = qeth_release_buffer;
2016
2017 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
2018 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
2019 card->seqno.trans_hdr++;
2020 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
2021 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
2022 card->seqno.pdu_hdr++;
2023 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
2024 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
2025 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
2026}
2027EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054int qeth_send_control_data(struct qeth_card *card, int len,
2055 struct qeth_cmd_buffer *iob,
2056 int (*reply_cb)(struct qeth_card *cb_card,
2057 struct qeth_reply *cb_reply,
2058 unsigned long cb_cmd),
2059 void *reply_param)
2060{
2061 int rc;
2062 unsigned long flags;
2063 struct qeth_reply *reply = NULL;
2064 unsigned long timeout, event_timeout;
2065 struct qeth_ipa_cmd *cmd;
2066
2067 QETH_CARD_TEXT(card, 2, "sendctl");
2068
2069 if (card->read_or_write_problem) {
2070 qeth_release_buffer(iob->channel, iob);
2071 return -EIO;
2072 }
2073 reply = qeth_alloc_reply(card);
2074 if (!reply) {
2075 return -ENOMEM;
2076 }
2077 reply->callback = reply_cb;
2078 reply->param = reply_param;
2079 if (card->state == CARD_STATE_DOWN)
2080 reply->seqno = QETH_IDX_COMMAND_SEQNO;
2081 else
2082 reply->seqno = card->seqno.ipa++;
2083 init_waitqueue_head(&reply->wait_q);
2084 spin_lock_irqsave(&card->lock, flags);
2085 list_add_tail(&reply->list, &card->cmd_waiter_list);
2086 spin_unlock_irqrestore(&card->lock, flags);
2087 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
2088
2089 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
2090 qeth_prepare_control_data(card, len, iob);
2091
2092 if (IS_IPA(iob->data))
2093 event_timeout = QETH_IPA_TIMEOUT;
2094 else
2095 event_timeout = QETH_TIMEOUT;
2096 timeout = jiffies + event_timeout;
2097
2098 QETH_CARD_TEXT(card, 6, "noirqpnd");
2099 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
2100 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
2101 (addr_t) iob, 0, 0);
2102 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
2103 if (rc) {
2104 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
2105 "ccw_device_start rc = %i\n",
2106 dev_name(&card->write.ccwdev->dev), rc);
2107 QETH_CARD_TEXT_(card, 2, " err%d", rc);
2108 spin_lock_irqsave(&card->lock, flags);
2109 list_del_init(&reply->list);
2110 qeth_put_reply(reply);
2111 spin_unlock_irqrestore(&card->lock, flags);
2112 qeth_release_buffer(iob->channel, iob);
2113 atomic_set(&card->write.irq_pending, 0);
2114 wake_up(&card->wait_q);
2115 return rc;
2116 }
2117
2118
2119
2120 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2121 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
2122 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
2123 if (!wait_event_timeout(reply->wait_q,
2124 atomic_read(&reply->received), event_timeout))
2125 goto time_err;
2126 } else {
2127 while (!atomic_read(&reply->received)) {
2128 if (time_after(jiffies, timeout))
2129 goto time_err;
2130 cpu_relax();
2131 }
2132 }
2133
2134 if (reply->rc == -EIO)
2135 goto error;
2136 rc = reply->rc;
2137 qeth_put_reply(reply);
2138 return rc;
2139
2140time_err:
2141 reply->rc = -ETIME;
2142 spin_lock_irqsave(&reply->card->lock, flags);
2143 list_del_init(&reply->list);
2144 spin_unlock_irqrestore(&reply->card->lock, flags);
2145 atomic_inc(&reply->received);
2146error:
2147 atomic_set(&card->write.irq_pending, 0);
2148 qeth_release_buffer(iob->channel, iob);
2149 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
2150 rc = reply->rc;
2151 qeth_put_reply(reply);
2152 return rc;
2153}
2154EXPORT_SYMBOL_GPL(qeth_send_control_data);
2155
2156static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2157 unsigned long data)
2158{
2159 struct qeth_cmd_buffer *iob;
2160
2161 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
2162
2163 iob = (struct qeth_cmd_buffer *) data;
2164 memcpy(&card->token.cm_filter_r,
2165 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
2166 QETH_MPC_TOKEN_LENGTH);
2167 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2168 return 0;
2169}
2170
2171static int qeth_cm_enable(struct qeth_card *card)
2172{
2173 int rc;
2174 struct qeth_cmd_buffer *iob;
2175
2176 QETH_DBF_TEXT(SETUP, 2, "cmenable");
2177
2178 iob = qeth_wait_for_buffer(&card->write);
2179 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
2180 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
2181 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2182 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
2183 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
2184
2185 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
2186 qeth_cm_enable_cb, NULL);
2187 return rc;
2188}
2189
2190static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2191 unsigned long data)
2192{
2193
2194 struct qeth_cmd_buffer *iob;
2195
2196 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
2197
2198 iob = (struct qeth_cmd_buffer *) data;
2199 memcpy(&card->token.cm_connection_r,
2200 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
2201 QETH_MPC_TOKEN_LENGTH);
2202 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2203 return 0;
2204}
2205
2206static int qeth_cm_setup(struct qeth_card *card)
2207{
2208 int rc;
2209 struct qeth_cmd_buffer *iob;
2210
2211 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
2212
2213 iob = qeth_wait_for_buffer(&card->write);
2214 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
2215 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
2216 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
2217 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
2218 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
2219 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
2220 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
2221 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
2222 qeth_cm_setup_cb, NULL);
2223 return rc;
2224
2225}
2226
2227static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
2228{
2229 switch (card->info.type) {
2230 case QETH_CARD_TYPE_UNKNOWN:
2231 return 1500;
2232 case QETH_CARD_TYPE_IQD:
2233 return card->info.max_mtu;
2234 case QETH_CARD_TYPE_OSD:
2235 switch (card->info.link_type) {
2236 case QETH_LINK_TYPE_HSTR:
2237 case QETH_LINK_TYPE_LANE_TR:
2238 return 2000;
2239 default:
2240 return card->options.layer2 ? 1500 : 1492;
2241 }
2242 case QETH_CARD_TYPE_OSM:
2243 case QETH_CARD_TYPE_OSX:
2244 return card->options.layer2 ? 1500 : 1492;
2245 default:
2246 return 1500;
2247 }
2248}
2249
2250static inline int qeth_get_mtu_outof_framesize(int framesize)
2251{
2252 switch (framesize) {
2253 case 0x4000:
2254 return 8192;
2255 case 0x6000:
2256 return 16384;
2257 case 0xa000:
2258 return 32768;
2259 case 0xffff:
2260 return 57344;
2261 default:
2262 return 0;
2263 }
2264}
2265
2266static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
2267{
2268 switch (card->info.type) {
2269 case QETH_CARD_TYPE_OSD:
2270 case QETH_CARD_TYPE_OSM:
2271 case QETH_CARD_TYPE_OSX:
2272 case QETH_CARD_TYPE_IQD:
2273 return ((mtu >= 576) &&
2274 (mtu <= card->info.max_mtu));
2275 case QETH_CARD_TYPE_OSN:
2276 case QETH_CARD_TYPE_UNKNOWN:
2277 default:
2278 return 1;
2279 }
2280}
2281
2282static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
2283 unsigned long data)
2284{
2285
2286 __u16 mtu, framesize;
2287 __u16 len;
2288 __u8 link_type;
2289 struct qeth_cmd_buffer *iob;
2290
2291 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
2292
2293 iob = (struct qeth_cmd_buffer *) data;
2294 memcpy(&card->token.ulp_filter_r,
2295 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
2296 QETH_MPC_TOKEN_LENGTH);
2297 if (card->info.type == QETH_CARD_TYPE_IQD) {
2298 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
2299 mtu = qeth_get_mtu_outof_framesize(framesize);
2300 if (!mtu) {
2301 iob->rc = -EINVAL;
2302 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2303 return 0;
2304 }
2305 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
2306
2307 if (card->dev &&
2308 ((card->dev->mtu == card->info.initial_mtu) ||
2309 (card->dev->mtu > mtu)))
2310 card->dev->mtu = mtu;
2311 qeth_free_qdio_buffers(card);
2312 }
2313 card->info.initial_mtu = mtu;
2314 card->info.max_mtu = mtu;
2315 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
2316 } else {
2317 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
2318 iob->data);
2319 card->info.initial_mtu = min(card->info.max_mtu,
2320 qeth_get_initial_mtu_for_card(card));
2321 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
2322 }
2323
2324 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
2325 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
2326 memcpy(&link_type,
2327 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
2328 card->info.link_type = link_type;
2329 } else
2330 card->info.link_type = 0;
2331 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
2332 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2333 return 0;
2334}
2335
2336static int qeth_ulp_enable(struct qeth_card *card)
2337{
2338 int rc;
2339 char prot_type;
2340 struct qeth_cmd_buffer *iob;
2341
2342
2343 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
2344
2345 iob = qeth_wait_for_buffer(&card->write);
2346 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
2347
2348 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
2349 (__u8) card->info.portno;
2350 if (card->options.layer2)
2351 if (card->info.type == QETH_CARD_TYPE_OSN)
2352 prot_type = QETH_PROT_OSN2;
2353 else
2354 prot_type = QETH_PROT_LAYER2;
2355 else
2356 prot_type = QETH_PROT_TCPIP;
2357
2358 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
2359 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
2360 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2361 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
2362 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
2363 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
2364 card->info.portname, 9);
2365 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
2366 qeth_ulp_enable_cb, NULL);
2367 return rc;
2368
2369}
2370
2371static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2372 unsigned long data)
2373{
2374 struct qeth_cmd_buffer *iob;
2375
2376 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2377
2378 iob = (struct qeth_cmd_buffer *) data;
2379 memcpy(&card->token.ulp_connection_r,
2380 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2381 QETH_MPC_TOKEN_LENGTH);
2382 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2383 3)) {
2384 QETH_DBF_TEXT(SETUP, 2, "olmlimit");
2385 dev_err(&card->gdev->dev, "A connection could not be "
2386 "established because of an OLM limit\n");
2387 iob->rc = -EMLINK;
2388 }
2389 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2390 return 0;
2391}
2392
2393static int qeth_ulp_setup(struct qeth_card *card)
2394{
2395 int rc;
2396 __u16 temp;
2397 struct qeth_cmd_buffer *iob;
2398 struct ccw_dev_id dev_id;
2399
2400 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2401
2402 iob = qeth_wait_for_buffer(&card->write);
2403 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2404
2405 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2406 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2407 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2408 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2409 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2410 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2411
2412 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2413 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2414 temp = (card->info.cula << 8) + card->info.unit_addr2;
2415 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2416 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2417 qeth_ulp_setup_cb, NULL);
2418 return rc;
2419}
2420
2421static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
2422{
2423 int rc;
2424 struct qeth_qdio_out_buffer *newbuf;
2425
2426 rc = 0;
2427 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
2428 if (!newbuf) {
2429 rc = -ENOMEM;
2430 goto out;
2431 }
2432 newbuf->buffer = q->qdio_bufs[bidx];
2433 skb_queue_head_init(&newbuf->skb_list);
2434 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
2435 newbuf->q = q;
2436 newbuf->aob = NULL;
2437 newbuf->next_pending = q->bufs[bidx];
2438 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
2439 q->bufs[bidx] = newbuf;
2440 if (q->bufstates) {
2441 q->bufstates[bidx].user = newbuf;
2442 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
2443 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
2444 QETH_CARD_TEXT_(q->card, 2, "%lx",
2445 (long) newbuf->next_pending);
2446 }
2447out:
2448 return rc;
2449}
2450
2451static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
2452{
2453 if (!q)
2454 return;
2455
2456 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
2457 kfree(q);
2458}
2459
2460static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
2461{
2462 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
2463
2464 if (!q)
2465 return NULL;
2466
2467 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
2468 kfree(q);
2469 return NULL;
2470 }
2471 return q;
2472}
2473
2474static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2475{
2476 int i, j;
2477
2478 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2479
2480 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2481 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2482 return 0;
2483
2484 QETH_DBF_TEXT(SETUP, 2, "inq");
2485 card->qdio.in_q = qeth_alloc_qdio_queue();
2486 if (!card->qdio.in_q)
2487 goto out_nomem;
2488
2489
2490 if (qeth_alloc_buffer_pool(card))
2491 goto out_freeinq;
2492
2493
2494 card->qdio.out_qs =
2495 kzalloc(card->qdio.no_out_queues *
2496 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2497 if (!card->qdio.out_qs)
2498 goto out_freepool;
2499 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2500 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
2501 if (!card->qdio.out_qs[i])
2502 goto out_freeoutq;
2503 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2504 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2505 card->qdio.out_qs[i]->queue_no = i;
2506
2507 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2508 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
2509 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
2510 goto out_freeoutqbufs;
2511 }
2512 }
2513
2514
2515 if (qeth_alloc_cq(card))
2516 goto out_freeoutq;
2517
2518 return 0;
2519
2520out_freeoutqbufs:
2521 while (j > 0) {
2522 --j;
2523 kmem_cache_free(qeth_qdio_outbuf_cache,
2524 card->qdio.out_qs[i]->bufs[j]);
2525 card->qdio.out_qs[i]->bufs[j] = NULL;
2526 }
2527out_freeoutq:
2528 while (i > 0) {
2529 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
2530 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2531 }
2532 kfree(card->qdio.out_qs);
2533 card->qdio.out_qs = NULL;
2534out_freepool:
2535 qeth_free_buffer_pool(card);
2536out_freeinq:
2537 qeth_free_qdio_queue(card->qdio.in_q);
2538 card->qdio.in_q = NULL;
2539out_nomem:
2540 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2541 return -ENOMEM;
2542}
2543
2544static void qeth_free_qdio_buffers(struct qeth_card *card)
2545{
2546 int i, j;
2547
2548 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
2549 QETH_QDIO_UNINITIALIZED)
2550 return;
2551
2552 qeth_free_cq(card);
2553 cancel_delayed_work_sync(&card->buffer_reclaim_work);
2554 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2555 if (card->qdio.in_q->bufs[j].rx_skb)
2556 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
2557 }
2558 qeth_free_qdio_queue(card->qdio.in_q);
2559 card->qdio.in_q = NULL;
2560
2561 qeth_free_buffer_pool(card);
2562
2563 if (card->qdio.out_qs) {
2564 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2565 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
2566 qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
2567 }
2568 kfree(card->qdio.out_qs);
2569 card->qdio.out_qs = NULL;
2570 }
2571}
2572
2573static void qeth_create_qib_param_field(struct qeth_card *card,
2574 char *param_field)
2575{
2576
2577 param_field[0] = _ascebc['P'];
2578 param_field[1] = _ascebc['C'];
2579 param_field[2] = _ascebc['I'];
2580 param_field[3] = _ascebc['T'];
2581 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2582 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2583 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2584}
2585
2586static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2587 char *param_field)
2588{
2589 param_field[16] = _ascebc['B'];
2590 param_field[17] = _ascebc['L'];
2591 param_field[18] = _ascebc['K'];
2592 param_field[19] = _ascebc['T'];
2593 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2594 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2595 *((unsigned int *) (¶m_field[28])) =
2596 card->info.blkt.inter_packet_jumbo;
2597}
2598
2599static int qeth_qdio_activate(struct qeth_card *card)
2600{
2601 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2602 return qdio_activate(CARD_DDEV(card));
2603}
2604
2605static int qeth_dm_act(struct qeth_card *card)
2606{
2607 int rc;
2608 struct qeth_cmd_buffer *iob;
2609
2610 QETH_DBF_TEXT(SETUP, 2, "dmact");
2611
2612 iob = qeth_wait_for_buffer(&card->write);
2613 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2614
2615 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2616 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2617 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2618 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2619 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2620 return rc;
2621}
2622
2623static int qeth_mpc_initialize(struct qeth_card *card)
2624{
2625 int rc;
2626
2627 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2628
2629 rc = qeth_issue_next_read(card);
2630 if (rc) {
2631 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2632 return rc;
2633 }
2634 rc = qeth_cm_enable(card);
2635 if (rc) {
2636 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2637 goto out_qdio;
2638 }
2639 rc = qeth_cm_setup(card);
2640 if (rc) {
2641 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2642 goto out_qdio;
2643 }
2644 rc = qeth_ulp_enable(card);
2645 if (rc) {
2646 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2647 goto out_qdio;
2648 }
2649 rc = qeth_ulp_setup(card);
2650 if (rc) {
2651 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2652 goto out_qdio;
2653 }
2654 rc = qeth_alloc_qdio_buffers(card);
2655 if (rc) {
2656 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2657 goto out_qdio;
2658 }
2659 rc = qeth_qdio_establish(card);
2660 if (rc) {
2661 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2662 qeth_free_qdio_buffers(card);
2663 goto out_qdio;
2664 }
2665 rc = qeth_qdio_activate(card);
2666 if (rc) {
2667 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2668 goto out_qdio;
2669 }
2670 rc = qeth_dm_act(card);
2671 if (rc) {
2672 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2673 goto out_qdio;
2674 }
2675
2676 return 0;
2677out_qdio:
2678 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2679 qdio_free(CARD_DDEV(card));
2680 return rc;
2681}
2682
2683static void qeth_print_status_with_portname(struct qeth_card *card)
2684{
2685 char dbf_text[15];
2686 int i;
2687
2688 sprintf(dbf_text, "%s", card->info.portname + 1);
2689 for (i = 0; i < 8; i++)
2690 dbf_text[i] =
2691 (char) _ebcasc[(__u8) dbf_text[i]];
2692 dbf_text[8] = 0;
2693 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2694 "with link type %s (portname: %s)\n",
2695 qeth_get_cardname(card),
2696 (card->info.mcl_level[0]) ? " (level: " : "",
2697 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2698 (card->info.mcl_level[0]) ? ")" : "",
2699 qeth_get_cardname_short(card),
2700 dbf_text);
2701
2702}
2703
2704static void qeth_print_status_no_portname(struct qeth_card *card)
2705{
2706 if (card->info.portname[0])
2707 dev_info(&card->gdev->dev, "Device is a%s "
2708 "card%s%s%s\nwith link type %s "
2709 "(no portname needed by interface).\n",
2710 qeth_get_cardname(card),
2711 (card->info.mcl_level[0]) ? " (level: " : "",
2712 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2713 (card->info.mcl_level[0]) ? ")" : "",
2714 qeth_get_cardname_short(card));
2715 else
2716 dev_info(&card->gdev->dev, "Device is a%s "
2717 "card%s%s%s\nwith link type %s.\n",
2718 qeth_get_cardname(card),
2719 (card->info.mcl_level[0]) ? " (level: " : "",
2720 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2721 (card->info.mcl_level[0]) ? ")" : "",
2722 qeth_get_cardname_short(card));
2723}
2724
2725void qeth_print_status_message(struct qeth_card *card)
2726{
2727 switch (card->info.type) {
2728 case QETH_CARD_TYPE_OSD:
2729 case QETH_CARD_TYPE_OSM:
2730 case QETH_CARD_TYPE_OSX:
2731
2732
2733
2734
2735 if (!card->info.mcl_level[0]) {
2736 sprintf(card->info.mcl_level, "%02x%02x",
2737 card->info.mcl_level[2],
2738 card->info.mcl_level[3]);
2739
2740 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2741 break;
2742 }
2743
2744 case QETH_CARD_TYPE_IQD:
2745 if ((card->info.guestlan) ||
2746 (card->info.mcl_level[0] & 0x80)) {
2747 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2748 card->info.mcl_level[0]];
2749 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2750 card->info.mcl_level[1]];
2751 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2752 card->info.mcl_level[2]];
2753 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2754 card->info.mcl_level[3]];
2755 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2756 }
2757 break;
2758 default:
2759 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2760 }
2761 if (card->info.portname_required)
2762 qeth_print_status_with_portname(card);
2763 else
2764 qeth_print_status_no_portname(card);
2765}
2766EXPORT_SYMBOL_GPL(qeth_print_status_message);
2767
2768static void qeth_initialize_working_pool_list(struct qeth_card *card)
2769{
2770 struct qeth_buffer_pool_entry *entry;
2771
2772 QETH_CARD_TEXT(card, 5, "inwrklst");
2773
2774 list_for_each_entry(entry,
2775 &card->qdio.init_pool.entry_list, init_list) {
2776 qeth_put_buffer_pool_entry(card, entry);
2777 }
2778}
2779
2780static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2781 struct qeth_card *card)
2782{
2783 struct list_head *plh;
2784 struct qeth_buffer_pool_entry *entry;
2785 int i, free;
2786 struct page *page;
2787
2788 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2789 return NULL;
2790
2791 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2792 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2793 free = 1;
2794 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2795 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2796 free = 0;
2797 break;
2798 }
2799 }
2800 if (free) {
2801 list_del_init(&entry->list);
2802 return entry;
2803 }
2804 }
2805
2806
2807 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2808 struct qeth_buffer_pool_entry, list);
2809 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2810 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2811 page = alloc_page(GFP_ATOMIC);
2812 if (!page) {
2813 return NULL;
2814 } else {
2815 free_page((unsigned long)entry->elements[i]);
2816 entry->elements[i] = page_address(page);
2817 if (card->options.performance_stats)
2818 card->perf_stats.sg_alloc_page_rx++;
2819 }
2820 }
2821 }
2822 list_del_init(&entry->list);
2823 return entry;
2824}
2825
2826static int qeth_init_input_buffer(struct qeth_card *card,
2827 struct qeth_qdio_buffer *buf)
2828{
2829 struct qeth_buffer_pool_entry *pool_entry;
2830 int i;
2831
2832 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
2833 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
2834 if (!buf->rx_skb)
2835 return 1;
2836 }
2837
2838 pool_entry = qeth_find_free_buffer_pool_entry(card);
2839 if (!pool_entry)
2840 return 1;
2841
2842
2843
2844
2845
2846
2847
2848
2849 buf->pool_entry = pool_entry;
2850 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2851 buf->buffer->element[i].length = PAGE_SIZE;
2852 buf->buffer->element[i].addr = pool_entry->elements[i];
2853 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2854 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
2855 else
2856 buf->buffer->element[i].eflags = 0;
2857 buf->buffer->element[i].sflags = 0;
2858 }
2859 return 0;
2860}
2861
2862int qeth_init_qdio_queues(struct qeth_card *card)
2863{
2864 int i, j;
2865 int rc;
2866
2867 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2868
2869
2870 qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
2871 QDIO_MAX_BUFFERS_PER_Q);
2872 qeth_initialize_working_pool_list(card);
2873
2874 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2875 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2876 card->qdio.in_q->next_buf_to_init =
2877 card->qdio.in_buf_pool.buf_count - 1;
2878 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2879 card->qdio.in_buf_pool.buf_count - 1);
2880 if (rc) {
2881 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2882 return rc;
2883 }
2884
2885
2886 rc = qeth_cq_init(card);
2887 if (rc) {
2888 return rc;
2889 }
2890
2891
2892 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2893 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
2894 QDIO_MAX_BUFFERS_PER_Q);
2895 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2896 qeth_clear_output_buffer(card->qdio.out_qs[i],
2897 card->qdio.out_qs[i]->bufs[j],
2898 QETH_QDIO_BUF_EMPTY);
2899 }
2900 card->qdio.out_qs[i]->card = card;
2901 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2902 card->qdio.out_qs[i]->do_pack = 0;
2903 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2904 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2905 atomic_set(&card->qdio.out_qs[i]->state,
2906 QETH_OUT_Q_UNLOCKED);
2907 }
2908 return 0;
2909}
2910EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2911
2912static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2913{
2914 switch (link_type) {
2915 case QETH_LINK_TYPE_HSTR:
2916 return 2;
2917 default:
2918 return 1;
2919 }
2920}
2921
2922static void qeth_fill_ipacmd_header(struct qeth_card *card,
2923 struct qeth_ipa_cmd *cmd, __u8 command,
2924 enum qeth_prot_versions prot)
2925{
2926 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2927 cmd->hdr.command = command;
2928 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2929 cmd->hdr.seqno = card->seqno.ipa;
2930 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2931 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2932 if (card->options.layer2)
2933 cmd->hdr.prim_version_no = 2;
2934 else
2935 cmd->hdr.prim_version_no = 1;
2936 cmd->hdr.param_count = 1;
2937 cmd->hdr.prot_version = prot;
2938 cmd->hdr.ipa_supported = 0;
2939 cmd->hdr.ipa_enabled = 0;
2940}
2941
2942struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2943 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2944{
2945 struct qeth_cmd_buffer *iob;
2946 struct qeth_ipa_cmd *cmd;
2947
2948 iob = qeth_get_buffer(&card->write);
2949 if (iob) {
2950 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2951 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2952 } else {
2953 dev_warn(&card->gdev->dev,
2954 "The qeth driver ran out of channel command buffers\n");
2955 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
2956 dev_name(&card->gdev->dev));
2957 }
2958
2959 return iob;
2960}
2961EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2962
2963void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2964 char prot_type)
2965{
2966 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2967 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2968 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2969 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2970}
2971EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2972
2973
2974
2975
2976
2977
2978
2979int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2980 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2981 unsigned long),
2982 void *reply_param)
2983{
2984 int rc;
2985 char prot_type;
2986
2987 QETH_CARD_TEXT(card, 4, "sendipa");
2988
2989 if (card->options.layer2)
2990 if (card->info.type == QETH_CARD_TYPE_OSN)
2991 prot_type = QETH_PROT_OSN2;
2992 else
2993 prot_type = QETH_PROT_LAYER2;
2994 else
2995 prot_type = QETH_PROT_TCPIP;
2996 qeth_prepare_ipa_cmd(card, iob, prot_type);
2997 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2998 iob, reply_cb, reply_param);
2999 if (rc == -ETIME) {
3000 qeth_clear_ipacmd_list(card);
3001 qeth_schedule_recovery(card);
3002 }
3003 return rc;
3004}
3005EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
3006
3007int qeth_send_startlan(struct qeth_card *card)
3008{
3009 int rc;
3010 struct qeth_cmd_buffer *iob;
3011
3012 QETH_DBF_TEXT(SETUP, 2, "strtlan");
3013
3014 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
3015 if (!iob)
3016 return -ENOMEM;
3017 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
3018 return rc;
3019}
3020EXPORT_SYMBOL_GPL(qeth_send_startlan);
3021
3022static int qeth_default_setadapterparms_cb(struct qeth_card *card,
3023 struct qeth_reply *reply, unsigned long data)
3024{
3025 struct qeth_ipa_cmd *cmd;
3026
3027 QETH_CARD_TEXT(card, 4, "defadpcb");
3028
3029 cmd = (struct qeth_ipa_cmd *) data;
3030 if (cmd->hdr.return_code == 0)
3031 cmd->hdr.return_code =
3032 cmd->data.setadapterparms.hdr.return_code;
3033 return 0;
3034}
3035
3036static int qeth_query_setadapterparms_cb(struct qeth_card *card,
3037 struct qeth_reply *reply, unsigned long data)
3038{
3039 struct qeth_ipa_cmd *cmd;
3040
3041 QETH_CARD_TEXT(card, 3, "quyadpcb");
3042
3043 cmd = (struct qeth_ipa_cmd *) data;
3044 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
3045 card->info.link_type =
3046 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
3047 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
3048 }
3049 card->options.adp.supported_funcs =
3050 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
3051 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3052}
3053
3054static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
3055 __u32 command, __u32 cmdlen)
3056{
3057 struct qeth_cmd_buffer *iob;
3058 struct qeth_ipa_cmd *cmd;
3059
3060 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
3061 QETH_PROT_IPV4);
3062 if (iob) {
3063 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3064 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
3065 cmd->data.setadapterparms.hdr.command_code = command;
3066 cmd->data.setadapterparms.hdr.used_total = 1;
3067 cmd->data.setadapterparms.hdr.seq_no = 1;
3068 }
3069
3070 return iob;
3071}
3072
3073int qeth_query_setadapterparms(struct qeth_card *card)
3074{
3075 int rc;
3076 struct qeth_cmd_buffer *iob;
3077
3078 QETH_CARD_TEXT(card, 3, "queryadp");
3079 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
3080 sizeof(struct qeth_ipacmd_setadpparms));
3081 if (!iob)
3082 return -ENOMEM;
3083 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
3084 return rc;
3085}
3086EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
3087
3088static int qeth_query_ipassists_cb(struct qeth_card *card,
3089 struct qeth_reply *reply, unsigned long data)
3090{
3091 struct qeth_ipa_cmd *cmd;
3092
3093 QETH_DBF_TEXT(SETUP, 2, "qipasscb");
3094
3095 cmd = (struct qeth_ipa_cmd *) data;
3096
3097 switch (cmd->hdr.return_code) {
3098 case IPA_RC_NOTSUPP:
3099 case IPA_RC_L2_UNSUPPORTED_CMD:
3100 QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
3101 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
3102 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
3103 return -0;
3104 default:
3105 if (cmd->hdr.return_code) {
3106 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
3107 "rc=%d\n",
3108 dev_name(&card->gdev->dev),
3109 cmd->hdr.return_code);
3110 return 0;
3111 }
3112 }
3113
3114 if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
3115 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
3116 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
3117 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
3118 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
3119 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
3120 } else
3121 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
3122 "\n", dev_name(&card->gdev->dev));
3123 return 0;
3124}
3125
3126int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
3127{
3128 int rc;
3129 struct qeth_cmd_buffer *iob;
3130
3131 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
3132 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
3133 if (!iob)
3134 return -ENOMEM;
3135 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
3136 return rc;
3137}
3138EXPORT_SYMBOL_GPL(qeth_query_ipassists);
3139
3140static int qeth_query_switch_attributes_cb(struct qeth_card *card,
3141 struct qeth_reply *reply, unsigned long data)
3142{
3143 struct qeth_ipa_cmd *cmd;
3144 struct qeth_switch_info *sw_info;
3145 struct qeth_query_switch_attributes *attrs;
3146
3147 QETH_CARD_TEXT(card, 2, "qswiatcb");
3148 cmd = (struct qeth_ipa_cmd *) data;
3149 sw_info = (struct qeth_switch_info *)reply->param;
3150 if (cmd->data.setadapterparms.hdr.return_code == 0) {
3151 attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
3152 sw_info->capabilities = attrs->capabilities;
3153 sw_info->settings = attrs->settings;
3154 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
3155 sw_info->settings);
3156 }
3157 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3158
3159 return 0;
3160}
3161
3162int qeth_query_switch_attributes(struct qeth_card *card,
3163 struct qeth_switch_info *sw_info)
3164{
3165 struct qeth_cmd_buffer *iob;
3166
3167 QETH_CARD_TEXT(card, 2, "qswiattr");
3168 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
3169 return -EOPNOTSUPP;
3170 if (!netif_carrier_ok(card->dev))
3171 return -ENOMEDIUM;
3172 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
3173 sizeof(struct qeth_ipacmd_setadpparms_hdr));
3174 if (!iob)
3175 return -ENOMEM;
3176 return qeth_send_ipa_cmd(card, iob,
3177 qeth_query_switch_attributes_cb, sw_info);
3178}
3179EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
3180
3181static int qeth_query_setdiagass_cb(struct qeth_card *card,
3182 struct qeth_reply *reply, unsigned long data)
3183{
3184 struct qeth_ipa_cmd *cmd;
3185 __u16 rc;
3186
3187 cmd = (struct qeth_ipa_cmd *)data;
3188 rc = cmd->hdr.return_code;
3189 if (rc)
3190 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
3191 else
3192 card->info.diagass_support = cmd->data.diagass.ext;
3193 return 0;
3194}
3195
3196static int qeth_query_setdiagass(struct qeth_card *card)
3197{
3198 struct qeth_cmd_buffer *iob;
3199 struct qeth_ipa_cmd *cmd;
3200
3201 QETH_DBF_TEXT(SETUP, 2, "qdiagass");
3202 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3203 if (!iob)
3204 return -ENOMEM;
3205 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3206 cmd->data.diagass.subcmd_len = 16;
3207 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
3208 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
3209}
3210
3211static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
3212{
3213 unsigned long info = get_zeroed_page(GFP_KERNEL);
3214 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
3215 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
3216 struct ccw_dev_id ccwid;
3217 int level;
3218
3219 tid->chpid = card->info.chpid;
3220 ccw_device_get_id(CARD_RDEV(card), &ccwid);
3221 tid->ssid = ccwid.ssid;
3222 tid->devno = ccwid.devno;
3223 if (!info)
3224 return;
3225 level = stsi(NULL, 0, 0, 0);
3226 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
3227 tid->lparnr = info222->lpar_number;
3228 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
3229 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
3230 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
3231 }
3232 free_page(info);
3233 return;
3234}
3235
3236static int qeth_hw_trap_cb(struct qeth_card *card,
3237 struct qeth_reply *reply, unsigned long data)
3238{
3239 struct qeth_ipa_cmd *cmd;
3240 __u16 rc;
3241
3242 cmd = (struct qeth_ipa_cmd *)data;
3243 rc = cmd->hdr.return_code;
3244 if (rc)
3245 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
3246 return 0;
3247}
3248
3249int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
3250{
3251 struct qeth_cmd_buffer *iob;
3252 struct qeth_ipa_cmd *cmd;
3253
3254 QETH_DBF_TEXT(SETUP, 2, "diagtrap");
3255 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
3256 if (!iob)
3257 return -ENOMEM;
3258 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3259 cmd->data.diagass.subcmd_len = 80;
3260 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
3261 cmd->data.diagass.type = 1;
3262 cmd->data.diagass.action = action;
3263 switch (action) {
3264 case QETH_DIAGS_TRAP_ARM:
3265 cmd->data.diagass.options = 0x0003;
3266 cmd->data.diagass.ext = 0x00010000 +
3267 sizeof(struct qeth_trap_id);
3268 qeth_get_trap_id(card,
3269 (struct qeth_trap_id *)cmd->data.diagass.cdata);
3270 break;
3271 case QETH_DIAGS_TRAP_DISARM:
3272 cmd->data.diagass.options = 0x0001;
3273 break;
3274 case QETH_DIAGS_TRAP_CAPTURE:
3275 break;
3276 }
3277 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
3278}
3279EXPORT_SYMBOL_GPL(qeth_hw_trap);
3280
3281int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf,
3282 unsigned int qdio_error, const char *dbftext)
3283{
3284 if (qdio_error) {
3285 QETH_CARD_TEXT(card, 2, dbftext);
3286 QETH_CARD_TEXT_(card, 2, " F15=%02X",
3287 buf->element[15].sflags);
3288 QETH_CARD_TEXT_(card, 2, " F14=%02X",
3289 buf->element[14].sflags);
3290 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
3291 if ((buf->element[15].sflags) == 0x12) {
3292 card->stats.rx_dropped++;
3293 return 0;
3294 } else
3295 return 1;
3296 }
3297 return 0;
3298}
3299EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
3300
3301static void qeth_buffer_reclaim_work(struct work_struct *work)
3302{
3303 struct qeth_card *card = container_of(work, struct qeth_card,
3304 buffer_reclaim_work.work);
3305
3306 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
3307 qeth_queue_input_buffer(card, card->reclaim_index);
3308}
3309
3310void qeth_queue_input_buffer(struct qeth_card *card, int index)
3311{
3312 struct qeth_qdio_q *queue = card->qdio.in_q;
3313 struct list_head *lh;
3314 int count;
3315 int i;
3316 int rc;
3317 int newcount = 0;
3318
3319 count = (index < queue->next_buf_to_init)?
3320 card->qdio.in_buf_pool.buf_count -
3321 (queue->next_buf_to_init - index) :
3322 card->qdio.in_buf_pool.buf_count -
3323 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
3324
3325 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
3326 for (i = queue->next_buf_to_init;
3327 i < queue->next_buf_to_init + count; ++i) {
3328 if (qeth_init_input_buffer(card,
3329 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
3330 break;
3331 } else {
3332 newcount++;
3333 }
3334 }
3335
3336 if (newcount < count) {
3337
3338
3339 atomic_set(&card->force_alloc_skb, 3);
3340 count = newcount;
3341 } else {
3342 atomic_add_unless(&card->force_alloc_skb, -1, 0);
3343 }
3344
3345 if (!count) {
3346 i = 0;
3347 list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
3348 i++;
3349 if (i == card->qdio.in_buf_pool.buf_count) {
3350 QETH_CARD_TEXT(card, 2, "qsarbw");
3351 card->reclaim_index = index;
3352 schedule_delayed_work(
3353 &card->buffer_reclaim_work,
3354 QETH_RECLAIM_WORK_TIME);
3355 }
3356 return;
3357 }
3358
3359
3360
3361
3362
3363
3364
3365
3366 if (card->options.performance_stats) {
3367 card->perf_stats.inbound_do_qdio_cnt++;
3368 card->perf_stats.inbound_do_qdio_start_time =
3369 qeth_get_micros();
3370 }
3371 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
3372 queue->next_buf_to_init, count);
3373 if (card->options.performance_stats)
3374 card->perf_stats.inbound_do_qdio_time +=
3375 qeth_get_micros() -
3376 card->perf_stats.inbound_do_qdio_start_time;
3377 if (rc) {
3378 QETH_CARD_TEXT(card, 2, "qinberr");
3379 }
3380 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
3381 QDIO_MAX_BUFFERS_PER_Q;
3382 }
3383}
3384EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
3385
3386static int qeth_handle_send_error(struct qeth_card *card,
3387 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
3388{
3389 int sbalf15 = buffer->buffer->element[15].sflags;
3390
3391 QETH_CARD_TEXT(card, 6, "hdsnderr");
3392 if (card->info.type == QETH_CARD_TYPE_IQD) {
3393 if (sbalf15 == 0) {
3394 qdio_err = 0;
3395 } else {
3396 qdio_err = 1;
3397 }
3398 }
3399 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
3400
3401 if (!qdio_err)
3402 return QETH_SEND_ERROR_NONE;
3403
3404 if ((sbalf15 >= 15) && (sbalf15 <= 31))
3405 return QETH_SEND_ERROR_RETRY;
3406
3407 QETH_CARD_TEXT(card, 1, "lnkfail");
3408 QETH_CARD_TEXT_(card, 1, "%04x %02x",
3409 (u16)qdio_err, (u8)sbalf15);
3410 return QETH_SEND_ERROR_LINK_FAILURE;
3411}
3412
3413
3414
3415
3416
3417static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
3418{
3419 if (!queue->do_pack) {
3420 if (atomic_read(&queue->used_buffers)
3421 >= QETH_HIGH_WATERMARK_PACK){
3422
3423 QETH_CARD_TEXT(queue->card, 6, "np->pack");
3424 if (queue->card->options.performance_stats)
3425 queue->card->perf_stats.sc_dp_p++;
3426 queue->do_pack = 1;
3427 }
3428 }
3429}
3430
3431
3432
3433
3434
3435
3436
3437static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
3438{
3439 struct qeth_qdio_out_buffer *buffer;
3440 int flush_count = 0;
3441
3442 if (queue->do_pack) {
3443 if (atomic_read(&queue->used_buffers)
3444 <= QETH_LOW_WATERMARK_PACK) {
3445
3446 QETH_CARD_TEXT(queue->card, 6, "pack->np");
3447 if (queue->card->options.performance_stats)
3448 queue->card->perf_stats.sc_p_dp++;
3449 queue->do_pack = 0;
3450
3451 buffer = queue->bufs[queue->next_buf_to_fill];
3452 if ((atomic_read(&buffer->state) ==
3453 QETH_QDIO_BUF_EMPTY) &&
3454 (buffer->next_element_to_fill > 0)) {
3455 atomic_set(&buffer->state,
3456 QETH_QDIO_BUF_PRIMED);
3457 flush_count++;
3458 queue->next_buf_to_fill =
3459 (queue->next_buf_to_fill + 1) %
3460 QDIO_MAX_BUFFERS_PER_Q;
3461 }
3462 }
3463 }
3464 return flush_count;
3465}
3466
3467
3468
3469
3470
3471
3472
3473static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
3474{
3475 struct qeth_qdio_out_buffer *buffer;
3476
3477 buffer = queue->bufs[queue->next_buf_to_fill];
3478 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
3479 (buffer->next_element_to_fill > 0)) {
3480
3481 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
3482 queue->next_buf_to_fill =
3483 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
3484 return 1;
3485 }
3486 return 0;
3487}
3488
3489static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
3490 int count)
3491{
3492 struct qeth_qdio_out_buffer *buf;
3493 int rc;
3494 int i;
3495 unsigned int qdio_flags;
3496
3497 for (i = index; i < index + count; ++i) {
3498 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3499 buf = queue->bufs[bidx];
3500 buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
3501 SBAL_EFLAGS_LAST_ENTRY;
3502
3503 if (queue->bufstates)
3504 queue->bufstates[bidx].user = buf;
3505
3506 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
3507 continue;
3508
3509 if (!queue->do_pack) {
3510 if ((atomic_read(&queue->used_buffers) >=
3511 (QETH_HIGH_WATERMARK_PACK -
3512 QETH_WATERMARK_PACK_FUZZ)) &&
3513 !atomic_read(&queue->set_pci_flags_count)) {
3514
3515
3516 atomic_inc(&queue->set_pci_flags_count);
3517 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3518 }
3519 } else {
3520 if (!atomic_read(&queue->set_pci_flags_count)) {
3521
3522
3523
3524
3525
3526
3527
3528
3529 atomic_inc(&queue->set_pci_flags_count);
3530 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
3531 }
3532 }
3533 }
3534
3535 queue->card->dev->trans_start = jiffies;
3536 if (queue->card->options.performance_stats) {
3537 queue->card->perf_stats.outbound_do_qdio_cnt++;
3538 queue->card->perf_stats.outbound_do_qdio_start_time =
3539 qeth_get_micros();
3540 }
3541 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
3542 if (atomic_read(&queue->set_pci_flags_count))
3543 qdio_flags |= QDIO_FLAG_PCI_OUT;
3544 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
3545 queue->queue_no, index, count);
3546 if (queue->card->options.performance_stats)
3547 queue->card->perf_stats.outbound_do_qdio_time +=
3548 qeth_get_micros() -
3549 queue->card->perf_stats.outbound_do_qdio_start_time;
3550 atomic_add(count, &queue->used_buffers);
3551 if (rc) {
3552 queue->card->stats.tx_errors += count;
3553
3554 if (rc == -ENOBUFS)
3555 return;
3556 QETH_CARD_TEXT(queue->card, 2, "flushbuf");
3557 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
3558 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
3559 QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
3560 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
3561
3562
3563
3564 qeth_schedule_recovery(queue->card);
3565 return;
3566 }
3567 if (queue->card->options.performance_stats)
3568 queue->card->perf_stats.bufs_sent += count;
3569}
3570
3571static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
3572{
3573 int index;
3574 int flush_cnt = 0;
3575 int q_was_packing = 0;
3576
3577
3578
3579
3580
3581 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
3582 !atomic_read(&queue->set_pci_flags_count)) {
3583 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
3584 QETH_OUT_Q_UNLOCKED) {
3585
3586
3587
3588
3589
3590 netif_stop_queue(queue->card->dev);
3591 index = queue->next_buf_to_fill;
3592 q_was_packing = queue->do_pack;
3593
3594 barrier();
3595 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
3596 if (!flush_cnt &&
3597 !atomic_read(&queue->set_pci_flags_count))
3598 flush_cnt +=
3599 qeth_flush_buffers_on_no_pci(queue);
3600 if (queue->card->options.performance_stats &&
3601 q_was_packing)
3602 queue->card->perf_stats.bufs_sent_pack +=
3603 flush_cnt;
3604 if (flush_cnt)
3605 qeth_flush_buffers(queue, index, flush_cnt);
3606 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3607 }
3608 }
3609}
3610
3611void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
3612 unsigned long card_ptr)
3613{
3614 struct qeth_card *card = (struct qeth_card *)card_ptr;
3615
3616 if (card->dev && (card->dev->flags & IFF_UP))
3617 napi_schedule(&card->napi);
3618}
3619EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
3620
3621int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
3622{
3623 int rc;
3624
3625 if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
3626 rc = -1;
3627 goto out;
3628 } else {
3629 if (card->options.cq == cq) {
3630 rc = 0;
3631 goto out;
3632 }
3633
3634 if (card->state != CARD_STATE_DOWN &&
3635 card->state != CARD_STATE_RECOVER) {
3636 rc = -1;
3637 goto out;
3638 }
3639
3640 qeth_free_qdio_buffers(card);
3641 card->options.cq = cq;
3642 rc = 0;
3643 }
3644out:
3645 return rc;
3646
3647}
3648EXPORT_SYMBOL_GPL(qeth_configure_cq);
3649
3650
3651static void qeth_qdio_cq_handler(struct qeth_card *card,
3652 unsigned int qdio_err,
3653 unsigned int queue, int first_element, int count) {
3654 struct qeth_qdio_q *cq = card->qdio.c_q;
3655 int i;
3656 int rc;
3657
3658 if (!qeth_is_cq(card, queue))
3659 goto out;
3660
3661 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
3662 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
3663 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
3664
3665 if (qdio_err) {
3666 netif_stop_queue(card->dev);
3667 qeth_schedule_recovery(card);
3668 goto out;
3669 }
3670
3671 if (card->options.performance_stats) {
3672 card->perf_stats.cq_cnt++;
3673 card->perf_stats.cq_start_time = qeth_get_micros();
3674 }
3675
3676 for (i = first_element; i < first_element + count; ++i) {
3677 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3678 struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
3679 int e;
3680
3681 e = 0;
3682 while (buffer->element[e].addr) {
3683 unsigned long phys_aob_addr;
3684
3685 phys_aob_addr = (unsigned long) buffer->element[e].addr;
3686 qeth_qdio_handle_aob(card, phys_aob_addr);
3687 buffer->element[e].addr = NULL;
3688 buffer->element[e].eflags = 0;
3689 buffer->element[e].sflags = 0;
3690 buffer->element[e].length = 0;
3691
3692 ++e;
3693 }
3694
3695 buffer->element[15].eflags = 0;
3696 buffer->element[15].sflags = 0;
3697 }
3698 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
3699 card->qdio.c_q->next_buf_to_init,
3700 count);
3701 if (rc) {
3702 dev_warn(&card->gdev->dev,
3703 "QDIO reported an error, rc=%i\n", rc);
3704 QETH_CARD_TEXT(card, 2, "qcqherr");
3705 }
3706 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
3707 + count) % QDIO_MAX_BUFFERS_PER_Q;
3708
3709 netif_wake_queue(card->dev);
3710
3711 if (card->options.performance_stats) {
3712 int delta_t = qeth_get_micros();
3713 delta_t -= card->perf_stats.cq_start_time;
3714 card->perf_stats.cq_time += delta_t;
3715 }
3716out:
3717 return;
3718}
3719
3720void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
3721 unsigned int queue, int first_elem, int count,
3722 unsigned long card_ptr)
3723{
3724 struct qeth_card *card = (struct qeth_card *)card_ptr;
3725
3726 QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
3727 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
3728
3729 if (qeth_is_cq(card, queue))
3730 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
3731 else if (qdio_err)
3732 qeth_schedule_recovery(card);
3733
3734
3735}
3736EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
3737
3738void qeth_qdio_output_handler(struct ccw_device *ccwdev,
3739 unsigned int qdio_error, int __queue, int first_element,
3740 int count, unsigned long card_ptr)
3741{
3742 struct qeth_card *card = (struct qeth_card *) card_ptr;
3743 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
3744 struct qeth_qdio_out_buffer *buffer;
3745 int i;
3746
3747 QETH_CARD_TEXT(card, 6, "qdouhdl");
3748 if (qdio_error & QDIO_ERROR_FATAL) {
3749 QETH_CARD_TEXT(card, 2, "achkcond");
3750 netif_stop_queue(card->dev);
3751 qeth_schedule_recovery(card);
3752 return;
3753 }
3754 if (card->options.performance_stats) {
3755 card->perf_stats.outbound_handler_cnt++;
3756 card->perf_stats.outbound_handler_start_time =
3757 qeth_get_micros();
3758 }
3759 for (i = first_element; i < (first_element + count); ++i) {
3760 int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
3761 buffer = queue->bufs[bidx];
3762 qeth_handle_send_error(card, buffer, qdio_error);
3763
3764 if (queue->bufstates &&
3765 (queue->bufstates[bidx].flags &
3766 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
3767 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
3768
3769 if (atomic_cmpxchg(&buffer->state,
3770 QETH_QDIO_BUF_PRIMED,
3771 QETH_QDIO_BUF_PENDING) ==
3772 QETH_QDIO_BUF_PRIMED) {
3773 qeth_notify_skbs(queue, buffer,
3774 TX_NOTIFY_PENDING);
3775 }
3776 buffer->aob = queue->bufstates[bidx].aob;
3777 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
3778 QETH_CARD_TEXT(queue->card, 5, "aob");
3779 QETH_CARD_TEXT_(queue->card, 5, "%lx",
3780 virt_to_phys(buffer->aob));
3781 if (qeth_init_qdio_out_buf(queue, bidx)) {
3782 QETH_CARD_TEXT(card, 2, "outofbuf");
3783 qeth_schedule_recovery(card);
3784 }
3785 } else {
3786 if (card->options.cq == QETH_CQ_ENABLED) {
3787 enum iucv_tx_notify n;
3788
3789 n = qeth_compute_cq_notification(
3790 buffer->buffer->element[15].sflags, 0);
3791 qeth_notify_skbs(queue, buffer, n);
3792 }
3793
3794 qeth_clear_output_buffer(queue, buffer,
3795 QETH_QDIO_BUF_EMPTY);
3796 }
3797 qeth_cleanup_handled_pending(queue, bidx, 0);
3798 }
3799 atomic_sub(count, &queue->used_buffers);
3800
3801 if (card->info.type != QETH_CARD_TYPE_IQD)
3802 qeth_check_outbound_queue(queue);
3803
3804 netif_wake_queue(queue->card->dev);
3805 if (card->options.performance_stats)
3806 card->perf_stats.outbound_handler_time += qeth_get_micros() -
3807 card->perf_stats.outbound_handler_start_time;
3808}
3809EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
3810
3811
3812
3813
3814int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
3815 int ipv, int cast_type)
3816{
3817 __be16 *tci;
3818 u8 tos;
3819
3820 if (cast_type && card->info.is_multicast_different)
3821 return card->info.is_multicast_different &
3822 (card->qdio.no_out_queues - 1);
3823
3824 switch (card->qdio.do_prio_queueing) {
3825 case QETH_PRIO_Q_ING_TOS:
3826 case QETH_PRIO_Q_ING_PREC:
3827 switch (ipv) {
3828 case 4:
3829 tos = ipv4_get_dsfield(ip_hdr(skb));
3830 break;
3831 case 6:
3832 tos = ipv6_get_dsfield(ipv6_hdr(skb));
3833 break;
3834 default:
3835 return card->qdio.default_out_queue;
3836 }
3837 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
3838 return ~tos >> 6 & 3;
3839 if (tos & IPTOS_MINCOST)
3840 return 3;
3841 if (tos & IPTOS_RELIABILITY)
3842 return 2;
3843 if (tos & IPTOS_THROUGHPUT)
3844 return 1;
3845 if (tos & IPTOS_LOWDELAY)
3846 return 0;
3847 break;
3848 case QETH_PRIO_Q_ING_SKB:
3849 if (skb->priority > 5)
3850 return 0;
3851 return ~skb->priority >> 1 & 3;
3852 case QETH_PRIO_Q_ING_VLAN:
3853 tci = &((struct ethhdr *)skb->data)->h_proto;
3854 if (*tci == ETH_P_8021Q)
3855 return ~*(tci + 1) >> (VLAN_PRIO_SHIFT + 1) & 3;
3856 break;
3857 default:
3858 break;
3859 }
3860 return card->qdio.default_out_queue;
3861}
3862EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3863
3864int qeth_get_elements_for_frags(struct sk_buff *skb)
3865{
3866 int cnt, length, e, elements = 0;
3867 struct skb_frag_struct *frag;
3868 char *data;
3869
3870 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3871 frag = &skb_shinfo(skb)->frags[cnt];
3872 data = (char *)page_to_phys(skb_frag_page(frag)) +
3873 frag->page_offset;
3874 length = frag->size;
3875 e = PFN_UP((unsigned long)data + length - 1) -
3876 PFN_DOWN((unsigned long)data);
3877 elements += e;
3878 }
3879 return elements;
3880}
3881EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
3882
3883int qeth_get_elements_no(struct qeth_card *card,
3884 struct sk_buff *skb, int elems)
3885{
3886 int dlen = skb->len - skb->data_len;
3887 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) -
3888 PFN_DOWN((unsigned long)skb->data);
3889
3890 elements_needed += qeth_get_elements_for_frags(skb);
3891
3892 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3893 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3894 "(Number=%d / Length=%d). Discarded.\n",
3895 (elements_needed+elems), skb->len);
3896 return 0;
3897 }
3898 return elements_needed;
3899}
3900EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3901
3902int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
3903{
3904 int hroom, inpage, rest;
3905
3906 if (((unsigned long)skb->data & PAGE_MASK) !=
3907 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
3908 hroom = skb_headroom(skb);
3909 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
3910 rest = len - inpage;
3911 if (rest > hroom)
3912 return 1;
3913 memmove(skb->data - rest, skb->data, skb->len - skb->data_len);
3914 skb->data -= rest;
3915 skb->tail -= rest;
3916 *hdr = (struct qeth_hdr *)skb->data;
3917 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
3918 }
3919 return 0;
3920}
3921EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
3922
3923static inline void __qeth_fill_buffer(struct sk_buff *skb,
3924 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3925 int offset)
3926{
3927 int length = skb->len - skb->data_len;
3928 int length_here;
3929 int element;
3930 char *data;
3931 int first_lap, cnt;
3932 struct skb_frag_struct *frag;
3933
3934 element = *next_element_to_fill;
3935 data = skb->data;
3936 first_lap = (is_tso == 0 ? 1 : 0);
3937
3938 if (offset >= 0) {
3939 data = skb->data + offset;
3940 length -= offset;
3941 first_lap = 0;
3942 }
3943
3944 while (length > 0) {
3945
3946 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3947 if (length < length_here)
3948 length_here = length;
3949
3950 buffer->element[element].addr = data;
3951 buffer->element[element].length = length_here;
3952 length -= length_here;
3953 if (!length) {
3954 if (first_lap)
3955 if (skb_shinfo(skb)->nr_frags)
3956 buffer->element[element].eflags =
3957 SBAL_EFLAGS_FIRST_FRAG;
3958 else
3959 buffer->element[element].eflags = 0;
3960 else
3961 buffer->element[element].eflags =
3962 SBAL_EFLAGS_MIDDLE_FRAG;
3963 } else {
3964 if (first_lap)
3965 buffer->element[element].eflags =
3966 SBAL_EFLAGS_FIRST_FRAG;
3967 else
3968 buffer->element[element].eflags =
3969 SBAL_EFLAGS_MIDDLE_FRAG;
3970 }
3971 data += length_here;
3972 element++;
3973 first_lap = 0;
3974 }
3975
3976 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
3977 frag = &skb_shinfo(skb)->frags[cnt];
3978 data = (char *)page_to_phys(skb_frag_page(frag)) +
3979 frag->page_offset;
3980 length = frag->size;
3981 while (length > 0) {
3982 length_here = PAGE_SIZE -
3983 ((unsigned long) data % PAGE_SIZE);
3984 if (length < length_here)
3985 length_here = length;
3986
3987 buffer->element[element].addr = data;
3988 buffer->element[element].length = length_here;
3989 buffer->element[element].eflags =
3990 SBAL_EFLAGS_MIDDLE_FRAG;
3991 length -= length_here;
3992 data += length_here;
3993 element++;
3994 }
3995 }
3996
3997 if (buffer->element[element - 1].eflags)
3998 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
3999 *next_element_to_fill = element;
4000}
4001
4002static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
4003 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
4004 struct qeth_hdr *hdr, int offset, int hd_len)
4005{
4006 struct qdio_buffer *buffer;
4007 int flush_cnt = 0, hdr_len, large_send = 0;
4008
4009 buffer = buf->buffer;
4010 atomic_inc(&skb->users);
4011 skb_queue_tail(&buf->skb_list, skb);
4012
4013
4014 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
4015 int element = buf->next_element_to_fill;
4016
4017 hdr_len = sizeof(struct qeth_hdr_tso) +
4018 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
4019
4020 buffer->element[element].addr = skb->data;
4021 buffer->element[element].length = hdr_len;
4022 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4023 buf->next_element_to_fill++;
4024 skb->data += hdr_len;
4025 skb->len -= hdr_len;
4026 large_send = 1;
4027 }
4028
4029 if (offset >= 0) {
4030 int element = buf->next_element_to_fill;
4031 buffer->element[element].addr = hdr;
4032 buffer->element[element].length = sizeof(struct qeth_hdr) +
4033 hd_len;
4034 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
4035 buf->is_header[element] = 1;
4036 buf->next_element_to_fill++;
4037 }
4038
4039 __qeth_fill_buffer(skb, buffer, large_send,
4040 (int *)&buf->next_element_to_fill, offset);
4041
4042 if (!queue->do_pack) {
4043 QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
4044
4045 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4046 flush_cnt = 1;
4047 } else {
4048 QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
4049 if (queue->card->options.performance_stats)
4050 queue->card->perf_stats.skbs_sent_pack++;
4051 if (buf->next_element_to_fill >=
4052 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
4053
4054
4055
4056
4057 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
4058 flush_cnt = 1;
4059 }
4060 }
4061 return flush_cnt;
4062}
4063
4064int qeth_do_send_packet_fast(struct qeth_card *card,
4065 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
4066 struct qeth_hdr *hdr, int elements_needed,
4067 int offset, int hd_len)
4068{
4069 struct qeth_qdio_out_buffer *buffer;
4070 int index;
4071
4072
4073 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4074 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4075
4076 index = queue->next_buf_to_fill;
4077 buffer = queue->bufs[queue->next_buf_to_fill];
4078
4079
4080
4081
4082 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
4083 goto out;
4084 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
4085 QDIO_MAX_BUFFERS_PER_Q;
4086 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4087 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
4088 qeth_flush_buffers(queue, index, 1);
4089 return 0;
4090out:
4091 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4092 return -EBUSY;
4093}
4094EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
4095
4096int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
4097 struct sk_buff *skb, struct qeth_hdr *hdr,
4098 int elements_needed)
4099{
4100 struct qeth_qdio_out_buffer *buffer;
4101 int start_index;
4102 int flush_count = 0;
4103 int do_pack = 0;
4104 int tmp;
4105 int rc = 0;
4106
4107
4108 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
4109 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
4110 start_index = queue->next_buf_to_fill;
4111 buffer = queue->bufs[queue->next_buf_to_fill];
4112
4113
4114
4115
4116 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
4117 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
4118 return -EBUSY;
4119 }
4120
4121 qeth_switch_to_packing_if_needed(queue);
4122 if (queue->do_pack) {
4123 do_pack = 1;
4124
4125 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
4126 buffer->next_element_to_fill) < elements_needed) {
4127
4128 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
4129 flush_count++;
4130 queue->next_buf_to_fill =
4131 (queue->next_buf_to_fill + 1) %
4132 QDIO_MAX_BUFFERS_PER_Q;
4133 buffer = queue->bufs[queue->next_buf_to_fill];
4134
4135
4136 if (atomic_read(&buffer->state) !=
4137 QETH_QDIO_BUF_EMPTY) {
4138 qeth_flush_buffers(queue, start_index,
4139 flush_count);
4140 atomic_set(&queue->state,
4141 QETH_OUT_Q_UNLOCKED);
4142 return -EBUSY;
4143 }
4144 }
4145 }
4146 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
4147 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
4148 QDIO_MAX_BUFFERS_PER_Q;
4149 flush_count += tmp;
4150 if (flush_count)
4151 qeth_flush_buffers(queue, start_index, flush_count);
4152 else if (!atomic_read(&queue->set_pci_flags_count))
4153 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
4154
4155
4156
4157
4158
4159
4160 while (atomic_dec_return(&queue->state)) {
4161 flush_count = 0;
4162 start_index = queue->next_buf_to_fill;
4163
4164 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
4165
4166
4167
4168
4169 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
4170 flush_count += qeth_flush_buffers_on_no_pci(queue);
4171 if (flush_count)
4172 qeth_flush_buffers(queue, start_index, flush_count);
4173 }
4174
4175 if (queue->card->options.performance_stats && do_pack)
4176 queue->card->perf_stats.bufs_sent_pack += flush_count;
4177
4178 return rc;
4179}
4180EXPORT_SYMBOL_GPL(qeth_do_send_packet);
4181
4182static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
4183 struct qeth_reply *reply, unsigned long data)
4184{
4185 struct qeth_ipa_cmd *cmd;
4186 struct qeth_ipacmd_setadpparms *setparms;
4187
4188 QETH_CARD_TEXT(card, 4, "prmadpcb");
4189
4190 cmd = (struct qeth_ipa_cmd *) data;
4191 setparms = &(cmd->data.setadapterparms);
4192
4193 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
4194 if (cmd->hdr.return_code) {
4195 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
4196 setparms->data.mode = SET_PROMISC_MODE_OFF;
4197 }
4198 card->info.promisc_mode = setparms->data.mode;
4199 return 0;
4200}
4201
4202void qeth_setadp_promisc_mode(struct qeth_card *card)
4203{
4204 enum qeth_ipa_promisc_modes mode;
4205 struct net_device *dev = card->dev;
4206 struct qeth_cmd_buffer *iob;
4207 struct qeth_ipa_cmd *cmd;
4208
4209 QETH_CARD_TEXT(card, 4, "setprom");
4210
4211 if (((dev->flags & IFF_PROMISC) &&
4212 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
4213 (!(dev->flags & IFF_PROMISC) &&
4214 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
4215 return;
4216 mode = SET_PROMISC_MODE_OFF;
4217 if (dev->flags & IFF_PROMISC)
4218 mode = SET_PROMISC_MODE_ON;
4219 QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
4220
4221 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
4222 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
4223 if (!iob)
4224 return;
4225 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
4226 cmd->data.setadapterparms.data.mode = mode;
4227 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
4228}
4229EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
4230
4231int qeth_change_mtu(struct net_device *dev, int new_mtu)
4232{
4233 struct qeth_card *card;
4234 char dbf_text[15];
4235
4236 card = dev->ml_priv;
4237
4238 QETH_CARD_TEXT(card, 4, "chgmtu");
4239 sprintf(dbf_text, "%8x", new_mtu);
4240 QETH_CARD_TEXT(card, 4, dbf_text);
4241
4242 if (new_mtu < 64)
4243 return -EINVAL;
4244 if (new_mtu > 65535)
4245 return -EINVAL;
4246 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
4247 (!qeth_mtu_is_valid(card, new_mtu)))
4248 return -EINVAL;
4249 dev->mtu = new_mtu;
4250 return 0;
4251}
4252EXPORT_SYMBOL_GPL(qeth_change_mtu);
4253
4254struct net_device_stats *qeth_get_stats(struct net_device *dev)
4255{
4256 struct qeth_card *card;
4257
4258 card = dev->ml_priv;
4259
4260 QETH_CARD_TEXT(card, 5, "getstat");
4261
4262 return &card->stats;
4263}
4264EXPORT_SYMBOL_GPL(qeth_get_stats);
4265
4266static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
4267 struct qeth_reply *reply, unsigned long data)
4268{
4269 struct qeth_ipa_cmd *cmd;
4270
4271 QETH_CARD_TEXT(card, 4, "chgmaccb");
4272
4273 cmd = (struct qeth_ipa_cmd *) data;
4274 if (!card->options.layer2 ||
4275 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
4276 memcpy(card->dev->dev_addr,
4277 &cmd->data.setadapterparms.data.change_addr.addr,
4278 OSA_ADDR_LEN);
4279 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
4280 }
4281 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4282 return 0;
4283}
4284
4285int qeth_setadpparms_change_macaddr(struct qeth_card *card)
4286{
4287 int rc;
4288 struct qeth_cmd_buffer *iob;
4289 struct qeth_ipa_cmd *cmd;
4290
4291 QETH_CARD_TEXT(card, 4, "chgmac");
4292
4293 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
4294 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4295 sizeof(struct qeth_change_addr));
4296 if (!iob)
4297 return -ENOMEM;
4298 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4299 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
4300 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
4301 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
4302 card->dev->dev_addr, OSA_ADDR_LEN);
4303 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
4304 NULL);
4305 return rc;
4306}
4307EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
4308
4309static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
4310 struct qeth_reply *reply, unsigned long data)
4311{
4312 struct qeth_ipa_cmd *cmd;
4313 struct qeth_set_access_ctrl *access_ctrl_req;
4314 int fallback = *(int *)reply->param;
4315
4316 QETH_CARD_TEXT(card, 4, "setaccb");
4317
4318 cmd = (struct qeth_ipa_cmd *) data;
4319 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4320 QETH_DBF_TEXT_(SETUP, 2, "setaccb");
4321 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4322 QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
4323 cmd->data.setadapterparms.hdr.return_code);
4324 if (cmd->data.setadapterparms.hdr.return_code !=
4325 SET_ACCESS_CTRL_RC_SUCCESS)
4326 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
4327 card->gdev->dev.kobj.name,
4328 access_ctrl_req->subcmd_code,
4329 cmd->data.setadapterparms.hdr.return_code);
4330 switch (cmd->data.setadapterparms.hdr.return_code) {
4331 case SET_ACCESS_CTRL_RC_SUCCESS:
4332 if (card->options.isolation == ISOLATION_MODE_NONE) {
4333 dev_info(&card->gdev->dev,
4334 "QDIO data connection isolation is deactivated\n");
4335 } else {
4336 dev_info(&card->gdev->dev,
4337 "QDIO data connection isolation is activated\n");
4338 }
4339 break;
4340 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
4341 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
4342 "deactivated\n", dev_name(&card->gdev->dev));
4343 if (fallback)
4344 card->options.isolation = card->options.prev_isolation;
4345 break;
4346 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
4347 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
4348 " activated\n", dev_name(&card->gdev->dev));
4349 if (fallback)
4350 card->options.isolation = card->options.prev_isolation;
4351 break;
4352 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
4353 dev_err(&card->gdev->dev, "Adapter does not "
4354 "support QDIO data connection isolation\n");
4355 break;
4356 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
4357 dev_err(&card->gdev->dev,
4358 "Adapter is dedicated. "
4359 "QDIO data connection isolation not supported\n");
4360 if (fallback)
4361 card->options.isolation = card->options.prev_isolation;
4362 break;
4363 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
4364 dev_err(&card->gdev->dev,
4365 "TSO does not permit QDIO data connection isolation\n");
4366 if (fallback)
4367 card->options.isolation = card->options.prev_isolation;
4368 break;
4369 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
4370 dev_err(&card->gdev->dev, "The adjacent switch port does not "
4371 "support reflective relay mode\n");
4372 if (fallback)
4373 card->options.isolation = card->options.prev_isolation;
4374 break;
4375 case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
4376 dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
4377 "enabled at the adjacent switch port");
4378 if (fallback)
4379 card->options.isolation = card->options.prev_isolation;
4380 break;
4381 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
4382 dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
4383 "at the adjacent switch failed\n");
4384 break;
4385 default:
4386
4387 if (fallback)
4388 card->options.isolation = card->options.prev_isolation;
4389 break;
4390 }
4391 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4392 return 0;
4393}
4394
4395static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
4396 enum qeth_ipa_isolation_modes isolation, int fallback)
4397{
4398 int rc;
4399 struct qeth_cmd_buffer *iob;
4400 struct qeth_ipa_cmd *cmd;
4401 struct qeth_set_access_ctrl *access_ctrl_req;
4402
4403 QETH_CARD_TEXT(card, 4, "setacctl");
4404
4405 QETH_DBF_TEXT_(SETUP, 2, "setacctl");
4406 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
4407
4408 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
4409 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4410 sizeof(struct qeth_set_access_ctrl));
4411 if (!iob)
4412 return -ENOMEM;
4413 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4414 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
4415 access_ctrl_req->subcmd_code = isolation;
4416
4417 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
4418 &fallback);
4419 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
4420 return rc;
4421}
4422
4423int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
4424{
4425 int rc = 0;
4426
4427 QETH_CARD_TEXT(card, 4, "setactlo");
4428
4429 if ((card->info.type == QETH_CARD_TYPE_OSD ||
4430 card->info.type == QETH_CARD_TYPE_OSX) &&
4431 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
4432 rc = qeth_setadpparms_set_access_ctrl(card,
4433 card->options.isolation, fallback);
4434 if (rc) {
4435 QETH_DBF_MESSAGE(3,
4436 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
4437 card->gdev->dev.kobj.name,
4438 rc);
4439 rc = -EOPNOTSUPP;
4440 }
4441 } else if (card->options.isolation != ISOLATION_MODE_NONE) {
4442 card->options.isolation = ISOLATION_MODE_NONE;
4443
4444 dev_err(&card->gdev->dev, "Adapter does not "
4445 "support QDIO data connection isolation\n");
4446 rc = -EOPNOTSUPP;
4447 }
4448 return rc;
4449}
4450EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
4451
4452void qeth_tx_timeout(struct net_device *dev)
4453{
4454 struct qeth_card *card;
4455
4456 card = dev->ml_priv;
4457 QETH_CARD_TEXT(card, 4, "txtimeo");
4458 card->stats.tx_errors++;
4459 qeth_schedule_recovery(card);
4460}
4461EXPORT_SYMBOL_GPL(qeth_tx_timeout);
4462
4463int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
4464{
4465 struct qeth_card *card = dev->ml_priv;
4466 int rc = 0;
4467
4468 switch (regnum) {
4469 case MII_BMCR:
4470 rc = BMCR_FULLDPLX;
4471 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
4472 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
4473 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
4474 rc |= BMCR_SPEED100;
4475 break;
4476 case MII_BMSR:
4477 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
4478 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
4479 BMSR_100BASE4;
4480 break;
4481 case MII_PHYSID1:
4482 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
4483 dev->dev_addr[2];
4484 rc = (rc >> 5) & 0xFFFF;
4485 break;
4486 case MII_PHYSID2:
4487 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
4488 break;
4489 case MII_ADVERTISE:
4490 rc = ADVERTISE_ALL;
4491 break;
4492 case MII_LPA:
4493 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
4494 LPA_100BASE4 | LPA_LPACK;
4495 break;
4496 case MII_EXPANSION:
4497 break;
4498 case MII_DCOUNTER:
4499 break;
4500 case MII_FCSCOUNTER:
4501 break;
4502 case MII_NWAYTEST:
4503 break;
4504 case MII_RERRCOUNTER:
4505 rc = card->stats.rx_errors;
4506 break;
4507 case MII_SREVISION:
4508 break;
4509 case MII_RESV1:
4510 break;
4511 case MII_LBRERROR:
4512 break;
4513 case MII_PHYADDR:
4514 break;
4515 case MII_RESV2:
4516 break;
4517 case MII_TPISTATUS:
4518 break;
4519 case MII_NCONFIG:
4520 break;
4521 default:
4522 break;
4523 }
4524 return rc;
4525}
4526EXPORT_SYMBOL_GPL(qeth_mdio_read);
4527
4528static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
4529 struct qeth_cmd_buffer *iob, int len,
4530 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
4531 unsigned long),
4532 void *reply_param)
4533{
4534 u16 s1, s2;
4535
4536 QETH_CARD_TEXT(card, 4, "sendsnmp");
4537
4538 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
4539 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
4540 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
4541
4542 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
4543 s2 = (u32) len;
4544 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
4545 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
4546 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
4547 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
4548 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
4549 reply_cb, reply_param);
4550}
4551
4552static int qeth_snmp_command_cb(struct qeth_card *card,
4553 struct qeth_reply *reply, unsigned long sdata)
4554{
4555 struct qeth_ipa_cmd *cmd;
4556 struct qeth_arp_query_info *qinfo;
4557 struct qeth_snmp_cmd *snmp;
4558 unsigned char *data;
4559 __u16 data_len;
4560
4561 QETH_CARD_TEXT(card, 3, "snpcmdcb");
4562
4563 cmd = (struct qeth_ipa_cmd *) sdata;
4564 data = (unsigned char *)((char *)cmd - reply->offset);
4565 qinfo = (struct qeth_arp_query_info *) reply->param;
4566 snmp = &cmd->data.setadapterparms.data.snmp;
4567
4568 if (cmd->hdr.return_code) {
4569 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
4570 return 0;
4571 }
4572 if (cmd->data.setadapterparms.hdr.return_code) {
4573 cmd->hdr.return_code =
4574 cmd->data.setadapterparms.hdr.return_code;
4575 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
4576 return 0;
4577 }
4578 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
4579 if (cmd->data.setadapterparms.hdr.seq_no == 1)
4580 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
4581 else
4582 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
4583
4584
4585 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
4586 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
4587 cmd->hdr.return_code = IPA_RC_ENOMEM;
4588 return 0;
4589 }
4590 QETH_CARD_TEXT_(card, 4, "snore%i",
4591 cmd->data.setadapterparms.hdr.used_total);
4592 QETH_CARD_TEXT_(card, 4, "sseqn%i",
4593 cmd->data.setadapterparms.hdr.seq_no);
4594
4595 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
4596 memcpy(qinfo->udata + qinfo->udata_offset,
4597 (char *)snmp,
4598 data_len + offsetof(struct qeth_snmp_cmd, data));
4599 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
4600 } else {
4601 memcpy(qinfo->udata + qinfo->udata_offset,
4602 (char *)&snmp->request, data_len);
4603 }
4604 qinfo->udata_offset += data_len;
4605
4606 QETH_CARD_TEXT_(card, 4, "srtot%i",
4607 cmd->data.setadapterparms.hdr.used_total);
4608 QETH_CARD_TEXT_(card, 4, "srseq%i",
4609 cmd->data.setadapterparms.hdr.seq_no);
4610 if (cmd->data.setadapterparms.hdr.seq_no <
4611 cmd->data.setadapterparms.hdr.used_total)
4612 return 1;
4613 return 0;
4614}
4615
4616int qeth_snmp_command(struct qeth_card *card, char __user *udata)
4617{
4618 struct qeth_cmd_buffer *iob;
4619 struct qeth_ipa_cmd *cmd;
4620 struct qeth_snmp_ureq *ureq;
4621 unsigned int req_len;
4622 struct qeth_arp_query_info qinfo = {0, };
4623 int rc = 0;
4624
4625 QETH_CARD_TEXT(card, 3, "snmpcmd");
4626
4627 if (card->info.guestlan)
4628 return -EOPNOTSUPP;
4629
4630 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
4631 (!card->options.layer2)) {
4632 return -EOPNOTSUPP;
4633 }
4634
4635 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
4636 return -EFAULT;
4637 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
4638 sizeof(struct qeth_ipacmd_hdr) -
4639 sizeof(struct qeth_ipacmd_setadpparms_hdr)))
4640 return -EINVAL;
4641 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
4642 if (IS_ERR(ureq)) {
4643 QETH_CARD_TEXT(card, 2, "snmpnome");
4644 return PTR_ERR(ureq);
4645 }
4646 qinfo.udata_len = ureq->hdr.data_len;
4647 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
4648 if (!qinfo.udata) {
4649 kfree(ureq);
4650 return -ENOMEM;
4651 }
4652 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
4653
4654 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
4655 QETH_SNMP_SETADP_CMDLENGTH + req_len);
4656 if (!iob) {
4657 rc = -ENOMEM;
4658 goto out;
4659 }
4660 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4661 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
4662 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
4663 qeth_snmp_command_cb, (void *)&qinfo);
4664 if (rc)
4665 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
4666 QETH_CARD_IFNAME(card), rc);
4667 else {
4668 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
4669 rc = -EFAULT;
4670 }
4671out:
4672 kfree(ureq);
4673 kfree(qinfo.udata);
4674 return rc;
4675}
4676EXPORT_SYMBOL_GPL(qeth_snmp_command);
4677
4678static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
4679 struct qeth_reply *reply, unsigned long data)
4680{
4681 struct qeth_ipa_cmd *cmd;
4682 struct qeth_qoat_priv *priv;
4683 char *resdata;
4684 int resdatalen;
4685
4686 QETH_CARD_TEXT(card, 3, "qoatcb");
4687
4688 cmd = (struct qeth_ipa_cmd *)data;
4689 priv = (struct qeth_qoat_priv *)reply->param;
4690 resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
4691 resdata = (char *)data + 28;
4692
4693 if (resdatalen > (priv->buffer_len - priv->response_len)) {
4694 cmd->hdr.return_code = IPA_RC_FFFF;
4695 return 0;
4696 }
4697
4698 memcpy((priv->buffer + priv->response_len), resdata,
4699 resdatalen);
4700 priv->response_len += resdatalen;
4701
4702 if (cmd->data.setadapterparms.hdr.seq_no <
4703 cmd->data.setadapterparms.hdr.used_total)
4704 return 1;
4705 return 0;
4706}
4707
4708int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
4709{
4710 int rc = 0;
4711 struct qeth_cmd_buffer *iob;
4712 struct qeth_ipa_cmd *cmd;
4713 struct qeth_query_oat *oat_req;
4714 struct qeth_query_oat_data oat_data;
4715 struct qeth_qoat_priv priv;
4716 void __user *tmp;
4717
4718 QETH_CARD_TEXT(card, 3, "qoatcmd");
4719
4720 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
4721 rc = -EOPNOTSUPP;
4722 goto out;
4723 }
4724
4725 if (copy_from_user(&oat_data, udata,
4726 sizeof(struct qeth_query_oat_data))) {
4727 rc = -EFAULT;
4728 goto out;
4729 }
4730
4731 priv.buffer_len = oat_data.buffer_len;
4732 priv.response_len = 0;
4733 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
4734 if (!priv.buffer) {
4735 rc = -ENOMEM;
4736 goto out;
4737 }
4738
4739 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
4740 sizeof(struct qeth_ipacmd_setadpparms_hdr) +
4741 sizeof(struct qeth_query_oat));
4742 if (!iob) {
4743 rc = -ENOMEM;
4744 goto out_free;
4745 }
4746 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
4747 oat_req = &cmd->data.setadapterparms.data.query_oat;
4748 oat_req->subcmd_code = oat_data.command;
4749
4750 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
4751 &priv);
4752 if (!rc) {
4753 if (is_compat_task())
4754 tmp = compat_ptr(oat_data.ptr);
4755 else
4756 tmp = (void __user *)(unsigned long)oat_data.ptr;
4757
4758 if (copy_to_user(tmp, priv.buffer,
4759 priv.response_len)) {
4760 rc = -EFAULT;
4761 goto out_free;
4762 }
4763
4764 oat_data.response_len = priv.response_len;
4765
4766 if (copy_to_user(udata, &oat_data,
4767 sizeof(struct qeth_query_oat_data)))
4768 rc = -EFAULT;
4769 } else
4770 if (rc == IPA_RC_FFFF)
4771 rc = -EFAULT;
4772
4773out_free:
4774 kfree(priv.buffer);
4775out:
4776 return rc;
4777}
4778EXPORT_SYMBOL_GPL(qeth_query_oat_command);
4779
4780static int qeth_query_card_info_cb(struct qeth_card *card,
4781 struct qeth_reply *reply, unsigned long data)
4782{
4783 struct qeth_ipa_cmd *cmd;
4784 struct qeth_query_card_info *card_info;
4785 struct carrier_info *carrier_info;
4786
4787 QETH_CARD_TEXT(card, 2, "qcrdincb");
4788 carrier_info = (struct carrier_info *)reply->param;
4789 cmd = (struct qeth_ipa_cmd *)data;
4790 card_info = &cmd->data.setadapterparms.data.card_info;
4791 if (cmd->data.setadapterparms.hdr.return_code == 0) {
4792 carrier_info->card_type = card_info->card_type;
4793 carrier_info->port_mode = card_info->port_mode;
4794 carrier_info->port_speed = card_info->port_speed;
4795 }
4796
4797 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
4798 return 0;
4799}
4800
4801static int qeth_query_card_info(struct qeth_card *card,
4802 struct carrier_info *carrier_info)
4803{
4804 struct qeth_cmd_buffer *iob;
4805
4806 QETH_CARD_TEXT(card, 2, "qcrdinfo");
4807 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
4808 return -EOPNOTSUPP;
4809 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
4810 sizeof(struct qeth_ipacmd_setadpparms_hdr));
4811 if (!iob)
4812 return -ENOMEM;
4813 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
4814 (void *)carrier_info);
4815}
4816
4817static inline int qeth_get_qdio_q_format(struct qeth_card *card)
4818{
4819 switch (card->info.type) {
4820 case QETH_CARD_TYPE_IQD:
4821 return 2;
4822 default:
4823 return 0;
4824 }
4825}
4826
4827static void qeth_determine_capabilities(struct qeth_card *card)
4828{
4829 int rc;
4830 int length;
4831 char *prcd;
4832 struct ccw_device *ddev;
4833 int ddev_offline = 0;
4834
4835 QETH_DBF_TEXT(SETUP, 2, "detcapab");
4836 ddev = CARD_DDEV(card);
4837 if (!ddev->online) {
4838 ddev_offline = 1;
4839 rc = ccw_device_set_online(ddev);
4840 if (rc) {
4841 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4842 goto out;
4843 }
4844 }
4845
4846 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
4847 if (rc) {
4848 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
4849 dev_name(&card->gdev->dev), rc);
4850 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
4851 goto out_offline;
4852 }
4853 qeth_configure_unitaddr(card, prcd);
4854 if (ddev_offline)
4855 qeth_configure_blkt_default(card, prcd);
4856 kfree(prcd);
4857
4858 rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
4859 if (rc)
4860 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
4861
4862 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
4863 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1);
4864 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3);
4865 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
4866 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
4867 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
4868 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
4869 dev_info(&card->gdev->dev,
4870 "Completion Queueing supported\n");
4871 } else {
4872 card->options.cq = QETH_CQ_NOTAVAILABLE;
4873 }
4874
4875
4876out_offline:
4877 if (ddev_offline == 1)
4878 ccw_device_set_offline(ddev);
4879out:
4880 return;
4881}
4882
4883static inline void qeth_qdio_establish_cq(struct qeth_card *card,
4884 struct qdio_buffer **in_sbal_ptrs,
4885 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
4886 int i;
4887
4888 if (card->options.cq == QETH_CQ_ENABLED) {
4889 int offset = QDIO_MAX_BUFFERS_PER_Q *
4890 (card->qdio.no_in_queues - 1);
4891 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
4892 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4893 in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
4894 virt_to_phys(card->qdio.c_q->bufs[i].buffer);
4895 }
4896
4897 queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
4898 }
4899}
4900
4901static int qeth_qdio_establish(struct qeth_card *card)
4902{
4903 struct qdio_initialize init_data;
4904 char *qib_param_field;
4905 struct qdio_buffer **in_sbal_ptrs;
4906 void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
4907 struct qdio_buffer **out_sbal_ptrs;
4908 int i, j, k;
4909 int rc = 0;
4910
4911 QETH_DBF_TEXT(SETUP, 2, "qdioest");
4912
4913 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
4914 GFP_KERNEL);
4915 if (!qib_param_field) {
4916 rc = -ENOMEM;
4917 goto out_free_nothing;
4918 }
4919
4920 qeth_create_qib_param_field(card, qib_param_field);
4921 qeth_create_qib_param_field_blkt(card, qib_param_field);
4922
4923 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
4924 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
4925 GFP_KERNEL);
4926 if (!in_sbal_ptrs) {
4927 rc = -ENOMEM;
4928 goto out_free_qib_param;
4929 }
4930 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
4931 in_sbal_ptrs[i] = (struct qdio_buffer *)
4932 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
4933 }
4934
4935 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
4936 GFP_KERNEL);
4937 if (!queue_start_poll) {
4938 rc = -ENOMEM;
4939 goto out_free_in_sbals;
4940 }
4941 for (i = 0; i < card->qdio.no_in_queues; ++i)
4942 queue_start_poll[i] = card->discipline->start_poll;
4943
4944 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
4945
4946 out_sbal_ptrs =
4947 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
4948 sizeof(void *), GFP_KERNEL);
4949 if (!out_sbal_ptrs) {
4950 rc = -ENOMEM;
4951 goto out_free_queue_start_poll;
4952 }
4953 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
4954 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
4955 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
4956 card->qdio.out_qs[i]->bufs[j]->buffer);
4957 }
4958
4959 memset(&init_data, 0, sizeof(struct qdio_initialize));
4960 init_data.cdev = CARD_DDEV(card);
4961 init_data.q_format = qeth_get_qdio_q_format(card);
4962 init_data.qib_param_field_format = 0;
4963 init_data.qib_param_field = qib_param_field;
4964 init_data.no_input_qs = card->qdio.no_in_queues;
4965 init_data.no_output_qs = card->qdio.no_out_queues;
4966 init_data.input_handler = card->discipline->input_handler;
4967 init_data.output_handler = card->discipline->output_handler;
4968 init_data.queue_start_poll_array = queue_start_poll;
4969 init_data.int_parm = (unsigned long) card;
4970 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
4971 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
4972 init_data.output_sbal_state_array = card->qdio.out_bufstates;
4973 init_data.scan_threshold =
4974 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
4975
4976 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
4977 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
4978 rc = qdio_allocate(&init_data);
4979 if (rc) {
4980 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4981 goto out;
4982 }
4983 rc = qdio_establish(&init_data);
4984 if (rc) {
4985 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
4986 qdio_free(CARD_DDEV(card));
4987 }
4988 }
4989
4990 switch (card->options.cq) {
4991 case QETH_CQ_ENABLED:
4992 dev_info(&card->gdev->dev, "Completion Queue support enabled");
4993 break;
4994 case QETH_CQ_DISABLED:
4995 dev_info(&card->gdev->dev, "Completion Queue support disabled");
4996 break;
4997 default:
4998 break;
4999 }
5000out:
5001 kfree(out_sbal_ptrs);
5002out_free_queue_start_poll:
5003 kfree(queue_start_poll);
5004out_free_in_sbals:
5005 kfree(in_sbal_ptrs);
5006out_free_qib_param:
5007 kfree(qib_param_field);
5008out_free_nothing:
5009 return rc;
5010}
5011
5012static void qeth_core_free_card(struct qeth_card *card)
5013{
5014
5015 QETH_DBF_TEXT(SETUP, 2, "freecrd");
5016 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
5017 qeth_clean_channel(&card->read);
5018 qeth_clean_channel(&card->write);
5019 if (card->dev)
5020 free_netdev(card->dev);
5021 kfree(card->ip_tbd_list);
5022 qeth_free_qdio_buffers(card);
5023 unregister_service_level(&card->qeth_service_level);
5024 kfree(card);
5025}
5026
5027void qeth_trace_features(struct qeth_card *card)
5028{
5029 QETH_CARD_TEXT(card, 2, "features");
5030 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs);
5031 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs);
5032 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs);
5033 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs);
5034 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs);
5035 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs);
5036 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support);
5037}
5038EXPORT_SYMBOL_GPL(qeth_trace_features);
5039
5040static struct ccw_device_id qeth_ids[] = {
5041 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
5042 .driver_info = QETH_CARD_TYPE_OSD},
5043 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
5044 .driver_info = QETH_CARD_TYPE_IQD},
5045 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
5046 .driver_info = QETH_CARD_TYPE_OSN},
5047 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
5048 .driver_info = QETH_CARD_TYPE_OSM},
5049 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
5050 .driver_info = QETH_CARD_TYPE_OSX},
5051 {},
5052};
5053MODULE_DEVICE_TABLE(ccw, qeth_ids);
5054
5055static struct ccw_driver qeth_ccw_driver = {
5056 .driver = {
5057 .owner = THIS_MODULE,
5058 .name = "qeth",
5059 },
5060 .ids = qeth_ids,
5061 .probe = ccwgroup_probe_ccwdev,
5062 .remove = ccwgroup_remove_ccwdev,
5063};
5064
5065int qeth_core_hardsetup_card(struct qeth_card *card)
5066{
5067 int retries = 3;
5068 int rc;
5069
5070 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
5071 atomic_set(&card->force_alloc_skb, 0);
5072 qeth_update_from_chp_desc(card);
5073retry:
5074 if (retries < 3)
5075 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
5076 dev_name(&card->gdev->dev));
5077 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
5078 ccw_device_set_offline(CARD_DDEV(card));
5079 ccw_device_set_offline(CARD_WDEV(card));
5080 ccw_device_set_offline(CARD_RDEV(card));
5081 qdio_free(CARD_DDEV(card));
5082 rc = ccw_device_set_online(CARD_RDEV(card));
5083 if (rc)
5084 goto retriable;
5085 rc = ccw_device_set_online(CARD_WDEV(card));
5086 if (rc)
5087 goto retriable;
5088 rc = ccw_device_set_online(CARD_DDEV(card));
5089 if (rc)
5090 goto retriable;
5091retriable:
5092 if (rc == -ERESTARTSYS) {
5093 QETH_DBF_TEXT(SETUP, 2, "break1");
5094 return rc;
5095 } else if (rc) {
5096 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
5097 if (--retries < 0)
5098 goto out;
5099 else
5100 goto retry;
5101 }
5102 qeth_determine_capabilities(card);
5103 qeth_init_tokens(card);
5104 qeth_init_func_level(card);
5105 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
5106 if (rc == -ERESTARTSYS) {
5107 QETH_DBF_TEXT(SETUP, 2, "break2");
5108 return rc;
5109 } else if (rc) {
5110 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
5111 if (--retries < 0)
5112 goto out;
5113 else
5114 goto retry;
5115 }
5116 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
5117 if (rc == -ERESTARTSYS) {
5118 QETH_DBF_TEXT(SETUP, 2, "break3");
5119 return rc;
5120 } else if (rc) {
5121 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
5122 if (--retries < 0)
5123 goto out;
5124 else
5125 goto retry;
5126 }
5127 card->read_or_write_problem = 0;
5128 rc = qeth_mpc_initialize(card);
5129 if (rc) {
5130 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
5131 goto out;
5132 }
5133
5134 card->options.ipa4.supported_funcs = 0;
5135 card->options.adp.supported_funcs = 0;
5136 card->options.sbp.supported_funcs = 0;
5137 card->info.diagass_support = 0;
5138 rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
5139 if (rc == -ENOMEM)
5140 goto out;
5141 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
5142 rc = qeth_query_setadapterparms(card);
5143 if (rc < 0) {
5144 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
5145 goto out;
5146 }
5147 }
5148 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
5149 rc = qeth_query_setdiagass(card);
5150 if (rc < 0) {
5151 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
5152 goto out;
5153 }
5154 }
5155 return 0;
5156out:
5157 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
5158 "an error on the device\n");
5159 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
5160 dev_name(&card->gdev->dev), rc);
5161 return rc;
5162}
5163EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
5164
5165static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
5166 struct qdio_buffer_element *element,
5167 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
5168{
5169 struct page *page = virt_to_page(element->addr);
5170 if (*pskb == NULL) {
5171 if (qethbuffer->rx_skb) {
5172
5173 *pskb = qethbuffer->rx_skb;
5174 qethbuffer->rx_skb = NULL;
5175 } else {
5176 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
5177 if (!(*pskb))
5178 return -ENOMEM;
5179 }
5180
5181 skb_reserve(*pskb, ETH_HLEN);
5182 if (data_len <= QETH_RX_PULL_LEN) {
5183 memcpy(skb_put(*pskb, data_len), element->addr + offset,
5184 data_len);
5185 } else {
5186 get_page(page);
5187 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
5188 element->addr + offset, QETH_RX_PULL_LEN);
5189 skb_fill_page_desc(*pskb, *pfrag, page,
5190 offset + QETH_RX_PULL_LEN,
5191 data_len - QETH_RX_PULL_LEN);
5192 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
5193 (*pskb)->len += data_len - QETH_RX_PULL_LEN;
5194 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
5195 (*pfrag)++;
5196 }
5197 } else {
5198 get_page(page);
5199 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
5200 (*pskb)->data_len += data_len;
5201 (*pskb)->len += data_len;
5202 (*pskb)->truesize += data_len;
5203 (*pfrag)++;
5204 }
5205
5206
5207 return 0;
5208}
5209
5210static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
5211{
5212 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
5213}
5214
5215struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
5216 struct qeth_qdio_buffer *qethbuffer,
5217 struct qdio_buffer_element **__element, int *__offset,
5218 struct qeth_hdr **hdr)
5219{
5220 struct qdio_buffer_element *element = *__element;
5221 struct qdio_buffer *buffer = qethbuffer->buffer;
5222 int offset = *__offset;
5223 struct sk_buff *skb = NULL;
5224 int skb_len = 0;
5225 void *data_ptr;
5226 int data_len;
5227 int headroom = 0;
5228 int use_rx_sg = 0;
5229 int frag = 0;
5230
5231
5232 if (element->length < offset + sizeof(struct qeth_hdr)) {
5233 if (qeth_is_last_sbale(element))
5234 return NULL;
5235 element++;
5236 offset = 0;
5237 if (element->length < sizeof(struct qeth_hdr))
5238 return NULL;
5239 }
5240 *hdr = element->addr + offset;
5241
5242 offset += sizeof(struct qeth_hdr);
5243 switch ((*hdr)->hdr.l2.id) {
5244 case QETH_HEADER_TYPE_LAYER2:
5245 skb_len = (*hdr)->hdr.l2.pkt_length;
5246 break;
5247 case QETH_HEADER_TYPE_LAYER3:
5248 skb_len = (*hdr)->hdr.l3.length;
5249 headroom = ETH_HLEN;
5250 break;
5251 case QETH_HEADER_TYPE_OSN:
5252 skb_len = (*hdr)->hdr.osn.pdu_length;
5253 headroom = sizeof(struct qeth_hdr);
5254 break;
5255 default:
5256 break;
5257 }
5258
5259 if (!skb_len)
5260 return NULL;
5261
5262 if (((skb_len >= card->options.rx_sg_cb) &&
5263 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
5264 (!atomic_read(&card->force_alloc_skb))) ||
5265 (card->options.cq == QETH_CQ_ENABLED)) {
5266 use_rx_sg = 1;
5267 } else {
5268 skb = dev_alloc_skb(skb_len + headroom);
5269 if (!skb)
5270 goto no_mem;
5271 if (headroom)
5272 skb_reserve(skb, headroom);
5273 }
5274
5275 data_ptr = element->addr + offset;
5276 while (skb_len) {
5277 data_len = min(skb_len, (int)(element->length - offset));
5278 if (data_len) {
5279 if (use_rx_sg) {
5280 if (qeth_create_skb_frag(qethbuffer, element,
5281 &skb, offset, &frag, data_len))
5282 goto no_mem;
5283 } else {
5284 memcpy(skb_put(skb, data_len), data_ptr,
5285 data_len);
5286 }
5287 }
5288 skb_len -= data_len;
5289 if (skb_len) {
5290 if (qeth_is_last_sbale(element)) {
5291 QETH_CARD_TEXT(card, 4, "unexeob");
5292 QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
5293 dev_kfree_skb_any(skb);
5294 card->stats.rx_errors++;
5295 return NULL;
5296 }
5297 element++;
5298 offset = 0;
5299 data_ptr = element->addr;
5300 } else {
5301 offset += data_len;
5302 }
5303 }
5304 *__element = element;
5305 *__offset = offset;
5306 if (use_rx_sg && card->options.performance_stats) {
5307 card->perf_stats.sg_skbs_rx++;
5308 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
5309 }
5310 return skb;
5311no_mem:
5312 if (net_ratelimit()) {
5313 QETH_CARD_TEXT(card, 2, "noskbmem");
5314 }
5315 card->stats.rx_dropped++;
5316 return NULL;
5317}
5318EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
5319
5320static void qeth_unregister_dbf_views(void)
5321{
5322 int x;
5323 for (x = 0; x < QETH_DBF_INFOS; x++) {
5324 debug_unregister(qeth_dbf[x].id);
5325 qeth_dbf[x].id = NULL;
5326 }
5327}
5328
5329void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
5330{
5331 char dbf_txt_buf[32];
5332 va_list args;
5333
5334 if (!debug_level_enabled(id, level))
5335 return;
5336 va_start(args, fmt);
5337 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
5338 va_end(args);
5339 debug_text_event(id, level, dbf_txt_buf);
5340}
5341EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
5342
5343static int qeth_register_dbf_views(void)
5344{
5345 int ret;
5346 int x;
5347
5348 for (x = 0; x < QETH_DBF_INFOS; x++) {
5349
5350 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
5351 qeth_dbf[x].pages,
5352 qeth_dbf[x].areas,
5353 qeth_dbf[x].len);
5354 if (qeth_dbf[x].id == NULL) {
5355 qeth_unregister_dbf_views();
5356 return -ENOMEM;
5357 }
5358
5359
5360 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
5361 if (ret) {
5362 qeth_unregister_dbf_views();
5363 return ret;
5364 }
5365
5366
5367 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
5368 }
5369
5370 return 0;
5371}
5372
5373int qeth_core_load_discipline(struct qeth_card *card,
5374 enum qeth_discipline_id discipline)
5375{
5376 int rc = 0;
5377 mutex_lock(&qeth_mod_mutex);
5378 switch (discipline) {
5379 case QETH_DISCIPLINE_LAYER3:
5380 card->discipline = try_then_request_module(
5381 symbol_get(qeth_l3_discipline), "qeth_l3");
5382 break;
5383 case QETH_DISCIPLINE_LAYER2:
5384 card->discipline = try_then_request_module(
5385 symbol_get(qeth_l2_discipline), "qeth_l2");
5386 break;
5387 }
5388 if (!card->discipline) {
5389 dev_err(&card->gdev->dev, "There is no kernel module to "
5390 "support discipline %d\n", discipline);
5391 rc = -EINVAL;
5392 }
5393 mutex_unlock(&qeth_mod_mutex);
5394 return rc;
5395}
5396
5397void qeth_core_free_discipline(struct qeth_card *card)
5398{
5399 if (card->options.layer2)
5400 symbol_put(qeth_l2_discipline);
5401 else
5402 symbol_put(qeth_l3_discipline);
5403 card->discipline = NULL;
5404}
5405
5406static const struct device_type qeth_generic_devtype = {
5407 .name = "qeth_generic",
5408 .groups = qeth_generic_attr_groups,
5409};
5410static const struct device_type qeth_osn_devtype = {
5411 .name = "qeth_osn",
5412 .groups = qeth_osn_attr_groups,
5413};
5414
5415#define DBF_NAME_LEN 20
5416
5417struct qeth_dbf_entry {
5418 char dbf_name[DBF_NAME_LEN];
5419 debug_info_t *dbf_info;
5420 struct list_head dbf_list;
5421};
5422
5423static LIST_HEAD(qeth_dbf_list);
5424static DEFINE_MUTEX(qeth_dbf_list_mutex);
5425
5426static debug_info_t *qeth_get_dbf_entry(char *name)
5427{
5428 struct qeth_dbf_entry *entry;
5429 debug_info_t *rc = NULL;
5430
5431 mutex_lock(&qeth_dbf_list_mutex);
5432 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
5433 if (strcmp(entry->dbf_name, name) == 0) {
5434 rc = entry->dbf_info;
5435 break;
5436 }
5437 }
5438 mutex_unlock(&qeth_dbf_list_mutex);
5439 return rc;
5440}
5441
5442static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
5443{
5444 struct qeth_dbf_entry *new_entry;
5445
5446 card->debug = debug_register(name, 2, 1, 8);
5447 if (!card->debug) {
5448 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
5449 goto err;
5450 }
5451 if (debug_register_view(card->debug, &debug_hex_ascii_view))
5452 goto err_dbg;
5453 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
5454 if (!new_entry)
5455 goto err_dbg;
5456 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
5457 new_entry->dbf_info = card->debug;
5458 mutex_lock(&qeth_dbf_list_mutex);
5459 list_add(&new_entry->dbf_list, &qeth_dbf_list);
5460 mutex_unlock(&qeth_dbf_list_mutex);
5461
5462 return 0;
5463
5464err_dbg:
5465 debug_unregister(card->debug);
5466err:
5467 return -ENOMEM;
5468}
5469
5470static void qeth_clear_dbf_list(void)
5471{
5472 struct qeth_dbf_entry *entry, *tmp;
5473
5474 mutex_lock(&qeth_dbf_list_mutex);
5475 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
5476 list_del(&entry->dbf_list);
5477 debug_unregister(entry->dbf_info);
5478 kfree(entry);
5479 }
5480 mutex_unlock(&qeth_dbf_list_mutex);
5481}
5482
5483static int qeth_core_probe_device(struct ccwgroup_device *gdev)
5484{
5485 struct qeth_card *card;
5486 struct device *dev;
5487 int rc;
5488 unsigned long flags;
5489 char dbf_name[DBF_NAME_LEN];
5490
5491 QETH_DBF_TEXT(SETUP, 2, "probedev");
5492
5493 dev = &gdev->dev;
5494 if (!get_device(dev))
5495 return -ENODEV;
5496
5497 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
5498
5499 card = qeth_alloc_card();
5500 if (!card) {
5501 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
5502 rc = -ENOMEM;
5503 goto err_dev;
5504 }
5505
5506 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
5507 dev_name(&gdev->dev));
5508 card->debug = qeth_get_dbf_entry(dbf_name);
5509 if (!card->debug) {
5510 rc = qeth_add_dbf_entry(card, dbf_name);
5511 if (rc)
5512 goto err_card;
5513 }
5514
5515 card->read.ccwdev = gdev->cdev[0];
5516 card->write.ccwdev = gdev->cdev[1];
5517 card->data.ccwdev = gdev->cdev[2];
5518 dev_set_drvdata(&gdev->dev, card);
5519 card->gdev = gdev;
5520 gdev->cdev[0]->handler = qeth_irq;
5521 gdev->cdev[1]->handler = qeth_irq;
5522 gdev->cdev[2]->handler = qeth_irq;
5523
5524 rc = qeth_determine_card_type(card);
5525 if (rc) {
5526 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
5527 goto err_card;
5528 }
5529 rc = qeth_setup_card(card);
5530 if (rc) {
5531 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
5532 goto err_card;
5533 }
5534
5535 if (card->info.type == QETH_CARD_TYPE_OSN)
5536 gdev->dev.type = &qeth_osn_devtype;
5537 else
5538 gdev->dev.type = &qeth_generic_devtype;
5539
5540 switch (card->info.type) {
5541 case QETH_CARD_TYPE_OSN:
5542 case QETH_CARD_TYPE_OSM:
5543 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
5544 if (rc)
5545 goto err_card;
5546 rc = card->discipline->setup(card->gdev);
5547 if (rc)
5548 goto err_disc;
5549 case QETH_CARD_TYPE_OSD:
5550 case QETH_CARD_TYPE_OSX:
5551 default:
5552 break;
5553 }
5554
5555 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5556 list_add_tail(&card->list, &qeth_core_card_list.list);
5557 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5558
5559 qeth_determine_capabilities(card);
5560 return 0;
5561
5562err_disc:
5563 qeth_core_free_discipline(card);
5564err_card:
5565 qeth_core_free_card(card);
5566err_dev:
5567 put_device(dev);
5568 return rc;
5569}
5570
5571static void qeth_core_remove_device(struct ccwgroup_device *gdev)
5572{
5573 unsigned long flags;
5574 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5575
5576 QETH_DBF_TEXT(SETUP, 2, "removedv");
5577
5578 if (card->discipline) {
5579 card->discipline->remove(gdev);
5580 qeth_core_free_discipline(card);
5581 }
5582
5583 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
5584 list_del(&card->list);
5585 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
5586 qeth_core_free_card(card);
5587 dev_set_drvdata(&gdev->dev, NULL);
5588 put_device(&gdev->dev);
5589 return;
5590}
5591
5592static int qeth_core_set_online(struct ccwgroup_device *gdev)
5593{
5594 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5595 int rc = 0;
5596 int def_discipline;
5597
5598 if (!card->discipline) {
5599 if (card->info.type == QETH_CARD_TYPE_IQD)
5600 def_discipline = QETH_DISCIPLINE_LAYER3;
5601 else
5602 def_discipline = QETH_DISCIPLINE_LAYER2;
5603 rc = qeth_core_load_discipline(card, def_discipline);
5604 if (rc)
5605 goto err;
5606 rc = card->discipline->setup(card->gdev);
5607 if (rc)
5608 goto err;
5609 }
5610 rc = card->discipline->set_online(gdev);
5611err:
5612 return rc;
5613}
5614
5615static int qeth_core_set_offline(struct ccwgroup_device *gdev)
5616{
5617 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5618 return card->discipline->set_offline(gdev);
5619}
5620
5621static void qeth_core_shutdown(struct ccwgroup_device *gdev)
5622{
5623 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5624 if (card->discipline && card->discipline->shutdown)
5625 card->discipline->shutdown(gdev);
5626}
5627
5628static int qeth_core_prepare(struct ccwgroup_device *gdev)
5629{
5630 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5631 if (card->discipline && card->discipline->prepare)
5632 return card->discipline->prepare(gdev);
5633 return 0;
5634}
5635
5636static void qeth_core_complete(struct ccwgroup_device *gdev)
5637{
5638 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5639 if (card->discipline && card->discipline->complete)
5640 card->discipline->complete(gdev);
5641}
5642
5643static int qeth_core_freeze(struct ccwgroup_device *gdev)
5644{
5645 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5646 if (card->discipline && card->discipline->freeze)
5647 return card->discipline->freeze(gdev);
5648 return 0;
5649}
5650
5651static int qeth_core_thaw(struct ccwgroup_device *gdev)
5652{
5653 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5654 if (card->discipline && card->discipline->thaw)
5655 return card->discipline->thaw(gdev);
5656 return 0;
5657}
5658
5659static int qeth_core_restore(struct ccwgroup_device *gdev)
5660{
5661 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
5662 if (card->discipline && card->discipline->restore)
5663 return card->discipline->restore(gdev);
5664 return 0;
5665}
5666
5667static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
5668 .driver = {
5669 .owner = THIS_MODULE,
5670 .name = "qeth",
5671 },
5672 .setup = qeth_core_probe_device,
5673 .remove = qeth_core_remove_device,
5674 .set_online = qeth_core_set_online,
5675 .set_offline = qeth_core_set_offline,
5676 .shutdown = qeth_core_shutdown,
5677 .prepare = qeth_core_prepare,
5678 .complete = qeth_core_complete,
5679 .freeze = qeth_core_freeze,
5680 .thaw = qeth_core_thaw,
5681 .restore = qeth_core_restore,
5682};
5683
5684static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
5685 const char *buf, size_t count)
5686{
5687 int err;
5688
5689 err = ccwgroup_create_dev(qeth_core_root_dev,
5690 &qeth_core_ccwgroup_driver, 3, buf);
5691
5692 return err ? err : count;
5693}
5694static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
5695
5696static struct attribute *qeth_drv_attrs[] = {
5697 &driver_attr_group.attr,
5698 NULL,
5699};
5700static struct attribute_group qeth_drv_attr_group = {
5701 .attrs = qeth_drv_attrs,
5702};
5703static const struct attribute_group *qeth_drv_attr_groups[] = {
5704 &qeth_drv_attr_group,
5705 NULL,
5706};
5707
5708static struct {
5709 const char str[ETH_GSTRING_LEN];
5710} qeth_ethtool_stats_keys[] = {
5711{"rx skbs"},
5712 {"rx buffers"},
5713 {"tx skbs"},
5714 {"tx buffers"},
5715 {"tx skbs no packing"},
5716 {"tx buffers no packing"},
5717 {"tx skbs packing"},
5718 {"tx buffers packing"},
5719 {"tx sg skbs"},
5720 {"tx sg frags"},
5721{"rx sg skbs"},
5722 {"rx sg frags"},
5723 {"rx sg page allocs"},
5724 {"tx large kbytes"},
5725 {"tx large count"},
5726 {"tx pk state ch n->p"},
5727 {"tx pk state ch p->n"},
5728 {"tx pk watermark low"},
5729 {"tx pk watermark high"},
5730 {"queue 0 buffer usage"},
5731{"queue 1 buffer usage"},
5732 {"queue 2 buffer usage"},
5733 {"queue 3 buffer usage"},
5734 {"rx poll time"},
5735 {"rx poll count"},
5736 {"rx do_QDIO time"},
5737 {"rx do_QDIO count"},
5738 {"tx handler time"},
5739 {"tx handler count"},
5740 {"tx time"},
5741{"tx count"},
5742 {"tx do_QDIO time"},
5743 {"tx do_QDIO count"},
5744 {"tx csum"},
5745 {"tx lin"},
5746 {"cq handler count"},
5747 {"cq handler time"}
5748};
5749
5750int qeth_core_get_sset_count(struct net_device *dev, int stringset)
5751{
5752 switch (stringset) {
5753 case ETH_SS_STATS:
5754 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
5755 default:
5756 return -EINVAL;
5757 }
5758}
5759EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
5760
5761void qeth_core_get_ethtool_stats(struct net_device *dev,
5762 struct ethtool_stats *stats, u64 *data)
5763{
5764 struct qeth_card *card = dev->ml_priv;
5765 data[0] = card->stats.rx_packets -
5766 card->perf_stats.initial_rx_packets;
5767 data[1] = card->perf_stats.bufs_rec;
5768 data[2] = card->stats.tx_packets -
5769 card->perf_stats.initial_tx_packets;
5770 data[3] = card->perf_stats.bufs_sent;
5771 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
5772 - card->perf_stats.skbs_sent_pack;
5773 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
5774 data[6] = card->perf_stats.skbs_sent_pack;
5775 data[7] = card->perf_stats.bufs_sent_pack;
5776 data[8] = card->perf_stats.sg_skbs_sent;
5777 data[9] = card->perf_stats.sg_frags_sent;
5778 data[10] = card->perf_stats.sg_skbs_rx;
5779 data[11] = card->perf_stats.sg_frags_rx;
5780 data[12] = card->perf_stats.sg_alloc_page_rx;
5781 data[13] = (card->perf_stats.large_send_bytes >> 10);
5782 data[14] = card->perf_stats.large_send_cnt;
5783 data[15] = card->perf_stats.sc_dp_p;
5784 data[16] = card->perf_stats.sc_p_dp;
5785 data[17] = QETH_LOW_WATERMARK_PACK;
5786 data[18] = QETH_HIGH_WATERMARK_PACK;
5787 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
5788 data[20] = (card->qdio.no_out_queues > 1) ?
5789 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
5790 data[21] = (card->qdio.no_out_queues > 2) ?
5791 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
5792 data[22] = (card->qdio.no_out_queues > 3) ?
5793 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
5794 data[23] = card->perf_stats.inbound_time;
5795 data[24] = card->perf_stats.inbound_cnt;
5796 data[25] = card->perf_stats.inbound_do_qdio_time;
5797 data[26] = card->perf_stats.inbound_do_qdio_cnt;
5798 data[27] = card->perf_stats.outbound_handler_time;
5799 data[28] = card->perf_stats.outbound_handler_cnt;
5800 data[29] = card->perf_stats.outbound_time;
5801 data[30] = card->perf_stats.outbound_cnt;
5802 data[31] = card->perf_stats.outbound_do_qdio_time;
5803 data[32] = card->perf_stats.outbound_do_qdio_cnt;
5804 data[33] = card->perf_stats.tx_csum;
5805 data[34] = card->perf_stats.tx_lin;
5806 data[35] = card->perf_stats.cq_cnt;
5807 data[36] = card->perf_stats.cq_time;
5808}
5809EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
5810
5811void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
5812{
5813 switch (stringset) {
5814 case ETH_SS_STATS:
5815 memcpy(data, &qeth_ethtool_stats_keys,
5816 sizeof(qeth_ethtool_stats_keys));
5817 break;
5818 default:
5819 WARN_ON(1);
5820 break;
5821 }
5822}
5823EXPORT_SYMBOL_GPL(qeth_core_get_strings);
5824
5825void qeth_core_get_drvinfo(struct net_device *dev,
5826 struct ethtool_drvinfo *info)
5827{
5828 struct qeth_card *card = dev->ml_priv;
5829
5830 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
5831 sizeof(info->driver));
5832 strlcpy(info->version, "1.0", sizeof(info->version));
5833 strlcpy(info->fw_version, card->info.mcl_level,
5834 sizeof(info->fw_version));
5835 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
5836 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
5837}
5838EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
5839
5840
5841
5842
5843
5844static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd,
5845 int maxspeed, int porttype)
5846{
5847 int port_sup, port_adv, spd_sup, spd_adv;
5848
5849 switch (porttype) {
5850 case PORT_TP:
5851 port_sup = SUPPORTED_TP;
5852 port_adv = ADVERTISED_TP;
5853 break;
5854 case PORT_FIBRE:
5855 port_sup = SUPPORTED_FIBRE;
5856 port_adv = ADVERTISED_FIBRE;
5857 break;
5858 default:
5859 port_sup = SUPPORTED_TP;
5860 port_adv = ADVERTISED_TP;
5861 WARN_ON_ONCE(1);
5862 }
5863
5864
5865
5866
5867 spd_sup = 0;
5868 spd_adv = 0;
5869 switch (maxspeed) {
5870 case SPEED_10000:
5871 spd_sup |= SUPPORTED_10000baseT_Full;
5872 spd_adv |= ADVERTISED_10000baseT_Full;
5873 case SPEED_1000:
5874 spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
5875 spd_adv |= ADVERTISED_1000baseT_Half |
5876 ADVERTISED_1000baseT_Full;
5877 case SPEED_100:
5878 spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
5879 spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
5880 case SPEED_10:
5881 spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5882 spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5883 break;
5884 default:
5885 spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full;
5886 spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full;
5887 WARN_ON_ONCE(1);
5888 }
5889 ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv;
5890 ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup;
5891}
5892
5893int qeth_core_ethtool_get_settings(struct net_device *netdev,
5894 struct ethtool_cmd *ecmd)
5895{
5896 struct qeth_card *card = netdev->ml_priv;
5897 enum qeth_link_types link_type;
5898 struct carrier_info carrier_info;
5899 int rc;
5900 u32 speed;
5901
5902 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
5903 link_type = QETH_LINK_TYPE_10GBIT_ETH;
5904 else
5905 link_type = card->info.link_type;
5906
5907 ecmd->transceiver = XCVR_INTERNAL;
5908 ecmd->duplex = DUPLEX_FULL;
5909 ecmd->autoneg = AUTONEG_ENABLE;
5910
5911 switch (link_type) {
5912 case QETH_LINK_TYPE_FAST_ETH:
5913 case QETH_LINK_TYPE_LANE_ETH100:
5914 qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP);
5915 speed = SPEED_100;
5916 ecmd->port = PORT_TP;
5917 break;
5918
5919 case QETH_LINK_TYPE_GBIT_ETH:
5920 case QETH_LINK_TYPE_LANE_ETH1000:
5921 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
5922 speed = SPEED_1000;
5923 ecmd->port = PORT_FIBRE;
5924 break;
5925
5926 case QETH_LINK_TYPE_10GBIT_ETH:
5927 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
5928 speed = SPEED_10000;
5929 ecmd->port = PORT_FIBRE;
5930 break;
5931
5932 default:
5933 qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP);
5934 speed = SPEED_10;
5935 ecmd->port = PORT_TP;
5936 }
5937 ethtool_cmd_speed_set(ecmd, speed);
5938
5939
5940
5941
5942 if (!qeth_card_hw_is_reachable(card))
5943 return -ENODEV;
5944 rc = qeth_query_card_info(card, &carrier_info);
5945 if (rc == -EOPNOTSUPP)
5946 return 0;
5947 if (rc)
5948 return rc;
5949
5950
5951 netdev_dbg(netdev,
5952 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
5953 carrier_info.card_type,
5954 carrier_info.port_mode,
5955 carrier_info.port_speed);
5956
5957
5958
5959 switch (carrier_info.card_type) {
5960 case CARD_INFO_TYPE_1G_COPPER_A:
5961 case CARD_INFO_TYPE_1G_COPPER_B:
5962 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP);
5963 ecmd->port = PORT_TP;
5964 break;
5965 case CARD_INFO_TYPE_1G_FIBRE_A:
5966 case CARD_INFO_TYPE_1G_FIBRE_B:
5967 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE);
5968 ecmd->port = PORT_FIBRE;
5969 break;
5970 case CARD_INFO_TYPE_10G_FIBRE_A:
5971 case CARD_INFO_TYPE_10G_FIBRE_B:
5972 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE);
5973 ecmd->port = PORT_FIBRE;
5974 break;
5975 }
5976
5977 switch (carrier_info.port_mode) {
5978 case CARD_INFO_PORTM_FULLDUPLEX:
5979 ecmd->duplex = DUPLEX_FULL;
5980 break;
5981 case CARD_INFO_PORTM_HALFDUPLEX:
5982 ecmd->duplex = DUPLEX_HALF;
5983 break;
5984 }
5985
5986 switch (carrier_info.port_speed) {
5987 case CARD_INFO_PORTS_10M:
5988 speed = SPEED_10;
5989 break;
5990 case CARD_INFO_PORTS_100M:
5991 speed = SPEED_100;
5992 break;
5993 case CARD_INFO_PORTS_1G:
5994 speed = SPEED_1000;
5995 break;
5996 case CARD_INFO_PORTS_10G:
5997 speed = SPEED_10000;
5998 break;
5999 }
6000 ethtool_cmd_speed_set(ecmd, speed);
6001
6002 return 0;
6003}
6004EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
6005
6006static int __init qeth_core_init(void)
6007{
6008 int rc;
6009
6010 pr_info("loading core functions\n");
6011 INIT_LIST_HEAD(&qeth_core_card_list.list);
6012 INIT_LIST_HEAD(&qeth_dbf_list);
6013 rwlock_init(&qeth_core_card_list.rwlock);
6014 mutex_init(&qeth_mod_mutex);
6015
6016 qeth_wq = create_singlethread_workqueue("qeth_wq");
6017
6018 rc = qeth_register_dbf_views();
6019 if (rc)
6020 goto out_err;
6021 qeth_core_root_dev = root_device_register("qeth");
6022 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
6023 if (rc)
6024 goto register_err;
6025 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
6026 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
6027 if (!qeth_core_header_cache) {
6028 rc = -ENOMEM;
6029 goto slab_err;
6030 }
6031 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
6032 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
6033 if (!qeth_qdio_outbuf_cache) {
6034 rc = -ENOMEM;
6035 goto cqslab_err;
6036 }
6037 rc = ccw_driver_register(&qeth_ccw_driver);
6038 if (rc)
6039 goto ccw_err;
6040 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
6041 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
6042 if (rc)
6043 goto ccwgroup_err;
6044
6045 return 0;
6046
6047ccwgroup_err:
6048 ccw_driver_unregister(&qeth_ccw_driver);
6049ccw_err:
6050 kmem_cache_destroy(qeth_qdio_outbuf_cache);
6051cqslab_err:
6052 kmem_cache_destroy(qeth_core_header_cache);
6053slab_err:
6054 root_device_unregister(qeth_core_root_dev);
6055register_err:
6056 qeth_unregister_dbf_views();
6057out_err:
6058 pr_err("Initializing the qeth device driver failed\n");
6059 return rc;
6060}
6061
6062static void __exit qeth_core_exit(void)
6063{
6064 qeth_clear_dbf_list();
6065 destroy_workqueue(qeth_wq);
6066 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
6067 ccw_driver_unregister(&qeth_ccw_driver);
6068 kmem_cache_destroy(qeth_qdio_outbuf_cache);
6069 kmem_cache_destroy(qeth_core_header_cache);
6070 root_device_unregister(qeth_core_root_dev);
6071 qeth_unregister_dbf_views();
6072 pr_info("core functions removed\n");
6073}
6074
6075module_init(qeth_core_init);
6076module_exit(qeth_core_exit);
6077MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
6078MODULE_DESCRIPTION("qeth core functions");
6079MODULE_LICENSE("GPL");
6080