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26#include <linux/module.h>
27#include <linux/init.h>
28#include <linux/kernel.h>
29#include <linux/string.h>
30#include <linux/timer.h>
31#include <linux/ioport.h>
32#include <linux/major.h>
33#include <linux/blkdev.h>
34#include <linux/interrupt.h>
35#include <linux/pci.h>
36#include <linux/delay.h>
37#include <linux/ctype.h>
38#include <linux/dma-mapping.h>
39
40#include <asm/dma.h>
41#include <asm/io.h>
42
43#include <scsi/scsi.h>
44#include <scsi/scsi_cmnd.h>
45#include <scsi/scsi_device.h>
46#include <scsi/scsi_host.h>
47#include <scsi/scsi_ioctl.h>
48
49#include "nsp32.h"
50
51
52
53
54
55static int trans_mode = 0;
56module_param (trans_mode, int, 0);
57MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M");
58#define ASYNC_MODE 1
59#define ULTRA20M_MODE 2
60
61static bool auto_param = 0;
62module_param (auto_param, bool, 0);
63MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)");
64
65static bool disc_priv = 1;
66module_param (disc_priv, bool, 0);
67MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))");
68
69MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>");
70MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module");
71MODULE_LICENSE("GPL");
72
73static const char *nsp32_release_version = "1.2";
74
75
76
77
78
79static struct pci_device_id nsp32_pci_table[] = {
80 {
81 .vendor = PCI_VENDOR_ID_IODATA,
82 .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II,
83 .subvendor = PCI_ANY_ID,
84 .subdevice = PCI_ANY_ID,
85 .driver_data = MODEL_IODATA,
86 },
87 {
88 .vendor = PCI_VENDOR_ID_WORKBIT,
89 .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME,
90 .subvendor = PCI_ANY_ID,
91 .subdevice = PCI_ANY_ID,
92 .driver_data = MODEL_KME,
93 },
94 {
95 .vendor = PCI_VENDOR_ID_WORKBIT,
96 .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT,
97 .subvendor = PCI_ANY_ID,
98 .subdevice = PCI_ANY_ID,
99 .driver_data = MODEL_WORKBIT,
100 },
101 {
102 .vendor = PCI_VENDOR_ID_WORKBIT,
103 .device = PCI_DEVICE_ID_WORKBIT_STANDARD,
104 .subvendor = PCI_ANY_ID,
105 .subdevice = PCI_ANY_ID,
106 .driver_data = MODEL_PCI_WORKBIT,
107 },
108 {
109 .vendor = PCI_VENDOR_ID_WORKBIT,
110 .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC,
111 .subvendor = PCI_ANY_ID,
112 .subdevice = PCI_ANY_ID,
113 .driver_data = MODEL_LOGITEC,
114 },
115 {
116 .vendor = PCI_VENDOR_ID_WORKBIT,
117 .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC,
118 .subvendor = PCI_ANY_ID,
119 .subdevice = PCI_ANY_ID,
120 .driver_data = MODEL_PCI_LOGITEC,
121 },
122 {
123 .vendor = PCI_VENDOR_ID_WORKBIT,
124 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO,
125 .subvendor = PCI_ANY_ID,
126 .subdevice = PCI_ANY_ID,
127 .driver_data = MODEL_PCI_MELCO,
128 },
129 {
130 .vendor = PCI_VENDOR_ID_WORKBIT,
131 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II,
132 .subvendor = PCI_ANY_ID,
133 .subdevice = PCI_ANY_ID,
134 .driver_data = MODEL_PCI_MELCO,
135 },
136 {0,0,},
137};
138MODULE_DEVICE_TABLE(pci, nsp32_pci_table);
139
140static nsp32_hw_data nsp32_data_base;
141
142
143
144
145
146
147
148static nsp32_sync_table nsp32_sync_table_40M[] = {
149
150 {0x1, 0, 0x0c, 0x0c, SMPL_40M},
151 {0x2, 0, 0x0d, 0x18, SMPL_40M},
152 {0x3, 1, 0x19, 0x19, SMPL_40M},
153 {0x4, 1, 0x1a, 0x1f, SMPL_20M},
154 {0x5, 2, 0x20, 0x25, SMPL_20M},
155 {0x6, 2, 0x26, 0x31, SMPL_20M},
156 {0x7, 3, 0x32, 0x32, SMPL_20M},
157 {0x8, 3, 0x33, 0x38, SMPL_10M},
158 {0x9, 3, 0x39, 0x3e, SMPL_10M},
159};
160
161static nsp32_sync_table nsp32_sync_table_20M[] = {
162 {0x1, 0, 0x19, 0x19, SMPL_40M},
163 {0x2, 0, 0x1a, 0x25, SMPL_20M},
164 {0x3, 1, 0x26, 0x32, SMPL_20M},
165 {0x4, 1, 0x33, 0x3e, SMPL_10M},
166 {0x5, 2, 0x3f, 0x4b, SMPL_10M},
167 {0x6, 2, 0x4c, 0x57, SMPL_10M},
168 {0x7, 3, 0x58, 0x64, SMPL_10M},
169 {0x8, 3, 0x65, 0x70, SMPL_10M},
170 {0x9, 3, 0x71, 0x7d, SMPL_10M},
171};
172
173static nsp32_sync_table nsp32_sync_table_pci[] = {
174 {0x1, 0, 0x0c, 0x0f, SMPL_40M},
175 {0x2, 0, 0x10, 0x16, SMPL_40M},
176 {0x3, 1, 0x17, 0x1e, SMPL_20M},
177 {0x4, 1, 0x1f, 0x25, SMPL_20M},
178 {0x5, 2, 0x26, 0x2d, SMPL_20M},
179 {0x6, 2, 0x2e, 0x34, SMPL_10M},
180 {0x7, 3, 0x35, 0x3c, SMPL_10M},
181 {0x8, 3, 0x3d, 0x43, SMPL_10M},
182 {0x9, 3, 0x44, 0x4b, SMPL_10M},
183};
184
185
186
187
188
189static int nsp32_probe (struct pci_dev *, const struct pci_device_id *);
190static void nsp32_remove(struct pci_dev *);
191static int __init init_nsp32 (void);
192static void __exit exit_nsp32 (void);
193
194
195static int nsp32_show_info (struct seq_file *, struct Scsi_Host *);
196
197static int nsp32_detect (struct pci_dev *pdev);
198static int nsp32_queuecommand(struct Scsi_Host *, struct scsi_cmnd *);
199static const char *nsp32_info (struct Scsi_Host *);
200static int nsp32_release (struct Scsi_Host *);
201
202
203static int nsp32_eh_abort (struct scsi_cmnd *);
204static int nsp32_eh_bus_reset (struct scsi_cmnd *);
205static int nsp32_eh_host_reset(struct scsi_cmnd *);
206
207
208static void nsp32_build_identify(struct scsi_cmnd *);
209static void nsp32_build_nop (struct scsi_cmnd *);
210static void nsp32_build_reject (struct scsi_cmnd *);
211static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char);
212
213
214static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short);
215static void nsp32_msgout_occur (struct scsi_cmnd *);
216static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short);
217
218static int nsp32_setup_sg_table (struct scsi_cmnd *);
219static int nsp32_selection_autopara(struct scsi_cmnd *);
220static int nsp32_selection_autoscsi(struct scsi_cmnd *);
221static void nsp32_scsi_done (struct scsi_cmnd *);
222static int nsp32_arbitration (struct scsi_cmnd *, unsigned int);
223static int nsp32_reselection (struct scsi_cmnd *, unsigned char);
224static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int);
225static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short);
226
227
228static void nsp32_analyze_sdtr (struct scsi_cmnd *);
229static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char);
230static void nsp32_set_async (nsp32_hw_data *, nsp32_target *);
231static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *);
232static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char);
233
234
235static void nsp32_wait_req (nsp32_hw_data *, int);
236static void nsp32_wait_sack (nsp32_hw_data *, int);
237static void nsp32_sack_assert (nsp32_hw_data *);
238static void nsp32_sack_negate (nsp32_hw_data *);
239static void nsp32_do_bus_reset(nsp32_hw_data *);
240
241
242static irqreturn_t do_nsp32_isr(int, void *);
243
244
245static int nsp32hw_init(nsp32_hw_data *);
246
247
248static int nsp32_getprom_param (nsp32_hw_data *);
249static int nsp32_getprom_at24 (nsp32_hw_data *);
250static int nsp32_getprom_c16 (nsp32_hw_data *);
251static void nsp32_prom_start (nsp32_hw_data *);
252static void nsp32_prom_stop (nsp32_hw_data *);
253static int nsp32_prom_read (nsp32_hw_data *, int);
254static int nsp32_prom_read_bit (nsp32_hw_data *);
255static void nsp32_prom_write_bit(nsp32_hw_data *, int);
256static void nsp32_prom_set (nsp32_hw_data *, int, int);
257static int nsp32_prom_get (nsp32_hw_data *, int);
258
259
260static void nsp32_message (const char *, int, char *, char *, ...);
261#ifdef NSP32_DEBUG
262static void nsp32_dmessage(const char *, int, int, char *, ...);
263#endif
264
265
266
267
268static struct scsi_host_template nsp32_template = {
269 .proc_name = "nsp32",
270 .name = "Workbit NinjaSCSI-32Bi/UDE",
271 .show_info = nsp32_show_info,
272 .info = nsp32_info,
273 .queuecommand = nsp32_queuecommand,
274 .can_queue = 1,
275 .sg_tablesize = NSP32_SG_SIZE,
276 .max_sectors = 128,
277 .this_id = NSP32_HOST_SCSIID,
278 .use_clustering = DISABLE_CLUSTERING,
279 .eh_abort_handler = nsp32_eh_abort,
280 .eh_bus_reset_handler = nsp32_eh_bus_reset,
281 .eh_host_reset_handler = nsp32_eh_host_reset,
282
283};
284
285#include "nsp32_io.h"
286
287
288
289
290#ifndef NSP32_DEBUG
291# define NSP32_DEBUG_MASK 0x000000
292# define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args)
293# define nsp32_dbg(mask, args...)
294#else
295# define NSP32_DEBUG_MASK 0xffffff
296# define nsp32_msg(type, args...) \
297 nsp32_message (__func__, __LINE__, (type), args)
298# define nsp32_dbg(mask, args...) \
299 nsp32_dmessage(__func__, __LINE__, (mask), args)
300#endif
301
302#define NSP32_DEBUG_QUEUECOMMAND BIT(0)
303#define NSP32_DEBUG_REGISTER BIT(1)
304#define NSP32_DEBUG_AUTOSCSI BIT(2)
305#define NSP32_DEBUG_INTR BIT(3)
306#define NSP32_DEBUG_SGLIST BIT(4)
307#define NSP32_DEBUG_BUSFREE BIT(5)
308#define NSP32_DEBUG_CDB_CONTENTS BIT(6)
309#define NSP32_DEBUG_RESELECTION BIT(7)
310#define NSP32_DEBUG_MSGINOCCUR BIT(8)
311#define NSP32_DEBUG_EEPROM BIT(9)
312#define NSP32_DEBUG_MSGOUTOCCUR BIT(10)
313#define NSP32_DEBUG_BUSRESET BIT(11)
314#define NSP32_DEBUG_RESTART BIT(12)
315#define NSP32_DEBUG_SYNC BIT(13)
316#define NSP32_DEBUG_WAIT BIT(14)
317#define NSP32_DEBUG_TARGETFLAG BIT(15)
318#define NSP32_DEBUG_PROC BIT(16)
319#define NSP32_DEBUG_INIT BIT(17)
320#define NSP32_SPECIAL_PRINT_REGISTER BIT(20)
321
322#define NSP32_DEBUG_BUF_LEN 100
323
324static void nsp32_message(const char *func, int line, char *type, char *fmt, ...)
325{
326 va_list args;
327 char buf[NSP32_DEBUG_BUF_LEN];
328
329 va_start(args, fmt);
330 vsnprintf(buf, sizeof(buf), fmt, args);
331 va_end(args);
332
333#ifndef NSP32_DEBUG
334 printk("%snsp32: %s\n", type, buf);
335#else
336 printk("%snsp32: %s (%d): %s\n", type, func, line, buf);
337#endif
338}
339
340#ifdef NSP32_DEBUG
341static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...)
342{
343 va_list args;
344 char buf[NSP32_DEBUG_BUF_LEN];
345
346 va_start(args, fmt);
347 vsnprintf(buf, sizeof(buf), fmt, args);
348 va_end(args);
349
350 if (mask & NSP32_DEBUG_MASK) {
351 printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf);
352 }
353}
354#endif
355
356#ifdef NSP32_DEBUG
357# include "nsp32_debug.c"
358#else
359# define show_command(arg)
360# define show_busphase(arg)
361# define show_autophase(arg)
362#endif
363
364
365
366
367static void nsp32_build_identify(struct scsi_cmnd *SCpnt)
368{
369 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
370 int pos = data->msgout_len;
371 int mode = FALSE;
372
373
374 if (disc_priv == 0) {
375
376 }
377
378 data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
379
380 data->msgout_len = pos;
381}
382
383
384
385
386static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt,
387 unsigned char period,
388 unsigned char offset)
389{
390 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
391 int pos = data->msgout_len;
392
393 data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
394 data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
395 data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
396 data->msgoutbuf[pos] = period; pos++;
397 data->msgoutbuf[pos] = offset; pos++;
398
399 data->msgout_len = pos;
400}
401
402
403
404
405static void nsp32_build_nop(struct scsi_cmnd *SCpnt)
406{
407 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
408 int pos = data->msgout_len;
409
410 if (pos != 0) {
411 nsp32_msg(KERN_WARNING,
412 "Some messages are already contained!");
413 return;
414 }
415
416 data->msgoutbuf[pos] = NOP; pos++;
417 data->msgout_len = pos;
418}
419
420
421
422
423static void nsp32_build_reject(struct scsi_cmnd *SCpnt)
424{
425 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
426 int pos = data->msgout_len;
427
428 data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
429 data->msgout_len = pos;
430}
431
432
433
434
435#if 0
436static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time)
437{
438 unsigned int base = SCpnt->host->io_port;
439
440 nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time);
441
442 if (time & (~TIMER_CNT_MASK)) {
443 nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow");
444 }
445
446 nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK);
447}
448#endif
449
450
451
452
453
454static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt)
455{
456 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
457 unsigned int base = SCpnt->device->host->io_port;
458 unsigned int host_id = SCpnt->device->host->this_id;
459 unsigned char target = scmd_id(SCpnt);
460 nsp32_autoparam *param = data->autoparam;
461 unsigned char phase;
462 int i, ret;
463 unsigned int msgout;
464 u16_le s;
465
466 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
467
468
469
470
471 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
472 if (phase != BUSMON_BUS_FREE) {
473 nsp32_msg(KERN_WARNING, "bus busy");
474 show_busphase(phase & BUSMON_PHASE_MASK);
475 SCpnt->result = DID_BUS_BUSY << 16;
476 return FALSE;
477 }
478
479
480
481
482
483
484
485 if (data->msgout_len == 0) {
486 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
487 SCpnt->result = DID_ERROR << 16;
488 return FALSE;
489 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
490 msgout = 0;
491 for (i = 0; i < data->msgout_len; i++) {
492
493
494
495
496
497
498 msgout >>= 8;
499 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
500 }
501 msgout |= MV_VALID;
502 msgout |= (unsigned int)data->msgout_len;
503 } else {
504
505 msgout = 0;
506 }
507
508
509
510
511
512
513
514 memset(param, 0, sizeof(nsp32_autoparam));
515
516
517 for (i = 0; i < SCpnt->cmd_len; i++) {
518 param->cdb[4 * i] = SCpnt->cmnd[i];
519 }
520
521
522 param->msgout = cpu_to_le32(msgout);
523
524
525 param->syncreg = data->cur_target->syncreg;
526 param->ackwidth = data->cur_target->ackwidth;
527 param->target_id = BIT(host_id) | BIT(target);
528 param->sample_reg = data->cur_target->sample_reg;
529
530
531
532
533 param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER |
534 AUTOSCSI_START |
535 AUTO_MSGIN_00_OR_04 |
536 AUTO_MSGIN_02 |
537 AUTO_ATN );
538
539
540
541 s = 0;
542 switch (data->trans_method) {
543 case NSP32_TRANSFER_BUSMASTER:
544 s |= BM_START;
545 break;
546 case NSP32_TRANSFER_MMIO:
547 s |= CB_MMIO_MODE;
548 break;
549 case NSP32_TRANSFER_PIO:
550 s |= CB_IO_MODE;
551 break;
552 default:
553 nsp32_msg(KERN_ERR, "unknown trans_method");
554 break;
555 }
556
557
558
559
560 s |= (TRANSFER_GO | ALL_COUNTER_CLR);
561 param->transfer_control = cpu_to_le16(s);
562
563
564 param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
565
566
567
568
569 nsp32_write4(base, SGT_ADR, data->auto_paddr);
570 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER |
571 AUTO_PARAMETER );
572
573
574
575
576 ret = nsp32_arbitration(SCpnt, base);
577
578 return ret;
579}
580
581
582
583
584
585static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt)
586{
587 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
588 unsigned int base = SCpnt->device->host->io_port;
589 unsigned int host_id = SCpnt->device->host->this_id;
590 unsigned char target = scmd_id(SCpnt);
591 unsigned char phase;
592 int status;
593 unsigned short command = 0;
594 unsigned int msgout = 0;
595 unsigned short execph;
596 int i;
597
598 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in");
599
600
601
602
603 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
604
605
606
607
608 phase = nsp32_read1(base, SCSI_BUS_MONITOR);
609 if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) {
610 nsp32_msg(KERN_WARNING, "bus busy");
611 SCpnt->result = DID_BUS_BUSY << 16;
612 status = 1;
613 goto out;
614 }
615
616
617
618
619 execph = nsp32_read2(base, SCSI_EXECUTE_PHASE);
620
621
622
623
624 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER);
625
626
627
628
629 for (i = 0; i < SCpnt->cmd_len; i++) {
630 nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]);
631 }
632 nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]);
633
634
635
636
637 nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target));
638
639
640
641
642
643
644
645 if (data->msgout_len == 0) {
646 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!");
647 SCpnt->result = DID_ERROR << 16;
648 status = 1;
649 goto out;
650 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
651 msgout = 0;
652 for (i = 0; i < data->msgout_len; i++) {
653
654
655
656
657
658
659 msgout >>= 8;
660 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
661 }
662 msgout |= MV_VALID;
663 msgout |= (unsigned int)data->msgout_len;
664 nsp32_write4(base, SCSI_MSG_OUT, msgout);
665 } else {
666
667 nsp32_write4(base, SCSI_MSG_OUT, 0);
668 }
669
670
671
672
673 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
674
675
676
677
678
679
680
681 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
682
683
684
685
686 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
687
688
689
690
691
692 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
693
694
695
696
697 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
698
699 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
700 "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x",
701 nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH),
702 nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID));
703 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x",
704 data->msgout_len, msgout);
705
706
707
708
709 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
710
711
712
713
714 command = 0;
715 command |= (TRANSFER_GO | ALL_COUNTER_CLR);
716 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
717 if (scsi_bufflen(SCpnt) > 0) {
718 command |= BM_START;
719 }
720 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
721 command |= CB_MMIO_MODE;
722 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
723 command |= CB_IO_MODE;
724 }
725 nsp32_write2(base, TRANSFER_CONTROL, command);
726
727
728
729
730 command = (CLEAR_CDB_FIFO_POINTER |
731 AUTOSCSI_START |
732 AUTO_MSGIN_00_OR_04 |
733 AUTO_MSGIN_02 |
734 AUTO_ATN );
735 nsp32_write2(base, COMMAND_CONTROL, command);
736
737
738
739
740 status = nsp32_arbitration(SCpnt, base);
741
742 out:
743
744
745
746 nsp32_write2(base, IRQ_CONTROL, 0);
747
748 return status;
749}
750
751
752
753
754
755
756
757
758
759
760static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base)
761{
762 unsigned char arbit;
763 int status = TRUE;
764 int time = 0;
765
766 do {
767 arbit = nsp32_read1(base, ARBIT_STATUS);
768 time++;
769 } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 &&
770 (time <= ARBIT_TIMEOUT_TIME));
771
772 nsp32_dbg(NSP32_DEBUG_AUTOSCSI,
773 "arbit: 0x%x, delay time: %d", arbit, time);
774
775 if (arbit & ARBIT_WIN) {
776
777 SCpnt->result = DID_OK << 16;
778 nsp32_index_write1(base, EXT_PORT, LED_ON);
779 } else if (arbit & ARBIT_FAIL) {
780
781 SCpnt->result = DID_BUS_BUSY << 16;
782 status = FALSE;
783 } else {
784
785
786
787
788 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout");
789 SCpnt->result = DID_NO_CONNECT << 16;
790 status = FALSE;
791 }
792
793
794
795
796 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR);
797
798 return status;
799}
800
801
802
803
804
805
806
807
808
809static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun)
810{
811 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
812 unsigned int host_id = SCpnt->device->host->this_id;
813 unsigned int base = SCpnt->device->host->io_port;
814 unsigned char tmpid, newid;
815
816 nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter");
817
818
819
820
821 tmpid = nsp32_read1(base, RESELECT_ID);
822 tmpid &= (~BIT(host_id));
823 newid = 0;
824 while (tmpid) {
825 if (tmpid & 1) {
826 break;
827 }
828 tmpid >>= 1;
829 newid++;
830 }
831
832
833
834
835
836
837 if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) {
838 nsp32_msg(KERN_WARNING, "unknown id/lun");
839 return FALSE;
840 } else if(data->lunt[newid][newlun].SCpnt == NULL) {
841 nsp32_msg(KERN_WARNING, "no SCSI command is processing");
842 return FALSE;
843 }
844
845 data->cur_id = newid;
846 data->cur_lun = newlun;
847 data->cur_target = &(data->target[newid]);
848 data->cur_lunt = &(data->lunt[newid][newlun]);
849
850
851 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
852
853 return TRUE;
854}
855
856
857
858
859
860
861
862
863static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt)
864{
865 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
866 struct scatterlist *sg;
867 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
868 int num, i;
869 u32_le l;
870
871 if (sgt == NULL) {
872 nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null");
873 return FALSE;
874 }
875
876 num = scsi_dma_map(SCpnt);
877 if (!num)
878 return TRUE;
879 else if (num < 0)
880 return FALSE;
881 else {
882 scsi_for_each_sg(SCpnt, sg, num, i) {
883
884
885
886 sgt[i].addr = cpu_to_le32(sg_dma_address(sg));
887 sgt[i].len = cpu_to_le32(sg_dma_len(sg));
888
889 if (le32_to_cpu(sgt[i].len) > 0x10000) {
890 nsp32_msg(KERN_ERR,
891 "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len));
892 return FALSE;
893 }
894 nsp32_dbg(NSP32_DEBUG_SGLIST,
895 "num 0x%x : addr 0x%lx len 0x%lx",
896 i,
897 le32_to_cpu(sgt[i].addr),
898 le32_to_cpu(sgt[i].len ));
899 }
900
901
902 l = le32_to_cpu(sgt[num-1].len);
903 sgt[num-1].len = cpu_to_le32(l | SGTEND);
904 }
905
906 return TRUE;
907}
908
909static int nsp32_queuecommand_lck(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *))
910{
911 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
912 nsp32_target *target;
913 nsp32_lunt *cur_lunt;
914 int ret;
915
916 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
917 "enter. target: 0x%x LUN: 0x%llx cmnd: 0x%x cmndlen: 0x%x "
918 "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x",
919 SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len,
920 scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt));
921
922 if (data->CurrentSC != NULL) {
923 nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request");
924 data->CurrentSC = NULL;
925 SCpnt->result = DID_NO_CONNECT << 16;
926 done(SCpnt);
927 return 0;
928 }
929
930
931 if (scmd_id(SCpnt) == SCpnt->device->host->this_id) {
932 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "target==host???");
933 SCpnt->result = DID_BAD_TARGET << 16;
934 done(SCpnt);
935 return 0;
936 }
937
938
939 if (SCpnt->device->lun >= MAX_LUN) {
940 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun");
941 SCpnt->result = DID_BAD_TARGET << 16;
942 done(SCpnt);
943 return 0;
944 }
945
946 show_command(SCpnt);
947
948 SCpnt->scsi_done = done;
949 data->CurrentSC = SCpnt;
950 SCpnt->SCp.Status = CHECK_CONDITION;
951 SCpnt->SCp.Message = 0;
952 scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
953
954 SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt);
955 SCpnt->SCp.this_residual = scsi_bufflen(SCpnt);
956 SCpnt->SCp.buffer = NULL;
957 SCpnt->SCp.buffers_residual = 0;
958
959
960 data->msgout_len = 0;
961 data->msgin_len = 0;
962 cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
963 cur_lunt->SCpnt = SCpnt;
964 cur_lunt->save_datp = 0;
965 cur_lunt->msgin03 = FALSE;
966 data->cur_lunt = cur_lunt;
967 data->cur_id = SCpnt->device->id;
968 data->cur_lun = SCpnt->device->lun;
969
970 ret = nsp32_setup_sg_table(SCpnt);
971 if (ret == FALSE) {
972 nsp32_msg(KERN_ERR, "SGT fail");
973 SCpnt->result = DID_ERROR << 16;
974 nsp32_scsi_done(SCpnt);
975 return 0;
976 }
977
978
979 nsp32_build_identify(SCpnt);
980
981
982
983
984
985
986 target = &data->target[scmd_id(SCpnt)];
987 data->cur_target = target;
988
989 if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) {
990 unsigned char period, offset;
991
992 if (trans_mode != ASYNC_MODE) {
993 nsp32_set_max_sync(data, target, &period, &offset);
994 nsp32_build_sdtr(SCpnt, period, offset);
995 target->sync_flag |= SDTR_INITIATOR;
996 } else {
997 nsp32_set_async(data, target);
998 target->sync_flag |= SDTR_DONE;
999 }
1000
1001 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1002 "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n",
1003 target->limit_entry, period, offset);
1004 } else if (target->sync_flag & SDTR_INITIATOR) {
1005
1006
1007
1008
1009
1010 nsp32_set_async(data, target);
1011 target->sync_flag &= ~SDTR_INITIATOR;
1012 target->sync_flag |= SDTR_DONE;
1013
1014 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1015 "SDTR_INITIATOR: fall back to async");
1016 } else if (target->sync_flag & SDTR_TARGET) {
1017
1018
1019
1020
1021
1022 nsp32_set_async(data, target);
1023 target->sync_flag &= ~SDTR_TARGET;
1024 target->sync_flag |= SDTR_DONE;
1025
1026 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND,
1027 "Unknown SDTR from target is reached, fall back to async.");
1028 }
1029
1030 nsp32_dbg(NSP32_DEBUG_TARGETFLAG,
1031 "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x",
1032 SCpnt->device->id, target->sync_flag, target->syncreg,
1033 target->ackwidth);
1034
1035
1036 if (auto_param == 0) {
1037 ret = nsp32_selection_autopara(SCpnt);
1038 } else {
1039 ret = nsp32_selection_autoscsi(SCpnt);
1040 }
1041
1042 if (ret != TRUE) {
1043 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail");
1044 nsp32_scsi_done(SCpnt);
1045 }
1046
1047 return 0;
1048}
1049
1050static DEF_SCSI_QCMD(nsp32_queuecommand)
1051
1052
1053static int nsp32hw_init(nsp32_hw_data *data)
1054{
1055 unsigned int base = data->BaseAddress;
1056 unsigned short irq_stat;
1057 unsigned long lc_reg;
1058 unsigned char power;
1059
1060 lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE);
1061 if ((lc_reg & 0xff00) == 0) {
1062 lc_reg |= (0x20 << 8);
1063 nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff);
1064 }
1065
1066 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1067 nsp32_write2(base, TRANSFER_CONTROL, 0);
1068 nsp32_write4(base, BM_CNT, 0);
1069 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1070
1071 do {
1072 irq_stat = nsp32_read2(base, IRQ_STATUS);
1073 nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat);
1074 } while (irq_stat & IRQSTATUS_ANY_IRQ);
1075
1076
1077
1078
1079
1080 if ((data->trans_method & NSP32_TRANSFER_PIO) ||
1081 (data->trans_method & NSP32_TRANSFER_MMIO)) {
1082 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40);
1083 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40);
1084 } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1085 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10);
1086 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60);
1087 } else {
1088 nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode");
1089 }
1090
1091 nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x",
1092 nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT),
1093 nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT));
1094
1095 nsp32_index_write1(base, CLOCK_DIV, data->clock);
1096 nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD);
1097 nsp32_write1(base, PARITY_CONTROL, 0);
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114 nsp32_index_write2(base, MISC_WR,
1115 (SCSI_DIRECTION_DETECTOR_SELECT |
1116 DELAYED_BMSTART |
1117 MASTER_TERMINATION_SELECT |
1118 BMREQ_NEGATE_TIMING_SEL |
1119 AUTOSEL_TIMING_SEL |
1120 BMSTOP_CHANGE2_NONDATA_PHASE));
1121
1122 nsp32_index_write1(base, TERM_PWR_CONTROL, 0);
1123 power = nsp32_index_read1(base, TERM_PWR_CONTROL);
1124 if (!(power & SENSE)) {
1125 nsp32_msg(KERN_INFO, "term power on");
1126 nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR);
1127 }
1128
1129 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1130 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1131
1132 nsp32_write1(base, SYNC_REG, 0);
1133 nsp32_write1(base, ACK_WIDTH, 0);
1134 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME);
1135
1136
1137
1138
1139
1140 nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ |
1141 IRQSELECT_SCSIRESET_IRQ |
1142 IRQSELECT_FIFO_SHLD_IRQ |
1143 IRQSELECT_RESELECT_IRQ |
1144 IRQSELECT_PHASE_CHANGE_IRQ |
1145 IRQSELECT_AUTO_SCSI_SEQ_IRQ |
1146
1147 IRQSELECT_TARGET_ABORT_IRQ |
1148 IRQSELECT_MASTER_ABORT_IRQ );
1149 nsp32_write2(base, IRQ_CONTROL, 0);
1150
1151
1152 nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF);
1153 nsp32_index_write1(base, EXT_PORT, LED_OFF);
1154
1155 return TRUE;
1156}
1157
1158
1159
1160static irqreturn_t do_nsp32_isr(int irq, void *dev_id)
1161{
1162 nsp32_hw_data *data = dev_id;
1163 unsigned int base = data->BaseAddress;
1164 struct scsi_cmnd *SCpnt = data->CurrentSC;
1165 unsigned short auto_stat, irq_stat, trans_stat;
1166 unsigned char busmon, busphase;
1167 unsigned long flags;
1168 int ret;
1169 int handled = 0;
1170 struct Scsi_Host *host = data->Host;
1171
1172 spin_lock_irqsave(host->host_lock, flags);
1173
1174
1175
1176
1177 irq_stat = nsp32_read2(base, IRQ_STATUS);
1178 nsp32_dbg(NSP32_DEBUG_INTR,
1179 "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat);
1180
1181 if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) {
1182 nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat);
1183 goto out2;
1184 }
1185 handled = 1;
1186 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
1187
1188 busmon = nsp32_read1(base, SCSI_BUS_MONITOR);
1189 busphase = busmon & BUSMON_PHASE_MASK;
1190
1191 trans_stat = nsp32_read2(base, TRANSFER_STATUS);
1192 if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) {
1193 nsp32_msg(KERN_INFO, "card disconnect");
1194 if (data->CurrentSC != NULL) {
1195 nsp32_msg(KERN_INFO, "clean up current SCSI command");
1196 SCpnt->result = DID_BAD_TARGET << 16;
1197 nsp32_scsi_done(SCpnt);
1198 }
1199 goto out;
1200 }
1201
1202
1203 if (irq_stat & IRQSTATUS_TIMER_IRQ) {
1204 nsp32_dbg(NSP32_DEBUG_INTR, "timer stop");
1205 nsp32_write2(base, TIMER_SET, TIMER_STOP);
1206 goto out;
1207 }
1208
1209
1210 if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) {
1211 nsp32_msg(KERN_INFO, "detected someone do bus reset");
1212 nsp32_do_bus_reset(data);
1213 if (SCpnt != NULL) {
1214 SCpnt->result = DID_RESET << 16;
1215 nsp32_scsi_done(SCpnt);
1216 }
1217 goto out;
1218 }
1219
1220 if (SCpnt == NULL) {
1221 nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened");
1222 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1223 goto out;
1224 }
1225
1226
1227
1228
1229
1230
1231
1232 if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) {
1233
1234 auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE);
1235 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0);
1236
1237
1238 if (auto_stat & SELECTION_TIMEOUT) {
1239 nsp32_dbg(NSP32_DEBUG_INTR,
1240 "selection timeout occurred");
1241
1242 SCpnt->result = DID_TIME_OUT << 16;
1243 nsp32_scsi_done(SCpnt);
1244 goto out;
1245 }
1246
1247 if (auto_stat & MSGOUT_PHASE) {
1248
1249
1250
1251
1252
1253
1254
1255 if (!(auto_stat & MSG_IN_OCCUER) &&
1256 (data->msgout_len <= 3)) {
1257
1258
1259
1260
1261 data->msgout_len = 0;
1262 };
1263
1264 nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed");
1265 }
1266
1267 if ((auto_stat & DATA_IN_PHASE) &&
1268 (scsi_get_resid(SCpnt) > 0) &&
1269 ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) {
1270 printk( "auto+fifo\n");
1271
1272 }
1273
1274 if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) {
1275
1276 nsp32_dbg(NSP32_DEBUG_INTR,
1277 "Data in/out phase processed");
1278
1279
1280 nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx",
1281 nsp32_read4(base, BM_CNT));
1282 nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx",
1283 nsp32_read4(base, SGT_ADR));
1284 nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx",
1285 nsp32_read4(base, SACK_CNT));
1286 nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx",
1287 nsp32_read4(base, SAVED_SACK_CNT));
1288
1289 scsi_set_resid(SCpnt, 0);
1290 }
1291
1292
1293
1294
1295 if (auto_stat & MSG_IN_OCCUER) {
1296 nsp32_msgin_occur(SCpnt, irq_stat, auto_stat);
1297 }
1298
1299
1300
1301
1302 if (auto_stat & MSG_OUT_OCCUER) {
1303 nsp32_msgout_occur(SCpnt);
1304 }
1305
1306
1307
1308
1309 if (auto_stat & BUS_FREE_OCCUER) {
1310 ret = nsp32_busfree_occur(SCpnt, auto_stat);
1311 if (ret == TRUE) {
1312 goto out;
1313 }
1314 }
1315
1316 if (auto_stat & STATUS_PHASE) {
1317
1318
1319
1320
1321
1322
1323
1324 SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN);
1325 }
1326
1327 if (auto_stat & ILLEGAL_PHASE) {
1328
1329 nsp32_msg(KERN_WARNING,
1330 "AUTO SCSI ILLEGAL PHASE OCCUR!!!!");
1331
1332
1333
1334
1335
1336
1337 nsp32_sack_assert(data);
1338 nsp32_wait_req(data, NEGATE);
1339 nsp32_sack_negate(data);
1340
1341 }
1342
1343 if (auto_stat & COMMAND_PHASE) {
1344
1345 nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed");
1346 }
1347
1348 if (auto_stat & AUTOSCSI_BUSY) {
1349
1350 }
1351
1352 show_autophase(auto_stat);
1353 }
1354
1355
1356 if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) {
1357 nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ");
1358
1359 switch(busphase) {
1360 case BUSPHASE_DATA_OUT:
1361 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write");
1362
1363
1364
1365 break;
1366
1367 case BUSPHASE_DATA_IN:
1368 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read");
1369
1370
1371
1372 break;
1373
1374 case BUSPHASE_STATUS:
1375 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status");
1376
1377 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1378
1379 break;
1380 default:
1381 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase");
1382 nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1383 show_busphase(busphase);
1384 break;
1385 }
1386
1387 goto out;
1388 }
1389
1390
1391 if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) {
1392 nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ");
1393
1394 switch(busphase) {
1395 case BUSPHASE_MESSAGE_IN:
1396 nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in");
1397 nsp32_msgin_occur(SCpnt, irq_stat, 0);
1398 break;
1399 default:
1400 nsp32_msg(KERN_WARNING, "phase chg/other phase?");
1401 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n",
1402 irq_stat, trans_stat);
1403 show_busphase(busphase);
1404 break;
1405 }
1406 goto out;
1407 }
1408
1409
1410 if (irq_stat & IRQSTATUS_PCI_IRQ) {
1411 nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred");
1412
1413 }
1414
1415
1416 if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) {
1417 nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! ");
1418
1419
1420
1421
1422
1423 }
1424
1425#if 0
1426 nsp32_dbg(NSP32_DEBUG_INTR,
1427 "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat);
1428 show_busphase(busphase);
1429#endif
1430
1431 out:
1432
1433 nsp32_write2(base, IRQ_CONTROL, 0);
1434
1435 out2:
1436 spin_unlock_irqrestore(host->host_lock, flags);
1437
1438 nsp32_dbg(NSP32_DEBUG_INTR, "exit");
1439
1440 return IRQ_RETVAL(handled);
1441}
1442
1443
1444static int nsp32_show_info(struct seq_file *m, struct Scsi_Host *host)
1445{
1446 unsigned long flags;
1447 nsp32_hw_data *data;
1448 int hostno;
1449 unsigned int base;
1450 unsigned char mode_reg;
1451 int id, speed;
1452 long model;
1453
1454 hostno = host->host_no;
1455 data = (nsp32_hw_data *)host->hostdata;
1456 base = host->io_port;
1457
1458 seq_puts(m, "NinjaSCSI-32 status\n\n");
1459 seq_printf(m, "Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version);
1460 seq_printf(m, "SCSI host No.: %d\n", hostno);
1461 seq_printf(m, "IRQ: %d\n", host->irq);
1462 seq_printf(m, "IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1);
1463 seq_printf(m, "MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1);
1464 seq_printf(m, "sg_tablesize: %d\n", host->sg_tablesize);
1465 seq_printf(m, "Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff);
1466
1467 mode_reg = nsp32_index_read1(base, CHIP_MODE);
1468 model = data->pci_devid->driver_data;
1469
1470#ifdef CONFIG_PM
1471 seq_printf(m, "Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no");
1472#endif
1473 seq_printf(m, "OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]);
1474
1475 spin_lock_irqsave(&(data->Lock), flags);
1476 seq_printf(m, "CurrentSC: 0x%p\n\n", data->CurrentSC);
1477 spin_unlock_irqrestore(&(data->Lock), flags);
1478
1479
1480 seq_puts(m, "SDTR status\n");
1481 for (id = 0; id < ARRAY_SIZE(data->target); id++) {
1482
1483 seq_printf(m, "id %d: ", id);
1484
1485 if (id == host->this_id) {
1486 seq_puts(m, "----- NinjaSCSI-32 host adapter\n");
1487 continue;
1488 }
1489
1490 if (data->target[id].sync_flag == SDTR_DONE) {
1491 if (data->target[id].period == 0 &&
1492 data->target[id].offset == ASYNC_OFFSET ) {
1493 seq_puts(m, "async");
1494 } else {
1495 seq_puts(m, " sync");
1496 }
1497 } else {
1498 seq_puts(m, " none");
1499 }
1500
1501 if (data->target[id].period != 0) {
1502
1503 speed = 1000000 / (data->target[id].period * 4);
1504
1505 seq_printf(m, " transfer %d.%dMB/s, offset %d",
1506 speed / 1000,
1507 speed % 1000,
1508 data->target[id].offset
1509 );
1510 }
1511 seq_putc(m, '\n');
1512 }
1513 return 0;
1514}
1515
1516
1517
1518
1519
1520
1521
1522static void nsp32_scsi_done(struct scsi_cmnd *SCpnt)
1523{
1524 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1525 unsigned int base = SCpnt->device->host->io_port;
1526
1527 scsi_dma_unmap(SCpnt);
1528
1529
1530
1531
1532 nsp32_write2(base, TRANSFER_CONTROL, 0);
1533 nsp32_write4(base, BM_CNT, 0);
1534
1535
1536
1537
1538 (*SCpnt->scsi_done)(SCpnt);
1539
1540
1541
1542
1543 data->cur_lunt->SCpnt = NULL;
1544 data->cur_lunt = NULL;
1545 data->cur_target = NULL;
1546 data->CurrentSC = NULL;
1547}
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph)
1561{
1562 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1563 unsigned int base = SCpnt->device->host->io_port;
1564
1565 nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph);
1566 show_autophase(execph);
1567
1568 nsp32_write4(base, BM_CNT, 0);
1569 nsp32_write2(base, TRANSFER_CONTROL, 0);
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582 if (execph & MSGIN_02_VALID) {
1583 nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid");
1584
1585
1586
1587
1588
1589 if (!(execph & MSGIN_00_VALID) &&
1590 ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) {
1591 unsigned int sacklen, s_sacklen;
1592
1593
1594
1595
1596 sacklen = nsp32_read4(base, SACK_CNT );
1597 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
1598
1599
1600
1601
1602
1603 if (s_sacklen > 0) {
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615 if (sacklen != s_sacklen) {
1616 data->cur_lunt->msgin03 = FALSE;
1617 } else {
1618 data->cur_lunt->msgin03 = TRUE;
1619 }
1620
1621 nsp32_adjust_busfree(SCpnt, s_sacklen);
1622 }
1623 }
1624
1625
1626
1627 } else {
1628
1629
1630
1631 }
1632
1633 if (execph & MSGIN_03_VALID) {
1634
1635 }
1636
1637
1638
1639
1640 if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1641
1642
1643
1644
1645 nsp32_set_async(data, data->cur_target);
1646 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1647 data->cur_target->sync_flag |= SDTR_DONE;
1648 } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1649
1650
1651
1652
1653 if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) {
1654
1655
1656
1657
1658 } else {
1659
1660
1661
1662
1663
1664 nsp32_set_async(data, data->cur_target);
1665 }
1666 data->cur_target->sync_flag &= ~SDTR_TARGET;
1667 data->cur_target->sync_flag |= SDTR_DONE;
1668 }
1669
1670
1671
1672
1673
1674
1675
1676 if (execph & MSGIN_00_VALID) {
1677
1678 nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete");
1679
1680 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1681 SCpnt->SCp.Message = 0;
1682 nsp32_dbg(NSP32_DEBUG_BUSFREE,
1683 "normal end stat=0x%x resid=0x%x\n",
1684 SCpnt->SCp.Status, scsi_get_resid(SCpnt));
1685 SCpnt->result = (DID_OK << 16) |
1686 (SCpnt->SCp.Message << 8) |
1687 (SCpnt->SCp.Status << 0);
1688 nsp32_scsi_done(SCpnt);
1689
1690 return TRUE;
1691 } else if (execph & MSGIN_04_VALID) {
1692
1693 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN);
1694 SCpnt->SCp.Message = 4;
1695
1696 nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect");
1697 return TRUE;
1698 } else {
1699
1700 nsp32_msg(KERN_WARNING, "unexpected bus free occurred");
1701
1702
1703
1704 SCpnt->result = DID_ERROR << 16;
1705 nsp32_scsi_done(SCpnt);
1706 return TRUE;
1707 }
1708 return FALSE;
1709}
1710
1711
1712
1713
1714
1715
1716
1717
1718static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen)
1719{
1720 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1721 int old_entry = data->cur_entry;
1722 int new_entry;
1723 int sg_num = data->cur_lunt->sg_num;
1724 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
1725 unsigned int restlen, sentlen;
1726 u32_le len, addr;
1727
1728 nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt));
1729
1730
1731 s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3;
1732
1733
1734
1735
1736
1737 sentlen = 0;
1738 for (new_entry = old_entry; new_entry < sg_num; new_entry++) {
1739 sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND);
1740 if (sentlen > s_sacklen) {
1741 break;
1742 }
1743 }
1744
1745
1746 if (new_entry == sg_num) {
1747 goto last;
1748 }
1749
1750 if (sentlen == s_sacklen) {
1751
1752
1753
1754 }
1755
1756
1757 restlen = sentlen - s_sacklen;
1758
1759
1760 len = le32_to_cpu(sgt[new_entry].len);
1761 addr = le32_to_cpu(sgt[new_entry].addr);
1762 addr += (len - restlen);
1763 sgt[new_entry].addr = cpu_to_le32(addr);
1764 sgt[new_entry].len = cpu_to_le32(restlen);
1765
1766
1767 data->cur_entry = new_entry;
1768
1769 return;
1770
1771 last:
1772 if (scsi_get_resid(SCpnt) < sentlen) {
1773 nsp32_msg(KERN_ERR, "resid underflow");
1774 }
1775
1776 scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen);
1777 nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt));
1778
1779
1780
1781 return;
1782}
1783
1784
1785
1786
1787
1788
1789
1790
1791static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt)
1792{
1793 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1794 unsigned int base = SCpnt->device->host->io_port;
1795
1796 long new_sgtp;
1797 int i;
1798
1799 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1800 "enter: msgout_len: 0x%x", data->msgout_len);
1801
1802
1803
1804
1805
1806 if (data->msgout_len == 0) {
1807 nsp32_build_nop(SCpnt);
1808 }
1809
1810
1811
1812
1813
1814
1815 new_sgtp = data->cur_lunt->sglun_paddr +
1816 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
1817
1818
1819
1820
1821 for (i = 0; i < data->msgout_len; i++) {
1822 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR,
1823 "%d : 0x%x", i, data->msgoutbuf[i]);
1824
1825
1826
1827
1828 nsp32_wait_req(data, ASSERT);
1829
1830 if (i == (data->msgout_len - 1)) {
1831
1832
1833
1834
1835
1836
1837
1838 nsp32_write2(base, COMMAND_CONTROL,
1839 (CLEAR_CDB_FIFO_POINTER |
1840 AUTO_COMMAND_PHASE |
1841 AUTOSCSI_RESTART |
1842 AUTO_MSGIN_00_OR_04 |
1843 AUTO_MSGIN_02 ));
1844 }
1845
1846
1847
1848
1849 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
1850 nsp32_wait_sack(data, NEGATE);
1851
1852 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n",
1853 nsp32_read1(base, SCSI_BUS_MONITOR));
1854 };
1855
1856 data->msgout_len = 0;
1857
1858 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit");
1859}
1860
1861
1862
1863
1864
1865
1866
1867static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command)
1868{
1869 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1870 unsigned int base = data->BaseAddress;
1871 unsigned short transfer = 0;
1872
1873 nsp32_dbg(NSP32_DEBUG_RESTART, "enter");
1874
1875 if (data->cur_target == NULL || data->cur_lunt == NULL) {
1876 nsp32_msg(KERN_ERR, "Target or Lun is invalid");
1877 }
1878
1879
1880
1881
1882
1883 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
1884
1885
1886
1887
1888 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
1889
1890
1891
1892
1893 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
1894
1895
1896
1897
1898 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
1899
1900
1901
1902
1903 transfer = 0;
1904 transfer |= (TRANSFER_GO | ALL_COUNTER_CLR);
1905 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1906 if (scsi_bufflen(SCpnt) > 0) {
1907 transfer |= BM_START;
1908 }
1909 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
1910 transfer |= CB_MMIO_MODE;
1911 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
1912 transfer |= CB_IO_MODE;
1913 }
1914 nsp32_write2(base, TRANSFER_CONTROL, transfer);
1915
1916
1917
1918
1919
1920
1921 command |= (CLEAR_CDB_FIFO_POINTER |
1922 AUTO_COMMAND_PHASE |
1923 AUTOSCSI_RESTART );
1924 nsp32_write2(base, COMMAND_CONTROL, command);
1925
1926 nsp32_dbg(NSP32_DEBUG_RESTART, "exit");
1927}
1928
1929
1930
1931
1932
1933static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt,
1934 unsigned long irq_status,
1935 unsigned short execph)
1936{
1937 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1938 unsigned int base = SCpnt->device->host->io_port;
1939 unsigned char msg;
1940 unsigned char msgtype;
1941 unsigned char newlun;
1942 unsigned short command = 0;
1943 int msgclear = TRUE;
1944 long new_sgtp;
1945 int ret;
1946
1947
1948
1949
1950
1951
1952 msg = nsp32_read1(base, SCSI_DATA_IN);
1953 data->msginbuf[(unsigned char)data->msgin_len] = msg;
1954 msgtype = data->msginbuf[0];
1955 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR,
1956 "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x",
1957 data->msgin_len, msg, msgtype);
1958
1959
1960
1961
1962
1963
1964
1965
1966 nsp32_sack_assert(data);
1967
1968
1969
1970
1971 if (msgtype & 0x80) {
1972 if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) {
1973
1974 goto reject;
1975 }
1976
1977 newlun = msgtype & 0x1f;
1978 ret = nsp32_reselection(SCpnt, newlun);
1979 if (ret == TRUE) {
1980 goto restart;
1981 } else {
1982 goto reject;
1983 }
1984 }
1985
1986
1987
1988
1989
1990
1991 switch (msgtype) {
1992
1993
1994
1995 case COMMAND_COMPLETE:
1996 case DISCONNECT:
1997
1998
1999
2000
2001 nsp32_msg(KERN_WARNING,
2002 "unexpected message of AutoSCSI MsgIn: 0x%x", msg);
2003 break;
2004
2005 case RESTORE_POINTERS:
2006
2007
2008
2009
2010 if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) {
2011 unsigned int s_sacklen;
2012
2013 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT);
2014 if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) {
2015 nsp32_adjust_busfree(SCpnt, s_sacklen);
2016 } else {
2017
2018 }
2019 }
2020 data->cur_lunt->msgin03 = FALSE;
2021
2022
2023
2024
2025 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2026
2027
2028
2029
2030 new_sgtp = data->cur_lunt->sglun_paddr +
2031 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
2032 nsp32_write4(base, SGT_ADR, new_sgtp);
2033
2034 break;
2035
2036 case SAVE_POINTERS:
2037
2038
2039
2040
2041 nsp32_msg (KERN_WARNING,
2042 "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS");
2043
2044 break;
2045
2046 case MESSAGE_REJECT:
2047
2048
2049 if (data->cur_target->sync_flag &
2050 (SDTR_INITIATOR | SDTR_TARGET)) {
2051
2052
2053
2054
2055
2056 nsp32_set_async(data, data->cur_target);
2057 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2058 data->cur_target->sync_flag |= SDTR_DONE;
2059
2060 }
2061 break;
2062
2063 case LINKED_CMD_COMPLETE:
2064 case LINKED_FLG_CMD_COMPLETE:
2065
2066 nsp32_msg (KERN_WARNING,
2067 "unsupported message: 0x%x", msgtype);
2068 break;
2069
2070 case INITIATE_RECOVERY:
2071
2072
2073
2074 goto reject;
2075
2076
2077
2078
2079 case SIMPLE_QUEUE_TAG:
2080 case 0x23:
2081
2082
2083
2084
2085 if (data->msgin_len >= 1) {
2086 goto reject;
2087 }
2088
2089
2090 msgclear = FALSE;
2091
2092 break;
2093
2094
2095
2096
2097 case EXTENDED_MESSAGE:
2098 if (data->msgin_len < 1) {
2099
2100
2101
2102
2103 msgclear = FALSE;
2104 break;
2105 }
2106
2107 if ((data->msginbuf[1] + 1) > data->msgin_len) {
2108
2109
2110
2111
2112
2113
2114 msgclear = FALSE;
2115 break;
2116 }
2117
2118
2119
2120
2121
2122 switch (data->msginbuf[2]) {
2123 case EXTENDED_MODIFY_DATA_POINTER:
2124
2125 goto reject;
2126 break;
2127
2128 case EXTENDED_SDTR:
2129
2130
2131
2132 if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
2133
2134
2135
2136 goto reject;
2137 break;
2138 }
2139
2140 nsp32_analyze_sdtr(SCpnt);
2141
2142 break;
2143
2144 case EXTENDED_EXTENDED_IDENTIFY:
2145
2146 goto reject;
2147
2148 break;
2149
2150 case EXTENDED_WDTR:
2151 goto reject;
2152
2153 break;
2154
2155 default:
2156 goto reject;
2157 }
2158 break;
2159
2160 default:
2161 goto reject;
2162 }
2163
2164 restart:
2165 if (msgclear == TRUE) {
2166 data->msgin_len = 0;
2167
2168
2169
2170
2171
2172
2173
2174
2175 if (data->msgout_len > 0) {
2176 nsp32_write4(base, SCSI_MSG_OUT, 0);
2177 command |= AUTO_ATN;
2178 }
2179
2180
2181
2182
2183
2184 command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02);
2185
2186
2187
2188
2189 if (data->cur_lunt->msgin03 == TRUE) {
2190 command |= AUTO_MSGIN_03;
2191 }
2192 data->cur_lunt->msgin03 = FALSE;
2193 } else {
2194 data->msgin_len++;
2195 }
2196
2197
2198
2199
2200 nsp32_restart_autoscsi(SCpnt, command);
2201
2202
2203
2204
2205 nsp32_wait_req(data, NEGATE);
2206
2207
2208
2209
2210 nsp32_sack_negate(data);
2211
2212 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2213
2214 return;
2215
2216 reject:
2217 nsp32_msg(KERN_WARNING,
2218 "invalid or unsupported MessageIn, rejected. "
2219 "current msg: 0x%x (len: 0x%x), processing msg: 0x%x",
2220 msg, data->msgin_len, msgtype);
2221 nsp32_build_reject(SCpnt);
2222 data->msgin_len = 0;
2223
2224 goto restart;
2225}
2226
2227
2228
2229
2230static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt)
2231{
2232 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2233 nsp32_target *target = data->cur_target;
2234 nsp32_sync_table *synct;
2235 unsigned char get_period = data->msginbuf[3];
2236 unsigned char get_offset = data->msginbuf[4];
2237 int entry;
2238 int syncnum;
2239
2240 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter");
2241
2242 synct = data->synct;
2243 syncnum = data->syncnum;
2244
2245
2246
2247
2248
2249
2250
2251
2252 if (target->sync_flag & SDTR_INITIATOR) {
2253
2254
2255
2256
2257 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR");
2258
2259 target->sync_flag &= ~SDTR_INITIATOR;
2260 target->sync_flag |= SDTR_DONE;
2261
2262
2263
2264
2265 if (get_offset > SYNC_OFFSET) {
2266
2267
2268
2269
2270 goto reject;
2271 }
2272
2273 if (get_offset == ASYNC_OFFSET) {
2274
2275
2276
2277
2278 goto async;
2279 }
2280
2281
2282
2283
2284
2285
2286
2287
2288
2289
2290
2291 if (get_period < data->synct[0].period_num) {
2292
2293
2294
2295
2296 goto reject;
2297 }
2298
2299 entry = nsp32_search_period_entry(data, target, get_period);
2300
2301 if (entry < 0) {
2302
2303
2304
2305
2306 goto reject;
2307 }
2308
2309
2310
2311
2312 nsp32_set_sync_entry(data, target, entry, get_offset);
2313 } else {
2314
2315 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR");
2316
2317 target->sync_flag |= SDTR_INITIATOR;
2318
2319
2320 if (get_offset > SYNC_OFFSET) {
2321
2322 get_offset = SYNC_OFFSET;
2323 }
2324
2325
2326 if (get_period < data->synct[0].period_num) {
2327 get_period = data->synct[0].period_num;
2328 }
2329
2330 entry = nsp32_search_period_entry(data, target, get_period);
2331
2332 if (get_offset == ASYNC_OFFSET || entry < 0) {
2333 nsp32_set_async(data, target);
2334 nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET);
2335 } else {
2336 nsp32_set_sync_entry(data, target, entry, get_offset);
2337 nsp32_build_sdtr(SCpnt, get_period, get_offset);
2338 }
2339 }
2340
2341 target->period = get_period;
2342 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit");
2343 return;
2344
2345 reject:
2346
2347
2348
2349
2350 nsp32_build_reject(SCpnt);
2351
2352 async:
2353 nsp32_set_async(data, target);
2354
2355 target->period = 0;
2356 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async");
2357 return;
2358}
2359
2360
2361
2362
2363
2364
2365static int nsp32_search_period_entry(nsp32_hw_data *data,
2366 nsp32_target *target,
2367 unsigned char period)
2368{
2369 int i;
2370
2371 if (target->limit_entry >= data->syncnum) {
2372 nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!");
2373 target->limit_entry = 0;
2374 }
2375
2376 for (i = target->limit_entry; i < data->syncnum; i++) {
2377 if (period >= data->synct[i].start_period &&
2378 period <= data->synct[i].end_period) {
2379 break;
2380 }
2381 }
2382
2383
2384
2385
2386
2387 if (i == data->syncnum) {
2388 i = -1;
2389 }
2390
2391 return i;
2392}
2393
2394
2395
2396
2397
2398static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
2399{
2400 unsigned char period = data->synct[target->limit_entry].period_num;
2401
2402 target->offset = ASYNC_OFFSET;
2403 target->period = 0;
2404 target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET);
2405 target->ackwidth = 0;
2406 target->sample_reg = 0;
2407
2408 nsp32_dbg(NSP32_DEBUG_SYNC, "set async");
2409}
2410
2411
2412
2413
2414
2415static void nsp32_set_max_sync(nsp32_hw_data *data,
2416 nsp32_target *target,
2417 unsigned char *period,
2418 unsigned char *offset)
2419{
2420 unsigned char period_num, ackwidth;
2421
2422 period_num = data->synct[target->limit_entry].period_num;
2423 *period = data->synct[target->limit_entry].start_period;
2424 ackwidth = data->synct[target->limit_entry].ackwidth;
2425 *offset = SYNC_OFFSET;
2426
2427 target->syncreg = TO_SYNCREG(period_num, *offset);
2428 target->ackwidth = ackwidth;
2429 target->offset = *offset;
2430 target->sample_reg = 0;
2431}
2432
2433
2434
2435
2436
2437static void nsp32_set_sync_entry(nsp32_hw_data *data,
2438 nsp32_target *target,
2439 int entry,
2440 unsigned char offset)
2441{
2442 unsigned char period, ackwidth, sample_rate;
2443
2444 period = data->synct[entry].period_num;
2445 ackwidth = data->synct[entry].ackwidth;
2446 offset = offset;
2447 sample_rate = data->synct[entry].sample_rate;
2448
2449 target->syncreg = TO_SYNCREG(period, offset);
2450 target->ackwidth = ackwidth;
2451 target->offset = offset;
2452 target->sample_reg = sample_rate | SAMPLING_ENABLE;
2453
2454 nsp32_dbg(NSP32_DEBUG_SYNC, "set sync");
2455}
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465
2466static void nsp32_wait_req(nsp32_hw_data *data, int state)
2467{
2468 unsigned int base = data->BaseAddress;
2469 int wait_time = 0;
2470 unsigned char bus, req_bit;
2471
2472 if (!((state == ASSERT) || (state == NEGATE))) {
2473 nsp32_msg(KERN_ERR, "unknown state designation");
2474 }
2475
2476 req_bit = (state == ASSERT ? BUSMON_REQ : 0);
2477
2478 do {
2479 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2480 if ((bus & BUSMON_REQ) == req_bit) {
2481 nsp32_dbg(NSP32_DEBUG_WAIT,
2482 "wait_time: %d", wait_time);
2483 return;
2484 }
2485 udelay(1);
2486 wait_time++;
2487 } while (wait_time < REQSACK_TIMEOUT_TIME);
2488
2489 nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit);
2490}
2491
2492
2493
2494
2495static void nsp32_wait_sack(nsp32_hw_data *data, int state)
2496{
2497 unsigned int base = data->BaseAddress;
2498 int wait_time = 0;
2499 unsigned char bus, ack_bit;
2500
2501 if (!((state == ASSERT) || (state == NEGATE))) {
2502 nsp32_msg(KERN_ERR, "unknown state designation");
2503 }
2504
2505 ack_bit = (state == ASSERT ? BUSMON_ACK : 0);
2506
2507 do {
2508 bus = nsp32_read1(base, SCSI_BUS_MONITOR);
2509 if ((bus & BUSMON_ACK) == ack_bit) {
2510 nsp32_dbg(NSP32_DEBUG_WAIT,
2511 "wait_time: %d", wait_time);
2512 return;
2513 }
2514 udelay(1);
2515 wait_time++;
2516 } while (wait_time < REQSACK_TIMEOUT_TIME);
2517
2518 nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit);
2519}
2520
2521
2522
2523
2524
2525
2526static void nsp32_sack_assert(nsp32_hw_data *data)
2527{
2528 unsigned int base = data->BaseAddress;
2529 unsigned char busctrl;
2530
2531 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2532 busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB);
2533 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2534}
2535
2536
2537
2538
2539static void nsp32_sack_negate(nsp32_hw_data *data)
2540{
2541 unsigned int base = data->BaseAddress;
2542 unsigned char busctrl;
2543
2544 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL);
2545 busctrl &= ~BUSCTL_ACK;
2546 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl);
2547}
2548
2549
2550
2551
2552
2553
2554
2555
2556
2557
2558static int nsp32_detect(struct pci_dev *pdev)
2559{
2560 struct Scsi_Host *host;
2561 struct resource *res;
2562 nsp32_hw_data *data;
2563 int ret;
2564 int i, j;
2565
2566 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
2567
2568
2569
2570
2571 host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data));
2572 if (host == NULL) {
2573 nsp32_msg (KERN_ERR, "failed to scsi register");
2574 goto err;
2575 }
2576
2577
2578
2579
2580 data = (nsp32_hw_data *)host->hostdata;
2581
2582 memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
2583
2584 host->irq = data->IrqNumber;
2585 host->io_port = data->BaseAddress;
2586 host->unique_id = data->BaseAddress;
2587 host->n_io_port = data->NumAddress;
2588 host->base = (unsigned long)data->MmioAddress;
2589
2590 data->Host = host;
2591 spin_lock_init(&(data->Lock));
2592
2593 data->cur_lunt = NULL;
2594 data->cur_target = NULL;
2595
2596
2597
2598
2599 data->trans_method = NSP32_TRANSFER_BUSMASTER;
2600
2601
2602
2603
2604
2605
2606 data->clock = CLOCK_4;
2607
2608
2609
2610
2611 switch (data->clock) {
2612 case CLOCK_4:
2613
2614 data->synct = nsp32_sync_table_40M;
2615 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2616 break;
2617 case CLOCK_2:
2618
2619 data->synct = nsp32_sync_table_20M;
2620 data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
2621 break;
2622 case PCICLK:
2623
2624 data->synct = nsp32_sync_table_pci;
2625 data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
2626 break;
2627 default:
2628 nsp32_msg(KERN_WARNING,
2629 "Invalid clock div is selected, set CLOCK_4.");
2630
2631 data->clock = CLOCK_4;
2632 data->synct = nsp32_sync_table_40M;
2633 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2634 }
2635
2636
2637
2638
2639
2640
2641
2642
2643 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
2644 nsp32_msg (KERN_ERR, "failed to set PCI DMA mask");
2645 goto scsi_unregister;
2646 }
2647
2648
2649
2650
2651 data->autoparam = pci_alloc_consistent(pdev, sizeof(nsp32_autoparam), &(data->auto_paddr));
2652 if (data->autoparam == NULL) {
2653 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2654 goto scsi_unregister;
2655 }
2656
2657
2658
2659
2660 data->sg_list = pci_alloc_consistent(pdev, NSP32_SG_TABLE_SIZE,
2661 &(data->sg_paddr));
2662 if (data->sg_list == NULL) {
2663 nsp32_msg(KERN_ERR, "failed to allocate DMA memory");
2664 goto free_autoparam;
2665 }
2666
2667 for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
2668 for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
2669 int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
2670 nsp32_lunt tmp = {
2671 .SCpnt = NULL,
2672 .save_datp = 0,
2673 .msgin03 = FALSE,
2674 .sg_num = 0,
2675 .cur_entry = 0,
2676 .sglun = &(data->sg_list[offset]),
2677 .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
2678 };
2679
2680 data->lunt[i][j] = tmp;
2681 }
2682 }
2683
2684
2685
2686
2687 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2688 nsp32_target *target = &(data->target[i]);
2689
2690 target->limit_entry = 0;
2691 target->sync_flag = 0;
2692 nsp32_set_async(data, target);
2693 }
2694
2695
2696
2697
2698 ret = nsp32_getprom_param(data);
2699 if (ret == FALSE) {
2700 data->resettime = 3;
2701 }
2702
2703
2704
2705
2706 nsp32hw_init(data);
2707
2708 snprintf(data->info_str, sizeof(data->info_str),
2709 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x",
2710 host->irq, host->io_port, host->n_io_port);
2711
2712
2713
2714
2715
2716
2717
2718
2719
2720
2721
2722
2723
2724
2725
2726
2727
2728
2729
2730 nsp32_do_bus_reset(data);
2731
2732 ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
2733 if (ret < 0) {
2734 nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 "
2735 "SCSI PCI controller. Interrupt: %d", host->irq);
2736 goto free_sg_list;
2737 }
2738
2739
2740
2741
2742 res = request_region(host->io_port, host->n_io_port, "nsp32");
2743 if (res == NULL) {
2744 nsp32_msg(KERN_ERR,
2745 "I/O region 0x%lx+0x%lx is already used",
2746 data->BaseAddress, data->NumAddress);
2747 goto free_irq;
2748 }
2749
2750 ret = scsi_add_host(host, &pdev->dev);
2751 if (ret) {
2752 nsp32_msg(KERN_ERR, "failed to add scsi host");
2753 goto free_region;
2754 }
2755 scsi_scan_host(host);
2756 pci_set_drvdata(pdev, host);
2757 return 0;
2758
2759 free_region:
2760 release_region(host->io_port, host->n_io_port);
2761
2762 free_irq:
2763 free_irq(host->irq, data);
2764
2765 free_sg_list:
2766 pci_free_consistent(pdev, NSP32_SG_TABLE_SIZE,
2767 data->sg_list, data->sg_paddr);
2768
2769 free_autoparam:
2770 pci_free_consistent(pdev, sizeof(nsp32_autoparam),
2771 data->autoparam, data->auto_paddr);
2772
2773 scsi_unregister:
2774 scsi_host_put(host);
2775
2776 err:
2777 return 1;
2778}
2779
2780static int nsp32_release(struct Scsi_Host *host)
2781{
2782 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2783
2784 if (data->autoparam) {
2785 pci_free_consistent(data->Pci, sizeof(nsp32_autoparam),
2786 data->autoparam, data->auto_paddr);
2787 }
2788
2789 if (data->sg_list) {
2790 pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE,
2791 data->sg_list, data->sg_paddr);
2792 }
2793
2794 if (host->irq) {
2795 free_irq(host->irq, data);
2796 }
2797
2798 if (host->io_port && host->n_io_port) {
2799 release_region(host->io_port, host->n_io_port);
2800 }
2801
2802 if (data->MmioAddress) {
2803 iounmap(data->MmioAddress);
2804 }
2805
2806 return 0;
2807}
2808
2809static const char *nsp32_info(struct Scsi_Host *shpnt)
2810{
2811 nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
2812
2813 return data->info_str;
2814}
2815
2816
2817
2818
2819
2820static int nsp32_eh_abort(struct scsi_cmnd *SCpnt)
2821{
2822 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2823 unsigned int base = SCpnt->device->host->io_port;
2824
2825 nsp32_msg(KERN_WARNING, "abort");
2826
2827 if (data->cur_lunt->SCpnt == NULL) {
2828 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed");
2829 return FAILED;
2830 }
2831
2832 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2833
2834 data->cur_target->sync_flag = 0;
2835 nsp32_set_async(data, data->cur_target);
2836 }
2837
2838 nsp32_write2(base, TRANSFER_CONTROL, 0);
2839 nsp32_write2(base, BM_CNT, 0);
2840
2841 SCpnt->result = DID_ABORT << 16;
2842 nsp32_scsi_done(SCpnt);
2843
2844 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success");
2845 return SUCCESS;
2846}
2847
2848static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt)
2849{
2850 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2851 unsigned int base = SCpnt->device->host->io_port;
2852
2853 spin_lock_irq(SCpnt->device->host->host_lock);
2854
2855 nsp32_msg(KERN_INFO, "Bus Reset");
2856 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
2857
2858 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
2859 nsp32_do_bus_reset(data);
2860 nsp32_write2(base, IRQ_CONTROL, 0);
2861
2862 spin_unlock_irq(SCpnt->device->host->host_lock);
2863 return SUCCESS;
2864}
2865
2866static void nsp32_do_bus_reset(nsp32_hw_data *data)
2867{
2868 unsigned int base = data->BaseAddress;
2869 unsigned short intrdat;
2870 int i;
2871
2872 nsp32_dbg(NSP32_DEBUG_BUSRESET, "in");
2873
2874
2875
2876
2877
2878
2879 nsp32_write2(base, TRANSFER_CONTROL, 0);
2880 nsp32_write4(base, BM_CNT, 0);
2881 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK);
2882
2883
2884
2885
2886
2887 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2888 nsp32_target *target = &data->target[i];
2889
2890 target->sync_flag = 0;
2891 nsp32_set_async(data, target);
2892 }
2893
2894
2895
2896
2897 nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST);
2898 mdelay(RESET_HOLD_TIME / 1000);
2899 nsp32_write1(base, SCSI_BUS_CONTROL, 0);
2900 for(i = 0; i < 5; i++) {
2901 intrdat = nsp32_read2(base, IRQ_STATUS);
2902 nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat);
2903 }
2904
2905 data->CurrentSC = NULL;
2906}
2907
2908static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt)
2909{
2910 struct Scsi_Host *host = SCpnt->device->host;
2911 unsigned int base = SCpnt->device->host->io_port;
2912 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2913
2914 nsp32_msg(KERN_INFO, "Host Reset");
2915 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt);
2916
2917 spin_lock_irq(SCpnt->device->host->host_lock);
2918
2919 nsp32hw_init(data);
2920 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK);
2921 nsp32_do_bus_reset(data);
2922 nsp32_write2(base, IRQ_CONTROL, 0);
2923
2924 spin_unlock_irq(SCpnt->device->host->host_lock);
2925 return SUCCESS;
2926}
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936static int nsp32_getprom_param(nsp32_hw_data *data)
2937{
2938 int vendor = data->pci_devid->vendor;
2939 int device = data->pci_devid->device;
2940 int ret, val, i;
2941
2942
2943
2944
2945 ret = nsp32_prom_read(data, 0x7e);
2946 if (ret != 0x55) {
2947 nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret);
2948 return FALSE;
2949 }
2950 ret = nsp32_prom_read(data, 0x7f);
2951 if (ret != 0xaa) {
2952 nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret);
2953 return FALSE;
2954 }
2955
2956
2957
2958
2959 if (vendor == PCI_VENDOR_ID_WORKBIT &&
2960 device == PCI_DEVICE_ID_WORKBIT_STANDARD) {
2961 ret = nsp32_getprom_c16(data);
2962 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
2963 device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) {
2964 ret = nsp32_getprom_at24(data);
2965 } else if (vendor == PCI_VENDOR_ID_WORKBIT &&
2966 device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) {
2967 ret = nsp32_getprom_at24(data);
2968 } else {
2969 nsp32_msg(KERN_WARNING, "Unknown EEPROM");
2970 ret = FALSE;
2971 }
2972
2973
2974 for (i = 0; i <= 0x1f; i++) {
2975 val = nsp32_prom_read(data, i);
2976 nsp32_dbg(NSP32_DEBUG_EEPROM,
2977 "rom address 0x%x : 0x%x", i, val);
2978 }
2979
2980 return ret;
2981}
2982
2983
2984
2985
2986
2987
2988
2989
2990
2991
2992
2993
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011static int nsp32_getprom_at24(nsp32_hw_data *data)
3012{
3013 int ret, i;
3014 int auto_sync;
3015 nsp32_target *target;
3016 int entry;
3017
3018
3019
3020
3021
3022
3023 data->resettime = nsp32_prom_read(data, 0x12);
3024
3025
3026
3027
3028
3029
3030
3031
3032
3033
3034
3035
3036
3037
3038 ret = nsp32_prom_read(data, 0x07);
3039 switch (ret) {
3040 case 0:
3041 auto_sync = TRUE;
3042 break;
3043 case 1:
3044 auto_sync = FALSE;
3045 break;
3046 default:
3047 nsp32_msg(KERN_WARNING,
3048 "Unsupported Auto Sync mode. Fall back to manual mode.");
3049 auto_sync = TRUE;
3050 }
3051
3052 if (trans_mode == ULTRA20M_MODE) {
3053 auto_sync = TRUE;
3054 }
3055
3056
3057
3058
3059 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3060 target = &data->target[i];
3061 if (auto_sync == TRUE) {
3062 target->limit_entry = 0;
3063 } else {
3064 ret = nsp32_prom_read(data, i);
3065 entry = nsp32_search_period_entry(data, target, ret);
3066 if (entry < 0) {
3067
3068 entry = 0;
3069 }
3070 target->limit_entry = entry;
3071 }
3072 }
3073
3074 return TRUE;
3075}
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089
3090
3091
3092
3093
3094
3095
3096
3097
3098static int nsp32_getprom_c16(nsp32_hw_data *data)
3099{
3100 int ret, i;
3101 nsp32_target *target;
3102 int entry, val;
3103
3104
3105
3106
3107
3108
3109 data->resettime = nsp32_prom_read(data, 0x11);
3110
3111
3112
3113
3114 for (i = 0; i < NSP32_HOST_SCSIID; i++) {
3115 target = &data->target[i];
3116 ret = nsp32_prom_read(data, i);
3117 switch (ret) {
3118 case 0:
3119 val = 0x0c;
3120 break;
3121 case 1:
3122 val = 0x19;
3123 break;
3124 case 2:
3125 val = 0x32;
3126 break;
3127 case 3:
3128 val = 0x00;
3129 break;
3130 default:
3131 val = 0x0c;
3132 break;
3133 }
3134 entry = nsp32_search_period_entry(data, target, val);
3135 if (entry < 0 || trans_mode == ULTRA20M_MODE) {
3136
3137 entry = 0;
3138 }
3139 target->limit_entry = entry;
3140 }
3141
3142 return TRUE;
3143}
3144
3145
3146
3147
3148
3149static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
3150{
3151 int i, val;
3152
3153
3154 nsp32_prom_start(data);
3155
3156
3157 nsp32_prom_write_bit(data, 1);
3158 nsp32_prom_write_bit(data, 0);
3159 nsp32_prom_write_bit(data, 1);
3160 nsp32_prom_write_bit(data, 0);
3161 nsp32_prom_write_bit(data, 0);
3162 nsp32_prom_write_bit(data, 0);
3163 nsp32_prom_write_bit(data, 0);
3164
3165
3166 nsp32_prom_write_bit(data, 0);
3167
3168
3169 nsp32_prom_write_bit(data, 0);
3170
3171
3172 for (i = 7; i >= 0; i--) {
3173 nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
3174 }
3175
3176
3177 nsp32_prom_write_bit(data, 0);
3178
3179
3180 nsp32_prom_start(data);
3181
3182
3183 nsp32_prom_write_bit(data, 1);
3184 nsp32_prom_write_bit(data, 0);
3185 nsp32_prom_write_bit(data, 1);
3186 nsp32_prom_write_bit(data, 0);
3187 nsp32_prom_write_bit(data, 0);
3188 nsp32_prom_write_bit(data, 0);
3189 nsp32_prom_write_bit(data, 0);
3190
3191
3192 nsp32_prom_write_bit(data, 1);
3193
3194
3195 nsp32_prom_write_bit(data, 0);
3196
3197
3198 val = 0;
3199 for (i = 7; i >= 0; i--) {
3200 val += (nsp32_prom_read_bit(data) << i);
3201 }
3202
3203
3204 nsp32_prom_write_bit(data, 1);
3205
3206
3207 nsp32_prom_stop(data);
3208
3209 return val;
3210}
3211
3212static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
3213{
3214 int base = data->BaseAddress;
3215 int tmp;
3216
3217 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL);
3218
3219 if (val == 0) {
3220 tmp &= ~bit;
3221 } else {
3222 tmp |= bit;
3223 }
3224
3225 nsp32_index_write1(base, SERIAL_ROM_CTL, tmp);
3226
3227 udelay(10);
3228}
3229
3230static int nsp32_prom_get(nsp32_hw_data *data, int bit)
3231{
3232 int base = data->BaseAddress;
3233 int tmp, ret;
3234
3235 if (bit != SDA) {
3236 nsp32_msg(KERN_ERR, "return value is not appropriate");
3237 return 0;
3238 }
3239
3240
3241 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit;
3242
3243 if (tmp == 0) {
3244 ret = 0;
3245 } else {
3246 ret = 1;
3247 }
3248
3249 udelay(10);
3250
3251 return ret;
3252}
3253
3254static void nsp32_prom_start (nsp32_hw_data *data)
3255{
3256
3257 nsp32_prom_set(data, SCL, 1);
3258 nsp32_prom_set(data, SDA, 1);
3259 nsp32_prom_set(data, ENA, 1);
3260 nsp32_prom_set(data, SDA, 0);
3261
3262 nsp32_prom_set(data, SCL, 0);
3263}
3264
3265static void nsp32_prom_stop (nsp32_hw_data *data)
3266{
3267
3268 nsp32_prom_set(data, SCL, 1);
3269 nsp32_prom_set(data, SDA, 0);
3270 nsp32_prom_set(data, ENA, 1);
3271 nsp32_prom_set(data, SDA, 1);
3272 nsp32_prom_set(data, SCL, 0);
3273}
3274
3275static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
3276{
3277
3278 nsp32_prom_set(data, SDA, val);
3279 nsp32_prom_set(data, SCL, 1 );
3280 nsp32_prom_set(data, SCL, 0 );
3281}
3282
3283static int nsp32_prom_read_bit(nsp32_hw_data *data)
3284{
3285 int val;
3286
3287
3288 nsp32_prom_set(data, ENA, 0);
3289 nsp32_prom_set(data, SCL, 1);
3290
3291 val = nsp32_prom_get(data, SDA);
3292
3293 nsp32_prom_set(data, SCL, 0);
3294 nsp32_prom_set(data, ENA, 1);
3295
3296 return val;
3297}
3298
3299
3300
3301
3302
3303#ifdef CONFIG_PM
3304
3305
3306static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state)
3307{
3308 struct Scsi_Host *host = pci_get_drvdata(pdev);
3309
3310 nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host);
3311
3312 pci_save_state (pdev);
3313 pci_disable_device (pdev);
3314 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3315
3316 return 0;
3317}
3318
3319
3320static int nsp32_resume(struct pci_dev *pdev)
3321{
3322 struct Scsi_Host *host = pci_get_drvdata(pdev);
3323 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3324 unsigned short reg;
3325
3326 nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host);
3327
3328 pci_set_power_state(pdev, PCI_D0);
3329 pci_enable_wake (pdev, PCI_D0, 0);
3330 pci_restore_state (pdev);
3331
3332 reg = nsp32_read2(data->BaseAddress, INDEX_REG);
3333
3334 nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
3335
3336 if (reg == 0xffff) {
3337 nsp32_msg(KERN_INFO, "missing device. abort resume.");
3338 return 0;
3339 }
3340
3341 nsp32hw_init (data);
3342 nsp32_do_bus_reset(data);
3343
3344 nsp32_msg(KERN_INFO, "resume success");
3345
3346 return 0;
3347}
3348
3349#endif
3350
3351
3352
3353
3354static int nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3355{
3356 int ret;
3357 nsp32_hw_data *data = &nsp32_data_base;
3358
3359 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3360
3361 ret = pci_enable_device(pdev);
3362 if (ret) {
3363 nsp32_msg(KERN_ERR, "failed to enable pci device");
3364 return ret;
3365 }
3366
3367 data->Pci = pdev;
3368 data->pci_devid = id;
3369 data->IrqNumber = pdev->irq;
3370 data->BaseAddress = pci_resource_start(pdev, 0);
3371 data->NumAddress = pci_resource_len (pdev, 0);
3372 data->MmioAddress = pci_ioremap_bar(pdev, 1);
3373 data->MmioLength = pci_resource_len (pdev, 1);
3374
3375 pci_set_master(pdev);
3376
3377 ret = nsp32_detect(pdev);
3378
3379 nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s",
3380 pdev->irq,
3381 data->MmioAddress, data->MmioLength,
3382 pci_name(pdev),
3383 nsp32_model[id->driver_data]);
3384
3385 nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret);
3386
3387 return ret;
3388}
3389
3390static void nsp32_remove(struct pci_dev *pdev)
3391{
3392 struct Scsi_Host *host = pci_get_drvdata(pdev);
3393
3394 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter");
3395
3396 scsi_remove_host(host);
3397
3398 nsp32_release(host);
3399
3400 scsi_host_put(host);
3401}
3402
3403static struct pci_driver nsp32_driver = {
3404 .name = "nsp32",
3405 .id_table = nsp32_pci_table,
3406 .probe = nsp32_probe,
3407 .remove = nsp32_remove,
3408#ifdef CONFIG_PM
3409 .suspend = nsp32_suspend,
3410 .resume = nsp32_resume,
3411#endif
3412};
3413
3414
3415
3416
3417static int __init init_nsp32(void) {
3418 nsp32_msg(KERN_INFO, "loading...");
3419 return pci_register_driver(&nsp32_driver);
3420}
3421
3422static void __exit exit_nsp32(void) {
3423 nsp32_msg(KERN_INFO, "unloading...");
3424 pci_unregister_driver(&nsp32_driver);
3425}
3426
3427module_init(init_nsp32);
3428module_exit(exit_nsp32);
3429
3430
3431