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9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/delay.h>
12#include <linux/mutex.h>
13#include <linux/device.h>
14#include <linux/kernel.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18#include <linux/list.h>
19#include <linux/module.h>
20
21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
23#include "meter.h"
24#include "ade7754.h"
25
26static int ade7754_spi_write_reg_8(struct device *dev,
27 u8 reg_address,
28 u8 val)
29{
30 int ret;
31 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
32 struct ade7754_state *st = iio_priv(indio_dev);
33
34 mutex_lock(&st->buf_lock);
35 st->tx[0] = ADE7754_WRITE_REG(reg_address);
36 st->tx[1] = val;
37
38 ret = spi_write(st->us, st->tx, 2);
39 mutex_unlock(&st->buf_lock);
40
41 return ret;
42}
43
44static int ade7754_spi_write_reg_16(struct device *dev,
45 u8 reg_address,
46 u16 value)
47{
48 int ret;
49 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
50 struct ade7754_state *st = iio_priv(indio_dev);
51
52 mutex_lock(&st->buf_lock);
53 st->tx[0] = ADE7754_WRITE_REG(reg_address);
54 st->tx[1] = (value >> 8) & 0xFF;
55 st->tx[2] = value & 0xFF;
56 ret = spi_write(st->us, st->tx, 3);
57 mutex_unlock(&st->buf_lock);
58
59 return ret;
60}
61
62static int ade7754_spi_read_reg_8(struct device *dev,
63 u8 reg_address,
64 u8 *val)
65{
66 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
67 struct ade7754_state *st = iio_priv(indio_dev);
68 int ret;
69
70 ret = spi_w8r8(st->us, ADE7754_READ_REG(reg_address));
71 if (ret < 0) {
72 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
73 reg_address);
74 return ret;
75 }
76 *val = ret;
77
78 return 0;
79}
80
81static int ade7754_spi_read_reg_16(struct device *dev,
82 u8 reg_address,
83 u16 *val)
84{
85 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
86 struct ade7754_state *st = iio_priv(indio_dev);
87 int ret;
88
89 ret = spi_w8r16be(st->us, ADE7754_READ_REG(reg_address));
90 if (ret < 0) {
91 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
92 reg_address);
93 return ret;
94 }
95
96 *val = ret;
97
98 return 0;
99}
100
101static int ade7754_spi_read_reg_24(struct device *dev,
102 u8 reg_address,
103 u32 *val)
104{
105 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
106 struct ade7754_state *st = iio_priv(indio_dev);
107 int ret;
108 struct spi_transfer xfers[] = {
109 {
110 .tx_buf = st->tx,
111 .rx_buf = st->rx,
112 .bits_per_word = 8,
113 .len = 4,
114 },
115 };
116
117 mutex_lock(&st->buf_lock);
118 st->tx[0] = ADE7754_READ_REG(reg_address);
119 st->tx[1] = 0;
120 st->tx[2] = 0;
121 st->tx[3] = 0;
122
123 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
124 if (ret) {
125 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
126 reg_address);
127 goto error_ret;
128 }
129 *val = (st->rx[1] << 16) | (st->rx[2] << 8) | st->rx[3];
130
131error_ret:
132 mutex_unlock(&st->buf_lock);
133 return ret;
134}
135
136static ssize_t ade7754_read_8bit(struct device *dev,
137 struct device_attribute *attr,
138 char *buf)
139{
140 int ret;
141 u8 val = 0;
142 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
143
144 ret = ade7754_spi_read_reg_8(dev, this_attr->address, &val);
145 if (ret)
146 return ret;
147
148 return sprintf(buf, "%u\n", val);
149}
150
151static ssize_t ade7754_read_16bit(struct device *dev,
152 struct device_attribute *attr,
153 char *buf)
154{
155 int ret;
156 u16 val = 0;
157 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
158
159 ret = ade7754_spi_read_reg_16(dev, this_attr->address, &val);
160 if (ret)
161 return ret;
162
163 return sprintf(buf, "%u\n", val);
164}
165
166static ssize_t ade7754_read_24bit(struct device *dev,
167 struct device_attribute *attr,
168 char *buf)
169{
170 int ret;
171 u32 val = 0;
172 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
173
174 ret = ade7754_spi_read_reg_24(dev, this_attr->address, &val);
175 if (ret)
176 return ret;
177
178 return sprintf(buf, "%u\n", val & 0xFFFFFF);
179}
180
181static ssize_t ade7754_write_8bit(struct device *dev,
182 struct device_attribute *attr,
183 const char *buf,
184 size_t len)
185{
186 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
187 int ret;
188 u8 val;
189
190 ret = kstrtou8(buf, 10, &val);
191 if (ret)
192 goto error_ret;
193 ret = ade7754_spi_write_reg_8(dev, this_attr->address, val);
194
195error_ret:
196 return ret ? ret : len;
197}
198
199static ssize_t ade7754_write_16bit(struct device *dev,
200 struct device_attribute *attr,
201 const char *buf,
202 size_t len)
203{
204 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
205 int ret;
206 u16 val;
207
208 ret = kstrtou16(buf, 10, &val);
209 if (ret)
210 goto error_ret;
211 ret = ade7754_spi_write_reg_16(dev, this_attr->address, val);
212
213error_ret:
214 return ret ? ret : len;
215}
216
217static int ade7754_reset(struct device *dev)
218{
219 int ret;
220 u8 val;
221
222 ret = ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
223 if (ret < 0)
224 return ret;
225
226 val |= 1 << 6;
227 return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
228}
229
230static IIO_DEV_ATTR_AENERGY(ade7754_read_24bit, ADE7754_AENERGY);
231static IIO_DEV_ATTR_LAENERGY(ade7754_read_24bit, ADE7754_LAENERGY);
232static IIO_DEV_ATTR_VAENERGY(ade7754_read_24bit, ADE7754_VAENERGY);
233static IIO_DEV_ATTR_LVAENERGY(ade7754_read_24bit, ADE7754_LVAENERGY);
234static IIO_DEV_ATTR_VPEAK(S_IWUSR | S_IRUGO,
235 ade7754_read_8bit,
236 ade7754_write_8bit,
237 ADE7754_VPEAK);
238static IIO_DEV_ATTR_IPEAK(S_IWUSR | S_IRUGO,
239 ade7754_read_8bit,
240 ade7754_write_8bit,
241 ADE7754_VPEAK);
242static IIO_DEV_ATTR_APHCAL(S_IWUSR | S_IRUGO,
243 ade7754_read_8bit,
244 ade7754_write_8bit,
245 ADE7754_APHCAL);
246static IIO_DEV_ATTR_BPHCAL(S_IWUSR | S_IRUGO,
247 ade7754_read_8bit,
248 ade7754_write_8bit,
249 ADE7754_BPHCAL);
250static IIO_DEV_ATTR_CPHCAL(S_IWUSR | S_IRUGO,
251 ade7754_read_8bit,
252 ade7754_write_8bit,
253 ADE7754_CPHCAL);
254static IIO_DEV_ATTR_AAPOS(S_IWUSR | S_IRUGO,
255 ade7754_read_16bit,
256 ade7754_write_16bit,
257 ADE7754_AAPOS);
258static IIO_DEV_ATTR_BAPOS(S_IWUSR | S_IRUGO,
259 ade7754_read_16bit,
260 ade7754_write_16bit,
261 ADE7754_BAPOS);
262static IIO_DEV_ATTR_CAPOS(S_IWUSR | S_IRUGO,
263 ade7754_read_16bit,
264 ade7754_write_16bit,
265 ADE7754_CAPOS);
266static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
267 ade7754_read_8bit,
268 ade7754_write_8bit,
269 ADE7754_WDIV);
270static IIO_DEV_ATTR_VADIV(S_IWUSR | S_IRUGO,
271 ade7754_read_8bit,
272 ade7754_write_8bit,
273 ADE7754_VADIV);
274static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
275 ade7754_read_16bit,
276 ade7754_write_16bit,
277 ADE7754_CFNUM);
278static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
279 ade7754_read_16bit,
280 ade7754_write_16bit,
281 ADE7754_CFDEN);
282static IIO_DEV_ATTR_ACTIVE_POWER_A_GAIN(S_IWUSR | S_IRUGO,
283 ade7754_read_16bit,
284 ade7754_write_16bit,
285 ADE7754_AAPGAIN);
286static IIO_DEV_ATTR_ACTIVE_POWER_B_GAIN(S_IWUSR | S_IRUGO,
287 ade7754_read_16bit,
288 ade7754_write_16bit,
289 ADE7754_BAPGAIN);
290static IIO_DEV_ATTR_ACTIVE_POWER_C_GAIN(S_IWUSR | S_IRUGO,
291 ade7754_read_16bit,
292 ade7754_write_16bit,
293 ADE7754_CAPGAIN);
294static IIO_DEV_ATTR_AIRMS(S_IRUGO,
295 ade7754_read_24bit,
296 NULL,
297 ADE7754_AIRMS);
298static IIO_DEV_ATTR_BIRMS(S_IRUGO,
299 ade7754_read_24bit,
300 NULL,
301 ADE7754_BIRMS);
302static IIO_DEV_ATTR_CIRMS(S_IRUGO,
303 ade7754_read_24bit,
304 NULL,
305 ADE7754_CIRMS);
306static IIO_DEV_ATTR_AVRMS(S_IRUGO,
307 ade7754_read_24bit,
308 NULL,
309 ADE7754_AVRMS);
310static IIO_DEV_ATTR_BVRMS(S_IRUGO,
311 ade7754_read_24bit,
312 NULL,
313 ADE7754_BVRMS);
314static IIO_DEV_ATTR_CVRMS(S_IRUGO,
315 ade7754_read_24bit,
316 NULL,
317 ADE7754_CVRMS);
318static IIO_DEV_ATTR_AIRMSOS(S_IRUGO,
319 ade7754_read_16bit,
320 ade7754_write_16bit,
321 ADE7754_AIRMSOS);
322static IIO_DEV_ATTR_BIRMSOS(S_IRUGO,
323 ade7754_read_16bit,
324 ade7754_write_16bit,
325 ADE7754_BIRMSOS);
326static IIO_DEV_ATTR_CIRMSOS(S_IRUGO,
327 ade7754_read_16bit,
328 ade7754_write_16bit,
329 ADE7754_CIRMSOS);
330static IIO_DEV_ATTR_AVRMSOS(S_IRUGO,
331 ade7754_read_16bit,
332 ade7754_write_16bit,
333 ADE7754_AVRMSOS);
334static IIO_DEV_ATTR_BVRMSOS(S_IRUGO,
335 ade7754_read_16bit,
336 ade7754_write_16bit,
337 ADE7754_BVRMSOS);
338static IIO_DEV_ATTR_CVRMSOS(S_IRUGO,
339 ade7754_read_16bit,
340 ade7754_write_16bit,
341 ADE7754_CVRMSOS);
342
343static int ade7754_set_irq(struct device *dev, bool enable)
344{
345 int ret;
346 u16 irqen;
347
348 ret = ade7754_spi_read_reg_16(dev, ADE7754_IRQEN, &irqen);
349 if (ret)
350 goto error_ret;
351
352 if (enable)
353 irqen |= 1 << 14;
354
355 else
356 irqen &= ~(1 << 14);
357
358 ret = ade7754_spi_write_reg_16(dev, ADE7754_IRQEN, irqen);
359 if (ret)
360 goto error_ret;
361
362error_ret:
363 return ret;
364}
365
366
367static int ade7754_stop_device(struct device *dev)
368{
369 int ret;
370 u8 val;
371
372 ret = ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
373 if (ret < 0) {
374 dev_err(dev, "unable to power down the device, error: %d",
375 ret);
376 return ret;
377 }
378
379 val |= 7 << 3;
380 return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
381}
382
383static int ade7754_initial_setup(struct iio_dev *indio_dev)
384{
385 int ret;
386 struct ade7754_state *st = iio_priv(indio_dev);
387 struct device *dev = &indio_dev->dev;
388
389
390 st->us->mode = SPI_MODE_3;
391 spi_setup(st->us);
392
393
394 ret = ade7754_set_irq(dev, false);
395 if (ret) {
396 dev_err(dev, "disable irq failed");
397 goto err_ret;
398 }
399
400 ade7754_reset(dev);
401 msleep(ADE7754_STARTUP_DELAY);
402
403err_ret:
404 return ret;
405}
406
407static ssize_t ade7754_read_frequency(struct device *dev,
408 struct device_attribute *attr,
409 char *buf)
410{
411 int ret;
412 u8 t;
413 int sps;
414
415 ret = ade7754_spi_read_reg_8(dev,
416 ADE7754_WAVMODE,
417 &t);
418 if (ret)
419 return ret;
420
421 t = (t >> 3) & 0x3;
422 sps = 26000 / (1 + t);
423
424 return sprintf(buf, "%d\n", sps);
425}
426
427static ssize_t ade7754_write_frequency(struct device *dev,
428 struct device_attribute *attr,
429 const char *buf,
430 size_t len)
431{
432 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
433 struct ade7754_state *st = iio_priv(indio_dev);
434 u16 val;
435 int ret;
436 u8 reg, t;
437
438 ret = kstrtou16(buf, 10, &val);
439 if (ret)
440 return ret;
441 if (val == 0)
442 return -EINVAL;
443
444 mutex_lock(&indio_dev->mlock);
445
446 t = 26000 / val;
447 if (t > 0)
448 t--;
449
450 if (t > 1)
451 st->us->max_speed_hz = ADE7754_SPI_SLOW;
452 else
453 st->us->max_speed_hz = ADE7754_SPI_FAST;
454
455 ret = ade7754_spi_read_reg_8(dev, ADE7754_WAVMODE, ®);
456 if (ret)
457 goto out;
458
459 reg &= ~(3 << 3);
460 reg |= t << 3;
461
462 ret = ade7754_spi_write_reg_8(dev, ADE7754_WAVMODE, reg);
463
464out:
465 mutex_unlock(&indio_dev->mlock);
466
467 return ret ? ret : len;
468}
469static IIO_DEV_ATTR_TEMP_RAW(ade7754_read_8bit);
470static IIO_CONST_ATTR(in_temp_offset, "129 C");
471static IIO_CONST_ATTR(in_temp_scale, "4 C");
472
473static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
474 ade7754_read_frequency,
475 ade7754_write_frequency);
476
477static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26000 13000 65000 33000");
478
479static struct attribute *ade7754_attributes[] = {
480 &iio_dev_attr_in_temp_raw.dev_attr.attr,
481 &iio_const_attr_in_temp_offset.dev_attr.attr,
482 &iio_const_attr_in_temp_scale.dev_attr.attr,
483 &iio_dev_attr_sampling_frequency.dev_attr.attr,
484 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
485 &iio_dev_attr_aenergy.dev_attr.attr,
486 &iio_dev_attr_laenergy.dev_attr.attr,
487 &iio_dev_attr_vaenergy.dev_attr.attr,
488 &iio_dev_attr_lvaenergy.dev_attr.attr,
489 &iio_dev_attr_vpeak.dev_attr.attr,
490 &iio_dev_attr_ipeak.dev_attr.attr,
491 &iio_dev_attr_aphcal.dev_attr.attr,
492 &iio_dev_attr_bphcal.dev_attr.attr,
493 &iio_dev_attr_cphcal.dev_attr.attr,
494 &iio_dev_attr_aapos.dev_attr.attr,
495 &iio_dev_attr_bapos.dev_attr.attr,
496 &iio_dev_attr_capos.dev_attr.attr,
497 &iio_dev_attr_wdiv.dev_attr.attr,
498 &iio_dev_attr_vadiv.dev_attr.attr,
499 &iio_dev_attr_cfnum.dev_attr.attr,
500 &iio_dev_attr_cfden.dev_attr.attr,
501 &iio_dev_attr_active_power_a_gain.dev_attr.attr,
502 &iio_dev_attr_active_power_b_gain.dev_attr.attr,
503 &iio_dev_attr_active_power_c_gain.dev_attr.attr,
504 &iio_dev_attr_airms.dev_attr.attr,
505 &iio_dev_attr_birms.dev_attr.attr,
506 &iio_dev_attr_cirms.dev_attr.attr,
507 &iio_dev_attr_avrms.dev_attr.attr,
508 &iio_dev_attr_bvrms.dev_attr.attr,
509 &iio_dev_attr_cvrms.dev_attr.attr,
510 &iio_dev_attr_airmsos.dev_attr.attr,
511 &iio_dev_attr_birmsos.dev_attr.attr,
512 &iio_dev_attr_cirmsos.dev_attr.attr,
513 &iio_dev_attr_avrmsos.dev_attr.attr,
514 &iio_dev_attr_bvrmsos.dev_attr.attr,
515 &iio_dev_attr_cvrmsos.dev_attr.attr,
516 NULL,
517};
518
519static const struct attribute_group ade7754_attribute_group = {
520 .attrs = ade7754_attributes,
521};
522
523static const struct iio_info ade7754_info = {
524 .attrs = &ade7754_attribute_group,
525 .driver_module = THIS_MODULE,
526};
527
528static int ade7754_probe(struct spi_device *spi)
529{
530 int ret;
531 struct ade7754_state *st;
532 struct iio_dev *indio_dev;
533
534
535 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
536 if (!indio_dev)
537 return -ENOMEM;
538
539 spi_set_drvdata(spi, indio_dev);
540
541 st = iio_priv(indio_dev);
542 st->us = spi;
543 mutex_init(&st->buf_lock);
544
545 indio_dev->name = spi->dev.driver->name;
546 indio_dev->dev.parent = &spi->dev;
547 indio_dev->info = &ade7754_info;
548 indio_dev->modes = INDIO_DIRECT_MODE;
549
550
551 ret = ade7754_initial_setup(indio_dev);
552 if (ret)
553 goto powerdown_on_error;
554 ret = iio_device_register(indio_dev);
555 if (ret)
556 goto powerdown_on_error;
557 return ret;
558
559powerdown_on_error:
560 ade7754_stop_device(&indio_dev->dev);
561 return ret;
562}
563
564
565static int ade7754_remove(struct spi_device *spi)
566{
567 struct iio_dev *indio_dev = spi_get_drvdata(spi);
568
569 iio_device_unregister(indio_dev);
570 ade7754_stop_device(&indio_dev->dev);
571
572 return 0;
573}
574
575static struct spi_driver ade7754_driver = {
576 .driver = {
577 .name = "ade7754",
578 .owner = THIS_MODULE,
579 },
580 .probe = ade7754_probe,
581 .remove = ade7754_remove,
582};
583module_spi_driver(ade7754_driver);
584
585MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
586MODULE_DESCRIPTION("Analog Devices ADE7754 Polyphase Multifunction Energy Metering IC Driver");
587MODULE_LICENSE("GPL v2");
588MODULE_ALIAS("spi:ad7754");
589
