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15
16#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
17
18#include <linux/device.h>
19#include <linux/fs.h>
20#include <linux/io.h>
21#include <linux/bitops.h>
22#include <linux/kernel.h>
23#include <linux/miscdevice.h>
24#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/pci.h>
27#include <linux/pci_ids.h>
28#include <linux/types.h>
29#include <linux/uaccess.h>
30#include <linux/watchdog.h>
31#ifdef CONFIG_HPWDT_NMI_DECODING
32#include <linux/dmi.h>
33#include <linux/spinlock.h>
34#include <linux/nmi.h>
35#include <linux/kdebug.h>
36#include <linux/notifier.h>
37#include <asm/cacheflush.h>
38#endif
39#include <asm/nmi.h>
40
41#define HPWDT_VERSION "1.3.3"
42#define SECS_TO_TICKS(secs) ((secs) * 1000 / 128)
43#define TICKS_TO_SECS(ticks) ((ticks) * 128 / 1000)
44#define HPWDT_MAX_TIMER TICKS_TO_SECS(65535)
45#define DEFAULT_MARGIN 30
46
47static unsigned int soft_margin = DEFAULT_MARGIN;
48static unsigned int reload;
49static bool nowayout = WATCHDOG_NOWAYOUT;
50static char expect_release;
51static unsigned long hpwdt_is_open;
52
53static void __iomem *pci_mem_addr;
54static unsigned long __iomem *hpwdt_timer_reg;
55static unsigned long __iomem *hpwdt_timer_con;
56
57static const struct pci_device_id hpwdt_devices[] = {
58 { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },
59 { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },
60 {0},
61};
62MODULE_DEVICE_TABLE(pci, hpwdt_devices);
63
64#ifdef CONFIG_HPWDT_NMI_DECODING
65#define PCI_BIOS32_SD_VALUE 0x5F32335F
66#define CRU_BIOS_SIGNATURE_VALUE 0x55524324
67#define PCI_BIOS32_PARAGRAPH_LEN 16
68#define PCI_ROM_BASE1 0x000F0000
69#define ROM_SIZE 0x10000
70
71struct bios32_service_dir {
72 u32 signature;
73 u32 entry_point;
74 u8 revision;
75 u8 length;
76 u8 checksum;
77 u8 reserved[5];
78};
79
80
81struct smbios_cru64_info {
82 u8 type;
83 u8 byte_length;
84 u16 handle;
85 u32 signature;
86 u64 physical_address;
87 u32 double_length;
88 u32 double_offset;
89};
90#define SMBIOS_CRU64_INFORMATION 212
91
92
93struct smbios_proliant_info {
94 u8 type;
95 u8 byte_length;
96 u16 handle;
97 u32 power_features;
98 u32 omega_features;
99 u32 reserved;
100 u32 misc_features;
101};
102#define SMBIOS_ICRU_INFORMATION 219
103
104
105struct cmn_registers {
106 union {
107 struct {
108 u8 ral;
109 u8 rah;
110 u16 rea2;
111 };
112 u32 reax;
113 } u1;
114 union {
115 struct {
116 u8 rbl;
117 u8 rbh;
118 u8 reb2l;
119 u8 reb2h;
120 };
121 u32 rebx;
122 } u2;
123 union {
124 struct {
125 u8 rcl;
126 u8 rch;
127 u16 rec2;
128 };
129 u32 recx;
130 } u3;
131 union {
132 struct {
133 u8 rdl;
134 u8 rdh;
135 u16 red2;
136 };
137 u32 redx;
138 } u4;
139
140 u32 resi;
141 u32 redi;
142 u16 rds;
143 u16 res;
144 u32 reflags;
145} __attribute__((packed));
146
147static unsigned int hpwdt_nmi_decoding;
148static unsigned int allow_kdump = 1;
149static unsigned int is_icru;
150static unsigned int is_uefi;
151static DEFINE_SPINLOCK(rom_lock);
152static void *cru_rom_addr;
153static struct cmn_registers cmn_regs;
154
155extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
156 unsigned long *pRomEntry);
157
158#ifdef CONFIG_X86_32
159
160
161#define HPWDT_ARCH 32
162
163asm(".text \n\t"
164 ".align 4 \n\t"
165 ".globl asminline_call \n"
166 "asminline_call: \n\t"
167 "pushl %ebp \n\t"
168 "movl %esp, %ebp \n\t"
169 "pusha \n\t"
170 "pushf \n\t"
171 "push %es \n\t"
172 "push %ds \n\t"
173 "pop %es \n\t"
174 "movl 8(%ebp),%eax \n\t"
175 "movl 4(%eax),%ebx \n\t"
176 "movl 8(%eax),%ecx \n\t"
177 "movl 12(%eax),%edx \n\t"
178 "movl 16(%eax),%esi \n\t"
179 "movl 20(%eax),%edi \n\t"
180 "movl (%eax),%eax \n\t"
181 "push %cs \n\t"
182 "call *12(%ebp) \n\t"
183 "pushf \n\t"
184 "pushl %eax \n\t"
185 "movl 8(%ebp),%eax \n\t"
186 "movl %ebx,4(%eax) \n\t"
187 "movl %ecx,8(%eax) \n\t"
188 "movl %edx,12(%eax) \n\t"
189 "movl %esi,16(%eax) \n\t"
190 "movl %edi,20(%eax) \n\t"
191 "movw %ds,24(%eax) \n\t"
192 "movw %es,26(%eax) \n\t"
193 "popl %ebx \n\t"
194 "movl %ebx,(%eax) \n\t"
195 "popl %ebx \n\t"
196 "movl %ebx,28(%eax) \n\t"
197 "pop %es \n\t"
198 "popf \n\t"
199 "popa \n\t"
200 "leave \n\t"
201 "ret \n\t"
202 ".previous");
203
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212
213
214
215
216static int cru_detect(unsigned long map_entry,
217 unsigned long map_offset)
218{
219 void *bios32_map;
220 unsigned long *bios32_entrypoint;
221 unsigned long cru_physical_address;
222 unsigned long cru_length;
223 unsigned long physical_bios_base = 0;
224 unsigned long physical_bios_offset = 0;
225 int retval = -ENODEV;
226
227 bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
228
229 if (bios32_map == NULL)
230 return -ENODEV;
231
232 bios32_entrypoint = bios32_map + map_offset;
233
234 cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
235
236 set_memory_x((unsigned long)bios32_map, 2);
237 asminline_call(&cmn_regs, bios32_entrypoint);
238
239 if (cmn_regs.u1.ral != 0) {
240 pr_warn("Call succeeded but with an error: 0x%x\n",
241 cmn_regs.u1.ral);
242 } else {
243 physical_bios_base = cmn_regs.u2.rebx;
244 physical_bios_offset = cmn_regs.u4.redx;
245 cru_length = cmn_regs.u3.recx;
246 cru_physical_address =
247 physical_bios_base + physical_bios_offset;
248
249
250 if ((physical_bios_base + physical_bios_offset)) {
251 cru_rom_addr =
252 ioremap(cru_physical_address, cru_length);
253 if (cru_rom_addr) {
254 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
255 (cru_length + PAGE_SIZE - 1) >> PAGE_SHIFT);
256 retval = 0;
257 }
258 }
259
260 pr_debug("CRU Base Address: 0x%lx\n", physical_bios_base);
261 pr_debug("CRU Offset Address: 0x%lx\n", physical_bios_offset);
262 pr_debug("CRU Length: 0x%lx\n", cru_length);
263 pr_debug("CRU Mapped Address: %p\n", &cru_rom_addr);
264 }
265 iounmap(bios32_map);
266 return retval;
267}
268
269
270
271
272static int bios_checksum(const char __iomem *ptr, int len)
273{
274 char sum = 0;
275 int i;
276
277
278
279
280
281 for (i = 0; i < len; i++)
282 sum += ptr[i];
283
284 return ((sum == 0) && (len > 0));
285}
286
287
288
289
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291
292
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294
295
296
297static int bios32_present(const char __iomem *p)
298{
299 struct bios32_service_dir *bios_32_ptr;
300 int length;
301 unsigned long map_entry, map_offset;
302
303 bios_32_ptr = (struct bios32_service_dir *) p;
304
305
306
307
308
309 if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
310 length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
311 if (bios_checksum(p, length)) {
312
313
314
315
316
317
318 map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
319 map_offset = bios_32_ptr->entry_point - map_entry;
320
321 return cru_detect(map_entry, map_offset);
322 }
323 }
324 return -ENODEV;
325}
326
327static int detect_cru_service(void)
328{
329 char __iomem *p, *q;
330 int rc = -1;
331
332
333
334
335 p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
336 if (p == NULL)
337 return -ENOMEM;
338
339 for (q = p; q < p + ROM_SIZE; q += 16) {
340 rc = bios32_present(q);
341 if (!rc)
342 break;
343 }
344 iounmap(p);
345 return rc;
346}
347
348#endif
349#ifdef CONFIG_X86_64
350
351
352#define HPWDT_ARCH 64
353
354asm(".text \n\t"
355 ".align 4 \n\t"
356 ".globl asminline_call \n"
357 "asminline_call: \n\t"
358 "pushq %rbp \n\t"
359 "movq %rsp, %rbp \n\t"
360 "pushq %rax \n\t"
361 "pushq %rbx \n\t"
362 "pushq %rdx \n\t"
363 "pushq %r12 \n\t"
364 "pushq %r9 \n\t"
365 "movq %rsi, %r12 \n\t"
366 "movq %rdi, %r9 \n\t"
367 "movl 4(%r9),%ebx \n\t"
368 "movl 8(%r9),%ecx \n\t"
369 "movl 12(%r9),%edx \n\t"
370 "movl 16(%r9),%esi \n\t"
371 "movl 20(%r9),%edi \n\t"
372 "movl (%r9),%eax \n\t"
373 "call *%r12 \n\t"
374 "pushfq \n\t"
375 "popq %r12 \n\t"
376 "movl %eax, (%r9) \n\t"
377 "movl %ebx, 4(%r9) \n\t"
378 "movl %ecx, 8(%r9) \n\t"
379 "movl %edx, 12(%r9) \n\t"
380 "movl %esi, 16(%r9) \n\t"
381 "movl %edi, 20(%r9) \n\t"
382 "movq %r12, %rax \n\t"
383 "movl %eax, 28(%r9) \n\t"
384 "popq %r9 \n\t"
385 "popq %r12 \n\t"
386 "popq %rdx \n\t"
387 "popq %rbx \n\t"
388 "popq %rax \n\t"
389 "leave \n\t"
390 "ret \n\t"
391 ".previous");
392
393
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397
398
399
400static void dmi_find_cru(const struct dmi_header *dm, void *dummy)
401{
402 struct smbios_cru64_info *smbios_cru64_ptr;
403 unsigned long cru_physical_address;
404
405 if (dm->type == SMBIOS_CRU64_INFORMATION) {
406 smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
407 if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
408 cru_physical_address =
409 smbios_cru64_ptr->physical_address +
410 smbios_cru64_ptr->double_offset;
411 cru_rom_addr = ioremap(cru_physical_address,
412 smbios_cru64_ptr->double_length);
413 set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
414 smbios_cru64_ptr->double_length >> PAGE_SHIFT);
415 }
416 }
417}
418
419static int detect_cru_service(void)
420{
421 cru_rom_addr = NULL;
422
423 dmi_walk(dmi_find_cru, NULL);
424
425
426 return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
427}
428
429#endif
430#endif
431
432
433
434
435static void hpwdt_start(void)
436{
437 reload = SECS_TO_TICKS(soft_margin);
438 iowrite16(reload, hpwdt_timer_reg);
439 iowrite8(0x85, hpwdt_timer_con);
440}
441
442static void hpwdt_stop(void)
443{
444 unsigned long data;
445
446 data = ioread8(hpwdt_timer_con);
447 data &= 0xFE;
448 iowrite8(data, hpwdt_timer_con);
449}
450
451static void hpwdt_ping(void)
452{
453 iowrite16(reload, hpwdt_timer_reg);
454}
455
456static int hpwdt_change_timer(int new_margin)
457{
458 if (new_margin < 1 || new_margin > HPWDT_MAX_TIMER) {
459 pr_warn("New value passed in is invalid: %d seconds\n",
460 new_margin);
461 return -EINVAL;
462 }
463
464 soft_margin = new_margin;
465 pr_debug("New timer passed in is %d seconds\n", new_margin);
466 reload = SECS_TO_TICKS(soft_margin);
467
468 return 0;
469}
470
471static int hpwdt_time_left(void)
472{
473 return TICKS_TO_SECS(ioread16(hpwdt_timer_reg));
474}
475
476#ifdef CONFIG_HPWDT_NMI_DECODING
477
478
479
480static int hpwdt_pretimeout(unsigned int ulReason, struct pt_regs *regs)
481{
482 unsigned long rom_pl;
483 static int die_nmi_called;
484
485 if (!hpwdt_nmi_decoding)
486 goto out;
487
488 spin_lock_irqsave(&rom_lock, rom_pl);
489 if (!die_nmi_called && !is_icru && !is_uefi)
490 asminline_call(&cmn_regs, cru_rom_addr);
491 die_nmi_called = 1;
492 spin_unlock_irqrestore(&rom_lock, rom_pl);
493
494 if (allow_kdump)
495 hpwdt_stop();
496
497 if (!is_icru && !is_uefi) {
498 if (cmn_regs.u1.ral == 0) {
499 panic("An NMI occurred, "
500 "but unable to determine source.\n");
501 }
502 }
503 panic("An NMI occurred. Depending on your system the reason "
504 "for the NMI is logged in any one of the following "
505 "resources:\n"
506 "1. Integrated Management Log (IML)\n"
507 "2. OA Syslog\n"
508 "3. OA Forward Progress Log\n"
509 "4. iLO Event Log");
510
511out:
512 return NMI_DONE;
513}
514#endif
515
516
517
518
519static int hpwdt_open(struct inode *inode, struct file *file)
520{
521
522 if (test_and_set_bit(0, &hpwdt_is_open))
523 return -EBUSY;
524
525
526 hpwdt_start();
527 hpwdt_ping();
528
529 return nonseekable_open(inode, file);
530}
531
532static int hpwdt_release(struct inode *inode, struct file *file)
533{
534
535 if (expect_release == 42) {
536 hpwdt_stop();
537 } else {
538 pr_crit("Unexpected close, not stopping watchdog!\n");
539 hpwdt_ping();
540 }
541
542 expect_release = 0;
543
544
545 clear_bit(0, &hpwdt_is_open);
546
547 return 0;
548}
549
550static ssize_t hpwdt_write(struct file *file, const char __user *data,
551 size_t len, loff_t *ppos)
552{
553
554 if (len) {
555 if (!nowayout) {
556 size_t i;
557
558
559
560 expect_release = 0;
561
562
563 for (i = 0; i != len; i++) {
564 char c;
565 if (get_user(c, data + i))
566 return -EFAULT;
567 if (c == 'V')
568 expect_release = 42;
569 }
570 }
571
572
573 hpwdt_ping();
574 }
575
576 return len;
577}
578
579static const struct watchdog_info ident = {
580 .options = WDIOF_SETTIMEOUT |
581 WDIOF_KEEPALIVEPING |
582 WDIOF_MAGICCLOSE,
583 .identity = "HP iLO2+ HW Watchdog Timer",
584};
585
586static long hpwdt_ioctl(struct file *file, unsigned int cmd,
587 unsigned long arg)
588{
589 void __user *argp = (void __user *)arg;
590 int __user *p = argp;
591 int new_margin, options;
592 int ret = -ENOTTY;
593
594 switch (cmd) {
595 case WDIOC_GETSUPPORT:
596 ret = 0;
597 if (copy_to_user(argp, &ident, sizeof(ident)))
598 ret = -EFAULT;
599 break;
600
601 case WDIOC_GETSTATUS:
602 case WDIOC_GETBOOTSTATUS:
603 ret = put_user(0, p);
604 break;
605
606 case WDIOC_KEEPALIVE:
607 hpwdt_ping();
608 ret = 0;
609 break;
610
611 case WDIOC_SETOPTIONS:
612 ret = get_user(options, p);
613 if (ret)
614 break;
615
616 if (options & WDIOS_DISABLECARD)
617 hpwdt_stop();
618
619 if (options & WDIOS_ENABLECARD) {
620 hpwdt_start();
621 hpwdt_ping();
622 }
623 break;
624
625 case WDIOC_SETTIMEOUT:
626 ret = get_user(new_margin, p);
627 if (ret)
628 break;
629
630 ret = hpwdt_change_timer(new_margin);
631 if (ret)
632 break;
633
634 hpwdt_ping();
635
636 case WDIOC_GETTIMEOUT:
637 ret = put_user(soft_margin, p);
638 break;
639
640 case WDIOC_GETTIMELEFT:
641 ret = put_user(hpwdt_time_left(), p);
642 break;
643 }
644 return ret;
645}
646
647
648
649
650static const struct file_operations hpwdt_fops = {
651 .owner = THIS_MODULE,
652 .llseek = no_llseek,
653 .write = hpwdt_write,
654 .unlocked_ioctl = hpwdt_ioctl,
655 .open = hpwdt_open,
656 .release = hpwdt_release,
657};
658
659static struct miscdevice hpwdt_miscdev = {
660 .minor = WATCHDOG_MINOR,
661 .name = "watchdog",
662 .fops = &hpwdt_fops,
663};
664
665
666
667
668
669#ifdef CONFIG_HPWDT_NMI_DECODING
670#ifdef CONFIG_X86_LOCAL_APIC
671static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
672{
673
674
675
676
677 hpwdt_nmi_decoding = 1;
678}
679#else
680static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
681{
682 dev_warn(&dev->dev, "NMI decoding is disabled. "
683 "Your kernel does not support a NMI Watchdog.\n");
684}
685#endif
686
687
688
689
690
691
692
693
694
695static void dmi_find_icru(const struct dmi_header *dm, void *dummy)
696{
697 struct smbios_proliant_info *smbios_proliant_ptr;
698
699 if (dm->type == SMBIOS_ICRU_INFORMATION) {
700 smbios_proliant_ptr = (struct smbios_proliant_info *) dm;
701 if (smbios_proliant_ptr->misc_features & 0x01)
702 is_icru = 1;
703 if (smbios_proliant_ptr->misc_features & 0x408)
704 is_uefi = 1;
705 }
706}
707
708static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
709{
710 int retval;
711
712
713
714
715
716
717
718
719
720
721
722 dmi_walk(dmi_find_icru, NULL);
723 if (!is_icru && !is_uefi) {
724
725
726
727
728
729
730
731 retval = detect_cru_service();
732 if (retval < 0) {
733 dev_warn(&dev->dev,
734 "Unable to detect the %d Bit CRU Service.\n",
735 HPWDT_ARCH);
736 return retval;
737 }
738
739
740
741
742
743 cmn_regs.u1.rah = 0x0D;
744 cmn_regs.u1.ral = 0x02;
745 }
746
747
748
749
750 retval = register_nmi_handler(NMI_UNKNOWN, hpwdt_pretimeout, 0, "hpwdt");
751 if (retval)
752 goto error;
753 retval = register_nmi_handler(NMI_SERR, hpwdt_pretimeout, 0, "hpwdt");
754 if (retval)
755 goto error1;
756 retval = register_nmi_handler(NMI_IO_CHECK, hpwdt_pretimeout, 0, "hpwdt");
757 if (retval)
758 goto error2;
759
760 dev_info(&dev->dev,
761 "HP Watchdog Timer Driver: NMI decoding initialized"
762 ", allow kernel dump: %s (default = 1/ON)\n",
763 (allow_kdump == 0) ? "OFF" : "ON");
764 return 0;
765
766error2:
767 unregister_nmi_handler(NMI_SERR, "hpwdt");
768error1:
769 unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
770error:
771 dev_warn(&dev->dev,
772 "Unable to register a die notifier (err=%d).\n",
773 retval);
774 if (cru_rom_addr)
775 iounmap(cru_rom_addr);
776 return retval;
777}
778
779static void hpwdt_exit_nmi_decoding(void)
780{
781 unregister_nmi_handler(NMI_UNKNOWN, "hpwdt");
782 unregister_nmi_handler(NMI_SERR, "hpwdt");
783 unregister_nmi_handler(NMI_IO_CHECK, "hpwdt");
784 if (cru_rom_addr)
785 iounmap(cru_rom_addr);
786}
787#else
788static void hpwdt_check_nmi_decoding(struct pci_dev *dev)
789{
790}
791
792static int hpwdt_init_nmi_decoding(struct pci_dev *dev)
793{
794 return 0;
795}
796
797static void hpwdt_exit_nmi_decoding(void)
798{
799}
800#endif
801
802static int hpwdt_init_one(struct pci_dev *dev,
803 const struct pci_device_id *ent)
804{
805 int retval;
806
807
808
809
810 hpwdt_check_nmi_decoding(dev);
811
812
813
814
815
816
817 if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
818 dev_warn(&dev->dev,
819 "This server does not have an iLO2+ ASIC.\n");
820 return -ENODEV;
821 }
822
823
824
825
826 if (dev->subsystem_device == 0x1979)
827 return -ENODEV;
828
829 if (pci_enable_device(dev)) {
830 dev_warn(&dev->dev,
831 "Not possible to enable PCI Device: 0x%x:0x%x.\n",
832 ent->vendor, ent->device);
833 return -ENODEV;
834 }
835
836 pci_mem_addr = pci_iomap(dev, 1, 0x80);
837 if (!pci_mem_addr) {
838 dev_warn(&dev->dev,
839 "Unable to detect the iLO2+ server memory.\n");
840 retval = -ENOMEM;
841 goto error_pci_iomap;
842 }
843 hpwdt_timer_reg = pci_mem_addr + 0x70;
844 hpwdt_timer_con = pci_mem_addr + 0x72;
845
846
847 hpwdt_stop();
848
849
850 if (hpwdt_change_timer(soft_margin))
851 hpwdt_change_timer(DEFAULT_MARGIN);
852
853
854 retval = hpwdt_init_nmi_decoding(dev);
855 if (retval != 0)
856 goto error_init_nmi_decoding;
857
858 retval = misc_register(&hpwdt_miscdev);
859 if (retval < 0) {
860 dev_warn(&dev->dev,
861 "Unable to register miscdev on minor=%d (err=%d).\n",
862 WATCHDOG_MINOR, retval);
863 goto error_misc_register;
864 }
865
866 dev_info(&dev->dev, "HP Watchdog Timer Driver: %s"
867 ", timer margin: %d seconds (nowayout=%d).\n",
868 HPWDT_VERSION, soft_margin, nowayout);
869 return 0;
870
871error_misc_register:
872 hpwdt_exit_nmi_decoding();
873error_init_nmi_decoding:
874 pci_iounmap(dev, pci_mem_addr);
875error_pci_iomap:
876 pci_disable_device(dev);
877 return retval;
878}
879
880static void hpwdt_exit(struct pci_dev *dev)
881{
882 if (!nowayout)
883 hpwdt_stop();
884
885 misc_deregister(&hpwdt_miscdev);
886 hpwdt_exit_nmi_decoding();
887 pci_iounmap(dev, pci_mem_addr);
888 pci_disable_device(dev);
889}
890
891static struct pci_driver hpwdt_driver = {
892 .name = "hpwdt",
893 .id_table = hpwdt_devices,
894 .probe = hpwdt_init_one,
895 .remove = hpwdt_exit,
896};
897
898MODULE_AUTHOR("Tom Mingarelli");
899MODULE_DESCRIPTION("hp watchdog driver");
900MODULE_LICENSE("GPL");
901MODULE_VERSION(HPWDT_VERSION);
902
903module_param(soft_margin, int, 0);
904MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
905
906module_param(nowayout, bool, 0);
907MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
908 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
909
910#ifdef CONFIG_HPWDT_NMI_DECODING
911module_param(allow_kdump, int, 0);
912MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
913#endif
914
915module_pci_driver(hpwdt_driver);
916
