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17#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19#include "edac_module.h"
20#include "fsl_ddr_edac.h"
21
22static const struct of_device_id fsl_ddr_mc_err_of_match[] = {
23 { .compatible = "fsl,qoriq-memory-controller", },
24 {},
25};
26MODULE_DEVICE_TABLE(of, fsl_ddr_mc_err_of_match);
27
28static struct platform_driver fsl_ddr_mc_err_driver = {
29 .probe = fsl_mc_err_probe,
30 .remove = fsl_mc_err_remove,
31 .driver = {
32 .name = "fsl_ddr_mc_err",
33 .of_match_table = fsl_ddr_mc_err_of_match,
34 },
35};
36
37static int __init fsl_ddr_mc_init(void)
38{
39 int res;
40
41
42 switch (edac_op_state) {
43 case EDAC_OPSTATE_POLL:
44 case EDAC_OPSTATE_INT:
45 break;
46 default:
47 edac_op_state = EDAC_OPSTATE_INT;
48 break;
49 }
50
51 res = platform_driver_register(&fsl_ddr_mc_err_driver);
52 if (res) {
53 pr_err("MC fails to register\n");
54 return res;
55 }
56
57 return 0;
58}
59
60module_init(fsl_ddr_mc_init);
61
62static void __exit fsl_ddr_mc_exit(void)
63{
64 platform_driver_unregister(&fsl_ddr_mc_err_driver);
65}
66
67module_exit(fsl_ddr_mc_exit);
68
69MODULE_LICENSE("GPL");
70MODULE_AUTHOR("NXP Semiconductor");
71module_param(edac_op_state, int, 0444);
72MODULE_PARM_DESC(edac_op_state,
73 "EDAC Error Reporting state: 0=Poll, 2=Interrupt");
74