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19#ifndef _ASM_X86_AMD_IOMMU_PROTO_H
20#define _ASM_X86_AMD_IOMMU_PROTO_H
21
22#include "amd_iommu_types.h"
23
24extern int amd_iommu_get_num_iommus(void);
25extern int amd_iommu_init_dma_ops(void);
26extern int amd_iommu_init_passthrough(void);
27extern irqreturn_t amd_iommu_int_thread(int irq, void *data);
28extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
29extern void amd_iommu_apply_erratum_63(u16 devid);
30extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
31extern int amd_iommu_init_devices(void);
32extern void amd_iommu_uninit_devices(void);
33extern void amd_iommu_init_notifier(void);
34extern int amd_iommu_init_api(void);
35
36#ifdef CONFIG_AMD_IOMMU_DEBUGFS
37void amd_iommu_debugfs_setup(struct amd_iommu *iommu);
38#else
39static inline void amd_iommu_debugfs_setup(struct amd_iommu *iommu) {}
40#endif
41
42
43extern int amd_iommu_prepare(void);
44extern int amd_iommu_enable(void);
45extern void amd_iommu_disable(void);
46extern int amd_iommu_reenable(int);
47extern int amd_iommu_enable_faulting(void);
48extern int amd_iommu_guest_ir;
49
50
51struct iommu_domain;
52
53extern bool amd_iommu_v2_supported(void);
54extern int amd_iommu_register_ppr_notifier(struct notifier_block *nb);
55extern int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb);
56extern void amd_iommu_domain_direct_map(struct iommu_domain *dom);
57extern int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids);
58extern int amd_iommu_flush_page(struct iommu_domain *dom, int pasid,
59 u64 address);
60extern int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid);
61extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid,
62 unsigned long cr3);
63extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid);
64extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev);
65
66#ifdef CONFIG_IRQ_REMAP
67extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
68#else
69static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
70{
71 return 0;
72}
73#endif
74
75#define PPR_SUCCESS 0x0
76#define PPR_INVALID 0x1
77#define PPR_FAILURE 0xf
78
79extern int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid,
80 int status, int tag);
81
82static inline bool is_rd890_iommu(struct pci_dev *pdev)
83{
84 return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
85 (pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
86}
87
88static inline bool iommu_feature(struct amd_iommu *iommu, u64 f)
89{
90 if (!(iommu->cap & (1 << IOMMU_CAP_EFR)))
91 return false;
92
93 return !!(iommu->features & f);
94}
95
96static inline u64 iommu_virt_to_phys(void *vaddr)
97{
98 return (u64)__sme_set(virt_to_phys(vaddr));
99}
100
101static inline void *iommu_phys_to_virt(unsigned long paddr)
102{
103 return phys_to_virt(__sme_clr(paddr));
104}
105
106extern bool translation_pre_enabled(struct amd_iommu *iommu);
107extern struct iommu_dev_data *get_dev_data(struct device *dev);
108#endif
109