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29#include "tw68.h"
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42static __le32 *tw68_risc_field(__le32 *rp, struct scatterlist *sglist,
43 unsigned int offset, u32 sync_line,
44 unsigned int bpl, unsigned int padding,
45 unsigned int lines, bool jump)
46{
47 struct scatterlist *sg;
48 unsigned int line, todo, done;
49
50 if (jump) {
51 *(rp++) = cpu_to_le32(RISC_JUMP);
52 *(rp++) = 0;
53 }
54
55
56 if (sync_line == 1)
57 *(rp++) = cpu_to_le32(RISC_SYNCO);
58 else
59 *(rp++) = cpu_to_le32(RISC_SYNCE);
60 *(rp++) = 0;
61
62
63 sg = sglist;
64 for (line = 0; line < lines; line++) {
65
66 while (offset && offset >= sg_dma_len(sg)) {
67 offset -= sg_dma_len(sg);
68 sg = sg_next(sg);
69 }
70 if (bpl <= sg_dma_len(sg) - offset) {
71
72 *(rp++) = cpu_to_le32(RISC_LINESTART |
73 bpl);
74 *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
75 offset += bpl;
76 } else {
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83 todo = bpl;
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85 done = (sg_dma_len(sg) - offset);
86 *(rp++) = cpu_to_le32(RISC_LINESTART |
87 (7 << 24) |
88 done);
89 *(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
90 todo -= done;
91 sg = sg_next(sg);
92
93 while (todo > sg_dma_len(sg)) {
94 *(rp++) = cpu_to_le32(RISC_INLINE |
95 (done << 12) |
96 sg_dma_len(sg));
97 *(rp++) = cpu_to_le32(sg_dma_address(sg));
98 todo -= sg_dma_len(sg);
99 sg = sg_next(sg);
100 done += sg_dma_len(sg);
101 }
102 if (todo) {
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104 *(rp++) = cpu_to_le32(RISC_INLINE |
105 (done << 12) |
106 todo);
107 *(rp++) = cpu_to_le32(sg_dma_address(sg));
108 }
109 offset = todo;
110 }
111 offset += padding;
112 }
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114 return rp;
115}
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137int tw68_risc_buffer(struct pci_dev *pci,
138 struct tw68_buf *buf,
139 struct scatterlist *sglist,
140 unsigned int top_offset,
141 unsigned int bottom_offset,
142 unsigned int bpl,
143 unsigned int padding,
144 unsigned int lines)
145{
146 u32 instructions, fields;
147 __le32 *rp;
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149 fields = 0;
150 if (UNSET != top_offset)
151 fields++;
152 if (UNSET != bottom_offset)
153 fields++;
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160 instructions = fields * (1 + (((bpl + padding) * lines) /
161 PAGE_SIZE) + lines) + 4;
162 buf->size = instructions * 8;
163 buf->cpu = pci_alloc_consistent(pci, buf->size, &buf->dma);
164 if (buf->cpu == NULL)
165 return -ENOMEM;
166
167
168 rp = buf->cpu;
169 if (UNSET != top_offset)
170 rp = tw68_risc_field(rp, sglist, top_offset, 1,
171 bpl, padding, lines, true);
172 if (UNSET != bottom_offset)
173 rp = tw68_risc_field(rp, sglist, bottom_offset, 2,
174 bpl, padding, lines, top_offset == UNSET);
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177 buf->jmp = rp;
178 buf->cpu[1] = cpu_to_le32(buf->dma + 8);
179
180 BUG_ON((buf->jmp - buf->cpu + 2) * sizeof(buf->cpu[0]) > buf->size);
181 return 0;
182}
183
184#if 0
185
186
187
188static void tw68_risc_decode(u32 risc, u32 addr)
189{
190#define RISC_OP(reg) (((reg) >> 28) & 7)
191 static struct instr_details {
192 char *name;
193 u8 has_data_type;
194 u8 has_byte_info;
195 u8 has_addr;
196 } instr[8] = {
197 [RISC_OP(RISC_SYNCO)] = {"syncOdd", 0, 0, 0},
198 [RISC_OP(RISC_SYNCE)] = {"syncEven", 0, 0, 0},
199 [RISC_OP(RISC_JUMP)] = {"jump", 0, 0, 1},
200 [RISC_OP(RISC_LINESTART)] = {"lineStart", 1, 1, 1},
201 [RISC_OP(RISC_INLINE)] = {"inline", 1, 1, 1},
202 };
203 u32 p;
204
205 p = RISC_OP(risc);
206 if (!(risc & 0x80000000) || !instr[p].name) {
207 pr_debug("0x%08x [ INVALID ]\n", risc);
208 return;
209 }
210 pr_debug("0x%08x %-9s IRQ=%d",
211 risc, instr[p].name, (risc >> 27) & 1);
212 if (instr[p].has_data_type)
213 pr_debug(" Type=%d", (risc >> 24) & 7);
214 if (instr[p].has_byte_info)
215 pr_debug(" Start=0x%03x Count=%03u",
216 (risc >> 12) & 0xfff, risc & 0xfff);
217 if (instr[p].has_addr)
218 pr_debug(" StartAddr=0x%08x", addr);
219 pr_debug("\n");
220}
221
222void tw68_risc_program_dump(struct tw68_core *core, struct tw68_buf *buf)
223{
224 const __le32 *addr;
225
226 pr_debug("%s: risc_program_dump: risc=%p, buf->cpu=0x%p, buf->jmp=0x%p\n",
227 core->name, buf, buf->cpu, buf->jmp);
228 for (addr = buf->cpu; addr <= buf->jmp; addr += 2)
229 tw68_risc_decode(*addr, *(addr+1));
230}
231#endif
232