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30#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32#include <linux/hardirq.h>
33#include <linux/module.h>
34#include <linux/init.h>
35#include <linux/interrupt.h>
36#include <linux/ioport.h>
37#include <linux/eisa.h>
38#include <linux/pci.h>
39#include <linux/dma-mapping.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/delay.h>
43#include <linux/spinlock.h>
44#include <linux/workqueue.h>
45#include <linux/mii.h>
46
47#include "tlan.h"
48
49
50
51static struct net_device *tlan_eisa_devices;
52
53static int tlan_devices_installed;
54
55
56static int aui[MAX_TLAN_BOARDS];
57static int duplex[MAX_TLAN_BOARDS];
58static int speed[MAX_TLAN_BOARDS];
59static int boards_found;
60module_param_array(aui, int, NULL, 0);
61module_param_array(duplex, int, NULL, 0);
62module_param_array(speed, int, NULL, 0);
63MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
64MODULE_PARM_DESC(duplex,
65 "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
66MODULE_PARM_DESC(speed, "ThunderLAN port speed setting(s) (0,10,100)");
67
68MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
69MODULE_DESCRIPTION("Driver for TI ThunderLAN based ethernet PCI adapters");
70MODULE_LICENSE("GPL");
71
72
73static int debug;
74module_param(debug, int, 0);
75MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
76
77static const char tlan_signature[] = "TLAN";
78static const char tlan_banner[] = "ThunderLAN driver v1.17\n";
79static int tlan_have_pci;
80static int tlan_have_eisa;
81
82static const char * const media[] = {
83 "10BaseT-HD", "10BaseT-FD", "100baseTx-HD",
84 "100BaseTx-FD", "100BaseT4", NULL
85};
86
87static struct board {
88 const char *device_label;
89 u32 flags;
90 u16 addr_ofs;
91} board_info[] = {
92 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
93 { "Compaq Netelligent 10/100 TX PCI UTP",
94 TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
95 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
96 { "Compaq NetFlex-3/P",
97 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
98 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
99 { "Compaq Netelligent Integrated 10/100 TX UTP",
100 TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
101 { "Compaq Netelligent Dual 10/100 TX PCI UTP",
102 TLAN_ADAPTER_NONE, 0x83 },
103 { "Compaq Netelligent 10/100 TX Embedded UTP",
104 TLAN_ADAPTER_NONE, 0x83 },
105 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
106 { "Olicom OC-2325", TLAN_ADAPTER_ACTIVITY_LED |
107 TLAN_ADAPTER_UNMANAGED_PHY, 0xf8 },
108 { "Olicom OC-2326", TLAN_ADAPTER_ACTIVITY_LED |
109 TLAN_ADAPTER_USE_INTERN_10, 0xf8 },
110 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
111 { "Compaq Netelligent 10 T/2 PCI UTP/coax", TLAN_ADAPTER_NONE, 0x83 },
112 { "Compaq NetFlex-3/E",
113 TLAN_ADAPTER_ACTIVITY_LED |
114 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
115 { "Compaq NetFlex-3/E",
116 TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
117};
118
119static const struct pci_device_id tlan_pci_tbl[] = {
120 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
121 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
122 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
123 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
124 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
125 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
126 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
127 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
128 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
129 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
130 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
131 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
132 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
133 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
134 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
135 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
136 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
137 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
138 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
139 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
140 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
141 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
142 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
143 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
144 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
145 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
146 { 0,}
147};
148MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
149
150static void tlan_eisa_probe(void);
151static void tlan_eisa_cleanup(void);
152static int tlan_init(struct net_device *);
153static int tlan_open(struct net_device *dev);
154static netdev_tx_t tlan_start_tx(struct sk_buff *, struct net_device *);
155static irqreturn_t tlan_handle_interrupt(int, void *);
156static int tlan_close(struct net_device *);
157static struct net_device_stats *tlan_get_stats(struct net_device *);
158static void tlan_set_multicast_list(struct net_device *);
159static int tlan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
160static int tlan_probe1(struct pci_dev *pdev, long ioaddr,
161 int irq, int rev, const struct pci_device_id *ent);
162static void tlan_tx_timeout(struct net_device *dev);
163static void tlan_tx_timeout_work(struct work_struct *work);
164static int tlan_init_one(struct pci_dev *pdev,
165 const struct pci_device_id *ent);
166
167static u32 tlan_handle_tx_eof(struct net_device *, u16);
168static u32 tlan_handle_stat_overflow(struct net_device *, u16);
169static u32 tlan_handle_rx_eof(struct net_device *, u16);
170static u32 tlan_handle_dummy(struct net_device *, u16);
171static u32 tlan_handle_tx_eoc(struct net_device *, u16);
172static u32 tlan_handle_status_check(struct net_device *, u16);
173static u32 tlan_handle_rx_eoc(struct net_device *, u16);
174
175static void tlan_timer(struct timer_list *t);
176static void tlan_phy_monitor(struct timer_list *t);
177
178static void tlan_reset_lists(struct net_device *);
179static void tlan_free_lists(struct net_device *);
180static void tlan_print_dio(u16);
181static void tlan_print_list(struct tlan_list *, char *, int);
182static void tlan_read_and_clear_stats(struct net_device *, int);
183static void tlan_reset_adapter(struct net_device *);
184static void tlan_finish_reset(struct net_device *);
185static void tlan_set_mac(struct net_device *, int areg, char *mac);
186
187static void tlan_phy_print(struct net_device *);
188static void tlan_phy_detect(struct net_device *);
189static void tlan_phy_power_down(struct net_device *);
190static void tlan_phy_power_up(struct net_device *);
191static void tlan_phy_reset(struct net_device *);
192static void tlan_phy_start_link(struct net_device *);
193static void tlan_phy_finish_auto_neg(struct net_device *);
194
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200
201
202static bool tlan_mii_read_reg(struct net_device *, u16, u16, u16 *);
203static void tlan_mii_send_data(u16, u32, unsigned);
204static void tlan_mii_sync(u16);
205static void tlan_mii_write_reg(struct net_device *, u16, u16, u16);
206
207static void tlan_ee_send_start(u16);
208static int tlan_ee_send_byte(u16, u8, int);
209static void tlan_ee_receive_byte(u16, u8 *, int);
210static int tlan_ee_read_byte(struct net_device *, u8, u8 *);
211
212
213static inline void
214tlan_store_skb(struct tlan_list *tag, struct sk_buff *skb)
215{
216 unsigned long addr = (unsigned long)skb;
217 tag->buffer[9].address = addr;
218 tag->buffer[8].address = upper_32_bits(addr);
219}
220
221static inline struct sk_buff *
222tlan_get_skb(const struct tlan_list *tag)
223{
224 unsigned long addr;
225
226 addr = tag->buffer[9].address;
227 addr |= ((unsigned long) tag->buffer[8].address << 16) << 16;
228 return (struct sk_buff *) addr;
229}
230
231static u32
232(*tlan_int_vector[TLAN_INT_NUMBER_OF_INTS])(struct net_device *, u16) = {
233 NULL,
234 tlan_handle_tx_eof,
235 tlan_handle_stat_overflow,
236 tlan_handle_rx_eof,
237 tlan_handle_dummy,
238 tlan_handle_tx_eoc,
239 tlan_handle_status_check,
240 tlan_handle_rx_eoc
241};
242
243static inline void
244tlan_set_timer(struct net_device *dev, u32 ticks, u32 type)
245{
246 struct tlan_priv *priv = netdev_priv(dev);
247 unsigned long flags = 0;
248
249 if (!in_irq())
250 spin_lock_irqsave(&priv->lock, flags);
251 if (priv->timer.function != NULL &&
252 priv->timer_type != TLAN_TIMER_ACTIVITY) {
253 if (!in_irq())
254 spin_unlock_irqrestore(&priv->lock, flags);
255 return;
256 }
257 priv->timer.function = tlan_timer;
258 if (!in_irq())
259 spin_unlock_irqrestore(&priv->lock, flags);
260
261 priv->timer_set_at = jiffies;
262 priv->timer_type = type;
263 mod_timer(&priv->timer, jiffies + ticks);
264
265}
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298static void tlan_remove_one(struct pci_dev *pdev)
299{
300 struct net_device *dev = pci_get_drvdata(pdev);
301 struct tlan_priv *priv = netdev_priv(dev);
302
303 unregister_netdev(dev);
304
305 if (priv->dma_storage) {
306 pci_free_consistent(priv->pci_dev,
307 priv->dma_size, priv->dma_storage,
308 priv->dma_storage_dma);
309 }
310
311#ifdef CONFIG_PCI
312 pci_release_regions(pdev);
313#endif
314
315 free_netdev(dev);
316
317 cancel_work_sync(&priv->tlan_tqueue);
318}
319
320static void tlan_start(struct net_device *dev)
321{
322 tlan_reset_lists(dev);
323
324
325
326 tlan_read_and_clear_stats(dev, TLAN_IGNORE);
327 tlan_reset_adapter(dev);
328 netif_wake_queue(dev);
329}
330
331static void tlan_stop(struct net_device *dev)
332{
333 struct tlan_priv *priv = netdev_priv(dev);
334
335 del_timer_sync(&priv->media_timer);
336 tlan_read_and_clear_stats(dev, TLAN_RECORD);
337 outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD);
338
339 tlan_reset_adapter(dev);
340 if (priv->timer.function != NULL) {
341 del_timer_sync(&priv->timer);
342 priv->timer.function = NULL;
343 }
344}
345
346#ifdef CONFIG_PM
347
348static int tlan_suspend(struct pci_dev *pdev, pm_message_t state)
349{
350 struct net_device *dev = pci_get_drvdata(pdev);
351
352 if (netif_running(dev))
353 tlan_stop(dev);
354
355 netif_device_detach(dev);
356 pci_save_state(pdev);
357 pci_disable_device(pdev);
358 pci_wake_from_d3(pdev, false);
359 pci_set_power_state(pdev, PCI_D3hot);
360
361 return 0;
362}
363
364static int tlan_resume(struct pci_dev *pdev)
365{
366 struct net_device *dev = pci_get_drvdata(pdev);
367 int rc = pci_enable_device(pdev);
368
369 if (rc)
370 return rc;
371 pci_restore_state(pdev);
372 pci_enable_wake(pdev, PCI_D0, 0);
373 netif_device_attach(dev);
374
375 if (netif_running(dev))
376 tlan_start(dev);
377
378 return 0;
379}
380
381#else
382
383#define tlan_suspend NULL
384#define tlan_resume NULL
385
386#endif
387
388
389static struct pci_driver tlan_driver = {
390 .name = "tlan",
391 .id_table = tlan_pci_tbl,
392 .probe = tlan_init_one,
393 .remove = tlan_remove_one,
394 .suspend = tlan_suspend,
395 .resume = tlan_resume,
396};
397
398static int __init tlan_probe(void)
399{
400 int rc = -ENODEV;
401
402 pr_info("%s", tlan_banner);
403
404 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting PCI Probe....\n");
405
406
407
408 rc = pci_register_driver(&tlan_driver);
409
410 if (rc != 0) {
411 pr_err("Could not register pci driver\n");
412 goto err_out_pci_free;
413 }
414
415 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
416 tlan_eisa_probe();
417
418 pr_info("%d device%s installed, PCI: %d EISA: %d\n",
419 tlan_devices_installed, tlan_devices_installed == 1 ? "" : "s",
420 tlan_have_pci, tlan_have_eisa);
421
422 if (tlan_devices_installed == 0) {
423 rc = -ENODEV;
424 goto err_out_pci_unreg;
425 }
426 return 0;
427
428err_out_pci_unreg:
429 pci_unregister_driver(&tlan_driver);
430err_out_pci_free:
431 return rc;
432}
433
434
435static int tlan_init_one(struct pci_dev *pdev,
436 const struct pci_device_id *ent)
437{
438 return tlan_probe1(pdev, -1, -1, 0, ent);
439}
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461static int tlan_probe1(struct pci_dev *pdev, long ioaddr, int irq, int rev,
462 const struct pci_device_id *ent)
463{
464
465 struct net_device *dev;
466 struct tlan_priv *priv;
467 u16 device_id;
468 int reg, rc = -ENODEV;
469
470#ifdef CONFIG_PCI
471 if (pdev) {
472 rc = pci_enable_device(pdev);
473 if (rc)
474 return rc;
475
476 rc = pci_request_regions(pdev, tlan_signature);
477 if (rc) {
478 pr_err("Could not reserve IO regions\n");
479 goto err_out;
480 }
481 }
482#endif
483
484 dev = alloc_etherdev(sizeof(struct tlan_priv));
485 if (dev == NULL) {
486 rc = -ENOMEM;
487 goto err_out_regions;
488 }
489 SET_NETDEV_DEV(dev, &pdev->dev);
490
491 priv = netdev_priv(dev);
492
493 priv->pci_dev = pdev;
494 priv->dev = dev;
495
496
497 if (pdev) {
498 u32 pci_io_base = 0;
499
500 priv->adapter = &board_info[ent->driver_data];
501
502 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
503 if (rc) {
504 pr_err("No suitable PCI mapping available\n");
505 goto err_out_free_dev;
506 }
507
508 for (reg = 0; reg <= 5; reg++) {
509 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
510 pci_io_base = pci_resource_start(pdev, reg);
511 TLAN_DBG(TLAN_DEBUG_GNRL,
512 "IO mapping is available at %x.\n",
513 pci_io_base);
514 break;
515 }
516 }
517 if (!pci_io_base) {
518 pr_err("No IO mappings available\n");
519 rc = -EIO;
520 goto err_out_free_dev;
521 }
522
523 dev->base_addr = pci_io_base;
524 dev->irq = pdev->irq;
525 priv->adapter_rev = pdev->revision;
526 pci_set_master(pdev);
527 pci_set_drvdata(pdev, dev);
528
529 } else {
530
531
532 device_id = inw(ioaddr + EISA_ID2);
533 if (device_id == 0x20F1) {
534 priv->adapter = &board_info[13];
535 priv->adapter_rev = 23;
536 } else {
537 priv->adapter = &board_info[14];
538 priv->adapter_rev = 10;
539 }
540 dev->base_addr = ioaddr;
541 dev->irq = irq;
542 }
543
544
545 if (dev->mem_start) {
546 priv->aui = dev->mem_start & 0x01;
547 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0
548 : (dev->mem_start & 0x06) >> 1;
549 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0
550 : (dev->mem_start & 0x18) >> 3;
551
552 if (priv->speed == 0x1)
553 priv->speed = TLAN_SPEED_10;
554 else if (priv->speed == 0x2)
555 priv->speed = TLAN_SPEED_100;
556
557 debug = priv->debug = dev->mem_end;
558 } else {
559 priv->aui = aui[boards_found];
560 priv->speed = speed[boards_found];
561 priv->duplex = duplex[boards_found];
562 priv->debug = debug;
563 }
564
565
566
567 INIT_WORK(&priv->tlan_tqueue, tlan_tx_timeout_work);
568
569 spin_lock_init(&priv->lock);
570
571 rc = tlan_init(dev);
572 if (rc) {
573 pr_err("Could not set up device\n");
574 goto err_out_free_dev;
575 }
576
577 rc = register_netdev(dev);
578 if (rc) {
579 pr_err("Could not register device\n");
580 goto err_out_uninit;
581 }
582
583
584 tlan_devices_installed++;
585 boards_found++;
586
587
588 if (pdev)
589 tlan_have_pci++;
590 else {
591 priv->next_device = tlan_eisa_devices;
592 tlan_eisa_devices = dev;
593 tlan_have_eisa++;
594 }
595
596 netdev_info(dev, "irq=%2d, io=%04x, %s, Rev. %d\n",
597 (int)dev->irq,
598 (int)dev->base_addr,
599 priv->adapter->device_label,
600 priv->adapter_rev);
601 return 0;
602
603err_out_uninit:
604 pci_free_consistent(priv->pci_dev, priv->dma_size, priv->dma_storage,
605 priv->dma_storage_dma);
606err_out_free_dev:
607 free_netdev(dev);
608err_out_regions:
609#ifdef CONFIG_PCI
610 if (pdev)
611 pci_release_regions(pdev);
612err_out:
613#endif
614 if (pdev)
615 pci_disable_device(pdev);
616 return rc;
617}
618
619
620static void tlan_eisa_cleanup(void)
621{
622 struct net_device *dev;
623 struct tlan_priv *priv;
624
625 while (tlan_have_eisa) {
626 dev = tlan_eisa_devices;
627 priv = netdev_priv(dev);
628 if (priv->dma_storage) {
629 pci_free_consistent(priv->pci_dev, priv->dma_size,
630 priv->dma_storage,
631 priv->dma_storage_dma);
632 }
633 release_region(dev->base_addr, 0x10);
634 unregister_netdev(dev);
635 tlan_eisa_devices = priv->next_device;
636 free_netdev(dev);
637 tlan_have_eisa--;
638 }
639}
640
641
642static void __exit tlan_exit(void)
643{
644 pci_unregister_driver(&tlan_driver);
645
646 if (tlan_have_eisa)
647 tlan_eisa_cleanup();
648
649}
650
651
652
653module_init(tlan_probe);
654module_exit(tlan_exit);
655
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669
670
671static void __init tlan_eisa_probe(void)
672{
673 long ioaddr;
674 int rc = -ENODEV;
675 int irq;
676 u16 device_id;
677
678 if (!EISA_bus) {
679 TLAN_DBG(TLAN_DEBUG_PROBE, "No EISA bus present\n");
680 return;
681 }
682
683
684 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
685
686 TLAN_DBG(TLAN_DEBUG_PROBE, "EISA_ID 0x%4x: 0x%4x\n",
687 (int) ioaddr + 0xc80, inw(ioaddr + EISA_ID));
688 TLAN_DBG(TLAN_DEBUG_PROBE, "EISA_ID 0x%4x: 0x%4x\n",
689 (int) ioaddr + 0xc82, inw(ioaddr + EISA_ID2));
690
691
692 TLAN_DBG(TLAN_DEBUG_PROBE,
693 "Probing for EISA adapter at IO: 0x%4x : ",
694 (int) ioaddr);
695 if (request_region(ioaddr, 0x10, tlan_signature) == NULL)
696 goto out;
697
698 if (inw(ioaddr + EISA_ID) != 0x110E) {
699 release_region(ioaddr, 0x10);
700 goto out;
701 }
702
703 device_id = inw(ioaddr + EISA_ID2);
704 if (device_id != 0x20F1 && device_id != 0x40F1) {
705 release_region(ioaddr, 0x10);
706 goto out;
707 }
708
709
710 if (inb(ioaddr + EISA_CR) != 0x1) {
711 release_region(ioaddr, 0x10);
712 goto out2;
713 }
714
715 if (debug == 0x10)
716 pr_info("Found one\n");
717
718
719
720 switch (inb(ioaddr + 0xcc0)) {
721 case(0x10):
722 irq = 5;
723 break;
724 case(0x20):
725 irq = 9;
726 break;
727 case(0x40):
728 irq = 10;
729 break;
730 case(0x80):
731 irq = 11;
732 break;
733 default:
734 goto out;
735 }
736
737
738
739 rc = tlan_probe1(NULL, ioaddr, irq,
740 12, NULL);
741 continue;
742
743out:
744 if (debug == 0x10)
745 pr_info("None found\n");
746 continue;
747
748out2:
749 if (debug == 0x10)
750 pr_info("Card found but it is not enabled, skipping\n");
751 continue;
752
753 }
754
755}
756
757#ifdef CONFIG_NET_POLL_CONTROLLER
758static void tlan_poll(struct net_device *dev)
759{
760 disable_irq(dev->irq);
761 tlan_handle_interrupt(dev->irq, dev);
762 enable_irq(dev->irq);
763}
764#endif
765
766static const struct net_device_ops tlan_netdev_ops = {
767 .ndo_open = tlan_open,
768 .ndo_stop = tlan_close,
769 .ndo_start_xmit = tlan_start_tx,
770 .ndo_tx_timeout = tlan_tx_timeout,
771 .ndo_get_stats = tlan_get_stats,
772 .ndo_set_rx_mode = tlan_set_multicast_list,
773 .ndo_do_ioctl = tlan_ioctl,
774 .ndo_set_mac_address = eth_mac_addr,
775 .ndo_validate_addr = eth_validate_addr,
776#ifdef CONFIG_NET_POLL_CONTROLLER
777 .ndo_poll_controller = tlan_poll,
778#endif
779};
780
781static void tlan_get_drvinfo(struct net_device *dev,
782 struct ethtool_drvinfo *info)
783{
784 struct tlan_priv *priv = netdev_priv(dev);
785
786 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
787 if (priv->pci_dev)
788 strlcpy(info->bus_info, pci_name(priv->pci_dev),
789 sizeof(info->bus_info));
790 else
791 strlcpy(info->bus_info, "EISA", sizeof(info->bus_info));
792}
793
794static int tlan_get_eeprom_len(struct net_device *dev)
795{
796 return TLAN_EEPROM_SIZE;
797}
798
799static int tlan_get_eeprom(struct net_device *dev,
800 struct ethtool_eeprom *eeprom, u8 *data)
801{
802 int i;
803
804 for (i = 0; i < TLAN_EEPROM_SIZE; i++)
805 if (tlan_ee_read_byte(dev, i, &data[i]))
806 return -EIO;
807
808 return 0;
809}
810
811static const struct ethtool_ops tlan_ethtool_ops = {
812 .get_drvinfo = tlan_get_drvinfo,
813 .get_link = ethtool_op_get_link,
814 .get_eeprom_len = tlan_get_eeprom_len,
815 .get_eeprom = tlan_get_eeprom,
816};
817
818
819
820
821
822
823
824
825
826
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832
833
834
835static int tlan_init(struct net_device *dev)
836{
837 int dma_size;
838 int err;
839 int i;
840 struct tlan_priv *priv;
841
842 priv = netdev_priv(dev);
843
844 dma_size = (TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS)
845 * (sizeof(struct tlan_list));
846 priv->dma_storage = pci_alloc_consistent(priv->pci_dev,
847 dma_size,
848 &priv->dma_storage_dma);
849 priv->dma_size = dma_size;
850
851 if (priv->dma_storage == NULL) {
852 pr_err("Could not allocate lists and buffers for %s\n",
853 dev->name);
854 return -ENOMEM;
855 }
856 memset(priv->dma_storage, 0, dma_size);
857 priv->rx_list = (struct tlan_list *)
858 ALIGN((unsigned long)priv->dma_storage, 8);
859 priv->rx_list_dma = ALIGN(priv->dma_storage_dma, 8);
860 priv->tx_list = priv->rx_list + TLAN_NUM_RX_LISTS;
861 priv->tx_list_dma =
862 priv->rx_list_dma + sizeof(struct tlan_list)*TLAN_NUM_RX_LISTS;
863
864 err = 0;
865 for (i = 0; i < ETH_ALEN; i++)
866 err |= tlan_ee_read_byte(dev,
867 (u8) priv->adapter->addr_ofs + i,
868 (u8 *) &dev->dev_addr[i]);
869 if (err) {
870 pr_err("%s: Error reading MAC from eeprom: %d\n",
871 dev->name, err);
872 }
873
874 if (priv->adapter->addr_ofs == 0xf8) {
875 for (i = 0; i < ETH_ALEN; i += 2) {
876 char tmp = dev->dev_addr[i];
877 dev->dev_addr[i] = dev->dev_addr[i + 1];
878 dev->dev_addr[i + 1] = tmp;
879 }
880 }
881
882 netif_carrier_off(dev);
883
884
885 dev->netdev_ops = &tlan_netdev_ops;
886 dev->ethtool_ops = &tlan_ethtool_ops;
887 dev->watchdog_timeo = TX_TIMEOUT;
888
889 return 0;
890
891}
892
893
894
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896
897
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900
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911
912
913static int tlan_open(struct net_device *dev)
914{
915 struct tlan_priv *priv = netdev_priv(dev);
916 int err;
917
918 priv->tlan_rev = tlan_dio_read8(dev->base_addr, TLAN_DEF_REVISION);
919 err = request_irq(dev->irq, tlan_handle_interrupt, IRQF_SHARED,
920 dev->name, dev);
921
922 if (err) {
923 netdev_err(dev, "Cannot open because IRQ %d is already in use\n",
924 dev->irq);
925 return err;
926 }
927
928 timer_setup(&priv->timer, NULL, 0);
929 timer_setup(&priv->media_timer, tlan_phy_monitor, 0);
930
931 tlan_start(dev);
932
933 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n",
934 dev->name, priv->tlan_rev);
935
936 return 0;
937
938}
939
940
941
942
943
944
945
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947
948
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951
952
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954
955
956
957static int tlan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
958{
959 struct tlan_priv *priv = netdev_priv(dev);
960 struct mii_ioctl_data *data = if_mii(rq);
961 u32 phy = priv->phy[priv->phy_num];
962
963 if (!priv->phy_online)
964 return -EAGAIN;
965
966 switch (cmd) {
967 case SIOCGMIIPHY:
968 data->phy_id = phy;
969
970
971
972 case SIOCGMIIREG:
973 tlan_mii_read_reg(dev, data->phy_id & 0x1f,
974 data->reg_num & 0x1f, &data->val_out);
975 return 0;
976
977
978 case SIOCSMIIREG:
979 tlan_mii_write_reg(dev, data->phy_id & 0x1f,
980 data->reg_num & 0x1f, data->val_in);
981 return 0;
982 default:
983 return -EOPNOTSUPP;
984 }
985}
986
987
988
989
990
991
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993
994
995
996
997
998
999static void tlan_tx_timeout(struct net_device *dev)
1000{
1001
1002 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
1003
1004
1005 tlan_free_lists(dev);
1006 tlan_reset_lists(dev);
1007 tlan_read_and_clear_stats(dev, TLAN_IGNORE);
1008 tlan_reset_adapter(dev);
1009 netif_trans_update(dev);
1010 netif_wake_queue(dev);
1011
1012}
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025static void tlan_tx_timeout_work(struct work_struct *work)
1026{
1027 struct tlan_priv *priv =
1028 container_of(work, struct tlan_priv, tlan_tqueue);
1029
1030 tlan_tx_timeout(priv->dev);
1031}
1032
1033
1034
1035
1036
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1038
1039
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1054
1055
1056static netdev_tx_t tlan_start_tx(struct sk_buff *skb, struct net_device *dev)
1057{
1058 struct tlan_priv *priv = netdev_priv(dev);
1059 dma_addr_t tail_list_phys;
1060 struct tlan_list *tail_list;
1061 unsigned long flags;
1062 unsigned int txlen;
1063
1064 if (!priv->phy_online) {
1065 TLAN_DBG(TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n",
1066 dev->name);
1067 dev_kfree_skb_any(skb);
1068 return NETDEV_TX_OK;
1069 }
1070
1071 if (skb_padto(skb, TLAN_MIN_FRAME_SIZE))
1072 return NETDEV_TX_OK;
1073 txlen = max(skb->len, (unsigned int)TLAN_MIN_FRAME_SIZE);
1074
1075 tail_list = priv->tx_list + priv->tx_tail;
1076 tail_list_phys =
1077 priv->tx_list_dma + sizeof(struct tlan_list)*priv->tx_tail;
1078
1079 if (tail_list->c_stat != TLAN_CSTAT_UNUSED) {
1080 TLAN_DBG(TLAN_DEBUG_TX,
1081 "TRANSMIT: %s is busy (Head=%d Tail=%d)\n",
1082 dev->name, priv->tx_head, priv->tx_tail);
1083 netif_stop_queue(dev);
1084 priv->tx_busy_count++;
1085 return NETDEV_TX_BUSY;
1086 }
1087
1088 tail_list->forward = 0;
1089
1090 tail_list->buffer[0].address = pci_map_single(priv->pci_dev,
1091 skb->data, txlen,
1092 PCI_DMA_TODEVICE);
1093 tlan_store_skb(tail_list, skb);
1094
1095 tail_list->frame_size = (u16) txlen;
1096 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) txlen;
1097 tail_list->buffer[1].count = 0;
1098 tail_list->buffer[1].address = 0;
1099
1100 spin_lock_irqsave(&priv->lock, flags);
1101 tail_list->c_stat = TLAN_CSTAT_READY;
1102 if (!priv->tx_in_progress) {
1103 priv->tx_in_progress = 1;
1104 TLAN_DBG(TLAN_DEBUG_TX,
1105 "TRANSMIT: Starting TX on buffer %d\n",
1106 priv->tx_tail);
1107 outl(tail_list_phys, dev->base_addr + TLAN_CH_PARM);
1108 outl(TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD);
1109 } else {
1110 TLAN_DBG(TLAN_DEBUG_TX,
1111 "TRANSMIT: Adding buffer %d to TX channel\n",
1112 priv->tx_tail);
1113 if (priv->tx_tail == 0) {
1114 (priv->tx_list + (TLAN_NUM_TX_LISTS - 1))->forward
1115 = tail_list_phys;
1116 } else {
1117 (priv->tx_list + (priv->tx_tail - 1))->forward
1118 = tail_list_phys;
1119 }
1120 }
1121 spin_unlock_irqrestore(&priv->lock, flags);
1122
1123 CIRC_INC(priv->tx_tail, TLAN_NUM_TX_LISTS);
1124
1125 return NETDEV_TX_OK;
1126
1127}
1128
1129
1130
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1149
1150
1151
1152static irqreturn_t tlan_handle_interrupt(int irq, void *dev_id)
1153{
1154 struct net_device *dev = dev_id;
1155 struct tlan_priv *priv = netdev_priv(dev);
1156 u16 host_int;
1157 u16 type;
1158
1159 spin_lock(&priv->lock);
1160
1161 host_int = inw(dev->base_addr + TLAN_HOST_INT);
1162 type = (host_int & TLAN_HI_IT_MASK) >> 2;
1163 if (type) {
1164 u32 ack;
1165 u32 host_cmd;
1166
1167 outw(host_int, dev->base_addr + TLAN_HOST_INT);
1168 ack = tlan_int_vector[type](dev, host_int);
1169
1170 if (ack) {
1171 host_cmd = TLAN_HC_ACK | ack | (type << 18);
1172 outl(host_cmd, dev->base_addr + TLAN_HOST_CMD);
1173 }
1174 }
1175
1176 spin_unlock(&priv->lock);
1177
1178 return IRQ_RETVAL(type);
1179}
1180
1181
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1197
1198
1199static int tlan_close(struct net_device *dev)
1200{
1201 tlan_stop(dev);
1202
1203 free_irq(dev->irq, dev);
1204 tlan_free_lists(dev);
1205 TLAN_DBG(TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name);
1206
1207 return 0;
1208
1209}
1210
1211
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1228
1229static struct net_device_stats *tlan_get_stats(struct net_device *dev)
1230{
1231 struct tlan_priv *priv = netdev_priv(dev);
1232 int i;
1233
1234
1235 tlan_read_and_clear_stats(dev, TLAN_RECORD);
1236
1237 TLAN_DBG(TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name,
1238 priv->rx_eoc_count);
1239 TLAN_DBG(TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name,
1240 priv->tx_busy_count);
1241 if (debug & TLAN_DEBUG_GNRL) {
1242 tlan_print_dio(dev->base_addr);
1243 tlan_phy_print(dev);
1244 }
1245 if (debug & TLAN_DEBUG_LIST) {
1246 for (i = 0; i < TLAN_NUM_RX_LISTS; i++)
1247 tlan_print_list(priv->rx_list + i, "RX", i);
1248 for (i = 0; i < TLAN_NUM_TX_LISTS; i++)
1249 tlan_print_list(priv->tx_list + i, "TX", i);
1250 }
1251
1252 return &dev->stats;
1253
1254}
1255
1256
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1258
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1277
1278
1279static void tlan_set_multicast_list(struct net_device *dev)
1280{
1281 struct netdev_hw_addr *ha;
1282 u32 hash1 = 0;
1283 u32 hash2 = 0;
1284 int i;
1285 u32 offset;
1286 u8 tmp;
1287
1288 if (dev->flags & IFF_PROMISC) {
1289 tmp = tlan_dio_read8(dev->base_addr, TLAN_NET_CMD);
1290 tlan_dio_write8(dev->base_addr,
1291 TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF);
1292 } else {
1293 tmp = tlan_dio_read8(dev->base_addr, TLAN_NET_CMD);
1294 tlan_dio_write8(dev->base_addr,
1295 TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF);
1296 if (dev->flags & IFF_ALLMULTI) {
1297 for (i = 0; i < 3; i++)
1298 tlan_set_mac(dev, i + 1, NULL);
1299 tlan_dio_write32(dev->base_addr, TLAN_HASH_1,
1300 0xffffffff);
1301 tlan_dio_write32(dev->base_addr, TLAN_HASH_2,
1302 0xffffffff);
1303 } else {
1304 i = 0;
1305 netdev_for_each_mc_addr(ha, dev) {
1306 if (i < 3) {
1307 tlan_set_mac(dev, i + 1,
1308 (char *) &ha->addr);
1309 } else {
1310 offset =
1311 tlan_hash_func((u8 *)&ha->addr);
1312 if (offset < 32)
1313 hash1 |= (1 << offset);
1314 else
1315 hash2 |= (1 << (offset - 32));
1316 }
1317 i++;
1318 }
1319 for ( ; i < 3; i++)
1320 tlan_set_mac(dev, i + 1, NULL);
1321 tlan_dio_write32(dev->base_addr, TLAN_HASH_1, hash1);
1322 tlan_dio_write32(dev->base_addr, TLAN_HASH_2, hash2);
1323 }
1324 }
1325
1326}
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
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1365
1366
1367static u32 tlan_handle_tx_eof(struct net_device *dev, u16 host_int)
1368{
1369 struct tlan_priv *priv = netdev_priv(dev);
1370 int eoc = 0;
1371 struct tlan_list *head_list;
1372 dma_addr_t head_list_phys;
1373 u32 ack = 0;
1374 u16 tmp_c_stat;
1375
1376 TLAN_DBG(TLAN_DEBUG_TX,
1377 "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n",
1378 priv->tx_head, priv->tx_tail);
1379 head_list = priv->tx_list + priv->tx_head;
1380
1381 while (((tmp_c_stat = head_list->c_stat) & TLAN_CSTAT_FRM_CMP)
1382 && (ack < 255)) {
1383 struct sk_buff *skb = tlan_get_skb(head_list);
1384
1385 ack++;
1386 pci_unmap_single(priv->pci_dev, head_list->buffer[0].address,
1387 max(skb->len,
1388 (unsigned int)TLAN_MIN_FRAME_SIZE),
1389 PCI_DMA_TODEVICE);
1390 dev_kfree_skb_any(skb);
1391 head_list->buffer[8].address = 0;
1392 head_list->buffer[9].address = 0;
1393
1394 if (tmp_c_stat & TLAN_CSTAT_EOC)
1395 eoc = 1;
1396
1397 dev->stats.tx_bytes += head_list->frame_size;
1398
1399 head_list->c_stat = TLAN_CSTAT_UNUSED;
1400 netif_start_queue(dev);
1401 CIRC_INC(priv->tx_head, TLAN_NUM_TX_LISTS);
1402 head_list = priv->tx_list + priv->tx_head;
1403 }
1404
1405 if (!ack)
1406 netdev_info(dev,
1407 "Received interrupt for uncompleted TX frame\n");
1408
1409 if (eoc) {
1410 TLAN_DBG(TLAN_DEBUG_TX,
1411 "TRANSMIT: handling TX EOC (Head=%d Tail=%d)\n",
1412 priv->tx_head, priv->tx_tail);
1413 head_list = priv->tx_list + priv->tx_head;
1414 head_list_phys = priv->tx_list_dma
1415 + sizeof(struct tlan_list)*priv->tx_head;
1416 if ((head_list->c_stat & TLAN_CSTAT_READY)
1417 == TLAN_CSTAT_READY) {
1418 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM);
1419 ack |= TLAN_HC_GO;
1420 } else {
1421 priv->tx_in_progress = 0;
1422 }
1423 }
1424
1425 if (priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED) {
1426 tlan_dio_write8(dev->base_addr,
1427 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT);
1428 if (priv->timer.function == NULL) {
1429 priv->timer.function = tlan_timer;
1430 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1431 priv->timer_set_at = jiffies;
1432 priv->timer_type = TLAN_TIMER_ACTIVITY;
1433 add_timer(&priv->timer);
1434 } else if (priv->timer_type == TLAN_TIMER_ACTIVITY) {
1435 priv->timer_set_at = jiffies;
1436 }
1437 }
1438
1439 return ack;
1440
1441}
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463static u32 tlan_handle_stat_overflow(struct net_device *dev, u16 host_int)
1464{
1465 tlan_read_and_clear_stats(dev, TLAN_RECORD);
1466
1467 return 1;
1468
1469}
1470
1471
1472
1473
1474
1475
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1477
1478
1479
1480
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1496
1497
1498
1499static u32 tlan_handle_rx_eof(struct net_device *dev, u16 host_int)
1500{
1501 struct tlan_priv *priv = netdev_priv(dev);
1502 u32 ack = 0;
1503 int eoc = 0;
1504 struct tlan_list *head_list;
1505 struct sk_buff *skb;
1506 struct tlan_list *tail_list;
1507 u16 tmp_c_stat;
1508 dma_addr_t head_list_phys;
1509
1510 TLAN_DBG(TLAN_DEBUG_RX, "RECEIVE: handling RX EOF (Head=%d Tail=%d)\n",
1511 priv->rx_head, priv->rx_tail);
1512 head_list = priv->rx_list + priv->rx_head;
1513 head_list_phys =
1514 priv->rx_list_dma + sizeof(struct tlan_list)*priv->rx_head;
1515
1516 while (((tmp_c_stat = head_list->c_stat) & TLAN_CSTAT_FRM_CMP)
1517 && (ack < 255)) {
1518 dma_addr_t frame_dma = head_list->buffer[0].address;
1519 u32 frame_size = head_list->frame_size;
1520 struct sk_buff *new_skb;
1521
1522 ack++;
1523 if (tmp_c_stat & TLAN_CSTAT_EOC)
1524 eoc = 1;
1525
1526 new_skb = netdev_alloc_skb_ip_align(dev,
1527 TLAN_MAX_FRAME_SIZE + 5);
1528 if (!new_skb)
1529 goto drop_and_reuse;
1530
1531 skb = tlan_get_skb(head_list);
1532 pci_unmap_single(priv->pci_dev, frame_dma,
1533 TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1534 skb_put(skb, frame_size);
1535
1536 dev->stats.rx_bytes += frame_size;
1537
1538 skb->protocol = eth_type_trans(skb, dev);
1539 netif_rx(skb);
1540
1541 head_list->buffer[0].address =
1542 pci_map_single(priv->pci_dev, new_skb->data,
1543 TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1544
1545 tlan_store_skb(head_list, new_skb);
1546drop_and_reuse:
1547 head_list->forward = 0;
1548 head_list->c_stat = 0;
1549 tail_list = priv->rx_list + priv->rx_tail;
1550 tail_list->forward = head_list_phys;
1551
1552 CIRC_INC(priv->rx_head, TLAN_NUM_RX_LISTS);
1553 CIRC_INC(priv->rx_tail, TLAN_NUM_RX_LISTS);
1554 head_list = priv->rx_list + priv->rx_head;
1555 head_list_phys = priv->rx_list_dma
1556 + sizeof(struct tlan_list)*priv->rx_head;
1557 }
1558
1559 if (!ack)
1560 netdev_info(dev,
1561 "Received interrupt for uncompleted RX frame\n");
1562
1563
1564 if (eoc) {
1565 TLAN_DBG(TLAN_DEBUG_RX,
1566 "RECEIVE: handling RX EOC (Head=%d Tail=%d)\n",
1567 priv->rx_head, priv->rx_tail);
1568 head_list = priv->rx_list + priv->rx_head;
1569 head_list_phys = priv->rx_list_dma
1570 + sizeof(struct tlan_list)*priv->rx_head;
1571 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM);
1572 ack |= TLAN_HC_GO | TLAN_HC_RT;
1573 priv->rx_eoc_count++;
1574 }
1575
1576 if (priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED) {
1577 tlan_dio_write8(dev->base_addr,
1578 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT);
1579 if (priv->timer.function == NULL) {
1580 priv->timer.function = tlan_timer;
1581 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1582 priv->timer_set_at = jiffies;
1583 priv->timer_type = TLAN_TIMER_ACTIVITY;
1584 add_timer(&priv->timer);
1585 } else if (priv->timer_type == TLAN_TIMER_ACTIVITY) {
1586 priv->timer_set_at = jiffies;
1587 }
1588 }
1589
1590 return ack;
1591
1592}
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614static u32 tlan_handle_dummy(struct net_device *dev, u16 host_int)
1615{
1616 netdev_info(dev, "Test interrupt\n");
1617 return 1;
1618
1619}
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644static u32 tlan_handle_tx_eoc(struct net_device *dev, u16 host_int)
1645{
1646 struct tlan_priv *priv = netdev_priv(dev);
1647 struct tlan_list *head_list;
1648 dma_addr_t head_list_phys;
1649 u32 ack = 1;
1650
1651 if (priv->tlan_rev < 0x30) {
1652 TLAN_DBG(TLAN_DEBUG_TX,
1653 "TRANSMIT: handling TX EOC (Head=%d Tail=%d) -- IRQ\n",
1654 priv->tx_head, priv->tx_tail);
1655 head_list = priv->tx_list + priv->tx_head;
1656 head_list_phys = priv->tx_list_dma
1657 + sizeof(struct tlan_list)*priv->tx_head;
1658 if ((head_list->c_stat & TLAN_CSTAT_READY)
1659 == TLAN_CSTAT_READY) {
1660 netif_stop_queue(dev);
1661 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM);
1662 ack |= TLAN_HC_GO;
1663 } else {
1664 priv->tx_in_progress = 0;
1665 }
1666 }
1667
1668 return ack;
1669
1670}
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695static u32 tlan_handle_status_check(struct net_device *dev, u16 host_int)
1696{
1697 struct tlan_priv *priv = netdev_priv(dev);
1698 u32 ack;
1699 u32 error;
1700 u8 net_sts;
1701 u32 phy;
1702 u16 tlphy_ctl;
1703 u16 tlphy_sts;
1704
1705 ack = 1;
1706 if (host_int & TLAN_HI_IV_MASK) {
1707 netif_stop_queue(dev);
1708 error = inl(dev->base_addr + TLAN_CH_PARM);
1709 netdev_info(dev, "Adaptor Error = 0x%x\n", error);
1710 tlan_read_and_clear_stats(dev, TLAN_RECORD);
1711 outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD);
1712
1713 schedule_work(&priv->tlan_tqueue);
1714
1715 netif_wake_queue(dev);
1716 ack = 0;
1717 } else {
1718 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name);
1719 phy = priv->phy[priv->phy_num];
1720
1721 net_sts = tlan_dio_read8(dev->base_addr, TLAN_NET_STS);
1722 if (net_sts) {
1723 tlan_dio_write8(dev->base_addr, TLAN_NET_STS, net_sts);
1724 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n",
1725 dev->name, (unsigned) net_sts);
1726 }
1727 if ((net_sts & TLAN_NET_STS_MIRQ) && (priv->phy_num == 0)) {
1728 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_STS, &tlphy_sts);
1729 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl);
1730 if (!(tlphy_sts & TLAN_TS_POLOK) &&
1731 !(tlphy_ctl & TLAN_TC_SWAPOL)) {
1732 tlphy_ctl |= TLAN_TC_SWAPOL;
1733 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL,
1734 tlphy_ctl);
1735 } else if ((tlphy_sts & TLAN_TS_POLOK) &&
1736 (tlphy_ctl & TLAN_TC_SWAPOL)) {
1737 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1738 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL,
1739 tlphy_ctl);
1740 }
1741
1742 if (debug)
1743 tlan_phy_print(dev);
1744 }
1745 }
1746
1747 return ack;
1748
1749}
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774static u32 tlan_handle_rx_eoc(struct net_device *dev, u16 host_int)
1775{
1776 struct tlan_priv *priv = netdev_priv(dev);
1777 dma_addr_t head_list_phys;
1778 u32 ack = 1;
1779
1780 if (priv->tlan_rev < 0x30) {
1781 TLAN_DBG(TLAN_DEBUG_RX,
1782 "RECEIVE: Handling RX EOC (head=%d tail=%d) -- IRQ\n",
1783 priv->rx_head, priv->rx_tail);
1784 head_list_phys = priv->rx_list_dma
1785 + sizeof(struct tlan_list)*priv->rx_head;
1786 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM);
1787 ack |= TLAN_HC_GO | TLAN_HC_RT;
1788 priv->rx_eoc_count++;
1789 }
1790
1791 return ack;
1792
1793}
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837static void tlan_timer(struct timer_list *t)
1838{
1839 struct tlan_priv *priv = from_timer(priv, t, timer);
1840 struct net_device *dev = priv->dev;
1841 u32 elapsed;
1842 unsigned long flags = 0;
1843
1844 priv->timer.function = NULL;
1845
1846 switch (priv->timer_type) {
1847 case TLAN_TIMER_PHY_PDOWN:
1848 tlan_phy_power_down(dev);
1849 break;
1850 case TLAN_TIMER_PHY_PUP:
1851 tlan_phy_power_up(dev);
1852 break;
1853 case TLAN_TIMER_PHY_RESET:
1854 tlan_phy_reset(dev);
1855 break;
1856 case TLAN_TIMER_PHY_START_LINK:
1857 tlan_phy_start_link(dev);
1858 break;
1859 case TLAN_TIMER_PHY_FINISH_AN:
1860 tlan_phy_finish_auto_neg(dev);
1861 break;
1862 case TLAN_TIMER_FINISH_RESET:
1863 tlan_finish_reset(dev);
1864 break;
1865 case TLAN_TIMER_ACTIVITY:
1866 spin_lock_irqsave(&priv->lock, flags);
1867 if (priv->timer.function == NULL) {
1868 elapsed = jiffies - priv->timer_set_at;
1869 if (elapsed >= TLAN_TIMER_ACT_DELAY) {
1870 tlan_dio_write8(dev->base_addr,
1871 TLAN_LED_REG, TLAN_LED_LINK);
1872 } else {
1873 priv->timer.expires = priv->timer_set_at
1874 + TLAN_TIMER_ACT_DELAY;
1875 spin_unlock_irqrestore(&priv->lock, flags);
1876 add_timer(&priv->timer);
1877 break;
1878 }
1879 }
1880 spin_unlock_irqrestore(&priv->lock, flags);
1881 break;
1882 default:
1883 break;
1884 }
1885
1886}
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912static void tlan_reset_lists(struct net_device *dev)
1913{
1914 struct tlan_priv *priv = netdev_priv(dev);
1915 int i;
1916 struct tlan_list *list;
1917 dma_addr_t list_phys;
1918 struct sk_buff *skb;
1919
1920 priv->tx_head = 0;
1921 priv->tx_tail = 0;
1922 for (i = 0; i < TLAN_NUM_TX_LISTS; i++) {
1923 list = priv->tx_list + i;
1924 list->c_stat = TLAN_CSTAT_UNUSED;
1925 list->buffer[0].address = 0;
1926 list->buffer[2].count = 0;
1927 list->buffer[2].address = 0;
1928 list->buffer[8].address = 0;
1929 list->buffer[9].address = 0;
1930 }
1931
1932 priv->rx_head = 0;
1933 priv->rx_tail = TLAN_NUM_RX_LISTS - 1;
1934 for (i = 0; i < TLAN_NUM_RX_LISTS; i++) {
1935 list = priv->rx_list + i;
1936 list_phys = priv->rx_list_dma + sizeof(struct tlan_list)*i;
1937 list->c_stat = TLAN_CSTAT_READY;
1938 list->frame_size = TLAN_MAX_FRAME_SIZE;
1939 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
1940 skb = netdev_alloc_skb_ip_align(dev, TLAN_MAX_FRAME_SIZE + 5);
1941 if (!skb)
1942 break;
1943
1944 list->buffer[0].address = pci_map_single(priv->pci_dev,
1945 skb->data,
1946 TLAN_MAX_FRAME_SIZE,
1947 PCI_DMA_FROMDEVICE);
1948 tlan_store_skb(list, skb);
1949 list->buffer[1].count = 0;
1950 list->buffer[1].address = 0;
1951 list->forward = list_phys + sizeof(struct tlan_list);
1952 }
1953
1954
1955 while (i < TLAN_NUM_RX_LISTS) {
1956 tlan_store_skb(priv->rx_list + i, NULL);
1957 ++i;
1958 }
1959 list->forward = 0;
1960
1961}
1962
1963
1964static void tlan_free_lists(struct net_device *dev)
1965{
1966 struct tlan_priv *priv = netdev_priv(dev);
1967 int i;
1968 struct tlan_list *list;
1969 struct sk_buff *skb;
1970
1971 for (i = 0; i < TLAN_NUM_TX_LISTS; i++) {
1972 list = priv->tx_list + i;
1973 skb = tlan_get_skb(list);
1974 if (skb) {
1975 pci_unmap_single(
1976 priv->pci_dev,
1977 list->buffer[0].address,
1978 max(skb->len,
1979 (unsigned int)TLAN_MIN_FRAME_SIZE),
1980 PCI_DMA_TODEVICE);
1981 dev_kfree_skb_any(skb);
1982 list->buffer[8].address = 0;
1983 list->buffer[9].address = 0;
1984 }
1985 }
1986
1987 for (i = 0; i < TLAN_NUM_RX_LISTS; i++) {
1988 list = priv->rx_list + i;
1989 skb = tlan_get_skb(list);
1990 if (skb) {
1991 pci_unmap_single(priv->pci_dev,
1992 list->buffer[0].address,
1993 TLAN_MAX_FRAME_SIZE,
1994 PCI_DMA_FROMDEVICE);
1995 dev_kfree_skb_any(skb);
1996 list->buffer[8].address = 0;
1997 list->buffer[9].address = 0;
1998 }
1999 }
2000}
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019static void tlan_print_dio(u16 io_base)
2020{
2021 u32 data0, data1;
2022 int i;
2023
2024 pr_info("Contents of internal registers for io base 0x%04hx\n",
2025 io_base);
2026 pr_info("Off. +0 +4\n");
2027 for (i = 0; i < 0x4C; i += 8) {
2028 data0 = tlan_dio_read32(io_base, i);
2029 data1 = tlan_dio_read32(io_base, i + 0x4);
2030 pr_info("0x%02x 0x%08x 0x%08x\n", i, data0, data1);
2031 }
2032
2033}
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055static void tlan_print_list(struct tlan_list *list, char *type, int num)
2056{
2057 int i;
2058
2059 pr_info("%s List %d at %p\n", type, num, list);
2060 pr_info(" Forward = 0x%08x\n", list->forward);
2061 pr_info(" CSTAT = 0x%04hx\n", list->c_stat);
2062 pr_info(" Frame Size = 0x%04hx\n", list->frame_size);
2063
2064 for (i = 0; i < 2; i++) {
2065 pr_info(" Buffer[%d].count, addr = 0x%08x, 0x%08x\n",
2066 i, list->buffer[i].count, list->buffer[i].address);
2067 }
2068
2069}
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092static void tlan_read_and_clear_stats(struct net_device *dev, int record)
2093{
2094 u32 tx_good, tx_under;
2095 u32 rx_good, rx_over;
2096 u32 def_tx, crc, code;
2097 u32 multi_col, single_col;
2098 u32 excess_col, late_col, loss;
2099
2100 outw(TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR);
2101 tx_good = inb(dev->base_addr + TLAN_DIO_DATA);
2102 tx_good += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8;
2103 tx_good += inb(dev->base_addr + TLAN_DIO_DATA + 2) << 16;
2104 tx_under = inb(dev->base_addr + TLAN_DIO_DATA + 3);
2105
2106 outw(TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR);
2107 rx_good = inb(dev->base_addr + TLAN_DIO_DATA);
2108 rx_good += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8;
2109 rx_good += inb(dev->base_addr + TLAN_DIO_DATA + 2) << 16;
2110 rx_over = inb(dev->base_addr + TLAN_DIO_DATA + 3);
2111
2112 outw(TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR);
2113 def_tx = inb(dev->base_addr + TLAN_DIO_DATA);
2114 def_tx += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8;
2115 crc = inb(dev->base_addr + TLAN_DIO_DATA + 2);
2116 code = inb(dev->base_addr + TLAN_DIO_DATA + 3);
2117
2118 outw(TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR);
2119 multi_col = inb(dev->base_addr + TLAN_DIO_DATA);
2120 multi_col += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8;
2121 single_col = inb(dev->base_addr + TLAN_DIO_DATA + 2);
2122 single_col += inb(dev->base_addr + TLAN_DIO_DATA + 3) << 8;
2123
2124 outw(TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR);
2125 excess_col = inb(dev->base_addr + TLAN_DIO_DATA);
2126 late_col = inb(dev->base_addr + TLAN_DIO_DATA + 1);
2127 loss = inb(dev->base_addr + TLAN_DIO_DATA + 2);
2128
2129 if (record) {
2130 dev->stats.rx_packets += rx_good;
2131 dev->stats.rx_errors += rx_over + crc + code;
2132 dev->stats.tx_packets += tx_good;
2133 dev->stats.tx_errors += tx_under + loss;
2134 dev->stats.collisions += multi_col
2135 + single_col + excess_col + late_col;
2136
2137 dev->stats.rx_over_errors += rx_over;
2138 dev->stats.rx_crc_errors += crc;
2139 dev->stats.rx_frame_errors += code;
2140
2141 dev->stats.tx_aborted_errors += tx_under;
2142 dev->stats.tx_carrier_errors += loss;
2143 }
2144
2145}
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167static void
2168tlan_reset_adapter(struct net_device *dev)
2169{
2170 struct tlan_priv *priv = netdev_priv(dev);
2171 int i;
2172 u32 addr;
2173 u32 data;
2174 u8 data8;
2175
2176 priv->tlan_full_duplex = false;
2177 priv->phy_online = 0;
2178 netif_carrier_off(dev);
2179
2180
2181
2182 data = inl(dev->base_addr + TLAN_HOST_CMD);
2183 data |= TLAN_HC_AD_RST;
2184 outl(data, dev->base_addr + TLAN_HOST_CMD);
2185
2186 udelay(1000);
2187
2188
2189
2190 data = inl(dev->base_addr + TLAN_HOST_CMD);
2191 data |= TLAN_HC_INT_OFF;
2192 outl(data, dev->base_addr + TLAN_HOST_CMD);
2193
2194
2195
2196 for (i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4)
2197 tlan_dio_write32(dev->base_addr, (u16) i, 0);
2198
2199
2200
2201 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2202 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, (u16) data);
2203
2204
2205
2206 outl(TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD);
2207 outl(TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD);
2208
2209
2210
2211 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2212 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2213 tlan_set_bit(TLAN_NET_SIO_NMRST, addr);
2214
2215
2216
2217 if (priv->tlan_rev >= 0x30) {
2218 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
2219 tlan_dio_write8(dev->base_addr, TLAN_INT_DIS, data8);
2220 }
2221 tlan_phy_detect(dev);
2222 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
2223
2224 if (priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY) {
2225 data |= TLAN_NET_CFG_BIT;
2226 if (priv->aui == 1) {
2227 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x0a);
2228 } else if (priv->duplex == TLAN_DUPLEX_FULL) {
2229 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x00);
2230 priv->tlan_full_duplex = true;
2231 } else {
2232 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x08);
2233 }
2234 }
2235
2236
2237 if (priv->phy_num == 0 ||
2238 (priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10))
2239 data |= TLAN_NET_CFG_PHY_EN;
2240 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, (u16) data);
2241
2242 if (priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY)
2243 tlan_finish_reset(dev);
2244 else
2245 tlan_phy_power_down(dev);
2246
2247}
2248
2249
2250
2251
2252static void
2253tlan_finish_reset(struct net_device *dev)
2254{
2255 struct tlan_priv *priv = netdev_priv(dev);
2256 u8 data;
2257 u32 phy;
2258 u8 sio;
2259 u16 status;
2260 u16 partner;
2261 u16 tlphy_ctl;
2262 u16 tlphy_par;
2263 u16 tlphy_id1, tlphy_id2;
2264 int i;
2265
2266 phy = priv->phy[priv->phy_num];
2267
2268 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
2269 if (priv->tlan_full_duplex)
2270 data |= TLAN_NET_CMD_DUPLEX;
2271 tlan_dio_write8(dev->base_addr, TLAN_NET_CMD, data);
2272 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
2273 if (priv->phy_num == 0)
2274 data |= TLAN_NET_MASK_MASK7;
2275 tlan_dio_write8(dev->base_addr, TLAN_NET_MASK, data);
2276 tlan_dio_write16(dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7);
2277 tlan_mii_read_reg(dev, phy, MII_GEN_ID_HI, &tlphy_id1);
2278 tlan_mii_read_reg(dev, phy, MII_GEN_ID_LO, &tlphy_id2);
2279
2280 if ((priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY) ||
2281 (priv->aui)) {
2282 status = MII_GS_LINK;
2283 netdev_info(dev, "Link forced\n");
2284 } else {
2285 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2286 udelay(1000);
2287 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2288 if (status & MII_GS_LINK) {
2289
2290 if ((tlphy_id1 == NAT_SEM_ID1) &&
2291 (tlphy_id2 == NAT_SEM_ID2)) {
2292 tlan_mii_read_reg(dev, phy, MII_AN_LPA,
2293 &partner);
2294 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_PAR,
2295 &tlphy_par);
2296
2297 netdev_info(dev,
2298 "Link active, %s %uMbps %s-Duplex\n",
2299 !(tlphy_par & TLAN_PHY_AN_EN_STAT)
2300 ? "forced" : "Autonegotiation enabled,",
2301 tlphy_par & TLAN_PHY_SPEED_100
2302 ? 100 : 10,
2303 tlphy_par & TLAN_PHY_DUPLEX_FULL
2304 ? "Full" : "Half");
2305
2306 if (tlphy_par & TLAN_PHY_AN_EN_STAT) {
2307 netdev_info(dev, "Partner capability:");
2308 for (i = 5; i < 10; i++)
2309 if (partner & (1 << i))
2310 pr_cont(" %s",
2311 media[i-5]);
2312 pr_cont("\n");
2313 }
2314 } else
2315 netdev_info(dev, "Link active\n");
2316
2317 priv->media_timer.expires = jiffies + HZ;
2318 add_timer(&priv->media_timer);
2319 }
2320 }
2321
2322 if (priv->phy_num == 0) {
2323 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl);
2324 tlphy_ctl |= TLAN_TC_INTEN;
2325 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
2326 sio = tlan_dio_read8(dev->base_addr, TLAN_NET_SIO);
2327 sio |= TLAN_NET_SIO_MINTEN;
2328 tlan_dio_write8(dev->base_addr, TLAN_NET_SIO, sio);
2329 }
2330
2331 if (status & MII_GS_LINK) {
2332 tlan_set_mac(dev, 0, dev->dev_addr);
2333 priv->phy_online = 1;
2334 outb((TLAN_HC_INT_ON >> 8), dev->base_addr + TLAN_HOST_CMD + 1);
2335 if (debug >= 1 && debug != TLAN_DEBUG_PROBE)
2336 outb((TLAN_HC_REQ_INT >> 8),
2337 dev->base_addr + TLAN_HOST_CMD + 1);
2338 outl(priv->rx_list_dma, dev->base_addr + TLAN_CH_PARM);
2339 outl(TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD);
2340 tlan_dio_write8(dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK);
2341 netif_carrier_on(dev);
2342 } else {
2343 netdev_info(dev, "Link inactive, will retry in 10 secs...\n");
2344 tlan_set_timer(dev, (10*HZ), TLAN_TIMER_FINISH_RESET);
2345 return;
2346 }
2347 tlan_set_multicast_list(dev);
2348
2349}
2350
2351
2352
2353
2354
2355
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366
2367
2368
2369
2370
2371
2372
2373
2374
2375static void tlan_set_mac(struct net_device *dev, int areg, char *mac)
2376{
2377 int i;
2378
2379 areg *= 6;
2380
2381 if (mac != NULL) {
2382 for (i = 0; i < 6; i++)
2383 tlan_dio_write8(dev->base_addr,
2384 TLAN_AREG_0 + areg + i, mac[i]);
2385 } else {
2386 for (i = 0; i < 6; i++)
2387 tlan_dio_write8(dev->base_addr,
2388 TLAN_AREG_0 + areg + i, 0);
2389 }
2390
2391}
2392
2393
2394
2395
2396
2397
2398
2399
2400
2401
2402
2403
2404
2405
2406
2407
2408
2409
2410
2411
2412
2413
2414
2415
2416
2417
2418
2419static void tlan_phy_print(struct net_device *dev)
2420{
2421 struct tlan_priv *priv = netdev_priv(dev);
2422 u16 i, data0, data1, data2, data3, phy;
2423
2424 phy = priv->phy[priv->phy_num];
2425
2426 if (priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY) {
2427 netdev_info(dev, "Unmanaged PHY\n");
2428 } else if (phy <= TLAN_PHY_MAX_ADDR) {
2429 netdev_info(dev, "PHY 0x%02x\n", phy);
2430 pr_info(" Off. +0 +1 +2 +3\n");
2431 for (i = 0; i < 0x20; i += 4) {
2432 tlan_mii_read_reg(dev, phy, i, &data0);
2433 tlan_mii_read_reg(dev, phy, i + 1, &data1);
2434 tlan_mii_read_reg(dev, phy, i + 2, &data2);
2435 tlan_mii_read_reg(dev, phy, i + 3, &data3);
2436 pr_info(" 0x%02x 0x%04hx 0x%04hx 0x%04hx 0x%04hx\n",
2437 i, data0, data1, data2, data3);
2438 }
2439 } else {
2440 netdev_info(dev, "Invalid PHY\n");
2441 }
2442
2443}
2444
2445
2446
2447
2448
2449
2450
2451
2452
2453
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463
2464
2465static void tlan_phy_detect(struct net_device *dev)
2466{
2467 struct tlan_priv *priv = netdev_priv(dev);
2468 u16 control;
2469 u16 hi;
2470 u16 lo;
2471 u32 phy;
2472
2473 if (priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY) {
2474 priv->phy_num = 0xffff;
2475 return;
2476 }
2477
2478 tlan_mii_read_reg(dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi);
2479
2480 if (hi != 0xffff)
2481 priv->phy[0] = TLAN_PHY_MAX_ADDR;
2482 else
2483 priv->phy[0] = TLAN_PHY_NONE;
2484
2485 priv->phy[1] = TLAN_PHY_NONE;
2486 for (phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++) {
2487 tlan_mii_read_reg(dev, phy, MII_GEN_CTL, &control);
2488 tlan_mii_read_reg(dev, phy, MII_GEN_ID_HI, &hi);
2489 tlan_mii_read_reg(dev, phy, MII_GEN_ID_LO, &lo);
2490 if ((control != 0xffff) ||
2491 (hi != 0xffff) || (lo != 0xffff)) {
2492 TLAN_DBG(TLAN_DEBUG_GNRL,
2493 "PHY found at %02x %04x %04x %04x\n",
2494 phy, control, hi, lo);
2495 if ((priv->phy[1] == TLAN_PHY_NONE) &&
2496 (phy != TLAN_PHY_MAX_ADDR)) {
2497 priv->phy[1] = phy;
2498 }
2499 }
2500 }
2501
2502 if (priv->phy[1] != TLAN_PHY_NONE)
2503 priv->phy_num = 1;
2504 else if (priv->phy[0] != TLAN_PHY_NONE)
2505 priv->phy_num = 0;
2506 else
2507 netdev_info(dev, "Cannot initialize device, no PHY was found!\n");
2508
2509}
2510
2511
2512
2513
2514static void tlan_phy_power_down(struct net_device *dev)
2515{
2516 struct tlan_priv *priv = netdev_priv(dev);
2517 u16 value;
2518
2519 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name);
2520 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2521 tlan_mii_sync(dev->base_addr);
2522 tlan_mii_write_reg(dev, priv->phy[priv->phy_num], MII_GEN_CTL, value);
2523 if ((priv->phy_num == 0) && (priv->phy[1] != TLAN_PHY_NONE)) {
2524
2525 if (priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10)
2526 value = MII_GC_ISOLATE;
2527 tlan_mii_sync(dev->base_addr);
2528 tlan_mii_write_reg(dev, priv->phy[1], MII_GEN_CTL, value);
2529 }
2530
2531
2532
2533
2534
2535 tlan_set_timer(dev, msecs_to_jiffies(50), TLAN_TIMER_PHY_PUP);
2536
2537}
2538
2539
2540
2541
2542static void tlan_phy_power_up(struct net_device *dev)
2543{
2544 struct tlan_priv *priv = netdev_priv(dev);
2545 u16 value;
2546
2547 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name);
2548 tlan_mii_sync(dev->base_addr);
2549 value = MII_GC_LOOPBK;
2550 tlan_mii_write_reg(dev, priv->phy[priv->phy_num], MII_GEN_CTL, value);
2551 tlan_mii_sync(dev->base_addr);
2552
2553
2554
2555
2556 tlan_set_timer(dev, msecs_to_jiffies(500), TLAN_TIMER_PHY_RESET);
2557
2558}
2559
2560
2561
2562
2563static void tlan_phy_reset(struct net_device *dev)
2564{
2565 struct tlan_priv *priv = netdev_priv(dev);
2566 u16 phy;
2567 u16 value;
2568 unsigned long timeout = jiffies + HZ;
2569
2570 phy = priv->phy[priv->phy_num];
2571
2572 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Resetting PHY.\n", dev->name);
2573 tlan_mii_sync(dev->base_addr);
2574 value = MII_GC_LOOPBK | MII_GC_RESET;
2575 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, value);
2576 do {
2577 tlan_mii_read_reg(dev, phy, MII_GEN_CTL, &value);
2578 if (time_after(jiffies, timeout)) {
2579 netdev_err(dev, "PHY reset timeout\n");
2580 return;
2581 }
2582 } while (value & MII_GC_RESET);
2583
2584
2585
2586
2587
2588 tlan_set_timer(dev, msecs_to_jiffies(50), TLAN_TIMER_PHY_START_LINK);
2589
2590}
2591
2592
2593
2594
2595static void tlan_phy_start_link(struct net_device *dev)
2596{
2597 struct tlan_priv *priv = netdev_priv(dev);
2598 u16 ability;
2599 u16 control;
2600 u16 data;
2601 u16 phy;
2602 u16 status;
2603 u16 tctl;
2604
2605 phy = priv->phy[priv->phy_num];
2606 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name);
2607 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2608 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &ability);
2609
2610 if ((status & MII_GS_AUTONEG) &&
2611 (!priv->aui)) {
2612 ability = status >> 11;
2613 if (priv->speed == TLAN_SPEED_10 &&
2614 priv->duplex == TLAN_DUPLEX_HALF) {
2615 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x0000);
2616 } else if (priv->speed == TLAN_SPEED_10 &&
2617 priv->duplex == TLAN_DUPLEX_FULL) {
2618 priv->tlan_full_duplex = true;
2619 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x0100);
2620 } else if (priv->speed == TLAN_SPEED_100 &&
2621 priv->duplex == TLAN_DUPLEX_HALF) {
2622 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x2000);
2623 } else if (priv->speed == TLAN_SPEED_100 &&
2624 priv->duplex == TLAN_DUPLEX_FULL) {
2625 priv->tlan_full_duplex = true;
2626 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x2100);
2627 } else {
2628
2629
2630 tlan_mii_write_reg(dev, phy, MII_AN_ADV,
2631 (ability << 5) | 1);
2632
2633 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x1000);
2634
2635 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x1200);
2636
2637
2638
2639
2640
2641 netdev_info(dev, "Starting autonegotiation\n");
2642 tlan_set_timer(dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN);
2643 return;
2644 }
2645
2646 }
2647
2648 if ((priv->aui) && (priv->phy_num != 0)) {
2649 priv->phy_num = 0;
2650 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN
2651 | TLAN_NET_CFG_PHY_EN;
2652 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, data);
2653 tlan_set_timer(dev, msecs_to_jiffies(40), TLAN_TIMER_PHY_PDOWN);
2654 return;
2655 } else if (priv->phy_num == 0) {
2656 control = 0;
2657 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_CTL, &tctl);
2658 if (priv->aui) {
2659 tctl |= TLAN_TC_AUISEL;
2660 } else {
2661 tctl &= ~TLAN_TC_AUISEL;
2662 if (priv->duplex == TLAN_DUPLEX_FULL) {
2663 control |= MII_GC_DUPLEX;
2664 priv->tlan_full_duplex = true;
2665 }
2666 if (priv->speed == TLAN_SPEED_100)
2667 control |= MII_GC_SPEEDSEL;
2668 }
2669 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, control);
2670 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL, tctl);
2671 }
2672
2673
2674
2675
2676 tlan_set_timer(dev, (4*HZ), TLAN_TIMER_FINISH_RESET);
2677
2678}
2679
2680
2681
2682
2683static void tlan_phy_finish_auto_neg(struct net_device *dev)
2684{
2685 struct tlan_priv *priv = netdev_priv(dev);
2686 u16 an_adv;
2687 u16 an_lpa;
2688 u16 mode;
2689 u16 phy;
2690 u16 status;
2691
2692 phy = priv->phy[priv->phy_num];
2693
2694 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2695 udelay(1000);
2696 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2697
2698 if (!(status & MII_GS_AUTOCMPLT)) {
2699
2700
2701
2702 tlan_set_timer(dev, 2 * HZ, TLAN_TIMER_PHY_FINISH_AN);
2703 return;
2704 }
2705
2706 netdev_info(dev, "Autonegotiation complete\n");
2707 tlan_mii_read_reg(dev, phy, MII_AN_ADV, &an_adv);
2708 tlan_mii_read_reg(dev, phy, MII_AN_LPA, &an_lpa);
2709 mode = an_adv & an_lpa & 0x03E0;
2710 if (mode & 0x0100)
2711 priv->tlan_full_duplex = true;
2712 else if (!(mode & 0x0080) && (mode & 0x0040))
2713 priv->tlan_full_duplex = true;
2714
2715
2716 if ((!(mode & 0x0180)) &&
2717 (priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10) &&
2718 (priv->phy_num != 0)) {
2719 priv->phy_num = 0;
2720 tlan_set_timer(dev, msecs_to_jiffies(400), TLAN_TIMER_PHY_PDOWN);
2721 return;
2722 }
2723
2724 if (priv->phy_num == 0) {
2725 if ((priv->duplex == TLAN_DUPLEX_FULL) ||
2726 (an_adv & an_lpa & 0x0040)) {
2727 tlan_mii_write_reg(dev, phy, MII_GEN_CTL,
2728 MII_GC_AUTOENB | MII_GC_DUPLEX);
2729 netdev_info(dev, "Starting internal PHY with FULL-DUPLEX\n");
2730 } else {
2731 tlan_mii_write_reg(dev, phy, MII_GEN_CTL,
2732 MII_GC_AUTOENB);
2733 netdev_info(dev, "Starting internal PHY with HALF-DUPLEX\n");
2734 }
2735 }
2736
2737
2738
2739 tlan_set_timer(dev, msecs_to_jiffies(100), TLAN_TIMER_FINISH_RESET);
2740
2741}
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755
2756
2757
2758
2759
2760
2761static void tlan_phy_monitor(struct timer_list *t)
2762{
2763 struct tlan_priv *priv = from_timer(priv, t, media_timer);
2764 struct net_device *dev = priv->dev;
2765 u16 phy;
2766 u16 phy_status;
2767
2768 phy = priv->phy[priv->phy_num];
2769
2770
2771 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &phy_status);
2772
2773
2774 if (!(phy_status & MII_GS_LINK)) {
2775 if (netif_carrier_ok(dev)) {
2776 printk(KERN_DEBUG "TLAN: %s has lost link\n",
2777 dev->name);
2778 tlan_dio_write8(dev->base_addr, TLAN_LED_REG, 0);
2779 netif_carrier_off(dev);
2780 if (priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10) {
2781
2782 u16 data = MII_GC_PDOWN | MII_GC_LOOPBK |
2783 MII_GC_ISOLATE;
2784
2785 tlan_mii_sync(dev->base_addr);
2786 tlan_mii_write_reg(dev, priv->phy[0],
2787 MII_GEN_CTL, data);
2788
2789 priv->phy_num = 1;
2790
2791 tlan_set_timer(dev, msecs_to_jiffies(400),
2792 TLAN_TIMER_PHY_PDOWN);
2793 return;
2794 }
2795 }
2796 }
2797
2798
2799 if ((phy_status & MII_GS_LINK) && !netif_carrier_ok(dev)) {
2800 tlan_dio_write8(dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK);
2801 printk(KERN_DEBUG "TLAN: %s has reestablished link\n",
2802 dev->name);
2803 netif_carrier_on(dev);
2804 }
2805 priv->media_timer.expires = jiffies + HZ;
2806 add_timer(&priv->media_timer);
2807}
2808
2809
2810
2811
2812
2813
2814
2815
2816
2817
2818
2819
2820
2821
2822
2823
2824
2825
2826
2827
2828
2829
2830
2831
2832
2833
2834
2835
2836
2837
2838
2839
2840
2841
2842
2843
2844
2845
2846static bool
2847tlan_mii_read_reg(struct net_device *dev, u16 phy, u16 reg, u16 *val)
2848{
2849 u8 nack;
2850 u16 sio, tmp;
2851 u32 i;
2852 bool err;
2853 int minten;
2854 struct tlan_priv *priv = netdev_priv(dev);
2855 unsigned long flags = 0;
2856
2857 err = false;
2858 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2859 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2860
2861 if (!in_irq())
2862 spin_lock_irqsave(&priv->lock, flags);
2863
2864 tlan_mii_sync(dev->base_addr);
2865
2866 minten = tlan_get_bit(TLAN_NET_SIO_MINTEN, sio);
2867 if (minten)
2868 tlan_clear_bit(TLAN_NET_SIO_MINTEN, sio);
2869
2870 tlan_mii_send_data(dev->base_addr, 0x1, 2);
2871 tlan_mii_send_data(dev->base_addr, 0x2, 2);
2872 tlan_mii_send_data(dev->base_addr, phy, 5);
2873 tlan_mii_send_data(dev->base_addr, reg, 5);
2874
2875
2876 tlan_clear_bit(TLAN_NET_SIO_MTXEN, sio);
2877
2878 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2879 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2880 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2881
2882 nack = tlan_get_bit(TLAN_NET_SIO_MDATA, sio);
2883 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2884 if (nack) {
2885 for (i = 0; i < 16; i++) {
2886 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2887 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2888 }
2889 tmp = 0xffff;
2890 err = true;
2891 } else {
2892 for (tmp = 0, i = 0x8000; i; i >>= 1) {
2893 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2894 if (tlan_get_bit(TLAN_NET_SIO_MDATA, sio))
2895 tmp |= i;
2896 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2897 }
2898 }
2899
2900
2901 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2902 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2903
2904 if (minten)
2905 tlan_set_bit(TLAN_NET_SIO_MINTEN, sio);
2906
2907 *val = tmp;
2908
2909 if (!in_irq())
2910 spin_unlock_irqrestore(&priv->lock, flags);
2911
2912 return err;
2913
2914}
2915
2916
2917
2918
2919
2920
2921
2922
2923
2924
2925
2926
2927
2928
2929
2930
2931
2932
2933
2934
2935
2936
2937static void tlan_mii_send_data(u16 base_port, u32 data, unsigned num_bits)
2938{
2939 u16 sio;
2940 u32 i;
2941
2942 if (num_bits == 0)
2943 return;
2944
2945 outw(TLAN_NET_SIO, base_port + TLAN_DIO_ADR);
2946 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2947 tlan_set_bit(TLAN_NET_SIO_MTXEN, sio);
2948
2949 for (i = (0x1 << (num_bits - 1)); i; i >>= 1) {
2950 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2951 (void) tlan_get_bit(TLAN_NET_SIO_MCLK, sio);
2952 if (data & i)
2953 tlan_set_bit(TLAN_NET_SIO_MDATA, sio);
2954 else
2955 tlan_clear_bit(TLAN_NET_SIO_MDATA, sio);
2956 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2957 (void) tlan_get_bit(TLAN_NET_SIO_MCLK, sio);
2958 }
2959
2960}
2961
2962
2963
2964
2965
2966
2967
2968
2969
2970
2971
2972
2973
2974
2975
2976
2977
2978
2979static void tlan_mii_sync(u16 base_port)
2980{
2981 int i;
2982 u16 sio;
2983
2984 outw(TLAN_NET_SIO, base_port + TLAN_DIO_ADR);
2985 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2986
2987 tlan_clear_bit(TLAN_NET_SIO_MTXEN, sio);
2988 for (i = 0; i < 32; i++) {
2989 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2990 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2991 }
2992
2993}
2994
2995
2996
2997
2998
2999
3000
3001
3002
3003
3004
3005
3006
3007
3008
3009
3010
3011
3012
3013
3014
3015
3016
3017
3018static void
3019tlan_mii_write_reg(struct net_device *dev, u16 phy, u16 reg, u16 val)
3020{
3021 u16 sio;
3022 int minten;
3023 unsigned long flags = 0;
3024 struct tlan_priv *priv = netdev_priv(dev);
3025
3026 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
3027 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
3028
3029 if (!in_irq())
3030 spin_lock_irqsave(&priv->lock, flags);
3031
3032 tlan_mii_sync(dev->base_addr);
3033
3034 minten = tlan_get_bit(TLAN_NET_SIO_MINTEN, sio);
3035 if (minten)
3036 tlan_clear_bit(TLAN_NET_SIO_MINTEN, sio);
3037
3038 tlan_mii_send_data(dev->base_addr, 0x1, 2);
3039 tlan_mii_send_data(dev->base_addr, 0x1, 2);
3040 tlan_mii_send_data(dev->base_addr, phy, 5);
3041 tlan_mii_send_data(dev->base_addr, reg, 5);
3042
3043 tlan_mii_send_data(dev->base_addr, 0x2, 2);
3044 tlan_mii_send_data(dev->base_addr, val, 16);
3045
3046 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
3047 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
3048
3049 if (minten)
3050 tlan_set_bit(TLAN_NET_SIO_MINTEN, sio);
3051
3052 if (!in_irq())
3053 spin_unlock_irqrestore(&priv->lock, flags);
3054
3055}
3056
3057
3058
3059
3060
3061
3062
3063
3064
3065
3066
3067
3068
3069
3070
3071
3072
3073
3074
3075
3076
3077
3078
3079
3080
3081
3082
3083
3084
3085
3086
3087
3088
3089static void tlan_ee_send_start(u16 io_base)
3090{
3091 u16 sio;
3092
3093 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
3094 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3095
3096 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3097 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
3098 tlan_set_bit(TLAN_NET_SIO_ETXEN, sio);
3099 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3100 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3101
3102}
3103
3104
3105
3106
3107
3108
3109
3110
3111
3112
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122
3123
3124
3125
3126
3127
3128
3129static int tlan_ee_send_byte(u16 io_base, u8 data, int stop)
3130{
3131 int err;
3132 u8 place;
3133 u16 sio;
3134
3135 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
3136 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3137
3138
3139 for (place = 0x80; place != 0; place >>= 1) {
3140 if (place & data)
3141 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
3142 else
3143 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3144 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3145 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3146 }
3147 tlan_clear_bit(TLAN_NET_SIO_ETXEN, sio);
3148 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3149 err = tlan_get_bit(TLAN_NET_SIO_EDATA, sio);
3150 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3151 tlan_set_bit(TLAN_NET_SIO_ETXEN, sio);
3152
3153 if ((!err) && stop) {
3154
3155 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3156 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3157 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
3158 }
3159
3160 return err;
3161
3162}
3163
3164
3165
3166
3167
3168
3169
3170
3171
3172
3173
3174
3175
3176
3177
3178
3179
3180
3181
3182
3183
3184
3185
3186
3187
3188
3189
3190
3191static void tlan_ee_receive_byte(u16 io_base, u8 *data, int stop)
3192{
3193 u8 place;
3194 u16 sio;
3195
3196 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
3197 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3198 *data = 0;
3199
3200
3201 tlan_clear_bit(TLAN_NET_SIO_ETXEN, sio);
3202 for (place = 0x80; place; place >>= 1) {
3203 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3204 if (tlan_get_bit(TLAN_NET_SIO_EDATA, sio))
3205 *data |= place;
3206 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3207 }
3208
3209 tlan_set_bit(TLAN_NET_SIO_ETXEN, sio);
3210 if (!stop) {
3211 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3212 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3213 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3214 } else {
3215 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
3216 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3217 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3218
3219 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3220 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3221 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
3222 }
3223
3224}
3225
3226
3227
3228
3229
3230
3231
3232
3233
3234
3235
3236
3237
3238
3239
3240
3241
3242
3243
3244
3245
3246
3247
3248
3249
3250static int tlan_ee_read_byte(struct net_device *dev, u8 ee_addr, u8 *data)
3251{
3252 int err;
3253 struct tlan_priv *priv = netdev_priv(dev);
3254 unsigned long flags = 0;
3255 int ret = 0;
3256
3257 spin_lock_irqsave(&priv->lock, flags);
3258
3259 tlan_ee_send_start(dev->base_addr);
3260 err = tlan_ee_send_byte(dev->base_addr, 0xa0, TLAN_EEPROM_ACK);
3261 if (err) {
3262 ret = 1;
3263 goto fail;
3264 }
3265 err = tlan_ee_send_byte(dev->base_addr, ee_addr, TLAN_EEPROM_ACK);
3266 if (err) {
3267 ret = 2;
3268 goto fail;
3269 }
3270 tlan_ee_send_start(dev->base_addr);
3271 err = tlan_ee_send_byte(dev->base_addr, 0xa1, TLAN_EEPROM_ACK);
3272 if (err) {
3273 ret = 3;
3274 goto fail;
3275 }
3276 tlan_ee_receive_byte(dev->base_addr, data, TLAN_EEPROM_STOP);
3277fail:
3278 spin_unlock_irqrestore(&priv->lock, flags);
3279
3280 return ret;
3281
3282}
3283
3284
3285
3286