linux/drivers/net/wireless/realtek/rtlwifi/pci.c
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   1/******************************************************************************
   2 *
   3 * Copyright(c) 2009-2012  Realtek Corporation.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of version 2 of the GNU General Public License as
   7 * published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 * more details.
  13 *
  14 * The full GNU General Public License is included in this distribution in the
  15 * file called LICENSE.
  16 *
  17 * Contact Information:
  18 * wlanfae <wlanfae@realtek.com>
  19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20 * Hsinchu 300, Taiwan.
  21 *
  22 * Larry Finger <Larry.Finger@lwfinger.net>
  23 *
  24 *****************************************************************************/
  25
  26#include "wifi.h"
  27#include "core.h"
  28#include "pci.h"
  29#include "base.h"
  30#include "ps.h"
  31#include "efuse.h"
  32#include <linux/interrupt.h>
  33#include <linux/export.h>
  34#include <linux/module.h>
  35
  36MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
  37MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
  38MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
  39MODULE_LICENSE("GPL");
  40MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  41
  42static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  43        INTEL_VENDOR_ID,
  44        ATI_VENDOR_ID,
  45        AMD_VENDOR_ID,
  46        SIS_VENDOR_ID
  47};
  48
  49static const u8 ac_to_hwq[] = {
  50        VO_QUEUE,
  51        VI_QUEUE,
  52        BE_QUEUE,
  53        BK_QUEUE
  54};
  55
  56static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw, struct sk_buff *skb)
  57{
  58        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  59        __le16 fc = rtl_get_fc(skb);
  60        u8 queue_index = skb_get_queue_mapping(skb);
  61        struct ieee80211_hdr *hdr;
  62
  63        if (unlikely(ieee80211_is_beacon(fc)))
  64                return BEACON_QUEUE;
  65        if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  66                return MGNT_QUEUE;
  67        if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  68                if (ieee80211_is_nullfunc(fc))
  69                        return HIGH_QUEUE;
  70        if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE) {
  71                hdr = rtl_get_hdr(skb);
  72
  73                if (is_multicast_ether_addr(hdr->addr1) ||
  74                    is_broadcast_ether_addr(hdr->addr1))
  75                        return HIGH_QUEUE;
  76        }
  77
  78        return ac_to_hwq[queue_index];
  79}
  80
  81/* Update PCI dependent default settings*/
  82static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  83{
  84        struct rtl_priv *rtlpriv = rtl_priv(hw);
  85        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  86        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  87        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  88        u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  89        u8 init_aspm;
  90
  91        ppsc->reg_rfps_level = 0;
  92        ppsc->support_aspm = false;
  93
  94        /*Update PCI ASPM setting */
  95        ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  96        switch (rtlpci->const_pci_aspm) {
  97        case 0:
  98                /*No ASPM */
  99                break;
 100
 101        case 1:
 102                /*ASPM dynamically enabled/disable. */
 103                ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
 104                break;
 105
 106        case 2:
 107                /*ASPM with Clock Req dynamically enabled/disable. */
 108                ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
 109                                         RT_RF_OFF_LEVL_CLK_REQ);
 110                break;
 111
 112        case 3:
 113                /* Always enable ASPM and Clock Req
 114                 * from initialization to halt.
 115                 */
 116                ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 117                ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 118                                         RT_RF_OFF_LEVL_CLK_REQ);
 119                break;
 120
 121        case 4:
 122                /* Always enable ASPM without Clock Req
 123                 * from initialization to halt.
 124                 */
 125                ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 126                                          RT_RF_OFF_LEVL_CLK_REQ);
 127                ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 128                break;
 129        }
 130
 131        ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 132
 133        /*Update Radio OFF setting */
 134        switch (rtlpci->const_hwsw_rfoff_d3) {
 135        case 1:
 136                if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 137                        ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 138                break;
 139
 140        case 2:
 141                if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 142                        ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 143                ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 144                break;
 145
 146        case 3:
 147                ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 148                break;
 149        }
 150
 151        /*Set HW definition to determine if it supports ASPM. */
 152        switch (rtlpci->const_support_pciaspm) {
 153        case 0:
 154                /*Not support ASPM. */
 155                ppsc->support_aspm = false;
 156                break;
 157        case 1:
 158                /*Support ASPM. */
 159                ppsc->support_aspm = true;
 160                ppsc->support_backdoor = true;
 161                break;
 162        case 2:
 163                /*ASPM value set by chipset. */
 164                if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 165                        ppsc->support_aspm = true;
 166                break;
 167        default:
 168                pr_err("switch case %#x not processed\n",
 169                       rtlpci->const_support_pciaspm);
 170                break;
 171        }
 172
 173        /* toshiba aspm issue, toshiba will set aspm selfly
 174         * so we should not set aspm in driver
 175         */
 176        pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 177        if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 178            init_aspm == 0x43)
 179                ppsc->support_aspm = false;
 180}
 181
 182static bool _rtl_pci_platform_switch_device_pci_aspm(
 183                        struct ieee80211_hw *hw,
 184                        u8 value)
 185{
 186        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 187        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 188
 189        if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 190                value |= 0x40;
 191
 192        pci_write_config_byte(rtlpci->pdev, 0x80, value);
 193
 194        return false;
 195}
 196
 197/*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 198static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 199{
 200        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 201        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 202
 203        pci_write_config_byte(rtlpci->pdev, 0x81, value);
 204
 205        if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 206                udelay(100);
 207}
 208
 209/*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 210static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 211{
 212        struct rtl_priv *rtlpriv = rtl_priv(hw);
 213        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 214        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 215        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 216        u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 217        u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 218        /*Retrieve original configuration settings. */
 219        u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 220        u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 221                                pcibridge_linkctrlreg;
 222        u16 aspmlevel = 0;
 223        u8 tmp_u1b = 0;
 224
 225        if (!ppsc->support_aspm)
 226                return;
 227
 228        if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 229                RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 230                         "PCI(Bridge) UNKNOWN\n");
 231
 232                return;
 233        }
 234
 235        if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 236                RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 237                _rtl_pci_switch_clk_req(hw, 0x0);
 238        }
 239
 240        /*for promising device will in L0 state after an I/O. */
 241        pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 242
 243        /*Set corresponding value. */
 244        aspmlevel |= BIT(0) | BIT(1);
 245        linkctrl_reg &= ~aspmlevel;
 246        pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 247
 248        _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 249        udelay(50);
 250
 251        /*4 Disable Pci Bridge ASPM */
 252        pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 253                              pcibridge_linkctrlreg);
 254
 255        udelay(50);
 256}
 257
 258/*Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 259 *power saving We should follow the sequence to enable
 260 *RTL8192SE first then enable Pci Bridge ASPM
 261 *or the system will show bluescreen.
 262 */
 263static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 264{
 265        struct rtl_priv *rtlpriv = rtl_priv(hw);
 266        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 267        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 268        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 269        u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 270        u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 271        u16 aspmlevel;
 272        u8 u_pcibridge_aspmsetting;
 273        u8 u_device_aspmsetting;
 274
 275        if (!ppsc->support_aspm)
 276                return;
 277
 278        if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 279                RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 280                         "PCI(Bridge) UNKNOWN\n");
 281                return;
 282        }
 283
 284        /*4 Enable Pci Bridge ASPM */
 285
 286        u_pcibridge_aspmsetting =
 287            pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 288            rtlpci->const_hostpci_aspm_setting;
 289
 290        if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 291                u_pcibridge_aspmsetting &= ~BIT(0);
 292
 293        pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 294                              u_pcibridge_aspmsetting);
 295
 296        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 297                 "PlatformEnableASPM(): Write reg[%x] = %x\n",
 298                 (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 299                 u_pcibridge_aspmsetting);
 300
 301        udelay(50);
 302
 303        /*Get ASPM level (with/without Clock Req) */
 304        aspmlevel = rtlpci->const_devicepci_aspm_setting;
 305        u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 306
 307        /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 308        /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 309
 310        u_device_aspmsetting |= aspmlevel;
 311
 312        _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 313
 314        if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 315                _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 316                                             RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 317                RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 318        }
 319        udelay(100);
 320}
 321
 322static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 323{
 324        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 325
 326        bool status = false;
 327        u8 offset_e0;
 328        unsigned int offset_e4;
 329
 330        pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 331
 332        pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 333
 334        if (offset_e0 == 0xA0) {
 335                pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 336                if (offset_e4 & BIT(23))
 337                        status = true;
 338        }
 339
 340        return status;
 341}
 342
 343static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 344                                     struct rtl_priv **buddy_priv)
 345{
 346        struct rtl_priv *rtlpriv = rtl_priv(hw);
 347        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 348        bool find_buddy_priv = false;
 349        struct rtl_priv *tpriv;
 350        struct rtl_pci_priv *tpcipriv = NULL;
 351
 352        if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 353                list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
 354                                    list) {
 355                        tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
 356                        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 357                                 "pcipriv->ndis_adapter.funcnumber %x\n",
 358                                pcipriv->ndis_adapter.funcnumber);
 359                        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 360                                 "tpcipriv->ndis_adapter.funcnumber %x\n",
 361                                tpcipriv->ndis_adapter.funcnumber);
 362
 363                        if (pcipriv->ndis_adapter.busnumber ==
 364                            tpcipriv->ndis_adapter.busnumber &&
 365                            pcipriv->ndis_adapter.devnumber ==
 366                            tpcipriv->ndis_adapter.devnumber &&
 367                            pcipriv->ndis_adapter.funcnumber !=
 368                            tpcipriv->ndis_adapter.funcnumber) {
 369                                find_buddy_priv = true;
 370                                break;
 371                        }
 372                }
 373        }
 374
 375        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 376                 "find_buddy_priv %d\n", find_buddy_priv);
 377
 378        if (find_buddy_priv)
 379                *buddy_priv = tpriv;
 380
 381        return find_buddy_priv;
 382}
 383
 384static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 385{
 386        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 387        struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 388        u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 389        u8 linkctrl_reg;
 390        u8 num4bbytes;
 391
 392        num4bbytes = (capabilityoffset + 0x10) / 4;
 393
 394        /*Read  Link Control Register */
 395        pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 396
 397        pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 398}
 399
 400static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 401                                        struct ieee80211_hw *hw)
 402{
 403        struct rtl_priv *rtlpriv = rtl_priv(hw);
 404        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 405
 406        u8 tmp;
 407        u16 linkctrl_reg;
 408
 409        /*Link Control Register */
 410        pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 411        pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 412
 413        RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 414                 pcipriv->ndis_adapter.linkctrl_reg);
 415
 416        pci_read_config_byte(pdev, 0x98, &tmp);
 417        tmp |= BIT(4);
 418        pci_write_config_byte(pdev, 0x98, tmp);
 419
 420        tmp = 0x17;
 421        pci_write_config_byte(pdev, 0x70f, tmp);
 422}
 423
 424static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 425{
 426        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 427
 428        _rtl_pci_update_default_setting(hw);
 429
 430        if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 431                /*Always enable ASPM & Clock Req. */
 432                rtl_pci_enable_aspm(hw);
 433                RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 434        }
 435}
 436
 437static void _rtl_pci_io_handler_init(struct device *dev,
 438                                     struct ieee80211_hw *hw)
 439{
 440        struct rtl_priv *rtlpriv = rtl_priv(hw);
 441
 442        rtlpriv->io.dev = dev;
 443
 444        rtlpriv->io.write8_async = pci_write8_async;
 445        rtlpriv->io.write16_async = pci_write16_async;
 446        rtlpriv->io.write32_async = pci_write32_async;
 447
 448        rtlpriv->io.read8_sync = pci_read8_sync;
 449        rtlpriv->io.read16_sync = pci_read16_sync;
 450        rtlpriv->io.read32_sync = pci_read32_sync;
 451}
 452
 453static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 454                                       struct sk_buff *skb,
 455                                       struct rtl_tcb_desc *tcb_desc, u8 tid)
 456{
 457        struct rtl_priv *rtlpriv = rtl_priv(hw);
 458        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 459        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 460        struct sk_buff *next_skb;
 461        u8 additionlen = FCS_LEN;
 462
 463        /* here open is 4, wep/tkip is 8, aes is 12*/
 464        if (info->control.hw_key)
 465                additionlen += info->control.hw_key->icv_len;
 466
 467        /* The most skb num is 6 */
 468        tcb_desc->empkt_num = 0;
 469        spin_lock_bh(&rtlpriv->locks.waitq_lock);
 470        skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 471                struct ieee80211_tx_info *next_info;
 472
 473                next_info = IEEE80211_SKB_CB(next_skb);
 474                if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 475                        tcb_desc->empkt_len[tcb_desc->empkt_num] =
 476                                next_skb->len + additionlen;
 477                        tcb_desc->empkt_num++;
 478                } else {
 479                        break;
 480                }
 481
 482                if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 483                                      next_skb))
 484                        break;
 485
 486                if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 487                        break;
 488        }
 489        spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 490
 491        return true;
 492}
 493
 494/* just for early mode now */
 495static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 496{
 497        struct rtl_priv *rtlpriv = rtl_priv(hw);
 498        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 499        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 500        struct sk_buff *skb = NULL;
 501        struct ieee80211_tx_info *info = NULL;
 502        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 503        int tid;
 504
 505        if (!rtlpriv->rtlhal.earlymode_enable)
 506                return;
 507
 508        if (rtlpriv->dm.supp_phymode_switch &&
 509            (rtlpriv->easy_concurrent_ctl.switch_in_process ||
 510            (rtlpriv->buddy_priv &&
 511            rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
 512                return;
 513        /* we just use em for BE/BK/VI/VO */
 514        for (tid = 7; tid >= 0; tid--) {
 515                u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 516                struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 517
 518                while (!mac->act_scanning &&
 519                       rtlpriv->psc.rfpwr_state == ERFON) {
 520                        struct rtl_tcb_desc tcb_desc;
 521
 522                        memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 523
 524                        spin_lock_bh(&rtlpriv->locks.waitq_lock);
 525                        if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 526                            (ring->entries - skb_queue_len(&ring->queue) >
 527                             rtlhal->max_earlymode_num)) {
 528                                skb = skb_dequeue(&mac->skb_waitq[tid]);
 529                        } else {
 530                                spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 531                                break;
 532                        }
 533                        spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 534
 535                        /* Some macaddr can't do early mode. like
 536                         * multicast/broadcast/no_qos data
 537                         */
 538                        info = IEEE80211_SKB_CB(skb);
 539                        if (info->flags & IEEE80211_TX_CTL_AMPDU)
 540                                _rtl_update_earlymode_info(hw, skb,
 541                                                           &tcb_desc, tid);
 542
 543                        rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 544                }
 545        }
 546}
 547
 548static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 549{
 550        struct rtl_priv *rtlpriv = rtl_priv(hw);
 551        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 552
 553        struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 554
 555        while (skb_queue_len(&ring->queue)) {
 556                struct sk_buff *skb;
 557                struct ieee80211_tx_info *info;
 558                __le16 fc;
 559                u8 tid;
 560                u8 *entry;
 561
 562                if (rtlpriv->use_new_trx_flow)
 563                        entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 564                else
 565                        entry = (u8 *)(&ring->desc[ring->idx]);
 566
 567                if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 568                        return;
 569                ring->idx = (ring->idx + 1) % ring->entries;
 570
 571                skb = __skb_dequeue(&ring->queue);
 572                pci_unmap_single(rtlpci->pdev,
 573                                 rtlpriv->cfg->ops->
 574                                             get_desc(hw, (u8 *)entry, true,
 575                                                      HW_DESC_TXBUFF_ADDR),
 576                                 skb->len, PCI_DMA_TODEVICE);
 577
 578                /* remove early mode header */
 579                if (rtlpriv->rtlhal.earlymode_enable)
 580                        skb_pull(skb, EM_HDR_LEN);
 581
 582                RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 583                         "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 584                         ring->idx,
 585                         skb_queue_len(&ring->queue),
 586                         *(u16 *)(skb->data + 22));
 587
 588                if (prio == TXCMD_QUEUE) {
 589                        dev_kfree_skb(skb);
 590                        goto tx_status_ok;
 591                }
 592
 593                /* for sw LPS, just after NULL skb send out, we can
 594                 * sure AP knows we are sleeping, we should not let
 595                 * rf sleep
 596                 */
 597                fc = rtl_get_fc(skb);
 598                if (ieee80211_is_nullfunc(fc)) {
 599                        if (ieee80211_has_pm(fc)) {
 600                                rtlpriv->mac80211.offchan_delay = true;
 601                                rtlpriv->psc.state_inap = true;
 602                        } else {
 603                                rtlpriv->psc.state_inap = false;
 604                        }
 605                }
 606                if (ieee80211_is_action(fc)) {
 607                        struct ieee80211_mgmt *action_frame =
 608                                (struct ieee80211_mgmt *)skb->data;
 609                        if (action_frame->u.action.u.ht_smps.action ==
 610                            WLAN_HT_ACTION_SMPS) {
 611                                dev_kfree_skb(skb);
 612                                goto tx_status_ok;
 613                        }
 614                }
 615
 616                /* update tid tx pkt num */
 617                tid = rtl_get_tid(skb);
 618                if (tid <= 7)
 619                        rtlpriv->link_info.tidtx_inperiod[tid]++;
 620
 621                info = IEEE80211_SKB_CB(skb);
 622
 623                if (likely(!ieee80211_is_nullfunc(fc))) {
 624                        ieee80211_tx_info_clear_status(info);
 625                        info->flags |= IEEE80211_TX_STAT_ACK;
 626                        /*info->status.rates[0].count = 1; */
 627                        ieee80211_tx_status_irqsafe(hw, skb);
 628                } else {
 629                        rtl_tx_ackqueue(hw, skb);
 630                }
 631
 632                if ((ring->entries - skb_queue_len(&ring->queue)) <= 4) {
 633                        RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG,
 634                                 "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 635                                 prio, ring->idx,
 636                                 skb_queue_len(&ring->queue));
 637
 638                        ieee80211_wake_queue(hw, skb_get_queue_mapping(skb));
 639                }
 640tx_status_ok:
 641                skb = NULL;
 642        }
 643
 644        if (((rtlpriv->link_info.num_rx_inperiod +
 645              rtlpriv->link_info.num_tx_inperiod) > 8) ||
 646              rtlpriv->link_info.num_rx_inperiod > 2)
 647                rtl_lps_leave(hw);
 648}
 649
 650static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 651                                    struct sk_buff *new_skb, u8 *entry,
 652                                    int rxring_idx, int desc_idx)
 653{
 654        struct rtl_priv *rtlpriv = rtl_priv(hw);
 655        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 656        u32 bufferaddress;
 657        u8 tmp_one = 1;
 658        struct sk_buff *skb;
 659
 660        if (likely(new_skb)) {
 661                skb = new_skb;
 662                goto remap;
 663        }
 664        skb = dev_alloc_skb(rtlpci->rxbuffersize);
 665        if (!skb)
 666                return 0;
 667
 668remap:
 669        /* just set skb->cb to mapping addr for pci_unmap_single use */
 670        *((dma_addr_t *)skb->cb) =
 671                pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 672                               rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 673        bufferaddress = *((dma_addr_t *)skb->cb);
 674        if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
 675                return 0;
 676        rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 677        if (rtlpriv->use_new_trx_flow) {
 678                /* skb->cb may be 64 bit address */
 679                rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 680                                            HW_DESC_RX_PREPARE,
 681                                            (u8 *)(dma_addr_t *)skb->cb);
 682        } else {
 683                rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 684                                            HW_DESC_RXBUFF_ADDR,
 685                                            (u8 *)&bufferaddress);
 686                rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 687                                            HW_DESC_RXPKT_LEN,
 688                                            (u8 *)&rtlpci->rxbuffersize);
 689                rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 690                                            HW_DESC_RXOWN,
 691                                            (u8 *)&tmp_one);
 692        }
 693        return 1;
 694}
 695
 696/* inorder to receive 8K AMSDU we have set skb to
 697 * 9100bytes in init rx ring, but if this packet is
 698 * not a AMSDU, this large packet will be sent to
 699 * TCP/IP directly, this cause big packet ping fail
 700 * like: "ping -s 65507", so here we will realloc skb
 701 * based on the true size of packet, Mac80211
 702 * Probably will do it better, but does not yet.
 703 *
 704 * Some platform will fail when alloc skb sometimes.
 705 * in this condition, we will send the old skb to
 706 * mac80211 directly, this will not cause any other
 707 * issues, but only this packet will be lost by TCP/IP
 708 */
 709static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 710                                    struct sk_buff *skb,
 711                                    struct ieee80211_rx_status rx_status)
 712{
 713        if (unlikely(!rtl_action_proc(hw, skb, false))) {
 714                dev_kfree_skb_any(skb);
 715        } else {
 716                struct sk_buff *uskb = NULL;
 717
 718                uskb = dev_alloc_skb(skb->len + 128);
 719                if (likely(uskb)) {
 720                        memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 721                               sizeof(rx_status));
 722                        skb_put_data(uskb, skb->data, skb->len);
 723                        dev_kfree_skb_any(skb);
 724                        ieee80211_rx_irqsafe(hw, uskb);
 725                } else {
 726                        ieee80211_rx_irqsafe(hw, skb);
 727                }
 728        }
 729}
 730
 731/*hsisr interrupt handler*/
 732static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 733{
 734        struct rtl_priv *rtlpriv = rtl_priv(hw);
 735        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 736
 737        rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 738                       rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 739                       rtlpci->sys_irq_mask);
 740}
 741
 742static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 743{
 744        struct rtl_priv *rtlpriv = rtl_priv(hw);
 745        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 746        int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 747        struct ieee80211_rx_status rx_status = { 0 };
 748        unsigned int count = rtlpci->rxringcount;
 749        u8 own;
 750        u8 tmp_one;
 751        bool unicast = false;
 752        u8 hw_queue = 0;
 753        unsigned int rx_remained_cnt = 0;
 754        struct rtl_stats stats = {
 755                .signal = 0,
 756                .rate = 0,
 757        };
 758
 759        /*RX NORMAL PKT */
 760        while (count--) {
 761                struct ieee80211_hdr *hdr;
 762                __le16 fc;
 763                u16 len;
 764                /*rx buffer descriptor */
 765                struct rtl_rx_buffer_desc *buffer_desc = NULL;
 766                /*if use new trx flow, it means wifi info */
 767                struct rtl_rx_desc *pdesc = NULL;
 768                /*rx pkt */
 769                struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 770                                      rtlpci->rx_ring[rxring_idx].idx];
 771                struct sk_buff *new_skb;
 772
 773                if (rtlpriv->use_new_trx_flow) {
 774                        if (rx_remained_cnt == 0)
 775                                rx_remained_cnt =
 776                                rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 777                                                                      hw_queue);
 778                        if (rx_remained_cnt == 0)
 779                                return;
 780                        buffer_desc = &rtlpci->rx_ring[rxring_idx].buffer_desc[
 781                                rtlpci->rx_ring[rxring_idx].idx];
 782                        pdesc = (struct rtl_rx_desc *)skb->data;
 783                } else {        /* rx descriptor */
 784                        pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 785                                rtlpci->rx_ring[rxring_idx].idx];
 786
 787                        own = (u8)rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc,
 788                                                              false,
 789                                                              HW_DESC_OWN);
 790                        if (own) /* wait data to be filled by hardware */
 791                                return;
 792                }
 793
 794                /* Reaching this point means: data is filled already
 795                 * AAAAAAttention !!!
 796                 * We can NOT access 'skb' before 'pci_unmap_single'
 797                 */
 798                pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
 799                                 rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 800
 801                /* get a new skb - if fail, old one will be reused */
 802                new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 803                if (unlikely(!new_skb))
 804                        goto no_new;
 805                memset(&rx_status, 0, sizeof(rx_status));
 806                rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 807                                                 &rx_status, (u8 *)pdesc, skb);
 808
 809                if (rtlpriv->use_new_trx_flow)
 810                        rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 811                                                           (u8 *)buffer_desc,
 812                                                           hw_queue);
 813
 814                len = rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc, false,
 815                                                  HW_DESC_RXPKT_LEN);
 816
 817                if (skb->end - skb->tail > len) {
 818                        skb_put(skb, len);
 819                        if (rtlpriv->use_new_trx_flow)
 820                                skb_reserve(skb, stats.rx_drvinfo_size +
 821                                            stats.rx_bufshift + 24);
 822                        else
 823                                skb_reserve(skb, stats.rx_drvinfo_size +
 824                                            stats.rx_bufshift);
 825                } else {
 826                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 827                                 "skb->end - skb->tail = %d, len is %d\n",
 828                                 skb->end - skb->tail, len);
 829                        dev_kfree_skb_any(skb);
 830                        goto new_trx_end;
 831                }
 832                /* handle command packet here */
 833                if (stats.packet_report_type == C2H_PACKET) {
 834                        rtl_c2hcmd_enqueue(hw, skb);
 835                        goto new_trx_end;
 836                }
 837
 838                /* NOTICE This can not be use for mac80211,
 839                 * this is done in mac80211 code,
 840                 * if done here sec DHCP will fail
 841                 * skb_trim(skb, skb->len - 4);
 842                 */
 843
 844                hdr = rtl_get_hdr(skb);
 845                fc = rtl_get_fc(skb);
 846
 847                if (!stats.crc && !stats.hwerror) {
 848                        memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 849                               sizeof(rx_status));
 850
 851                        if (is_broadcast_ether_addr(hdr->addr1)) {
 852                                ;/*TODO*/
 853                        } else if (is_multicast_ether_addr(hdr->addr1)) {
 854                                ;/*TODO*/
 855                        } else {
 856                                unicast = true;
 857                                rtlpriv->stats.rxbytesunicast += skb->len;
 858                        }
 859                        rtl_is_special_data(hw, skb, false, true);
 860
 861                        if (ieee80211_is_data(fc)) {
 862                                rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 863                                if (unicast)
 864                                        rtlpriv->link_info.num_rx_inperiod++;
 865                        }
 866
 867                        rtl_collect_scan_list(hw, skb);
 868
 869                        /* static bcn for roaming */
 870                        rtl_beacon_statistic(hw, skb);
 871                        rtl_p2p_info(hw, (void *)skb->data, skb->len);
 872                        /* for sw lps */
 873                        rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 874                        rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 875                        if (rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP &&
 876                            rtlpriv->rtlhal.current_bandtype == BAND_ON_2_4G &&
 877                            (ieee80211_is_beacon(fc) ||
 878                             ieee80211_is_probe_resp(fc))) {
 879                                dev_kfree_skb_any(skb);
 880                        } else {
 881                                _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 882                        }
 883                } else {
 884                        dev_kfree_skb_any(skb);
 885                }
 886new_trx_end:
 887                if (rtlpriv->use_new_trx_flow) {
 888                        rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 889                        rtlpci->rx_ring[hw_queue].next_rx_rp %=
 890                                        RTL_PCI_MAX_RX_COUNT;
 891
 892                        rx_remained_cnt--;
 893                        rtl_write_word(rtlpriv, 0x3B4,
 894                                       rtlpci->rx_ring[hw_queue].next_rx_rp);
 895                }
 896                if (((rtlpriv->link_info.num_rx_inperiod +
 897                      rtlpriv->link_info.num_tx_inperiod) > 8) ||
 898                      rtlpriv->link_info.num_rx_inperiod > 2)
 899                        rtl_lps_leave(hw);
 900                skb = new_skb;
 901no_new:
 902                if (rtlpriv->use_new_trx_flow) {
 903                        _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 904                                                 rxring_idx,
 905                                                 rtlpci->rx_ring[rxring_idx].idx);
 906                } else {
 907                        _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 908                                                 rxring_idx,
 909                                                 rtlpci->rx_ring[rxring_idx].idx);
 910                        if (rtlpci->rx_ring[rxring_idx].idx ==
 911                            rtlpci->rxringcount - 1)
 912                                rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 913                                                            false,
 914                                                            HW_DESC_RXERO,
 915                                                            (u8 *)&tmp_one);
 916                }
 917                rtlpci->rx_ring[rxring_idx].idx =
 918                                (rtlpci->rx_ring[rxring_idx].idx + 1) %
 919                                rtlpci->rxringcount;
 920        }
 921}
 922
 923static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 924{
 925        struct ieee80211_hw *hw = dev_id;
 926        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 927        struct rtl_priv *rtlpriv = rtl_priv(hw);
 928        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 929        unsigned long flags;
 930        struct rtl_int intvec = {0};
 931
 932        irqreturn_t ret = IRQ_HANDLED;
 933
 934        if (rtlpci->irq_enabled == 0)
 935                return ret;
 936
 937        spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
 938        rtlpriv->cfg->ops->disable_interrupt(hw);
 939
 940        /*read ISR: 4/8bytes */
 941        rtlpriv->cfg->ops->interrupt_recognized(hw, &intvec);
 942
 943        /*Shared IRQ or HW disappeared */
 944        if (!intvec.inta || intvec.inta == 0xffff)
 945                goto done;
 946
 947        /*<1> beacon related */
 948        if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK])
 949                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 950                         "beacon ok interrupt!\n");
 951
 952        if (unlikely(intvec.inta & rtlpriv->cfg->maps[RTL_IMR_TBDER]))
 953                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 954                         "beacon err interrupt!\n");
 955
 956        if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_BDOK])
 957                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 958
 959        if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 960                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 961                         "prepare beacon for interrupt!\n");
 962                tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 963        }
 964
 965        /*<2> Tx related */
 966        if (unlikely(intvec.intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 967                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
 968
 969        if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 970                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 971                         "Manage ok interrupt!\n");
 972                _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 973        }
 974
 975        if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 976                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 977                         "HIGH_QUEUE ok interrupt!\n");
 978                _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 979        }
 980
 981        if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
 982                rtlpriv->link_info.num_tx_inperiod++;
 983
 984                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 985                         "BK Tx OK interrupt!\n");
 986                _rtl_pci_tx_isr(hw, BK_QUEUE);
 987        }
 988
 989        if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
 990                rtlpriv->link_info.num_tx_inperiod++;
 991
 992                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 993                         "BE TX OK interrupt!\n");
 994                _rtl_pci_tx_isr(hw, BE_QUEUE);
 995        }
 996
 997        if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
 998                rtlpriv->link_info.num_tx_inperiod++;
 999
1000                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1001                         "VI TX OK interrupt!\n");
1002                _rtl_pci_tx_isr(hw, VI_QUEUE);
1003        }
1004
1005        if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
1006                rtlpriv->link_info.num_tx_inperiod++;
1007
1008                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1009                         "Vo TX OK interrupt!\n");
1010                _rtl_pci_tx_isr(hw, VO_QUEUE);
1011        }
1012
1013        if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE) {
1014                if (intvec.intd & rtlpriv->cfg->maps[RTL_IMR_H2CDOK]) {
1015                        rtlpriv->link_info.num_tx_inperiod++;
1016
1017                        RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1018                                 "H2C TX OK interrupt!\n");
1019                        _rtl_pci_tx_isr(hw, H2C_QUEUE);
1020                }
1021        }
1022
1023        if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1024                if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1025                        rtlpriv->link_info.num_tx_inperiod++;
1026
1027                        RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1028                                 "CMD TX OK interrupt!\n");
1029                        _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1030                }
1031        }
1032
1033        /*<3> Rx related */
1034        if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1035                RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1036                _rtl_pci_rx_interrupt(hw);
1037        }
1038
1039        if (unlikely(intvec.inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1040                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1041                         "rx descriptor unavailable!\n");
1042                _rtl_pci_rx_interrupt(hw);
1043        }
1044
1045        if (unlikely(intvec.intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1046                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1047                _rtl_pci_rx_interrupt(hw);
1048        }
1049
1050        /*<4> fw related*/
1051        if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1052                if (intvec.inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1053                        RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1054                                 "firmware interrupt!\n");
1055                        queue_delayed_work(rtlpriv->works.rtl_wq,
1056                                           &rtlpriv->works.fwevt_wq, 0);
1057                }
1058        }
1059
1060        /*<5> hsisr related*/
1061        /* Only 8188EE & 8723BE Supported.
1062         * If Other ICs Come in, System will corrupt,
1063         * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1064         * are not initialized
1065         */
1066        if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1067            rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1068                if (unlikely(intvec.inta &
1069                    rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1070                        RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1071                                 "hsisr interrupt!\n");
1072                        _rtl_pci_hs_interrupt(hw);
1073                }
1074        }
1075
1076        if (rtlpriv->rtlhal.earlymode_enable)
1077                tasklet_schedule(&rtlpriv->works.irq_tasklet);
1078
1079done:
1080        rtlpriv->cfg->ops->enable_interrupt(hw);
1081        spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1082        return ret;
1083}
1084
1085static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
1086{
1087        _rtl_pci_tx_chk_waitq(hw);
1088}
1089
1090static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
1091{
1092        struct rtl_priv *rtlpriv = rtl_priv(hw);
1093        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1094        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1095        struct rtl8192_tx_ring *ring = NULL;
1096        struct ieee80211_hdr *hdr = NULL;
1097        struct ieee80211_tx_info *info = NULL;
1098        struct sk_buff *pskb = NULL;
1099        struct rtl_tx_desc *pdesc = NULL;
1100        struct rtl_tcb_desc tcb_desc;
1101        /*This is for new trx flow*/
1102        struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1103        u8 temp_one = 1;
1104        u8 *entry;
1105
1106        memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1107        ring = &rtlpci->tx_ring[BEACON_QUEUE];
1108        pskb = __skb_dequeue(&ring->queue);
1109        if (rtlpriv->use_new_trx_flow)
1110                entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1111        else
1112                entry = (u8 *)(&ring->desc[ring->idx]);
1113        if (pskb) {
1114                pci_unmap_single(rtlpci->pdev,
1115                                 rtlpriv->cfg->ops->get_desc(
1116                                 hw, (u8 *)entry, true, HW_DESC_TXBUFF_ADDR),
1117                                 pskb->len, PCI_DMA_TODEVICE);
1118                kfree_skb(pskb);
1119        }
1120
1121        /*NB: the beacon data buffer must be 32-bit aligned. */
1122        pskb = ieee80211_beacon_get(hw, mac->vif);
1123        if (!pskb)
1124                return;
1125        hdr = rtl_get_hdr(pskb);
1126        info = IEEE80211_SKB_CB(pskb);
1127        pdesc = &ring->desc[0];
1128        if (rtlpriv->use_new_trx_flow)
1129                pbuffer_desc = &ring->buffer_desc[0];
1130
1131        rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1132                                        (u8 *)pbuffer_desc, info, NULL, pskb,
1133                                        BEACON_QUEUE, &tcb_desc);
1134
1135        __skb_queue_tail(&ring->queue, pskb);
1136
1137        if (rtlpriv->use_new_trx_flow) {
1138                temp_one = 4;
1139                rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1140                                            HW_DESC_OWN, (u8 *)&temp_one);
1141        } else {
1142                rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1143                                            &temp_one);
1144        }
1145}
1146
1147static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1148{
1149        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1150        struct rtl_priv *rtlpriv = rtl_priv(hw);
1151        struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1152        u8 i;
1153        u16 desc_num;
1154
1155        if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1156                desc_num = TX_DESC_NUM_92E;
1157        else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8822BE)
1158                desc_num = TX_DESC_NUM_8822B;
1159        else
1160                desc_num = RT_TXDESC_NUM;
1161
1162        for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1163                rtlpci->txringcount[i] = desc_num;
1164
1165        /*we just alloc 2 desc for beacon queue,
1166         *because we just need first desc in hw beacon.
1167         */
1168        rtlpci->txringcount[BEACON_QUEUE] = 2;
1169
1170        /*BE queue need more descriptor for performance
1171         *consideration or, No more tx desc will happen,
1172         *and may cause mac80211 mem leakage.
1173         */
1174        if (!rtl_priv(hw)->use_new_trx_flow)
1175                rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1176
1177        rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1178        rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1179}
1180
1181static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1182                                 struct pci_dev *pdev)
1183{
1184        struct rtl_priv *rtlpriv = rtl_priv(hw);
1185        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1186        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1187        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1188
1189        rtlpci->up_first_time = true;
1190        rtlpci->being_init_adapter = false;
1191
1192        rtlhal->hw = hw;
1193        rtlpci->pdev = pdev;
1194
1195        /*Tx/Rx related var */
1196        _rtl_pci_init_trx_var(hw);
1197
1198        /*IBSS*/
1199        mac->beacon_interval = 100;
1200
1201        /*AMPDU*/
1202        mac->min_space_cfg = 0;
1203        mac->max_mss_density = 0;
1204        /*set sane AMPDU defaults */
1205        mac->current_ampdu_density = 7;
1206        mac->current_ampdu_factor = 3;
1207
1208        /*Retry Limit*/
1209        mac->retry_short = 7;
1210        mac->retry_long = 7;
1211
1212        /*QOS*/
1213        rtlpci->acm_method = EACMWAY2_SW;
1214
1215        /*task */
1216        tasklet_init(&rtlpriv->works.irq_tasklet,
1217                     (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1218                     (unsigned long)hw);
1219        tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1220                     (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1221                     (unsigned long)hw);
1222        INIT_WORK(&rtlpriv->works.lps_change_work,
1223                  rtl_lps_change_work_callback);
1224}
1225
1226static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1227                                 unsigned int prio, unsigned int entries)
1228{
1229        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1230        struct rtl_priv *rtlpriv = rtl_priv(hw);
1231        struct rtl_tx_buffer_desc *buffer_desc;
1232        struct rtl_tx_desc *desc;
1233        dma_addr_t buffer_desc_dma, desc_dma;
1234        u32 nextdescaddress;
1235        int i;
1236
1237        /* alloc tx buffer desc for new trx flow*/
1238        if (rtlpriv->use_new_trx_flow) {
1239                buffer_desc =
1240                   pci_zalloc_consistent(rtlpci->pdev,
1241                                         sizeof(*buffer_desc) * entries,
1242                                         &buffer_desc_dma);
1243
1244                if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1245                        pr_err("Cannot allocate TX ring (prio = %d)\n",
1246                               prio);
1247                        return -ENOMEM;
1248                }
1249
1250                rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1251                rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1252
1253                rtlpci->tx_ring[prio].cur_tx_rp = 0;
1254                rtlpci->tx_ring[prio].cur_tx_wp = 0;
1255        }
1256
1257        /* alloc dma for this ring */
1258        desc = pci_zalloc_consistent(rtlpci->pdev,
1259                                     sizeof(*desc) * entries, &desc_dma);
1260
1261        if (!desc || (unsigned long)desc & 0xFF) {
1262                pr_err("Cannot allocate TX ring (prio = %d)\n", prio);
1263                return -ENOMEM;
1264        }
1265
1266        rtlpci->tx_ring[prio].desc = desc;
1267        rtlpci->tx_ring[prio].dma = desc_dma;
1268
1269        rtlpci->tx_ring[prio].idx = 0;
1270        rtlpci->tx_ring[prio].entries = entries;
1271        skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1272
1273        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1274                 prio, desc);
1275
1276        /* init every desc in this ring */
1277        if (!rtlpriv->use_new_trx_flow) {
1278                for (i = 0; i < entries; i++) {
1279                        nextdescaddress = (u32)desc_dma +
1280                                          ((i + 1) % entries) *
1281                                          sizeof(*desc);
1282
1283                        rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1284                                                    true,
1285                                                    HW_DESC_TX_NEXTDESC_ADDR,
1286                                                    (u8 *)&nextdescaddress);
1287                }
1288        }
1289        return 0;
1290}
1291
1292static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1293{
1294        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1295        struct rtl_priv *rtlpriv = rtl_priv(hw);
1296        int i;
1297
1298        if (rtlpriv->use_new_trx_flow) {
1299                struct rtl_rx_buffer_desc *entry = NULL;
1300                /* alloc dma for this ring */
1301                rtlpci->rx_ring[rxring_idx].buffer_desc =
1302                    pci_zalloc_consistent(rtlpci->pdev,
1303                                          sizeof(*rtlpci->rx_ring[rxring_idx].
1304                                                 buffer_desc) *
1305                                                 rtlpci->rxringcount,
1306                                          &rtlpci->rx_ring[rxring_idx].dma);
1307                if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1308                    (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1309                        pr_err("Cannot allocate RX ring\n");
1310                        return -ENOMEM;
1311                }
1312
1313                /* init every desc in this ring */
1314                rtlpci->rx_ring[rxring_idx].idx = 0;
1315                for (i = 0; i < rtlpci->rxringcount; i++) {
1316                        entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1317                        if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1318                                                      rxring_idx, i))
1319                                return -ENOMEM;
1320                }
1321        } else {
1322                struct rtl_rx_desc *entry = NULL;
1323                u8 tmp_one = 1;
1324                /* alloc dma for this ring */
1325                rtlpci->rx_ring[rxring_idx].desc =
1326                    pci_zalloc_consistent(rtlpci->pdev,
1327                                          sizeof(*rtlpci->rx_ring[rxring_idx].
1328                                          desc) * rtlpci->rxringcount,
1329                                          &rtlpci->rx_ring[rxring_idx].dma);
1330                if (!rtlpci->rx_ring[rxring_idx].desc ||
1331                    (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1332                        pr_err("Cannot allocate RX ring\n");
1333                        return -ENOMEM;
1334                }
1335
1336                /* init every desc in this ring */
1337                rtlpci->rx_ring[rxring_idx].idx = 0;
1338
1339                for (i = 0; i < rtlpci->rxringcount; i++) {
1340                        entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1341                        if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1342                                                      rxring_idx, i))
1343                                return -ENOMEM;
1344                }
1345
1346                rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1347                                            HW_DESC_RXERO, &tmp_one);
1348        }
1349        return 0;
1350}
1351
1352static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1353                                  unsigned int prio)
1354{
1355        struct rtl_priv *rtlpriv = rtl_priv(hw);
1356        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1357        struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1358
1359        /* free every desc in this ring */
1360        while (skb_queue_len(&ring->queue)) {
1361                u8 *entry;
1362                struct sk_buff *skb = __skb_dequeue(&ring->queue);
1363
1364                if (rtlpriv->use_new_trx_flow)
1365                        entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1366                else
1367                        entry = (u8 *)(&ring->desc[ring->idx]);
1368
1369                pci_unmap_single(rtlpci->pdev,
1370                                 rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1371                                                   true,
1372                                                   HW_DESC_TXBUFF_ADDR),
1373                                 skb->len, PCI_DMA_TODEVICE);
1374                kfree_skb(skb);
1375                ring->idx = (ring->idx + 1) % ring->entries;
1376        }
1377
1378        /* free dma of this ring */
1379        pci_free_consistent(rtlpci->pdev,
1380                            sizeof(*ring->desc) * ring->entries,
1381                            ring->desc, ring->dma);
1382        ring->desc = NULL;
1383        if (rtlpriv->use_new_trx_flow) {
1384                pci_free_consistent(rtlpci->pdev,
1385                                    sizeof(*ring->buffer_desc) * ring->entries,
1386                                    ring->buffer_desc, ring->buffer_desc_dma);
1387                ring->buffer_desc = NULL;
1388        }
1389}
1390
1391static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1392{
1393        struct rtl_priv *rtlpriv = rtl_priv(hw);
1394        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1395        int i;
1396
1397        /* free every desc in this ring */
1398        for (i = 0; i < rtlpci->rxringcount; i++) {
1399                struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1400
1401                if (!skb)
1402                        continue;
1403                pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1404                                 rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1405                kfree_skb(skb);
1406        }
1407
1408        /* free dma of this ring */
1409        if (rtlpriv->use_new_trx_flow) {
1410                pci_free_consistent(rtlpci->pdev,
1411                                    sizeof(*rtlpci->rx_ring[rxring_idx].
1412                                    buffer_desc) * rtlpci->rxringcount,
1413                                    rtlpci->rx_ring[rxring_idx].buffer_desc,
1414                                    rtlpci->rx_ring[rxring_idx].dma);
1415                rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1416        } else {
1417                pci_free_consistent(rtlpci->pdev,
1418                                    sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1419                                    rtlpci->rxringcount,
1420                                    rtlpci->rx_ring[rxring_idx].desc,
1421                                    rtlpci->rx_ring[rxring_idx].dma);
1422                rtlpci->rx_ring[rxring_idx].desc = NULL;
1423        }
1424}
1425
1426static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1427{
1428        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1429        int ret;
1430        int i, rxring_idx;
1431
1432        /* rxring_idx 0:RX_MPDU_QUEUE
1433         * rxring_idx 1:RX_CMD_QUEUE
1434         */
1435        for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1436                ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1437                if (ret)
1438                        return ret;
1439        }
1440
1441        for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1442                ret = _rtl_pci_init_tx_ring(hw, i, rtlpci->txringcount[i]);
1443                if (ret)
1444                        goto err_free_rings;
1445        }
1446
1447        return 0;
1448
1449err_free_rings:
1450        for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1451                _rtl_pci_free_rx_ring(hw, rxring_idx);
1452
1453        for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1454                if (rtlpci->tx_ring[i].desc ||
1455                    rtlpci->tx_ring[i].buffer_desc)
1456                        _rtl_pci_free_tx_ring(hw, i);
1457
1458        return 1;
1459}
1460
1461static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1462{
1463        u32 i, rxring_idx;
1464
1465        /*free rx rings */
1466        for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1467                _rtl_pci_free_rx_ring(hw, rxring_idx);
1468
1469        /*free tx rings */
1470        for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1471                _rtl_pci_free_tx_ring(hw, i);
1472
1473        return 0;
1474}
1475
1476int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1477{
1478        struct rtl_priv *rtlpriv = rtl_priv(hw);
1479        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1480        int i, rxring_idx;
1481        unsigned long flags;
1482        u8 tmp_one = 1;
1483        u32 bufferaddress;
1484        /* rxring_idx 0:RX_MPDU_QUEUE */
1485        /* rxring_idx 1:RX_CMD_QUEUE */
1486        for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1487                /* force the rx_ring[RX_MPDU_QUEUE/
1488                 * RX_CMD_QUEUE].idx to the first one
1489                 *new trx flow, do nothing
1490                 */
1491                if (!rtlpriv->use_new_trx_flow &&
1492                    rtlpci->rx_ring[rxring_idx].desc) {
1493                        struct rtl_rx_desc *entry = NULL;
1494
1495                        rtlpci->rx_ring[rxring_idx].idx = 0;
1496                        for (i = 0; i < rtlpci->rxringcount; i++) {
1497                                entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1498                                bufferaddress =
1499                                  rtlpriv->cfg->ops->get_desc(hw, (u8 *)entry,
1500                                  false, HW_DESC_RXBUFF_ADDR);
1501                                memset((u8 *)entry, 0,
1502                                       sizeof(*rtlpci->rx_ring
1503                                       [rxring_idx].desc));/*clear one entry*/
1504                                if (rtlpriv->use_new_trx_flow) {
1505                                        rtlpriv->cfg->ops->set_desc(hw,
1506                                            (u8 *)entry, false,
1507                                            HW_DESC_RX_PREPARE,
1508                                            (u8 *)&bufferaddress);
1509                                } else {
1510                                        rtlpriv->cfg->ops->set_desc(hw,
1511                                            (u8 *)entry, false,
1512                                            HW_DESC_RXBUFF_ADDR,
1513                                            (u8 *)&bufferaddress);
1514                                        rtlpriv->cfg->ops->set_desc(hw,
1515                                            (u8 *)entry, false,
1516                                            HW_DESC_RXPKT_LEN,
1517                                            (u8 *)&rtlpci->rxbuffersize);
1518                                        rtlpriv->cfg->ops->set_desc(hw,
1519                                            (u8 *)entry, false,
1520                                            HW_DESC_RXOWN,
1521                                            (u8 *)&tmp_one);
1522                                }
1523                        }
1524                        rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1525                                            HW_DESC_RXERO, (u8 *)&tmp_one);
1526                }
1527                rtlpci->rx_ring[rxring_idx].idx = 0;
1528        }
1529
1530        /*after reset, release previous pending packet,
1531         *and force the  tx idx to the first one
1532         */
1533        spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1534        for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1535                if (rtlpci->tx_ring[i].desc ||
1536                    rtlpci->tx_ring[i].buffer_desc) {
1537                        struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1538
1539                        while (skb_queue_len(&ring->queue)) {
1540                                u8 *entry;
1541                                struct sk_buff *skb =
1542                                        __skb_dequeue(&ring->queue);
1543                                if (rtlpriv->use_new_trx_flow)
1544                                        entry = (u8 *)(&ring->buffer_desc
1545                                                                [ring->idx]);
1546                                else
1547                                        entry = (u8 *)(&ring->desc[ring->idx]);
1548
1549                                pci_unmap_single(rtlpci->pdev,
1550                                                 rtlpriv->cfg->ops->
1551                                                         get_desc(hw, (u8 *)
1552                                                         entry,
1553                                                         true,
1554                                                         HW_DESC_TXBUFF_ADDR),
1555                                                 skb->len, PCI_DMA_TODEVICE);
1556                                dev_kfree_skb_irq(skb);
1557                                ring->idx = (ring->idx + 1) % ring->entries;
1558                        }
1559
1560                        if (rtlpriv->use_new_trx_flow) {
1561                                rtlpci->tx_ring[i].cur_tx_rp = 0;
1562                                rtlpci->tx_ring[i].cur_tx_wp = 0;
1563                        }
1564
1565                        ring->idx = 0;
1566                        ring->entries = rtlpci->txringcount[i];
1567                }
1568        }
1569        spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1570
1571        return 0;
1572}
1573
1574static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1575                                        struct ieee80211_sta *sta,
1576                                        struct sk_buff *skb)
1577{
1578        struct rtl_priv *rtlpriv = rtl_priv(hw);
1579        struct rtl_sta_info *sta_entry = NULL;
1580        u8 tid = rtl_get_tid(skb);
1581        __le16 fc = rtl_get_fc(skb);
1582
1583        if (!sta)
1584                return false;
1585        sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1586
1587        if (!rtlpriv->rtlhal.earlymode_enable)
1588                return false;
1589        if (ieee80211_is_nullfunc(fc))
1590                return false;
1591        if (ieee80211_is_qos_nullfunc(fc))
1592                return false;
1593        if (ieee80211_is_pspoll(fc))
1594                return false;
1595        if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1596                return false;
1597        if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1598                return false;
1599        if (tid > 7)
1600                return false;
1601
1602        /* maybe every tid should be checked */
1603        if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1604                return false;
1605
1606        spin_lock_bh(&rtlpriv->locks.waitq_lock);
1607        skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1608        spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1609
1610        return true;
1611}
1612
1613static int rtl_pci_tx(struct ieee80211_hw *hw,
1614                      struct ieee80211_sta *sta,
1615                      struct sk_buff *skb,
1616                      struct rtl_tcb_desc *ptcb_desc)
1617{
1618        struct rtl_priv *rtlpriv = rtl_priv(hw);
1619        struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1620        struct rtl8192_tx_ring *ring;
1621        struct rtl_tx_desc *pdesc;
1622        struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1623        u16 idx;
1624        u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1625        unsigned long flags;
1626        struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1627        __le16 fc = rtl_get_fc(skb);
1628        u8 *pda_addr = hdr->addr1;
1629        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1630        u8 own;
1631        u8 temp_one = 1;
1632
1633        if (ieee80211_is_mgmt(fc))
1634                rtl_tx_mgmt_proc(hw, skb);
1635
1636        if (rtlpriv->psc.sw_ps_enabled) {
1637                if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1638                    !ieee80211_has_pm(fc))
1639                        hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1640        }
1641
1642        rtl_action_proc(hw, skb, true);
1643
1644        if (is_multicast_ether_addr(pda_addr))
1645                rtlpriv->stats.txbytesmulticast += skb->len;
1646        else if (is_broadcast_ether_addr(pda_addr))
1647                rtlpriv->stats.txbytesbroadcast += skb->len;
1648        else
1649                rtlpriv->stats.txbytesunicast += skb->len;
1650
1651        spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1652        ring = &rtlpci->tx_ring[hw_queue];
1653        if (hw_queue != BEACON_QUEUE) {
1654                if (rtlpriv->use_new_trx_flow)
1655                        idx = ring->cur_tx_wp;
1656                else
1657                        idx = (ring->idx + skb_queue_len(&ring->queue)) %
1658                              ring->entries;
1659        } else {
1660                idx = 0;
1661        }
1662
1663        pdesc = &ring->desc[idx];
1664        if (rtlpriv->use_new_trx_flow) {
1665                ptx_bd_desc = &ring->buffer_desc[idx];
1666        } else {
1667                own = (u8)rtlpriv->cfg->ops->get_desc(hw, (u8 *)pdesc,
1668                                true, HW_DESC_OWN);
1669
1670                if (own == 1 && hw_queue != BEACON_QUEUE) {
1671                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1672                                 "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1673                                 hw_queue, ring->idx, idx,
1674                                 skb_queue_len(&ring->queue));
1675
1676                        spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1677                                               flags);
1678                        return skb->len;
1679                }
1680        }
1681
1682        if (rtlpriv->cfg->ops->get_available_desc &&
1683            rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) {
1684                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1685                         "get_available_desc fail\n");
1686                spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1687                return skb->len;
1688        }
1689
1690        if (ieee80211_is_data(fc))
1691                rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1692
1693        rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1694                        (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1695
1696        __skb_queue_tail(&ring->queue, skb);
1697
1698        if (rtlpriv->use_new_trx_flow) {
1699                rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1700                                            HW_DESC_OWN, &hw_queue);
1701        } else {
1702                rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1703                                            HW_DESC_OWN, &temp_one);
1704        }
1705
1706        if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1707            hw_queue != BEACON_QUEUE) {
1708                RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1709                         "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1710                         hw_queue, ring->idx, idx,
1711                         skb_queue_len(&ring->queue));
1712
1713                ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1714        }
1715
1716        spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1717
1718        rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1719
1720        return 0;
1721}
1722
1723static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1724{
1725        struct rtl_priv *rtlpriv = rtl_priv(hw);
1726        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1727        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1728        struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1729        u16 i = 0;
1730        int queue_id;
1731        struct rtl8192_tx_ring *ring;
1732
1733        if (mac->skip_scan)
1734                return;
1735
1736        for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1737                u32 queue_len;
1738
1739                if (((queues >> queue_id) & 0x1) == 0) {
1740                        queue_id--;
1741                        continue;
1742                }
1743                ring = &pcipriv->dev.tx_ring[queue_id];
1744                queue_len = skb_queue_len(&ring->queue);
1745                if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1746                    queue_id == TXCMD_QUEUE) {
1747                        queue_id--;
1748                        continue;
1749                } else {
1750                        msleep(20);
1751                        i++;
1752                }
1753
1754                /* we just wait 1s for all queues */
1755                if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1756                    is_hal_stop(rtlhal) || i >= 200)
1757                        return;
1758        }
1759}
1760
1761static void rtl_pci_deinit(struct ieee80211_hw *hw)
1762{
1763        struct rtl_priv *rtlpriv = rtl_priv(hw);
1764        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1765
1766        _rtl_pci_deinit_trx_ring(hw);
1767
1768        synchronize_irq(rtlpci->pdev->irq);
1769        tasklet_kill(&rtlpriv->works.irq_tasklet);
1770        cancel_work_sync(&rtlpriv->works.lps_change_work);
1771
1772        flush_workqueue(rtlpriv->works.rtl_wq);
1773        destroy_workqueue(rtlpriv->works.rtl_wq);
1774}
1775
1776static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1777{
1778        int err;
1779
1780        _rtl_pci_init_struct(hw, pdev);
1781
1782        err = _rtl_pci_init_trx_ring(hw);
1783        if (err) {
1784                pr_err("tx ring initialization failed\n");
1785                return err;
1786        }
1787
1788        return 0;
1789}
1790
1791static int rtl_pci_start(struct ieee80211_hw *hw)
1792{
1793        struct rtl_priv *rtlpriv = rtl_priv(hw);
1794        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1795        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1796        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1797        struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
1798        struct rtl_btc_ops *btc_ops = rtlpriv->btcoexist.btc_ops;
1799
1800        int err;
1801
1802        rtl_pci_reset_trx_ring(hw);
1803
1804        rtlpci->driver_is_goingto_unload = false;
1805        if (rtlpriv->cfg->ops->get_btc_status &&
1806            rtlpriv->cfg->ops->get_btc_status()) {
1807                rtlpriv->btcoexist.btc_info.ap_num = 36;
1808                btc_ops->btc_init_variables(rtlpriv);
1809                btc_ops->btc_init_hal_vars(rtlpriv);
1810        } else if (btc_ops) {
1811                btc_ops->btc_init_variables_wifi_only(rtlpriv);
1812        }
1813
1814        err = rtlpriv->cfg->ops->hw_init(hw);
1815        if (err) {
1816                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1817                         "Failed to config hardware!\n");
1818                return err;
1819        }
1820        rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RETRY_LIMIT,
1821                        &rtlmac->retry_long);
1822
1823        rtlpriv->cfg->ops->enable_interrupt(hw);
1824        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1825
1826        rtl_init_rx_config(hw);
1827
1828        /*should be after adapter start and interrupt enable. */
1829        set_hal_start(rtlhal);
1830
1831        RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1832
1833        rtlpci->up_first_time = false;
1834
1835        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "%s OK\n", __func__);
1836        return 0;
1837}
1838
1839static void rtl_pci_stop(struct ieee80211_hw *hw)
1840{
1841        struct rtl_priv *rtlpriv = rtl_priv(hw);
1842        struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1843        struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1844        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1845        unsigned long flags;
1846        u8 rf_timeout = 0;
1847
1848        if (rtlpriv->cfg->ops->get_btc_status())
1849                rtlpriv->btcoexist.btc_ops->btc_halt_notify(rtlpriv);
1850
1851        if (rtlpriv->btcoexist.btc_ops)
1852                rtlpriv->btcoexist.btc_ops->btc_deinit_variables(rtlpriv);
1853
1854        /*should be before disable interrupt&adapter
1855         *and will do it immediately.
1856         */
1857        set_hal_stop(rtlhal);
1858
1859        rtlpci->driver_is_goingto_unload = true;
1860        rtlpriv->cfg->ops->disable_interrupt(hw);
1861        cancel_work_sync(&rtlpriv->works.lps_change_work);
1862
1863        spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1864        while (ppsc->rfchange_inprogress) {
1865                spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1866                if (rf_timeout > 100) {
1867                        spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1868                        break;
1869                }
1870                mdelay(1);
1871                rf_timeout++;
1872                spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1873        }
1874        ppsc->rfchange_inprogress = true;
1875        spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1876
1877        rtlpriv->cfg->ops->hw_disable(hw);
1878        /* some things are not needed if firmware not available */
1879        if (!rtlpriv->max_fw_size)
1880                return;
1881        rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1882
1883        spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1884        ppsc->rfchange_inprogress = false;
1885        spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1886
1887        rtl_pci_enable_aspm(hw);
1888}
1889
1890static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1891                                  struct ieee80211_hw *hw)
1892{
1893        struct rtl_priv *rtlpriv = rtl_priv(hw);
1894        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1895        struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1896        struct pci_dev *bridge_pdev = pdev->bus->self;
1897        u16 venderid;
1898        u16 deviceid;
1899        u8 revisionid;
1900        u16 irqline;
1901        u8 tmp;
1902
1903        pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1904        venderid = pdev->vendor;
1905        deviceid = pdev->device;
1906        pci_read_config_byte(pdev, 0x8, &revisionid);
1907        pci_read_config_word(pdev, 0x3C, &irqline);
1908
1909        /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1910         * r8192e_pci, and RTL8192SE, which uses this driver. If the
1911         * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1912         * the correct driver is r8192e_pci, thus this routine should
1913         * return false.
1914         */
1915        if (deviceid == RTL_PCI_8192SE_DID &&
1916            revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1917                return false;
1918
1919        if (deviceid == RTL_PCI_8192_DID ||
1920            deviceid == RTL_PCI_0044_DID ||
1921            deviceid == RTL_PCI_0047_DID ||
1922            deviceid == RTL_PCI_8192SE_DID ||
1923            deviceid == RTL_PCI_8174_DID ||
1924            deviceid == RTL_PCI_8173_DID ||
1925            deviceid == RTL_PCI_8172_DID ||
1926            deviceid == RTL_PCI_8171_DID) {
1927                switch (revisionid) {
1928                case RTL_PCI_REVISION_ID_8192PCIE:
1929                        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1930                                 "8192 PCI-E is found - vid/did=%x/%x\n",
1931                                 venderid, deviceid);
1932                        rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1933                        return false;
1934                case RTL_PCI_REVISION_ID_8192SE:
1935                        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1936                                 "8192SE is found - vid/did=%x/%x\n",
1937                                 venderid, deviceid);
1938                        rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1939                        break;
1940                default:
1941                        RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1942                                 "Err: Unknown device - vid/did=%x/%x\n",
1943                                 venderid, deviceid);
1944                        rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1945                        break;
1946                }
1947        } else if (deviceid == RTL_PCI_8723AE_DID) {
1948                rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1949                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1950                         "8723AE PCI-E is found - vid/did=%x/%x\n",
1951                         venderid, deviceid);
1952        } else if (deviceid == RTL_PCI_8192CET_DID ||
1953                   deviceid == RTL_PCI_8192CE_DID ||
1954                   deviceid == RTL_PCI_8191CE_DID ||
1955                   deviceid == RTL_PCI_8188CE_DID) {
1956                rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1957                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1958                         "8192C PCI-E is found - vid/did=%x/%x\n",
1959                         venderid, deviceid);
1960        } else if (deviceid == RTL_PCI_8192DE_DID ||
1961                   deviceid == RTL_PCI_8192DE_DID2) {
1962                rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1963                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1964                         "8192D PCI-E is found - vid/did=%x/%x\n",
1965                         venderid, deviceid);
1966        } else if (deviceid == RTL_PCI_8188EE_DID) {
1967                rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1968                RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1969                         "Find adapter, Hardware type is 8188EE\n");
1970        } else if (deviceid == RTL_PCI_8723BE_DID) {
1971                rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
1972                RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1973                         "Find adapter, Hardware type is 8723BE\n");
1974        } else if (deviceid == RTL_PCI_8192EE_DID) {
1975                rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
1976                RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1977                         "Find adapter, Hardware type is 8192EE\n");
1978        } else if (deviceid == RTL_PCI_8821AE_DID) {
1979                rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
1980                RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1981                         "Find adapter, Hardware type is 8821AE\n");
1982        } else if (deviceid == RTL_PCI_8812AE_DID) {
1983                rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
1984                RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1985                         "Find adapter, Hardware type is 8812AE\n");
1986        } else if (deviceid == RTL_PCI_8822BE_DID) {
1987                rtlhal->hw_type = HARDWARE_TYPE_RTL8822BE;
1988                rtlhal->bandset = BAND_ON_BOTH;
1989                RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1990                         "Find adapter, Hardware type is 8822BE\n");
1991        } else {
1992                RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1993                         "Err: Unknown device - vid/did=%x/%x\n",
1994                         venderid, deviceid);
1995
1996                rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1997        }
1998
1999        if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
2000                if (revisionid == 0 || revisionid == 1) {
2001                        if (revisionid == 0) {
2002                                RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2003                                         "Find 92DE MAC0\n");
2004                                rtlhal->interfaceindex = 0;
2005                        } else if (revisionid == 1) {
2006                                RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2007                                         "Find 92DE MAC1\n");
2008                                rtlhal->interfaceindex = 1;
2009                        }
2010                } else {
2011                        RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2012                                 "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
2013                                 venderid, deviceid, revisionid);
2014                        rtlhal->interfaceindex = 0;
2015                }
2016        }
2017
2018        switch (rtlhal->hw_type) {
2019        case HARDWARE_TYPE_RTL8192EE:
2020        case HARDWARE_TYPE_RTL8822BE:
2021                /* use new trx flow */
2022                rtlpriv->use_new_trx_flow = true;
2023                break;
2024
2025        default:
2026                rtlpriv->use_new_trx_flow = false;
2027                break;
2028        }
2029
2030        /*find bus info */
2031        pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2032        pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2033        pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2034
2035        /*find bridge info */
2036        pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2037        /* some ARM have no bridge_pdev and will crash here
2038         * so we should check if bridge_pdev is NULL
2039         */
2040        if (bridge_pdev) {
2041                /*find bridge info if available */
2042                pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2043                for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2044                        if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2045                                pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2046                                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2047                                         "Pci Bridge Vendor is found index: %d\n",
2048                                         tmp);
2049                                break;
2050                        }
2051                }
2052        }
2053
2054        if (pcipriv->ndis_adapter.pcibridge_vendor !=
2055                PCI_BRIDGE_VENDOR_UNKNOWN) {
2056                pcipriv->ndis_adapter.pcibridge_busnum =
2057                    bridge_pdev->bus->number;
2058                pcipriv->ndis_adapter.pcibridge_devnum =
2059                    PCI_SLOT(bridge_pdev->devfn);
2060                pcipriv->ndis_adapter.pcibridge_funcnum =
2061                    PCI_FUNC(bridge_pdev->devfn);
2062                pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2063                    pci_pcie_cap(bridge_pdev);
2064                pcipriv->ndis_adapter.num4bytes =
2065                    (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2066
2067                rtl_pci_get_linkcontrol_field(hw);
2068
2069                if (pcipriv->ndis_adapter.pcibridge_vendor ==
2070                    PCI_BRIDGE_VENDOR_AMD) {
2071                        pcipriv->ndis_adapter.amd_l1_patch =
2072                            rtl_pci_get_amd_l1_patch(hw);
2073                }
2074        }
2075
2076        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2077                 "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2078                 pcipriv->ndis_adapter.busnumber,
2079                 pcipriv->ndis_adapter.devnumber,
2080                 pcipriv->ndis_adapter.funcnumber,
2081                 pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2082
2083        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2084                 "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2085                 pcipriv->ndis_adapter.pcibridge_busnum,
2086                 pcipriv->ndis_adapter.pcibridge_devnum,
2087                 pcipriv->ndis_adapter.pcibridge_funcnum,
2088                 pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2089                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2090                 pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2091                 pcipriv->ndis_adapter.amd_l1_patch);
2092
2093        rtl_pci_parse_configuration(pdev, hw);
2094        list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2095
2096        return true;
2097}
2098
2099static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2100{
2101        struct rtl_priv *rtlpriv = rtl_priv(hw);
2102        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2103        struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2104        int ret;
2105
2106        ret = pci_enable_msi(rtlpci->pdev);
2107        if (ret < 0)
2108                return ret;
2109
2110        ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2111                          IRQF_SHARED, KBUILD_MODNAME, hw);
2112        if (ret < 0) {
2113                pci_disable_msi(rtlpci->pdev);
2114                return ret;
2115        }
2116
2117        rtlpci->using_msi = true;
2118
2119        RT_TRACE(rtlpriv, COMP_INIT | COMP_INTR, DBG_DMESG,
2120                 "MSI Interrupt Mode!\n");
2121        return 0;
2122}
2123
2124static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2125{
2126        struct rtl_priv *rtlpriv = rtl_priv(hw);
2127        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2128        struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2129        int ret;
2130
2131        ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2132                          IRQF_SHARED, KBUILD_MODNAME, hw);
2133        if (ret < 0)
2134                return ret;
2135
2136        rtlpci->using_msi = false;
2137        RT_TRACE(rtlpriv, COMP_INIT | COMP_INTR, DBG_DMESG,
2138                 "Pin-based Interrupt Mode!\n");
2139        return 0;
2140}
2141
2142static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2143{
2144        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2145        struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2146        int ret;
2147
2148        if (rtlpci->msi_support) {
2149                ret = rtl_pci_intr_mode_msi(hw);
2150                if (ret < 0)
2151                        ret = rtl_pci_intr_mode_legacy(hw);
2152        } else {
2153                ret = rtl_pci_intr_mode_legacy(hw);
2154        }
2155        return ret;
2156}
2157
2158static void platform_enable_dma64(struct pci_dev *pdev, bool dma64)
2159{
2160        u8      value;
2161
2162        pci_read_config_byte(pdev, 0x719, &value);
2163
2164        /* 0x719 Bit5 is DMA64 bit fetch. */
2165        if (dma64)
2166                value |= BIT(5);
2167        else
2168                value &= ~BIT(5);
2169
2170        pci_write_config_byte(pdev, 0x719, value);
2171}
2172
2173int rtl_pci_probe(struct pci_dev *pdev,
2174                  const struct pci_device_id *id)
2175{
2176        struct ieee80211_hw *hw = NULL;
2177
2178        struct rtl_priv *rtlpriv = NULL;
2179        struct rtl_pci_priv *pcipriv = NULL;
2180        struct rtl_pci *rtlpci;
2181        unsigned long pmem_start, pmem_len, pmem_flags;
2182        int err;
2183
2184        err = pci_enable_device(pdev);
2185        if (err) {
2186                WARN_ONCE(true, "%s : Cannot enable new PCI device\n",
2187                          pci_name(pdev));
2188                return err;
2189        }
2190
2191        if (((struct rtl_hal_cfg *)id->driver_data)->mod_params->dma64 &&
2192            !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
2193                if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
2194                        WARN_ONCE(true,
2195                                  "Unable to obtain 64bit DMA for consistent allocations\n");
2196                        err = -ENOMEM;
2197                        goto fail1;
2198                }
2199
2200                platform_enable_dma64(pdev, true);
2201        } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2202                if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2203                        WARN_ONCE(true,
2204                                  "rtlwifi: Unable to obtain 32bit DMA for consistent allocations\n");
2205                        err = -ENOMEM;
2206                        goto fail1;
2207                }
2208
2209                platform_enable_dma64(pdev, false);
2210        }
2211
2212        pci_set_master(pdev);
2213
2214        hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2215                                sizeof(struct rtl_priv), &rtl_ops);
2216        if (!hw) {
2217                WARN_ONCE(true,
2218                          "%s : ieee80211 alloc failed\n", pci_name(pdev));
2219                err = -ENOMEM;
2220                goto fail1;
2221        }
2222
2223        SET_IEEE80211_DEV(hw, &pdev->dev);
2224        pci_set_drvdata(pdev, hw);
2225
2226        rtlpriv = hw->priv;
2227        rtlpriv->hw = hw;
2228        pcipriv = (void *)rtlpriv->priv;
2229        pcipriv->dev.pdev = pdev;
2230        init_completion(&rtlpriv->firmware_loading_complete);
2231        /*proximity init here*/
2232        rtlpriv->proximity.proxim_on = false;
2233
2234        pcipriv = (void *)rtlpriv->priv;
2235        pcipriv->dev.pdev = pdev;
2236
2237        /* init cfg & intf_ops */
2238        rtlpriv->rtlhal.interface = INTF_PCI;
2239        rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2240        rtlpriv->intf_ops = &rtl_pci_ops;
2241        rtlpriv->glb_var = &rtl_global_var;
2242        rtl_efuse_ops_init(hw);
2243
2244        /* MEM map */
2245        err = pci_request_regions(pdev, KBUILD_MODNAME);
2246        if (err) {
2247                WARN_ONCE(true, "rtlwifi: Can't obtain PCI resources\n");
2248                goto fail1;
2249        }
2250
2251        pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2252        pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2253        pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2254
2255        /*shared mem start */
2256        rtlpriv->io.pci_mem_start =
2257                        (unsigned long)pci_iomap(pdev,
2258                        rtlpriv->cfg->bar_id, pmem_len);
2259        if (rtlpriv->io.pci_mem_start == 0) {
2260                WARN_ONCE(true, "rtlwifi: Can't map PCI mem\n");
2261                err = -ENOMEM;
2262                goto fail2;
2263        }
2264
2265        RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2266                 "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2267                 pmem_start, pmem_len, pmem_flags,
2268                 rtlpriv->io.pci_mem_start);
2269
2270        /* Disable Clk Request */
2271        pci_write_config_byte(pdev, 0x81, 0);
2272        /* leave D3 mode */
2273        pci_write_config_byte(pdev, 0x44, 0);
2274        pci_write_config_byte(pdev, 0x04, 0x06);
2275        pci_write_config_byte(pdev, 0x04, 0x07);
2276
2277        /* find adapter */
2278        if (!_rtl_pci_find_adapter(pdev, hw)) {
2279                err = -ENODEV;
2280                goto fail2;
2281        }
2282
2283        /* Init IO handler */
2284        _rtl_pci_io_handler_init(&pdev->dev, hw);
2285
2286        /*like read eeprom and so on */
2287        rtlpriv->cfg->ops->read_eeprom_info(hw);
2288
2289        if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2290                pr_err("Can't init_sw_vars\n");
2291                err = -ENODEV;
2292                goto fail3;
2293        }
2294        rtlpriv->cfg->ops->init_sw_leds(hw);
2295
2296        /*aspm */
2297        rtl_pci_init_aspm(hw);
2298
2299        /* Init mac80211 sw */
2300        err = rtl_init_core(hw);
2301        if (err) {
2302                pr_err("Can't allocate sw for mac80211\n");
2303                goto fail3;
2304        }
2305
2306        /* Init PCI sw */
2307        err = rtl_pci_init(hw, pdev);
2308        if (err) {
2309                pr_err("Failed to init PCI\n");
2310                goto fail3;
2311        }
2312
2313        err = ieee80211_register_hw(hw);
2314        if (err) {
2315                pr_err("Can't register mac80211 hw.\n");
2316                err = -ENODEV;
2317                goto fail3;
2318        }
2319        rtlpriv->mac80211.mac80211_registered = 1;
2320
2321        /* add for debug */
2322        rtl_debug_add_one(hw);
2323
2324        /*init rfkill */
2325        rtl_init_rfkill(hw);    /* Init PCI sw */
2326
2327        rtlpci = rtl_pcidev(pcipriv);
2328        err = rtl_pci_intr_mode_decide(hw);
2329        if (err) {
2330                RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2331                         "%s: failed to register IRQ handler\n",
2332                         wiphy_name(hw->wiphy));
2333                goto fail3;
2334        }
2335        rtlpci->irq_alloc = 1;
2336
2337        set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2338        return 0;
2339
2340fail3:
2341        pci_set_drvdata(pdev, NULL);
2342        rtl_deinit_core(hw);
2343
2344fail2:
2345        if (rtlpriv->io.pci_mem_start != 0)
2346                pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2347
2348        pci_release_regions(pdev);
2349        complete(&rtlpriv->firmware_loading_complete);
2350
2351fail1:
2352        if (hw)
2353                ieee80211_free_hw(hw);
2354        pci_disable_device(pdev);
2355
2356        return err;
2357}
2358EXPORT_SYMBOL(rtl_pci_probe);
2359
2360void rtl_pci_disconnect(struct pci_dev *pdev)
2361{
2362        struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2363        struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2364        struct rtl_priv *rtlpriv = rtl_priv(hw);
2365        struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2366        struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2367
2368        /* just in case driver is removed before firmware callback */
2369        wait_for_completion(&rtlpriv->firmware_loading_complete);
2370        clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2371
2372        /* remove form debug */
2373        rtl_debug_remove_one(hw);
2374
2375        /*ieee80211_unregister_hw will call ops_stop */
2376        if (rtlmac->mac80211_registered == 1) {
2377                ieee80211_unregister_hw(hw);
2378                rtlmac->mac80211_registered = 0;
2379        } else {
2380                rtl_deinit_deferred_work(hw, false);
2381                rtlpriv->intf_ops->adapter_stop(hw);
2382        }
2383        rtlpriv->cfg->ops->disable_interrupt(hw);
2384
2385        /*deinit rfkill */
2386        rtl_deinit_rfkill(hw);
2387
2388        rtl_pci_deinit(hw);
2389        rtl_deinit_core(hw);
2390        rtlpriv->cfg->ops->deinit_sw_vars(hw);
2391
2392        if (rtlpci->irq_alloc) {
2393                free_irq(rtlpci->pdev->irq, hw);
2394                rtlpci->irq_alloc = 0;
2395        }
2396
2397        if (rtlpci->using_msi)
2398                pci_disable_msi(rtlpci->pdev);
2399
2400        list_del(&rtlpriv->list);
2401        if (rtlpriv->io.pci_mem_start != 0) {
2402                pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2403                pci_release_regions(pdev);
2404        }
2405
2406        pci_disable_device(pdev);
2407
2408        rtl_pci_disable_aspm(hw);
2409
2410        pci_set_drvdata(pdev, NULL);
2411
2412        ieee80211_free_hw(hw);
2413}
2414EXPORT_SYMBOL(rtl_pci_disconnect);
2415
2416#ifdef CONFIG_PM_SLEEP
2417/***************************************
2418 * kernel pci power state define:
2419 * PCI_D0         ((pci_power_t __force) 0)
2420 * PCI_D1         ((pci_power_t __force) 1)
2421 * PCI_D2         ((pci_power_t __force) 2)
2422 * PCI_D3hot      ((pci_power_t __force) 3)
2423 * PCI_D3cold     ((pci_power_t __force) 4)
2424 * PCI_UNKNOWN    ((pci_power_t __force) 5)
2425
2426 * This function is called when system
2427 * goes into suspend state mac80211 will
2428 * call rtl_mac_stop() from the mac80211
2429 * suspend function first, So there is
2430 * no need to call hw_disable here.
2431 ****************************************/
2432int rtl_pci_suspend(struct device *dev)
2433{
2434        struct pci_dev *pdev = to_pci_dev(dev);
2435        struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2436        struct rtl_priv *rtlpriv = rtl_priv(hw);
2437
2438        rtlpriv->cfg->ops->hw_suspend(hw);
2439        rtl_deinit_rfkill(hw);
2440
2441        return 0;
2442}
2443EXPORT_SYMBOL(rtl_pci_suspend);
2444
2445int rtl_pci_resume(struct device *dev)
2446{
2447        struct pci_dev *pdev = to_pci_dev(dev);
2448        struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2449        struct rtl_priv *rtlpriv = rtl_priv(hw);
2450
2451        rtlpriv->cfg->ops->hw_resume(hw);
2452        rtl_init_rfkill(hw);
2453        return 0;
2454}
2455EXPORT_SYMBOL(rtl_pci_resume);
2456#endif /* CONFIG_PM_SLEEP */
2457
2458const struct rtl_intf_ops rtl_pci_ops = {
2459        .read_efuse_byte = read_efuse_byte,
2460        .adapter_start = rtl_pci_start,
2461        .adapter_stop = rtl_pci_stop,
2462        .check_buddy_priv = rtl_pci_check_buddy_priv,
2463        .adapter_tx = rtl_pci_tx,
2464        .flush = rtl_pci_flush,
2465        .reset_trx_ring = rtl_pci_reset_trx_ring,
2466        .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2467
2468        .disable_aspm = rtl_pci_disable_aspm,
2469        .enable_aspm = rtl_pci_enable_aspm,
2470};
2471