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10#define pr_fmt(fmt) "intel_mid_thermal: " fmt
11
12#include <linux/device.h>
13#include <linux/err.h>
14#include <linux/mfd/intel_msic.h>
15#include <linux/module.h>
16#include <linux/param.h>
17#include <linux/platform_device.h>
18#include <linux/pm.h>
19#include <linux/slab.h>
20#include <linux/thermal.h>
21
22
23#define MSIC_THERMAL_SENSORS 4
24
25
26#define MSIC_ADC_ENBL 0x10
27#define MSIC_ADC_START 0x08
28
29#define MSIC_ADCTHERM_ENBL 0x04
30#define MSIC_ADCRRDATA_ENBL 0x05
31#define MSIC_CHANL_MASK_VAL 0x0F
32
33#define MSIC_STOPBIT_MASK 16
34#define MSIC_ADCTHERM_MASK 4
35
36#define ADC_CHANLS_MAX 15
37#define ADC_LOOP_MAX (ADC_CHANLS_MAX - MSIC_THERMAL_SENSORS)
38
39
40#define SKIN_SENSOR0_CODE 0x08
41#define SKIN_SENSOR1_CODE 0x09
42#define SYS_SENSOR_CODE 0x0A
43#define MSIC_DIE_SENSOR_CODE 0x03
44
45#define SKIN_THERM_SENSOR0 0
46#define SKIN_THERM_SENSOR1 1
47#define SYS_THERM_SENSOR2 2
48#define MSIC_DIE_THERM_SENSOR3 3
49
50
51#define ADC_MAX 977
52#define ADC_MIN 162
53#define ADC_VAL0C 887
54#define ADC_VAL20C 720
55#define ADC_VAL40C 508
56#define ADC_VAL60C 315
57
58
59#define ADC_CHNL_START_ADDR INTEL_MSIC_ADC1ADDR0
60#define ADC_DATA_START_ADDR INTEL_MSIC_ADC1SNS0H
61
62
63#define MSIC_DIE_ADC_MIN 488
64#define MSIC_DIE_ADC_MAX 1004
65
66
67
68
69static int channel_index;
70
71struct platform_info {
72 struct platform_device *pdev;
73 struct thermal_zone_device *tzd[MSIC_THERMAL_SENSORS];
74};
75
76struct thermal_device_info {
77 unsigned int chnl_addr;
78 int direct;
79
80 long curr_temp;
81};
82
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86
87
88
89static int to_msic_die_temp(uint16_t adc_val)
90{
91 return (368 * (adc_val) / 1000) - 220;
92}
93
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99
100
101static int is_valid_adc(uint16_t adc_val, uint16_t min, uint16_t max)
102{
103 return (adc_val >= min) && (adc_val <= max);
104}
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117
118
119static int adc_to_temp(int direct, uint16_t adc_val, int *tp)
120{
121 int temp;
122
123
124 if (direct) {
125 if (is_valid_adc(adc_val, MSIC_DIE_ADC_MIN, MSIC_DIE_ADC_MAX)) {
126 *tp = to_msic_die_temp(adc_val) * 1000;
127 return 0;
128 }
129 return -ERANGE;
130 }
131
132 if (!is_valid_adc(adc_val, ADC_MIN, ADC_MAX))
133 return -ERANGE;
134
135
136 if (adc_val > ADC_VAL0C)
137 temp = 177 - (adc_val/5);
138 else if ((adc_val <= ADC_VAL0C) && (adc_val > ADC_VAL20C))
139 temp = 111 - (adc_val/8);
140 else if ((adc_val <= ADC_VAL20C) && (adc_val > ADC_VAL40C))
141 temp = 92 - (adc_val/10);
142 else if ((adc_val <= ADC_VAL40C) && (adc_val > ADC_VAL60C))
143 temp = 91 - (adc_val/10);
144 else
145 temp = 112 - (adc_val/6);
146
147
148 *tp = temp * 1000;
149 return 0;
150}
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160
161static int mid_read_temp(struct thermal_zone_device *tzd, int *temp)
162{
163 struct thermal_device_info *td_info = tzd->devdata;
164 uint16_t adc_val, addr;
165 uint8_t data = 0;
166 int ret;
167 int curr_temp;
168
169 addr = td_info->chnl_addr;
170
171
172 ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, MSIC_ADCRRDATA_ENBL);
173 if (ret)
174 return ret;
175
176
177 ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, MSIC_ADCTHERM_ENBL);
178 if (ret)
179 return ret;
180
181
182 ret = intel_msic_reg_read(addr, &data);
183 if (ret)
184 return ret;
185
186
187 adc_val = (data << 2);
188 addr++;
189
190 ret = intel_msic_reg_read(addr, &data);
191 if (ret)
192 return ret;
193
194
195 data &= 03;
196 adc_val += data;
197
198
199 ret = adc_to_temp(td_info->direct, adc_val, &curr_temp);
200 if (ret == 0)
201 *temp = td_info->curr_temp = curr_temp;
202 return ret;
203}
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211
212
213static int configure_adc(int val)
214{
215 int ret;
216 uint8_t data;
217
218 ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL1, &data);
219 if (ret)
220 return ret;
221
222 if (val) {
223
224 data |= (MSIC_ADC_ENBL | MSIC_ADC_START);
225 } else {
226
227 data &= (~MSIC_ADC_START);
228 }
229 return intel_msic_reg_write(INTEL_MSIC_ADC1CNTL1, data);
230}
231
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238
239
240static int set_up_therm_channel(u16 base_addr)
241{
242 int ret;
243
244
245 ret = intel_msic_reg_write(base_addr, SKIN_SENSOR0_CODE);
246 if (ret)
247 return ret;
248
249 ret = intel_msic_reg_write(base_addr + 1, SKIN_SENSOR1_CODE);
250 if (ret)
251 return ret;
252
253 ret = intel_msic_reg_write(base_addr + 2, SYS_SENSOR_CODE);
254 if (ret)
255 return ret;
256
257
258
259 ret = intel_msic_reg_write(base_addr + 3,
260 (MSIC_DIE_SENSOR_CODE | 0x10));
261 if (ret)
262 return ret;
263
264
265 return configure_adc(1);
266}
267
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273
274static int reset_stopbit(uint16_t addr)
275{
276 int ret;
277 uint8_t data;
278 ret = intel_msic_reg_read(addr, &data);
279 if (ret)
280 return ret;
281
282 return intel_msic_reg_write(addr, (data & 0xEF));
283}
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297
298static int find_free_channel(void)
299{
300 int ret;
301 int i;
302 uint8_t data;
303
304
305 ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL1, &data);
306 if (ret)
307 return ret;
308
309 if ((data & MSIC_ADC_ENBL) == 0)
310 return 0;
311
312
313 for (i = 0; i < ADC_CHANLS_MAX; i++) {
314 ret = intel_msic_reg_read(ADC_CHNL_START_ADDR + i, &data);
315 if (ret)
316 return ret;
317
318 if (data & MSIC_STOPBIT_MASK) {
319 ret = i;
320 break;
321 }
322 }
323 return (ret > ADC_LOOP_MAX) ? (-EINVAL) : ret;
324}
325
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329
330
331
332static int mid_initialize_adc(struct device *dev)
333{
334 u8 data;
335 u16 base_addr;
336 int ret;
337
338
339
340
341
342 ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL3, &data);
343 if (ret)
344 return ret;
345
346 data &= ~MSIC_ADCTHERM_MASK;
347 ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, data);
348 if (ret)
349 return ret;
350
351
352 channel_index = find_free_channel();
353 if (channel_index < 0) {
354 dev_err(dev, "No free ADC channels");
355 return channel_index;
356 }
357
358 base_addr = ADC_CHNL_START_ADDR + channel_index;
359
360 if (!(channel_index == 0 || channel_index == ADC_LOOP_MAX)) {
361
362 ret = reset_stopbit(base_addr);
363 if (ret)
364 return ret;
365
366
367 base_addr++;
368 channel_index++;
369 }
370
371 ret = set_up_therm_channel(base_addr);
372 if (ret) {
373 dev_err(dev, "unable to enable ADC");
374 return ret;
375 }
376 dev_dbg(dev, "ADC initialization successful");
377 return ret;
378}
379
380
381
382
383
384
385
386static struct thermal_device_info *initialize_sensor(int index)
387{
388 struct thermal_device_info *td_info =
389 kzalloc(sizeof(struct thermal_device_info), GFP_KERNEL);
390
391 if (!td_info)
392 return NULL;
393
394
395 td_info->chnl_addr = ADC_DATA_START_ADDR + 2 * (channel_index + index);
396
397 if (index == 3)
398 td_info->direct = 1;
399 return td_info;
400}
401
402#ifdef CONFIG_PM_SLEEP
403
404
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407
408
409static int mid_thermal_resume(struct device *dev)
410{
411 return mid_initialize_adc(dev);
412}
413
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419
420
421static int mid_thermal_suspend(struct device *dev)
422{
423
424
425
426
427
428 return configure_adc(0);
429}
430#endif
431
432static SIMPLE_DEV_PM_OPS(mid_thermal_pm,
433 mid_thermal_suspend, mid_thermal_resume);
434
435
436
437
438
439
440
441static int read_curr_temp(struct thermal_zone_device *tzd, int *temp)
442{
443 WARN_ON(tzd == NULL);
444 return mid_read_temp(tzd, temp);
445}
446
447
448static struct thermal_zone_device_ops tzd_ops = {
449 .get_temp = read_curr_temp,
450};
451
452
453
454
455
456
457
458
459static int mid_thermal_probe(struct platform_device *pdev)
460{
461 static char *name[MSIC_THERMAL_SENSORS] = {
462 "skin0", "skin1", "sys", "msicdie"
463 };
464
465 int ret;
466 int i;
467 struct platform_info *pinfo;
468
469 pinfo = devm_kzalloc(&pdev->dev, sizeof(struct platform_info),
470 GFP_KERNEL);
471 if (!pinfo)
472 return -ENOMEM;
473
474
475 ret = mid_initialize_adc(&pdev->dev);
476 if (ret) {
477 dev_err(&pdev->dev, "ADC init failed");
478 return ret;
479 }
480
481
482 for (i = 0; i < MSIC_THERMAL_SENSORS; i++) {
483 struct thermal_device_info *td_info = initialize_sensor(i);
484
485 if (!td_info) {
486 ret = -ENOMEM;
487 goto err;
488 }
489 pinfo->tzd[i] = thermal_zone_device_register(name[i],
490 0, 0, td_info, &tzd_ops, NULL, 0, 0);
491 if (IS_ERR(pinfo->tzd[i])) {
492 kfree(td_info);
493 ret = PTR_ERR(pinfo->tzd[i]);
494 goto err;
495 }
496 }
497
498 pinfo->pdev = pdev;
499 platform_set_drvdata(pdev, pinfo);
500 return 0;
501
502err:
503 while (--i >= 0) {
504 kfree(pinfo->tzd[i]->devdata);
505 thermal_zone_device_unregister(pinfo->tzd[i]);
506 }
507 configure_adc(0);
508 return ret;
509}
510
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515
516
517
518static int mid_thermal_remove(struct platform_device *pdev)
519{
520 int i;
521 struct platform_info *pinfo = platform_get_drvdata(pdev);
522
523 for (i = 0; i < MSIC_THERMAL_SENSORS; i++) {
524 kfree(pinfo->tzd[i]->devdata);
525 thermal_zone_device_unregister(pinfo->tzd[i]);
526 }
527
528
529 return configure_adc(0);
530}
531
532#define DRIVER_NAME "msic_thermal"
533
534static const struct platform_device_id therm_id_table[] = {
535 { DRIVER_NAME, 1 },
536 { }
537};
538MODULE_DEVICE_TABLE(platform, therm_id_table);
539
540static struct platform_driver mid_thermal_driver = {
541 .driver = {
542 .name = DRIVER_NAME,
543 .pm = &mid_thermal_pm,
544 },
545 .probe = mid_thermal_probe,
546 .remove = mid_thermal_remove,
547 .id_table = therm_id_table,
548};
549
550module_platform_driver(mid_thermal_driver);
551
552MODULE_AUTHOR("Durgadoss R <durgadoss.r@intel.com>");
553MODULE_DESCRIPTION("Intel Medfield Platform Thermal Driver");
554MODULE_LICENSE("GPL v2");
555