1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16#ifndef __PHY_H
17#define __PHY_H
18
19#include <linux/compiler.h>
20#include <linux/spinlock.h>
21#include <linux/ethtool.h>
22#include <linux/linkmode.h>
23#include <linux/mdio.h>
24#include <linux/mii.h>
25#include <linux/module.h>
26#include <linux/timer.h>
27#include <linux/workqueue.h>
28#include <linux/mod_devicetable.h>
29
30#include <linux/atomic.h>
31
32#define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
33 SUPPORTED_TP | \
34 SUPPORTED_MII)
35
36#define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
37 SUPPORTED_10baseT_Full)
38
39#define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
40 SUPPORTED_100baseT_Full)
41
42#define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
43 SUPPORTED_1000baseT_Full)
44
45extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_features) __ro_after_init;
46extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_basic_t1_features) __ro_after_init;
47extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_features) __ro_after_init;
48extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_fibre_features) __ro_after_init;
49extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_gbit_all_ports_features) __ro_after_init;
50extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_features) __ro_after_init;
51extern __ETHTOOL_DECLARE_LINK_MODE_MASK(phy_10gbit_full_features) __ro_after_init;
52
53#define PHY_BASIC_FEATURES ((unsigned long *)&phy_basic_features)
54#define PHY_BASIC_T1_FEATURES ((unsigned long *)&phy_basic_t1_features)
55#define PHY_GBIT_FEATURES ((unsigned long *)&phy_gbit_features)
56#define PHY_GBIT_FIBRE_FEATURES ((unsigned long *)&phy_gbit_fibre_features)
57#define PHY_GBIT_ALL_PORTS_FEATURES ((unsigned long *)&phy_gbit_all_ports_features)
58#define PHY_10GBIT_FEATURES ((unsigned long *)&phy_10gbit_features)
59#define PHY_10GBIT_FULL_FEATURES ((unsigned long *)&phy_10gbit_full_features)
60
61
62
63
64
65
66#define PHY_POLL -1
67#define PHY_IGNORE_INTERRUPT -2
68
69#define PHY_HAS_INTERRUPT 0x00000001
70#define PHY_IS_INTERNAL 0x00000002
71#define PHY_RST_AFTER_CLK_EN 0x00000004
72#define MDIO_DEVICE_IS_PHY 0x80000000
73
74
75typedef enum {
76 PHY_INTERFACE_MODE_NA,
77 PHY_INTERFACE_MODE_INTERNAL,
78 PHY_INTERFACE_MODE_MII,
79 PHY_INTERFACE_MODE_GMII,
80 PHY_INTERFACE_MODE_SGMII,
81 PHY_INTERFACE_MODE_TBI,
82 PHY_INTERFACE_MODE_REVMII,
83 PHY_INTERFACE_MODE_RMII,
84 PHY_INTERFACE_MODE_RGMII,
85 PHY_INTERFACE_MODE_RGMII_ID,
86 PHY_INTERFACE_MODE_RGMII_RXID,
87 PHY_INTERFACE_MODE_RGMII_TXID,
88 PHY_INTERFACE_MODE_RTBI,
89 PHY_INTERFACE_MODE_SMII,
90 PHY_INTERFACE_MODE_XGMII,
91 PHY_INTERFACE_MODE_MOCA,
92 PHY_INTERFACE_MODE_QSGMII,
93 PHY_INTERFACE_MODE_TRGMII,
94 PHY_INTERFACE_MODE_1000BASEX,
95 PHY_INTERFACE_MODE_2500BASEX,
96 PHY_INTERFACE_MODE_RXAUI,
97 PHY_INTERFACE_MODE_XAUI,
98
99 PHY_INTERFACE_MODE_10GKR,
100 PHY_INTERFACE_MODE_MAX,
101} phy_interface_t;
102
103
104
105
106
107
108
109
110
111
112
113
114unsigned int phy_supported_speeds(struct phy_device *phy,
115 unsigned int *speeds,
116 unsigned int size);
117
118
119
120
121
122
123static inline const char *phy_modes(phy_interface_t interface)
124{
125 switch (interface) {
126 case PHY_INTERFACE_MODE_NA:
127 return "";
128 case PHY_INTERFACE_MODE_INTERNAL:
129 return "internal";
130 case PHY_INTERFACE_MODE_MII:
131 return "mii";
132 case PHY_INTERFACE_MODE_GMII:
133 return "gmii";
134 case PHY_INTERFACE_MODE_SGMII:
135 return "sgmii";
136 case PHY_INTERFACE_MODE_TBI:
137 return "tbi";
138 case PHY_INTERFACE_MODE_REVMII:
139 return "rev-mii";
140 case PHY_INTERFACE_MODE_RMII:
141 return "rmii";
142 case PHY_INTERFACE_MODE_RGMII:
143 return "rgmii";
144 case PHY_INTERFACE_MODE_RGMII_ID:
145 return "rgmii-id";
146 case PHY_INTERFACE_MODE_RGMII_RXID:
147 return "rgmii-rxid";
148 case PHY_INTERFACE_MODE_RGMII_TXID:
149 return "rgmii-txid";
150 case PHY_INTERFACE_MODE_RTBI:
151 return "rtbi";
152 case PHY_INTERFACE_MODE_SMII:
153 return "smii";
154 case PHY_INTERFACE_MODE_XGMII:
155 return "xgmii";
156 case PHY_INTERFACE_MODE_MOCA:
157 return "moca";
158 case PHY_INTERFACE_MODE_QSGMII:
159 return "qsgmii";
160 case PHY_INTERFACE_MODE_TRGMII:
161 return "trgmii";
162 case PHY_INTERFACE_MODE_1000BASEX:
163 return "1000base-x";
164 case PHY_INTERFACE_MODE_2500BASEX:
165 return "2500base-x";
166 case PHY_INTERFACE_MODE_RXAUI:
167 return "rxaui";
168 case PHY_INTERFACE_MODE_XAUI:
169 return "xaui";
170 case PHY_INTERFACE_MODE_10GKR:
171 return "10gbase-kr";
172 default:
173 return "unknown";
174 }
175}
176
177
178#define PHY_INIT_TIMEOUT 100000
179#define PHY_STATE_TIME 1
180#define PHY_FORCE_TIMEOUT 10
181#define PHY_AN_TIMEOUT 10
182
183#define PHY_MAX_ADDR 32
184
185
186#define PHY_ID_FMT "%s:%02x"
187
188#define MII_BUS_ID_SIZE 61
189
190
191
192#define MII_ADDR_C45 (1<<30)
193
194struct device;
195struct phylink;
196struct sk_buff;
197
198
199
200
201
202struct mii_bus {
203 struct module *owner;
204 const char *name;
205 char id[MII_BUS_ID_SIZE];
206 void *priv;
207 int (*read)(struct mii_bus *bus, int addr, int regnum);
208 int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
209 int (*reset)(struct mii_bus *bus);
210
211
212
213
214
215 struct mutex mdio_lock;
216
217 struct device *parent;
218 enum {
219 MDIOBUS_ALLOCATED = 1,
220 MDIOBUS_REGISTERED,
221 MDIOBUS_UNREGISTERED,
222 MDIOBUS_RELEASED,
223 } state;
224 struct device dev;
225
226
227 struct mdio_device *mdio_map[PHY_MAX_ADDR];
228
229
230 u32 phy_mask;
231
232
233 u32 phy_ignore_ta_mask;
234
235
236
237
238
239 int irq[PHY_MAX_ADDR];
240
241
242 int reset_delay_us;
243
244 struct gpio_desc *reset_gpiod;
245};
246#define to_mii_bus(d) container_of(d, struct mii_bus, dev)
247
248struct mii_bus *mdiobus_alloc_size(size_t);
249static inline struct mii_bus *mdiobus_alloc(void)
250{
251 return mdiobus_alloc_size(0);
252}
253
254int __mdiobus_register(struct mii_bus *bus, struct module *owner);
255#define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
256void mdiobus_unregister(struct mii_bus *bus);
257void mdiobus_free(struct mii_bus *bus);
258struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
259static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
260{
261 return devm_mdiobus_alloc_size(dev, 0);
262}
263
264void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
265struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
266
267#define PHY_INTERRUPT_DISABLED 0x0
268#define PHY_INTERRUPT_ENABLED 0x80000000
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350enum phy_state {
351 PHY_DOWN = 0,
352 PHY_STARTING,
353 PHY_READY,
354 PHY_PENDING,
355 PHY_UP,
356 PHY_AN,
357 PHY_RUNNING,
358 PHY_NOLINK,
359 PHY_FORCING,
360 PHY_CHANGELINK,
361 PHY_HALTED,
362 PHY_RESUMING
363};
364
365
366
367
368
369
370struct phy_c45_device_ids {
371 u32 devices_in_package;
372 u32 device_ids[8];
373};
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408struct phy_device {
409 struct mdio_device mdio;
410
411
412
413 struct phy_driver *drv;
414
415 u32 phy_id;
416
417 struct phy_c45_device_ids c45_ids;
418 unsigned is_c45:1;
419 unsigned is_internal:1;
420 unsigned is_pseudo_fixed_link:1;
421 unsigned has_fixups:1;
422 unsigned suspended:1;
423 unsigned sysfs_links:1;
424 unsigned loopback_enabled:1;
425
426 unsigned autoneg:1;
427
428 unsigned link:1;
429
430 enum phy_state state;
431
432 u32 dev_flags;
433
434 phy_interface_t interface;
435
436
437
438
439
440 int speed;
441 int duplex;
442 int pause;
443 int asym_pause;
444
445
446 u32 interrupts;
447
448
449
450 u32 supported;
451 u32 advertising;
452 u32 lp_advertising;
453
454
455 u32 eee_broken_modes;
456
457 int link_timeout;
458
459#ifdef CONFIG_LED_TRIGGER_PHY
460 struct phy_led_trigger *phy_led_triggers;
461 unsigned int phy_num_led_triggers;
462 struct phy_led_trigger *last_triggered;
463
464 struct phy_led_trigger *led_link_trigger;
465#endif
466
467
468
469
470
471 int irq;
472
473
474
475 void *priv;
476
477
478 struct work_struct phy_queue;
479 struct delayed_work state_queue;
480
481 struct mutex lock;
482
483 struct phylink *phylink;
484 struct net_device *attached_dev;
485
486 u8 mdix;
487 u8 mdix_ctrl;
488
489 void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
490 void (*adjust_link)(struct net_device *dev);
491};
492#define to_phy_device(d) container_of(to_mdio_device(d), \
493 struct phy_device, mdio)
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516struct phy_driver {
517 struct mdio_driver_common mdiodrv;
518 u32 phy_id;
519 char *name;
520 u32 phy_id_mask;
521 const unsigned long * const features;
522 u32 flags;
523 const void *driver_data;
524
525
526
527
528 int (*soft_reset)(struct phy_device *phydev);
529
530
531
532
533
534 int (*config_init)(struct phy_device *phydev);
535
536
537
538
539
540 int (*probe)(struct phy_device *phydev);
541
542
543 int (*suspend)(struct phy_device *phydev);
544 int (*resume)(struct phy_device *phydev);
545
546
547
548
549
550
551
552 int (*config_aneg)(struct phy_device *phydev);
553
554
555 int (*aneg_done)(struct phy_device *phydev);
556
557
558 int (*read_status)(struct phy_device *phydev);
559
560
561 int (*ack_interrupt)(struct phy_device *phydev);
562
563
564 int (*config_intr)(struct phy_device *phydev);
565
566
567
568
569
570 int (*did_interrupt)(struct phy_device *phydev);
571
572
573 void (*remove)(struct phy_device *phydev);
574
575
576
577
578
579 int (*match_phy_device)(struct phy_device *phydev);
580
581
582 int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
583
584
585 int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
586
587
588
589
590
591
592
593
594 bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
595
596
597
598
599
600
601
602 void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
603
604
605
606
607 int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
608
609
610 void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
611
612
613
614
615
616
617
618
619 void (*link_change_notify)(struct phy_device *dev);
620
621
622
623
624
625
626
627
628
629
630 int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
631
632
633
634
635
636
637
638
639
640
641
642 int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
643 u16 val);
644
645 int (*read_page)(struct phy_device *dev);
646 int (*write_page)(struct phy_device *dev, int page);
647
648
649
650 int (*module_info)(struct phy_device *dev,
651 struct ethtool_modinfo *modinfo);
652
653
654 int (*module_eeprom)(struct phy_device *dev,
655 struct ethtool_eeprom *ee, u8 *data);
656
657
658 int (*get_sset_count)(struct phy_device *dev);
659 void (*get_strings)(struct phy_device *dev, u8 *data);
660 void (*get_stats)(struct phy_device *dev,
661 struct ethtool_stats *stats, u64 *data);
662
663
664 int (*get_tunable)(struct phy_device *dev,
665 struct ethtool_tunable *tuna, void *data);
666 int (*set_tunable)(struct phy_device *dev,
667 struct ethtool_tunable *tuna,
668 const void *data);
669 int (*set_loopback)(struct phy_device *dev, bool enable);
670};
671#define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
672 struct phy_driver, mdiodrv)
673
674#define PHY_ANY_ID "MATCH ANY PHY"
675#define PHY_ANY_UID 0xffffffff
676
677
678struct phy_fixup {
679 struct list_head list;
680 char bus_id[MII_BUS_ID_SIZE + 3];
681 u32 phy_uid;
682 u32 phy_uid_mask;
683 int (*run)(struct phy_device *phydev);
684};
685
686const char *phy_speed_to_str(int speed);
687const char *phy_duplex_to_str(unsigned int duplex);
688
689
690
691
692struct phy_setting {
693 u32 speed;
694 u8 duplex;
695 u8 bit;
696};
697
698const struct phy_setting *
699phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
700 size_t maxbit, bool exact);
701size_t phy_speeds(unsigned int *speeds, size_t size,
702 unsigned long *mask, size_t maxbit);
703
704void phy_resolve_aneg_linkmode(struct phy_device *phydev);
705
706
707
708
709
710
711
712
713
714
715int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
716
717
718
719
720
721
722
723
724
725
726static inline int phy_read(struct phy_device *phydev, u32 regnum)
727{
728 return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
729}
730
731
732
733
734
735
736
737
738static inline int __phy_read(struct phy_device *phydev, u32 regnum)
739{
740 return __mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
741}
742
743
744
745
746
747
748
749
750
751
752
753static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
754{
755 return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
756}
757
758
759
760
761
762
763
764
765
766static inline int __phy_write(struct phy_device *phydev, u32 regnum, u16 val)
767{
768 return __mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum,
769 val);
770}
771
772int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
773int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set);
774
775
776
777
778
779
780
781
782
783static inline int __phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
784{
785 return __phy_modify(phydev, regnum, 0, val);
786}
787
788
789
790
791
792
793
794
795
796static inline int __phy_clear_bits(struct phy_device *phydev, u32 regnum,
797 u16 val)
798{
799 return __phy_modify(phydev, regnum, val, 0);
800}
801
802
803
804
805
806
807
808static inline int phy_set_bits(struct phy_device *phydev, u32 regnum, u16 val)
809{
810 return phy_modify(phydev, regnum, 0, val);
811}
812
813
814
815
816
817
818
819static inline int phy_clear_bits(struct phy_device *phydev, u32 regnum, u16 val)
820{
821 return phy_modify(phydev, regnum, val, 0);
822}
823
824
825
826
827
828
829
830
831static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
832{
833 return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
834}
835
836
837
838
839
840
841static inline bool phy_polling_mode(struct phy_device *phydev)
842{
843 return phydev->irq == PHY_POLL;
844}
845
846
847
848
849
850static inline bool phy_is_internal(struct phy_device *phydev)
851{
852 return phydev->is_internal;
853}
854
855
856
857
858
859
860static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
861{
862 return mode >= PHY_INTERFACE_MODE_RGMII &&
863 mode <= PHY_INTERFACE_MODE_RGMII_TXID;
864};
865
866
867
868
869
870
871
872
873
874static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
875{
876 return mode == PHY_INTERFACE_MODE_1000BASEX ||
877 mode == PHY_INTERFACE_MODE_2500BASEX;
878}
879
880
881
882
883
884
885static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
886{
887 return phy_interface_mode_is_rgmii(phydev->interface);
888};
889
890
891
892
893
894
895static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
896{
897 return phydev->is_pseudo_fixed_link;
898}
899
900
901
902
903
904
905
906
907
908
909
910int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
911
912int phy_save_page(struct phy_device *phydev);
913int phy_select_page(struct phy_device *phydev, int page);
914int phy_restore_page(struct phy_device *phydev, int oldpage, int ret);
915int phy_read_paged(struct phy_device *phydev, int page, u32 regnum);
916int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val);
917int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
918 u16 mask, u16 set);
919
920struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
921 bool is_c45,
922 struct phy_c45_device_ids *c45_ids);
923#if IS_ENABLED(CONFIG_PHYLIB)
924struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
925int phy_device_register(struct phy_device *phy);
926void phy_device_free(struct phy_device *phydev);
927#else
928static inline
929struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
930{
931 return NULL;
932}
933
934static inline int phy_device_register(struct phy_device *phy)
935{
936 return 0;
937}
938
939static inline void phy_device_free(struct phy_device *phydev) { }
940#endif
941void phy_device_remove(struct phy_device *phydev);
942int phy_init_hw(struct phy_device *phydev);
943int phy_suspend(struct phy_device *phydev);
944int phy_resume(struct phy_device *phydev);
945int __phy_resume(struct phy_device *phydev);
946int phy_loopback(struct phy_device *phydev, bool enable);
947struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
948 phy_interface_t interface);
949struct phy_device *phy_find_first(struct mii_bus *bus);
950int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
951 u32 flags, phy_interface_t interface);
952int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
953 void (*handler)(struct net_device *),
954 phy_interface_t interface);
955struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
956 void (*handler)(struct net_device *),
957 phy_interface_t interface);
958void phy_disconnect(struct phy_device *phydev);
959void phy_detach(struct phy_device *phydev);
960void phy_start(struct phy_device *phydev);
961void phy_stop(struct phy_device *phydev);
962int phy_start_aneg(struct phy_device *phydev);
963int phy_aneg_done(struct phy_device *phydev);
964int phy_speed_down(struct phy_device *phydev, bool sync);
965int phy_speed_up(struct phy_device *phydev);
966
967int phy_stop_interrupts(struct phy_device *phydev);
968int phy_restart_aneg(struct phy_device *phydev);
969int phy_reset_after_clk_enable(struct phy_device *phydev);
970
971static inline void phy_device_reset(struct phy_device *phydev, int value)
972{
973 mdio_device_reset(&phydev->mdio, value);
974}
975
976#define phydev_err(_phydev, format, args...) \
977 dev_err(&_phydev->mdio.dev, format, ##args)
978
979#define phydev_info(_phydev, format, args...) \
980 dev_info(&_phydev->mdio.dev, format, ##args)
981
982#define phydev_warn(_phydev, format, args...) \
983 dev_warn(&_phydev->mdio.dev, format, ##args)
984
985#define phydev_dbg(_phydev, format, args...) \
986 dev_dbg(&_phydev->mdio.dev, format, ##args)
987
988static inline const char *phydev_name(const struct phy_device *phydev)
989{
990 return dev_name(&phydev->mdio.dev);
991}
992
993void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
994 __printf(2, 3);
995void phy_attached_info(struct phy_device *phydev);
996
997
998int genphy_config_init(struct phy_device *phydev);
999int genphy_setup_forced(struct phy_device *phydev);
1000int genphy_restart_aneg(struct phy_device *phydev);
1001int genphy_config_aneg(struct phy_device *phydev);
1002int genphy_aneg_done(struct phy_device *phydev);
1003int genphy_update_link(struct phy_device *phydev);
1004int genphy_read_status(struct phy_device *phydev);
1005int genphy_suspend(struct phy_device *phydev);
1006int genphy_resume(struct phy_device *phydev);
1007int genphy_loopback(struct phy_device *phydev, bool enable);
1008int genphy_soft_reset(struct phy_device *phydev);
1009static inline int genphy_no_soft_reset(struct phy_device *phydev)
1010{
1011 return 0;
1012}
1013int genphy_read_mmd_unsupported(struct phy_device *phdev, int devad,
1014 u16 regnum);
1015int genphy_write_mmd_unsupported(struct phy_device *phdev, int devnum,
1016 u16 regnum, u16 val);
1017
1018
1019int genphy_c45_restart_aneg(struct phy_device *phydev);
1020int genphy_c45_aneg_done(struct phy_device *phydev);
1021int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
1022int genphy_c45_read_lpa(struct phy_device *phydev);
1023int genphy_c45_read_pma(struct phy_device *phydev);
1024int genphy_c45_pma_setup_forced(struct phy_device *phydev);
1025int genphy_c45_an_disable_aneg(struct phy_device *phydev);
1026int genphy_c45_read_mdix(struct phy_device *phydev);
1027
1028
1029int gen10g_config_aneg(struct phy_device *phydev);
1030int gen10g_read_status(struct phy_device *phydev);
1031int gen10g_no_soft_reset(struct phy_device *phydev);
1032int gen10g_config_init(struct phy_device *phydev);
1033int gen10g_suspend(struct phy_device *phydev);
1034int gen10g_resume(struct phy_device *phydev);
1035
1036static inline int phy_read_status(struct phy_device *phydev)
1037{
1038 if (!phydev->drv)
1039 return -EIO;
1040
1041 if (phydev->drv->read_status)
1042 return phydev->drv->read_status(phydev);
1043 else
1044 return genphy_read_status(phydev);
1045}
1046
1047void phy_driver_unregister(struct phy_driver *drv);
1048void phy_drivers_unregister(struct phy_driver *drv, int n);
1049int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
1050int phy_drivers_register(struct phy_driver *new_driver, int n,
1051 struct module *owner);
1052void phy_state_machine(struct work_struct *work);
1053void phy_change_work(struct work_struct *work);
1054void phy_mac_interrupt(struct phy_device *phydev);
1055void phy_start_machine(struct phy_device *phydev);
1056void phy_stop_machine(struct phy_device *phydev);
1057void phy_trigger_machine(struct phy_device *phydev);
1058int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
1059void phy_ethtool_ksettings_get(struct phy_device *phydev,
1060 struct ethtool_link_ksettings *cmd);
1061int phy_ethtool_ksettings_set(struct phy_device *phydev,
1062 const struct ethtool_link_ksettings *cmd);
1063int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
1064int phy_start_interrupts(struct phy_device *phydev);
1065void phy_print_status(struct phy_device *phydev);
1066int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
1067void phy_remove_link_mode(struct phy_device *phydev, u32 link_mode);
1068void phy_support_sym_pause(struct phy_device *phydev);
1069void phy_support_asym_pause(struct phy_device *phydev);
1070void phy_set_sym_pause(struct phy_device *phydev, bool rx, bool tx,
1071 bool autoneg);
1072void phy_set_asym_pause(struct phy_device *phydev, bool rx, bool tx);
1073bool phy_validate_pause(struct phy_device *phydev,
1074 struct ethtool_pauseparam *pp);
1075
1076int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
1077 int (*run)(struct phy_device *));
1078int phy_register_fixup_for_id(const char *bus_id,
1079 int (*run)(struct phy_device *));
1080int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
1081 int (*run)(struct phy_device *));
1082
1083int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
1084int phy_unregister_fixup_for_id(const char *bus_id);
1085int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
1086
1087int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
1088int phy_get_eee_err(struct phy_device *phydev);
1089int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
1090int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
1091int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
1092void phy_ethtool_get_wol(struct phy_device *phydev,
1093 struct ethtool_wolinfo *wol);
1094int phy_ethtool_get_link_ksettings(struct net_device *ndev,
1095 struct ethtool_link_ksettings *cmd);
1096int phy_ethtool_set_link_ksettings(struct net_device *ndev,
1097 const struct ethtool_link_ksettings *cmd);
1098int phy_ethtool_nway_reset(struct net_device *ndev);
1099
1100#if IS_ENABLED(CONFIG_PHYLIB)
1101int __init mdio_bus_init(void);
1102void mdio_bus_exit(void);
1103#endif
1104
1105
1106static inline int phy_ethtool_get_strings(struct phy_device *phydev, u8 *data)
1107{
1108 if (!phydev->drv)
1109 return -EIO;
1110
1111 mutex_lock(&phydev->lock);
1112 phydev->drv->get_strings(phydev, data);
1113 mutex_unlock(&phydev->lock);
1114
1115 return 0;
1116}
1117
1118static inline int phy_ethtool_get_sset_count(struct phy_device *phydev)
1119{
1120 int ret;
1121
1122 if (!phydev->drv)
1123 return -EIO;
1124
1125 if (phydev->drv->get_sset_count &&
1126 phydev->drv->get_strings &&
1127 phydev->drv->get_stats) {
1128 mutex_lock(&phydev->lock);
1129 ret = phydev->drv->get_sset_count(phydev);
1130 mutex_unlock(&phydev->lock);
1131
1132 return ret;
1133 }
1134
1135 return -EOPNOTSUPP;
1136}
1137
1138static inline int phy_ethtool_get_stats(struct phy_device *phydev,
1139 struct ethtool_stats *stats, u64 *data)
1140{
1141 if (!phydev->drv)
1142 return -EIO;
1143
1144 mutex_lock(&phydev->lock);
1145 phydev->drv->get_stats(phydev, stats, data);
1146 mutex_unlock(&phydev->lock);
1147
1148 return 0;
1149}
1150
1151extern struct bus_type mdio_bus_type;
1152
1153struct mdio_board_info {
1154 const char *bus_id;
1155 char modalias[MDIO_NAME_SIZE];
1156 int mdio_addr;
1157 const void *platform_data;
1158};
1159
1160#if IS_ENABLED(CONFIG_MDIO_DEVICE)
1161int mdiobus_register_board_info(const struct mdio_board_info *info,
1162 unsigned int n);
1163#else
1164static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
1165 unsigned int n)
1166{
1167 return 0;
1168}
1169#endif
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180#define phy_module_driver(__phy_drivers, __count) \
1181static int __init phy_module_init(void) \
1182{ \
1183 return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
1184} \
1185module_init(phy_module_init); \
1186static void __exit phy_module_exit(void) \
1187{ \
1188 phy_drivers_unregister(__phy_drivers, __count); \
1189} \
1190module_exit(phy_module_exit)
1191
1192#define module_phy_driver(__phy_drivers) \
1193 phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
1194
1195#endif
1196