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15#ifndef __LINUX_USB_PD_H
16#define __LINUX_USB_PD_H
17
18#include <linux/kernel.h>
19#include <linux/types.h>
20#include <linux/usb/typec.h>
21
22
23enum pd_ctrl_msg_type {
24
25 PD_CTRL_GOOD_CRC = 1,
26 PD_CTRL_GOTO_MIN = 2,
27 PD_CTRL_ACCEPT = 3,
28 PD_CTRL_REJECT = 4,
29 PD_CTRL_PING = 5,
30 PD_CTRL_PS_RDY = 6,
31 PD_CTRL_GET_SOURCE_CAP = 7,
32 PD_CTRL_GET_SINK_CAP = 8,
33 PD_CTRL_DR_SWAP = 9,
34 PD_CTRL_PR_SWAP = 10,
35 PD_CTRL_VCONN_SWAP = 11,
36 PD_CTRL_WAIT = 12,
37 PD_CTRL_SOFT_RESET = 13,
38
39 PD_CTRL_NOT_SUPP = 16,
40 PD_CTRL_GET_SOURCE_CAP_EXT = 17,
41 PD_CTRL_GET_STATUS = 18,
42 PD_CTRL_FR_SWAP = 19,
43 PD_CTRL_GET_PPS_STATUS = 20,
44 PD_CTRL_GET_COUNTRY_CODES = 21,
45
46};
47
48enum pd_data_msg_type {
49
50 PD_DATA_SOURCE_CAP = 1,
51 PD_DATA_REQUEST = 2,
52 PD_DATA_BIST = 3,
53 PD_DATA_SINK_CAP = 4,
54 PD_DATA_BATT_STATUS = 5,
55 PD_DATA_ALERT = 6,
56 PD_DATA_GET_COUNTRY_INFO = 7,
57
58 PD_DATA_VENDOR_DEF = 15,
59
60};
61
62enum pd_ext_msg_type {
63
64 PD_EXT_SOURCE_CAP_EXT = 1,
65 PD_EXT_STATUS = 2,
66 PD_EXT_GET_BATT_CAP = 3,
67 PD_EXT_GET_BATT_STATUS = 4,
68 PD_EXT_BATT_CAP = 5,
69 PD_EXT_GET_MANUFACTURER_INFO = 6,
70 PD_EXT_MANUFACTURER_INFO = 7,
71 PD_EXT_SECURITY_REQUEST = 8,
72 PD_EXT_SECURITY_RESPONSE = 9,
73 PD_EXT_FW_UPDATE_REQUEST = 10,
74 PD_EXT_FW_UPDATE_RESPONSE = 11,
75 PD_EXT_PPS_STATUS = 12,
76 PD_EXT_COUNTRY_INFO = 13,
77 PD_EXT_COUNTRY_CODES = 14,
78
79};
80
81#define PD_REV10 0x0
82#define PD_REV20 0x1
83#define PD_REV30 0x2
84#define PD_MAX_REV PD_REV30
85
86#define PD_HEADER_EXT_HDR BIT(15)
87#define PD_HEADER_CNT_SHIFT 12
88#define PD_HEADER_CNT_MASK 0x7
89#define PD_HEADER_ID_SHIFT 9
90#define PD_HEADER_ID_MASK 0x7
91#define PD_HEADER_PWR_ROLE BIT(8)
92#define PD_HEADER_REV_SHIFT 6
93#define PD_HEADER_REV_MASK 0x3
94#define PD_HEADER_DATA_ROLE BIT(5)
95#define PD_HEADER_TYPE_SHIFT 0
96#define PD_HEADER_TYPE_MASK 0x1f
97
98#define PD_HEADER(type, pwr, data, rev, id, cnt, ext_hdr) \
99 ((((type) & PD_HEADER_TYPE_MASK) << PD_HEADER_TYPE_SHIFT) | \
100 ((pwr) == TYPEC_SOURCE ? PD_HEADER_PWR_ROLE : 0) | \
101 ((data) == TYPEC_HOST ? PD_HEADER_DATA_ROLE : 0) | \
102 (rev << PD_HEADER_REV_SHIFT) | \
103 (((id) & PD_HEADER_ID_MASK) << PD_HEADER_ID_SHIFT) | \
104 (((cnt) & PD_HEADER_CNT_MASK) << PD_HEADER_CNT_SHIFT) | \
105 ((ext_hdr) ? PD_HEADER_EXT_HDR : 0))
106
107#define PD_HEADER_LE(type, pwr, data, rev, id, cnt) \
108 cpu_to_le16(PD_HEADER((type), (pwr), (data), (rev), (id), (cnt), (0)))
109
110static inline unsigned int pd_header_cnt(u16 header)
111{
112 return (header >> PD_HEADER_CNT_SHIFT) & PD_HEADER_CNT_MASK;
113}
114
115static inline unsigned int pd_header_cnt_le(__le16 header)
116{
117 return pd_header_cnt(le16_to_cpu(header));
118}
119
120static inline unsigned int pd_header_type(u16 header)
121{
122 return (header >> PD_HEADER_TYPE_SHIFT) & PD_HEADER_TYPE_MASK;
123}
124
125static inline unsigned int pd_header_type_le(__le16 header)
126{
127 return pd_header_type(le16_to_cpu(header));
128}
129
130static inline unsigned int pd_header_msgid(u16 header)
131{
132 return (header >> PD_HEADER_ID_SHIFT) & PD_HEADER_ID_MASK;
133}
134
135static inline unsigned int pd_header_msgid_le(__le16 header)
136{
137 return pd_header_msgid(le16_to_cpu(header));
138}
139
140static inline unsigned int pd_header_rev(u16 header)
141{
142 return (header >> PD_HEADER_REV_SHIFT) & PD_HEADER_REV_MASK;
143}
144
145static inline unsigned int pd_header_rev_le(__le16 header)
146{
147 return pd_header_rev(le16_to_cpu(header));
148}
149
150#define PD_EXT_HDR_CHUNKED BIT(15)
151#define PD_EXT_HDR_CHUNK_NUM_SHIFT 11
152#define PD_EXT_HDR_CHUNK_NUM_MASK 0xf
153#define PD_EXT_HDR_REQ_CHUNK BIT(10)
154#define PD_EXT_HDR_DATA_SIZE_SHIFT 0
155#define PD_EXT_HDR_DATA_SIZE_MASK 0x1ff
156
157#define PD_EXT_HDR(data_size, req_chunk, chunk_num, chunked) \
158 ((((data_size) & PD_EXT_HDR_DATA_SIZE_MASK) << PD_EXT_HDR_DATA_SIZE_SHIFT) | \
159 ((req_chunk) ? PD_EXT_HDR_REQ_CHUNK : 0) | \
160 (((chunk_num) & PD_EXT_HDR_CHUNK_NUM_MASK) << PD_EXT_HDR_CHUNK_NUM_SHIFT) | \
161 ((chunked) ? PD_EXT_HDR_CHUNKED : 0))
162
163#define PD_EXT_HDR_LE(data_size, req_chunk, chunk_num, chunked) \
164 cpu_to_le16(PD_EXT_HDR((data_size), (req_chunk), (chunk_num), (chunked)))
165
166static inline unsigned int pd_ext_header_chunk_num(u16 ext_header)
167{
168 return (ext_header >> PD_EXT_HDR_CHUNK_NUM_SHIFT) &
169 PD_EXT_HDR_CHUNK_NUM_MASK;
170}
171
172static inline unsigned int pd_ext_header_data_size(u16 ext_header)
173{
174 return (ext_header >> PD_EXT_HDR_DATA_SIZE_SHIFT) &
175 PD_EXT_HDR_DATA_SIZE_MASK;
176}
177
178static inline unsigned int pd_ext_header_data_size_le(__le16 ext_header)
179{
180 return pd_ext_header_data_size(le16_to_cpu(ext_header));
181}
182
183#define PD_MAX_PAYLOAD 7
184#define PD_EXT_MAX_CHUNK_DATA 26
185
186
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189
190
191
192struct pd_chunked_ext_message_data {
193 __le16 header;
194 u8 data[PD_EXT_MAX_CHUNK_DATA];
195} __packed;
196
197
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200
201
202
203struct pd_message {
204 __le16 header;
205 union {
206 __le32 payload[PD_MAX_PAYLOAD];
207 struct pd_chunked_ext_message_data ext_msg;
208 };
209} __packed;
210
211
212#define PDO_MAX_OBJECTS 7
213
214enum pd_pdo_type {
215 PDO_TYPE_FIXED = 0,
216 PDO_TYPE_BATT = 1,
217 PDO_TYPE_VAR = 2,
218 PDO_TYPE_APDO = 3,
219};
220
221#define PDO_TYPE_SHIFT 30
222#define PDO_TYPE_MASK 0x3
223
224#define PDO_TYPE(t) ((t) << PDO_TYPE_SHIFT)
225
226#define PDO_VOLT_MASK 0x3ff
227#define PDO_CURR_MASK 0x3ff
228#define PDO_PWR_MASK 0x3ff
229
230#define PDO_FIXED_DUAL_ROLE BIT(29)
231#define PDO_FIXED_SUSPEND BIT(28)
232#define PDO_FIXED_HIGHER_CAP BIT(28)
233#define PDO_FIXED_EXTPOWER BIT(27)
234#define PDO_FIXED_USB_COMM BIT(26)
235#define PDO_FIXED_DATA_SWAP BIT(25)
236#define PDO_FIXED_VOLT_SHIFT 10
237#define PDO_FIXED_CURR_SHIFT 0
238
239#define PDO_FIXED_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_FIXED_VOLT_SHIFT)
240#define PDO_FIXED_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_FIXED_CURR_SHIFT)
241
242#define PDO_FIXED(mv, ma, flags) \
243 (PDO_TYPE(PDO_TYPE_FIXED) | (flags) | \
244 PDO_FIXED_VOLT(mv) | PDO_FIXED_CURR(ma))
245
246#define VSAFE5V 5000
247
248#define PDO_BATT_MAX_VOLT_SHIFT 20
249#define PDO_BATT_MIN_VOLT_SHIFT 10
250#define PDO_BATT_MAX_PWR_SHIFT 0
251
252#define PDO_BATT_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MIN_VOLT_SHIFT)
253#define PDO_BATT_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_BATT_MAX_VOLT_SHIFT)
254#define PDO_BATT_MAX_POWER(mw) ((((mw) / 250) & PDO_PWR_MASK) << PDO_BATT_MAX_PWR_SHIFT)
255
256#define PDO_BATT(min_mv, max_mv, max_mw) \
257 (PDO_TYPE(PDO_TYPE_BATT) | PDO_BATT_MIN_VOLT(min_mv) | \
258 PDO_BATT_MAX_VOLT(max_mv) | PDO_BATT_MAX_POWER(max_mw))
259
260#define PDO_VAR_MAX_VOLT_SHIFT 20
261#define PDO_VAR_MIN_VOLT_SHIFT 10
262#define PDO_VAR_MAX_CURR_SHIFT 0
263
264#define PDO_VAR_MIN_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MIN_VOLT_SHIFT)
265#define PDO_VAR_MAX_VOLT(mv) ((((mv) / 50) & PDO_VOLT_MASK) << PDO_VAR_MAX_VOLT_SHIFT)
266#define PDO_VAR_MAX_CURR(ma) ((((ma) / 10) & PDO_CURR_MASK) << PDO_VAR_MAX_CURR_SHIFT)
267
268#define PDO_VAR(min_mv, max_mv, max_ma) \
269 (PDO_TYPE(PDO_TYPE_VAR) | PDO_VAR_MIN_VOLT(min_mv) | \
270 PDO_VAR_MAX_VOLT(max_mv) | PDO_VAR_MAX_CURR(max_ma))
271
272enum pd_apdo_type {
273 APDO_TYPE_PPS = 0,
274};
275
276#define PDO_APDO_TYPE_SHIFT 28
277#define PDO_APDO_TYPE_MASK 0x3
278
279#define PDO_APDO_TYPE(t) ((t) << PDO_APDO_TYPE_SHIFT)
280
281#define PDO_PPS_APDO_MAX_VOLT_SHIFT 17
282#define PDO_PPS_APDO_MIN_VOLT_SHIFT 8
283#define PDO_PPS_APDO_MAX_CURR_SHIFT 0
284
285#define PDO_PPS_APDO_VOLT_MASK 0xff
286#define PDO_PPS_APDO_CURR_MASK 0x7f
287
288#define PDO_PPS_APDO_MIN_VOLT(mv) \
289 ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MIN_VOLT_SHIFT)
290#define PDO_PPS_APDO_MAX_VOLT(mv) \
291 ((((mv) / 100) & PDO_PPS_APDO_VOLT_MASK) << PDO_PPS_APDO_MAX_VOLT_SHIFT)
292#define PDO_PPS_APDO_MAX_CURR(ma) \
293 ((((ma) / 50) & PDO_PPS_APDO_CURR_MASK) << PDO_PPS_APDO_MAX_CURR_SHIFT)
294
295#define PDO_PPS_APDO(min_mv, max_mv, max_ma) \
296 (PDO_TYPE(PDO_TYPE_APDO) | PDO_APDO_TYPE(APDO_TYPE_PPS) | \
297 PDO_PPS_APDO_MIN_VOLT(min_mv) | PDO_PPS_APDO_MAX_VOLT(max_mv) | \
298 PDO_PPS_APDO_MAX_CURR(max_ma))
299
300static inline enum pd_pdo_type pdo_type(u32 pdo)
301{
302 return (pdo >> PDO_TYPE_SHIFT) & PDO_TYPE_MASK;
303}
304
305static inline unsigned int pdo_fixed_voltage(u32 pdo)
306{
307 return ((pdo >> PDO_FIXED_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
308}
309
310static inline unsigned int pdo_min_voltage(u32 pdo)
311{
312 return ((pdo >> PDO_VAR_MIN_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
313}
314
315static inline unsigned int pdo_max_voltage(u32 pdo)
316{
317 return ((pdo >> PDO_VAR_MAX_VOLT_SHIFT) & PDO_VOLT_MASK) * 50;
318}
319
320static inline unsigned int pdo_max_current(u32 pdo)
321{
322 return ((pdo >> PDO_VAR_MAX_CURR_SHIFT) & PDO_CURR_MASK) * 10;
323}
324
325static inline unsigned int pdo_max_power(u32 pdo)
326{
327 return ((pdo >> PDO_BATT_MAX_PWR_SHIFT) & PDO_PWR_MASK) * 250;
328}
329
330static inline enum pd_apdo_type pdo_apdo_type(u32 pdo)
331{
332 return (pdo >> PDO_APDO_TYPE_SHIFT) & PDO_APDO_TYPE_MASK;
333}
334
335static inline unsigned int pdo_pps_apdo_min_voltage(u32 pdo)
336{
337 return ((pdo >> PDO_PPS_APDO_MIN_VOLT_SHIFT) &
338 PDO_PPS_APDO_VOLT_MASK) * 100;
339}
340
341static inline unsigned int pdo_pps_apdo_max_voltage(u32 pdo)
342{
343 return ((pdo >> PDO_PPS_APDO_MAX_VOLT_SHIFT) &
344 PDO_PPS_APDO_VOLT_MASK) * 100;
345}
346
347static inline unsigned int pdo_pps_apdo_max_current(u32 pdo)
348{
349 return ((pdo >> PDO_PPS_APDO_MAX_CURR_SHIFT) &
350 PDO_PPS_APDO_CURR_MASK) * 50;
351}
352
353
354#define RDO_OBJ_POS_SHIFT 28
355#define RDO_OBJ_POS_MASK 0x7
356#define RDO_GIVE_BACK BIT(27)
357#define RDO_CAP_MISMATCH BIT(26)
358#define RDO_USB_COMM BIT(25)
359#define RDO_NO_SUSPEND BIT(24)
360
361#define RDO_PWR_MASK 0x3ff
362#define RDO_CURR_MASK 0x3ff
363
364#define RDO_FIXED_OP_CURR_SHIFT 10
365#define RDO_FIXED_MAX_CURR_SHIFT 0
366
367#define RDO_OBJ(idx) (((idx) & RDO_OBJ_POS_MASK) << RDO_OBJ_POS_SHIFT)
368
369#define PDO_FIXED_OP_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_OP_CURR_SHIFT)
370#define PDO_FIXED_MAX_CURR(ma) ((((ma) / 10) & RDO_CURR_MASK) << RDO_FIXED_MAX_CURR_SHIFT)
371
372#define RDO_FIXED(idx, op_ma, max_ma, flags) \
373 (RDO_OBJ(idx) | (flags) | \
374 PDO_FIXED_OP_CURR(op_ma) | PDO_FIXED_MAX_CURR(max_ma))
375
376#define RDO_BATT_OP_PWR_SHIFT 10
377#define RDO_BATT_MAX_PWR_SHIFT 0
378
379#define RDO_BATT_OP_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_OP_PWR_SHIFT)
380#define RDO_BATT_MAX_PWR(mw) ((((mw) / 250) & RDO_PWR_MASK) << RDO_BATT_MAX_PWR_SHIFT)
381
382#define RDO_BATT(idx, op_mw, max_mw, flags) \
383 (RDO_OBJ(idx) | (flags) | \
384 RDO_BATT_OP_PWR(op_mw) | RDO_BATT_MAX_PWR(max_mw))
385
386#define RDO_PROG_VOLT_MASK 0x7ff
387#define RDO_PROG_CURR_MASK 0x7f
388
389#define RDO_PROG_VOLT_SHIFT 9
390#define RDO_PROG_CURR_SHIFT 0
391
392#define RDO_PROG_VOLT_MV_STEP 20
393#define RDO_PROG_CURR_MA_STEP 50
394
395#define PDO_PROG_OUT_VOLT(mv) \
396 ((((mv) / RDO_PROG_VOLT_MV_STEP) & RDO_PROG_VOLT_MASK) << RDO_PROG_VOLT_SHIFT)
397#define PDO_PROG_OP_CURR(ma) \
398 ((((ma) / RDO_PROG_CURR_MA_STEP) & RDO_PROG_CURR_MASK) << RDO_PROG_CURR_SHIFT)
399
400#define RDO_PROG(idx, out_mv, op_ma, flags) \
401 (RDO_OBJ(idx) | (flags) | \
402 PDO_PROG_OUT_VOLT(out_mv) | PDO_PROG_OP_CURR(op_ma))
403
404static inline unsigned int rdo_index(u32 rdo)
405{
406 return (rdo >> RDO_OBJ_POS_SHIFT) & RDO_OBJ_POS_MASK;
407}
408
409static inline unsigned int rdo_op_current(u32 rdo)
410{
411 return ((rdo >> RDO_FIXED_OP_CURR_SHIFT) & RDO_CURR_MASK) * 10;
412}
413
414static inline unsigned int rdo_max_current(u32 rdo)
415{
416 return ((rdo >> RDO_FIXED_MAX_CURR_SHIFT) &
417 RDO_CURR_MASK) * 10;
418}
419
420static inline unsigned int rdo_op_power(u32 rdo)
421{
422 return ((rdo >> RDO_BATT_OP_PWR_SHIFT) & RDO_PWR_MASK) * 250;
423}
424
425static inline unsigned int rdo_max_power(u32 rdo)
426{
427 return ((rdo >> RDO_BATT_MAX_PWR_SHIFT) & RDO_PWR_MASK) * 250;
428}
429
430
431#define PD_T_NO_RESPONSE 5000
432#define PD_T_DB_DETECT 10000
433#define PD_T_SEND_SOURCE_CAP 150
434#define PD_T_SENDER_RESPONSE 60
435#define PD_T_SOURCE_ACTIVITY 45
436#define PD_T_SINK_ACTIVITY 135
437#define PD_T_SINK_WAIT_CAP 240
438#define PD_T_PS_TRANSITION 500
439#define PD_T_SRC_TRANSITION 35
440#define PD_T_DRP_SNK 40
441#define PD_T_DRP_SRC 30
442#define PD_T_PS_SOURCE_OFF 920
443#define PD_T_PS_SOURCE_ON 480
444#define PD_T_PS_HARD_RESET 30
445#define PD_T_SRC_RECOVER 760
446#define PD_T_SRC_RECOVER_MAX 1000
447#define PD_T_SRC_TURN_ON 275
448#define PD_T_SAFE_0V 650
449#define PD_T_VCONN_SOURCE_ON 100
450#define PD_T_SINK_REQUEST 100
451#define PD_T_ERROR_RECOVERY 100
452#define PD_T_SRCSWAPSTDBY 625
453#define PD_T_NEWSRC 250
454
455#define PD_T_DRP_TRY 100
456#define PD_T_DRP_TRYWAIT 600
457
458#define PD_T_CC_DEBOUNCE 200
459#define PD_T_PD_DEBOUNCE 20
460
461#define PD_N_CAPS_COUNT (PD_T_NO_RESPONSE / PD_T_SEND_SOURCE_CAP)
462#define PD_N_HARD_RESET_COUNT 2
463
464#endif
465