LXR linux/sound/pci/hda/hda

   1/*
   2 *  Common functionality for the alsa driver code base for HD Audio.
   3 *
   4 *  This program is free software; you can redistribute it and/or modify it
   5 *  under the terms of the GNU General Public License as published by the Free
   6 *  Software Foundation; either version 2 of the License, or (at your option)
   7 *  any later version.
   8 *
   9 *  This program is distributed in the hope that it will be useful, but WITHOUT
  10 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 *  more details.
  13 */
  14
  15#ifndef __SOUND_HDA_CONTROLLER_H
  16#define __SOUND_HDA_CONTROLLER_H
  17
  18#include <linux/timecounter.h>
  19#include <linux/interrupt.h>
  20#include <sound/core.h>
  21#include <sound/pcm.h>
  22#include <sound/initval.h>
  23#include <sound/hda_codec.h>
  24#include <sound/hda_register.h>
  25
  26#define AZX_MAX_CODECS          HDA_MAX_CODECS
  27#define AZX_DEFAULT_CODECS      4
  28
  29/* driver quirks (capabilities) */
  30/* bits 0-7 are used for indicating driver type */
  31#define AZX_DCAPS_NO_TCSEL      (1 << 8)        /* No Intel TCSEL bit */
  32#define AZX_DCAPS_NO_MSI        (1 << 9)        /* No MSI support */
  33#define AZX_DCAPS_SNOOP_MASK    (3 << 10)       /* snoop type mask */
  34#define AZX_DCAPS_SNOOP_OFF     (1 << 12)       /* snoop default off */
  35#ifdef CONFIG_SND_HDA_I915
  36#define AZX_DCAPS_I915_COMPONENT (1 << 13)      /* bind with i915 gfx */
  37#else
  38#define AZX_DCAPS_I915_COMPONENT 0              /* NOP */
  39#endif
  40/* 14 unused */
  41#define AZX_DCAPS_CTX_WORKAROUND (1 << 15)      /* X-Fi workaround */
  42#define AZX_DCAPS_POSFIX_LPIB   (1 << 16)       /* Use LPIB as default */
  43/* 17 unused */
  44#define AZX_DCAPS_NO_64BIT      (1 << 18)       /* No 64bit address */
  45#define AZX_DCAPS_SYNC_WRITE    (1 << 19)       /* sync each cmd write */
  46#define AZX_DCAPS_OLD_SSYNC     (1 << 20)       /* Old SSYNC reg for ICH */
  47#define AZX_DCAPS_NO_ALIGN_BUFSIZE (1 << 21)    /* no buffer size alignment */
  48/* 22 unused */
  49#define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23)    /* BDLE in 4k boundary */
  50/* 24 unused */
  51#define AZX_DCAPS_COUNT_LPIB_DELAY  (1 << 25)   /* Take LPIB as delay */
  52#define AZX_DCAPS_PM_RUNTIME    (1 << 26)       /* runtime PM support */
  53#ifdef CONFIG_SND_HDA_I915
  54#define AZX_DCAPS_I915_POWERWELL (1 << 27)      /* HSW i915 powerwell support */
  55#else
  56#define AZX_DCAPS_I915_POWERWELL 0              /* NOP */
  57#endif
  58#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28)   /* CORBRP clears itself after reset */
  59#define AZX_DCAPS_NO_MSI64      (1 << 29)       /* Stick to 32-bit MSIs */
  60#define AZX_DCAPS_SEPARATE_STREAM_TAG   (1 << 30) /* capture and playback use separate stream tag */
  61
  62enum {
  63        AZX_SNOOP_TYPE_NONE,
  64        AZX_SNOOP_TYPE_SCH,
  65        AZX_SNOOP_TYPE_ATI,
  66        AZX_SNOOP_TYPE_NVIDIA,
  67};
  68
  69struct azx_dev {
  70        struct hdac_stream core;
  71
  72        unsigned int irq_pending:1;
  73        /*
  74         * For VIA:
  75         *  A flag to ensure DMA position is 0
  76         *  when link position is not greater than FIFO size
  77         */
  78        unsigned int insufficient:1;
  79};
  80
  81#define azx_stream(dev)         (&(dev)->core)
  82#define stream_to_azx_dev(s)    container_of(s, struct azx_dev, core)
  83
  84struct azx;
  85
  86/* Functions to read/write to hda registers. */
  87struct hda_controller_ops {
  88        /* Disable msi if supported, PCI only */
  89        int (*disable_msi_reset_irq)(struct azx *);
  90        void (*pcm_mmap_prepare)(struct snd_pcm_substream *substream,
  91                                 struct vm_area_struct *area);
  92        /* Check if current position is acceptable */
  93        int (*position_check)(struct azx *chip, struct azx_dev *azx_dev);
  94        /* enable/disable the link power */
  95        int (*link_power)(struct azx *chip, bool enable);
  96};
  97
  98struct azx_pcm {
  99        struct azx *chip;
 100        struct snd_pcm *pcm;
 101        struct hda_codec *codec;
 102        struct hda_pcm *info;
 103        struct list_head list;
 104};
 105
 106typedef unsigned int (*azx_get_pos_callback_t)(struct azx *, struct azx_dev *);
 107typedef int (*azx_get_delay_callback_t)(struct azx *, struct azx_dev *, unsigned int pos);
 108
 109struct azx {
 110        struct hda_bus bus;
 111
 112        struct snd_card *card;
 113        struct pci_dev *pci;
 114        int dev_index;
 115
 116        /* chip type specific */
 117        int driver_type;
 118        unsigned int driver_caps;
 119        int playback_streams;
 120        int playback_index_offset;
 121        int capture_streams;
 122        int capture_index_offset;
 123        int num_streams;
 124        int jackpoll_interval; /* jack poll interval in jiffies */
 125
 126        /* Register interaction. */
 127        const struct hda_controller_ops *ops;
 128
 129        /* position adjustment callbacks */
 130        azx_get_pos_callback_t get_position[2];
 131        azx_get_delay_callback_t get_delay[2];
 132
 133        /* locks */
 134        struct mutex open_mutex; /* Prevents concurrent open/close operations */
 135
 136        /* PCM */
 137        struct list_head pcm_list; /* azx_pcm list */
 138
 139        /* HD codec */
 140        int  codec_probe_mask; /* copied from probe_mask option */
 141        unsigned int beep_mode;
 142
 143#ifdef CONFIG_SND_HDA_PATCH_LOADER
 144        const struct firmware *fw;
 145#endif
 146
 147        /* flags */
 148        int bdl_pos_adj;
 149        int poll_count;
 150        unsigned int running:1;
 151        unsigned int fallback_to_single_cmd:1;
 152        unsigned int single_cmd:1;
 153        unsigned int polling_mode:1;
 154        unsigned int msi:1;
 155        unsigned int probing:1; /* codec probing phase */
 156        unsigned int snoop:1;
 157        unsigned int uc_buffer:1; /* non-cached pages for stream buffers */
 158        unsigned int align_buffer_size:1;
 159        unsigned int region_requested:1;
 160        unsigned int disabled:1; /* disabled by vga_switcheroo */
 161
 162        /* GTS present */
 163        unsigned int gts_present:1;
 164
 165#ifdef CONFIG_SND_HDA_DSP_LOADER
 166        struct azx_dev saved_azx_dev;
 167#endif
 168};
 169
 170#define azx_bus(chip)   (&(chip)->bus.core)
 171#define bus_to_azx(_bus)        container_of(_bus, struct azx, bus.core)
 172
 173static inline bool azx_snoop(struct azx *chip)
 174{
 175        return !IS_ENABLED(CONFIG_X86) || chip->snoop;
 176}
 177
 178/*
 179 * macros for easy use
 180 */
 181
 182#define azx_writel(chip, reg, value) \
 183        snd_hdac_chip_writel(azx_bus(chip), reg, value)
 184#define azx_readl(chip, reg) \
 185        snd_hdac_chip_readl(azx_bus(chip), reg)
 186#define azx_writew(chip, reg, value) \
 187        snd_hdac_chip_writew(azx_bus(chip), reg, value)
 188#define azx_readw(chip, reg) \
 189        snd_hdac_chip_readw(azx_bus(chip), reg)
 190#define azx_writeb(chip, reg, value) \
 191        snd_hdac_chip_writeb(azx_bus(chip), reg, value)
 192#define azx_readb(chip, reg) \
 193        snd_hdac_chip_readb(azx_bus(chip), reg)
 194
 195#define azx_has_pm_runtime(chip) \
 196        ((chip)->driver_caps & AZX_DCAPS_PM_RUNTIME)
 197
 198/* PCM setup */
 199static inline struct azx_dev *get_azx_dev(struct snd_pcm_substream *substream)
 200{
 201        return substream->runtime->private_data;
 202}
 203unsigned int azx_get_position(struct azx *chip, struct azx_dev *azx_dev);
 204unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev);
 205unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev);
 206
 207/* Stream control. */
 208void azx_stop_all_streams(struct azx *chip);
 209
 210/* Allocation functions. */
 211#define azx_alloc_stream_pages(chip) \
 212        snd_hdac_bus_alloc_stream_pages(azx_bus(chip))
 213#define azx_free_stream_pages(chip) \
 214        snd_hdac_bus_free_stream_pages(azx_bus(chip))
 215
 216/* Low level azx interface */
 217void azx_init_chip(struct azx *chip, bool full_reset);
 218void azx_stop_chip(struct azx *chip);
 219#define azx_enter_link_reset(chip) \
 220        snd_hdac_bus_enter_link_reset(azx_bus(chip))
 221irqreturn_t azx_interrupt(int irq, void *dev_id);
 222
 223/* Codec interface */
 224int azx_bus_init(struct azx *chip, const char *model,
 225                 const struct hdac_io_ops *io_ops);
 226int azx_probe_codecs(struct azx *chip, unsigned int max_slots);
 227int azx_codec_configure(struct azx *chip);
 228int azx_init_streams(struct azx *chip);
 229void azx_free_streams(struct azx *chip);
 230
 231#endif /* __SOUND_HDA_CONTROLLER_H */
 232