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13#include <linux/compiler.h>
14#include <linux/sched.h>
15#include <linux/mm.h>
16#include <linux/dma-mapping.h>
17#ifdef CONFIG_KVM_ARM_HOST
18#include <linux/kvm_host.h>
19#endif
20#include <asm/cacheflush.h>
21#include <asm/glue-df.h>
22#include <asm/glue-pf.h>
23#include <asm/mach/arch.h>
24#include <asm/thread_info.h>
25#include <asm/memory.h>
26#include <asm/procinfo.h>
27#include <asm/suspend.h>
28#include <asm/vdso_datapage.h>
29#include <asm/hardware/cache-l2x0.h>
30#include <linux/kbuild.h>
31
32
33
34
35#if defined(__APCS_26__)
36#error Sorry, your compiler targets APCS-26 but this kernel requires APCS-32
37#endif
38
39
40
41
42
43
44
45
46
47
48#ifdef __GNUC__
49#if (__GNUC__ == 3 && __GNUC_MINOR__ < 3)
50#error Your compiler is too buggy; it is known to miscompile kernels.
51#error Known good compilers: 3.3, 4.x
52#endif
53#if GCC_VERSION >= 40800 && GCC_VERSION < 40803
54#error Your compiler is too buggy; it is known to miscompile kernels
55#error and result in filesystem corruption and oopses.
56#endif
57#endif
58
59int main(void)
60{
61 DEFINE(TSK_ACTIVE_MM, offsetof(struct task_struct, active_mm));
62#ifdef CONFIG_CC_STACKPROTECTOR
63 DEFINE(TSK_STACK_CANARY, offsetof(struct task_struct, stack_canary));
64#endif
65 BLANK();
66 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
67 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
68 DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
69 DEFINE(TI_TASK, offsetof(struct thread_info, task));
70 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
71 DEFINE(TI_CPU_DOMAIN, offsetof(struct thread_info, cpu_domain));
72 DEFINE(TI_CPU_SAVE, offsetof(struct thread_info, cpu_context));
73 DEFINE(TI_USED_CP, offsetof(struct thread_info, used_cp));
74 DEFINE(TI_TP_VALUE, offsetof(struct thread_info, tp_value));
75 DEFINE(TI_FPSTATE, offsetof(struct thread_info, fpstate));
76#ifdef CONFIG_VFP
77 DEFINE(TI_VFPSTATE, offsetof(struct thread_info, vfpstate));
78#ifdef CONFIG_SMP
79 DEFINE(VFP_CPU, offsetof(union vfp_state, hard.cpu));
80#endif
81#endif
82#ifdef CONFIG_ARM_THUMBEE
83 DEFINE(TI_THUMBEE_STATE, offsetof(struct thread_info, thumbee_state));
84#endif
85#ifdef CONFIG_IWMMXT
86 DEFINE(TI_IWMMXT_STATE, offsetof(struct thread_info, fpstate.iwmmxt));
87#endif
88#ifdef CONFIG_CRUNCH
89 DEFINE(TI_CRUNCH_STATE, offsetof(struct thread_info, crunchstate));
90#endif
91 BLANK();
92 DEFINE(S_R0, offsetof(struct pt_regs, ARM_r0));
93 DEFINE(S_R1, offsetof(struct pt_regs, ARM_r1));
94 DEFINE(S_R2, offsetof(struct pt_regs, ARM_r2));
95 DEFINE(S_R3, offsetof(struct pt_regs, ARM_r3));
96 DEFINE(S_R4, offsetof(struct pt_regs, ARM_r4));
97 DEFINE(S_R5, offsetof(struct pt_regs, ARM_r5));
98 DEFINE(S_R6, offsetof(struct pt_regs, ARM_r6));
99 DEFINE(S_R7, offsetof(struct pt_regs, ARM_r7));
100 DEFINE(S_R8, offsetof(struct pt_regs, ARM_r8));
101 DEFINE(S_R9, offsetof(struct pt_regs, ARM_r9));
102 DEFINE(S_R10, offsetof(struct pt_regs, ARM_r10));
103 DEFINE(S_FP, offsetof(struct pt_regs, ARM_fp));
104 DEFINE(S_IP, offsetof(struct pt_regs, ARM_ip));
105 DEFINE(S_SP, offsetof(struct pt_regs, ARM_sp));
106 DEFINE(S_LR, offsetof(struct pt_regs, ARM_lr));
107 DEFINE(S_PC, offsetof(struct pt_regs, ARM_pc));
108 DEFINE(S_PSR, offsetof(struct pt_regs, ARM_cpsr));
109 DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0));
110 DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs));
111 BLANK();
112#ifdef CONFIG_CACHE_L2X0
113 DEFINE(L2X0_R_PHY_BASE, offsetof(struct l2x0_regs, phy_base));
114 DEFINE(L2X0_R_AUX_CTRL, offsetof(struct l2x0_regs, aux_ctrl));
115 DEFINE(L2X0_R_TAG_LATENCY, offsetof(struct l2x0_regs, tag_latency));
116 DEFINE(L2X0_R_DATA_LATENCY, offsetof(struct l2x0_regs, data_latency));
117 DEFINE(L2X0_R_FILTER_START, offsetof(struct l2x0_regs, filter_start));
118 DEFINE(L2X0_R_FILTER_END, offsetof(struct l2x0_regs, filter_end));
119 DEFINE(L2X0_R_PREFETCH_CTRL, offsetof(struct l2x0_regs, prefetch_ctrl));
120 DEFINE(L2X0_R_PWR_CTRL, offsetof(struct l2x0_regs, pwr_ctrl));
121 BLANK();
122#endif
123#ifdef CONFIG_CPU_HAS_ASID
124 DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id.counter));
125 BLANK();
126#endif
127 DEFINE(VMA_VM_MM, offsetof(struct vm_area_struct, vm_mm));
128 DEFINE(VMA_VM_FLAGS, offsetof(struct vm_area_struct, vm_flags));
129 BLANK();
130 DEFINE(VM_EXEC, VM_EXEC);
131 BLANK();
132 DEFINE(PAGE_SZ, PAGE_SIZE);
133 BLANK();
134 DEFINE(SYS_ERROR0, 0x9f0000);
135 BLANK();
136 DEFINE(SIZEOF_MACHINE_DESC, sizeof(struct machine_desc));
137 DEFINE(MACHINFO_TYPE, offsetof(struct machine_desc, nr));
138 DEFINE(MACHINFO_NAME, offsetof(struct machine_desc, name));
139 BLANK();
140 DEFINE(PROC_INFO_SZ, sizeof(struct proc_info_list));
141 DEFINE(PROCINFO_INITFUNC, offsetof(struct proc_info_list, __cpu_flush));
142 DEFINE(PROCINFO_MM_MMUFLAGS, offsetof(struct proc_info_list, __cpu_mm_mmu_flags));
143 DEFINE(PROCINFO_IO_MMUFLAGS, offsetof(struct proc_info_list, __cpu_io_mmu_flags));
144 BLANK();
145#ifdef MULTI_DABORT
146 DEFINE(PROCESSOR_DABT_FUNC, offsetof(struct processor, _data_abort));
147#endif
148#ifdef MULTI_PABORT
149 DEFINE(PROCESSOR_PABT_FUNC, offsetof(struct processor, _prefetch_abort));
150#endif
151#ifdef MULTI_CPU
152 DEFINE(CPU_SLEEP_SIZE, offsetof(struct processor, suspend_size));
153 DEFINE(CPU_DO_SUSPEND, offsetof(struct processor, do_suspend));
154 DEFINE(CPU_DO_RESUME, offsetof(struct processor, do_resume));
155#endif
156#ifdef MULTI_CACHE
157 DEFINE(CACHE_FLUSH_KERN_ALL, offsetof(struct cpu_cache_fns, flush_kern_all));
158#endif
159#ifdef CONFIG_ARM_CPU_SUSPEND
160 DEFINE(SLEEP_SAVE_SP_SZ, sizeof(struct sleep_save_sp));
161 DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys));
162 DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash));
163#endif
164 BLANK();
165 DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL);
166 DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE);
167 DEFINE(DMA_FROM_DEVICE, DMA_FROM_DEVICE);
168 BLANK();
169 DEFINE(CACHE_WRITEBACK_ORDER, __CACHE_WRITEBACK_ORDER);
170 DEFINE(CACHE_WRITEBACK_GRANULE, __CACHE_WRITEBACK_GRANULE);
171 BLANK();
172#ifdef CONFIG_KVM_ARM_HOST
173 DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
174 DEFINE(VCPU_MIDR, offsetof(struct kvm_vcpu, arch.midr));
175 DEFINE(VCPU_CP15, offsetof(struct kvm_vcpu, arch.cp15));
176 DEFINE(VCPU_VFP_GUEST, offsetof(struct kvm_vcpu, arch.vfp_guest));
177 DEFINE(VCPU_VFP_HOST, offsetof(struct kvm_vcpu, arch.host_cpu_context));
178 DEFINE(VCPU_REGS, offsetof(struct kvm_vcpu, arch.regs));
179 DEFINE(VCPU_USR_REGS, offsetof(struct kvm_vcpu, arch.regs.usr_regs));
180 DEFINE(VCPU_SVC_REGS, offsetof(struct kvm_vcpu, arch.regs.svc_regs));
181 DEFINE(VCPU_ABT_REGS, offsetof(struct kvm_vcpu, arch.regs.abt_regs));
182 DEFINE(VCPU_UND_REGS, offsetof(struct kvm_vcpu, arch.regs.und_regs));
183 DEFINE(VCPU_IRQ_REGS, offsetof(struct kvm_vcpu, arch.regs.irq_regs));
184 DEFINE(VCPU_FIQ_REGS, offsetof(struct kvm_vcpu, arch.regs.fiq_regs));
185 DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.regs.usr_regs.ARM_pc));
186 DEFINE(VCPU_CPSR, offsetof(struct kvm_vcpu, arch.regs.usr_regs.ARM_cpsr));
187 DEFINE(VCPU_HCR, offsetof(struct kvm_vcpu, arch.hcr));
188 DEFINE(VCPU_IRQ_LINES, offsetof(struct kvm_vcpu, arch.irq_lines));
189 DEFINE(VCPU_HSR, offsetof(struct kvm_vcpu, arch.fault.hsr));
190 DEFINE(VCPU_HxFAR, offsetof(struct kvm_vcpu, arch.fault.hxfar));
191 DEFINE(VCPU_HPFAR, offsetof(struct kvm_vcpu, arch.fault.hpfar));
192 DEFINE(VCPU_HYP_PC, offsetof(struct kvm_vcpu, arch.fault.hyp_pc));
193 DEFINE(VCPU_VGIC_CPU, offsetof(struct kvm_vcpu, arch.vgic_cpu));
194 DEFINE(VGIC_V2_CPU_HCR, offsetof(struct vgic_cpu, vgic_v2.vgic_hcr));
195 DEFINE(VGIC_V2_CPU_VMCR, offsetof(struct vgic_cpu, vgic_v2.vgic_vmcr));
196 DEFINE(VGIC_V2_CPU_MISR, offsetof(struct vgic_cpu, vgic_v2.vgic_misr));
197 DEFINE(VGIC_V2_CPU_EISR, offsetof(struct vgic_cpu, vgic_v2.vgic_eisr));
198 DEFINE(VGIC_V2_CPU_ELRSR, offsetof(struct vgic_cpu, vgic_v2.vgic_elrsr));
199 DEFINE(VGIC_V2_CPU_APR, offsetof(struct vgic_cpu, vgic_v2.vgic_apr));
200 DEFINE(VGIC_V2_CPU_LR, offsetof(struct vgic_cpu, vgic_v2.vgic_lr));
201 DEFINE(VGIC_CPU_NR_LR, offsetof(struct vgic_cpu, nr_lr));
202 DEFINE(VCPU_TIMER_CNTV_CTL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_ctl));
203 DEFINE(VCPU_TIMER_CNTV_CVAL, offsetof(struct kvm_vcpu, arch.timer_cpu.cntv_cval));
204 DEFINE(KVM_TIMER_CNTVOFF, offsetof(struct kvm, arch.timer.cntvoff));
205 DEFINE(KVM_TIMER_ENABLED, offsetof(struct kvm, arch.timer.enabled));
206 DEFINE(KVM_VGIC_VCTRL, offsetof(struct kvm, arch.vgic.vctrl_base));
207 DEFINE(KVM_VTTBR, offsetof(struct kvm, arch.vttbr));
208#endif
209 BLANK();
210#ifdef CONFIG_VDSO
211 DEFINE(VDSO_DATA_SIZE, sizeof(union vdso_data_store));
212#endif
213 return 0;
214}
215
