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13#include <asm/assembler.h>
14
15#define ATAG_CORE 0x54410001
16#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2)
17#define ATAG_CORE_SIZE_EMPTY ((2*4) >> 2)
18
19#ifdef CONFIG_CPU_BIG_ENDIAN
20#define OF_DT_MAGIC 0xd00dfeed
21#else
22#define OF_DT_MAGIC 0xedfe0dd0
23#endif
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34 __HEAD
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46
47__vet_atags:
48 tst r2,
49 bne 1f
50
51 ldr r5, [r2,
52#ifdef CONFIG_OF_FLATTREE
53 ldr r6, =OF_DT_MAGIC @ is it a DTB?
54 cmp r5, r6
55 beq 2f
56#endif
57 cmp r5,
58 cmpne r5,
59 bne 1f
60 ldr r5, [r2,
61 ldr r6, =ATAG_CORE
62 cmp r5, r6
63 bne 1f
64
652: ret lr @ atag/dtb pointer is ok
66
671: mov r2,
68 ret lr
69ENDPROC(__vet_atags)
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79
80 __INIT
81__mmap_switched:
82 adr r3, __mmap_switched_data
83
84 ldmia r3!, {r4, r5, r6, r7}
85 cmp r4, r5 @ Copy data segment if needed
861: cmpne r5, r6
87 ldrne fp, [r4],
88 strne fp, [r5],
89 bne 1b
90
91 mov fp,
921: cmp r6, r7
93 strcc fp, [r6],
94 bcc 1b
95
96 ARM( ldmia r3, {r4, r5, r6, r7, sp})
97 THUMB( ldmia r3, {r4, r5, r6, r7} )
98 THUMB( ldr sp, [r3,
99 str r9, [r4] @ Save processor ID
100 str r1, [r5] @ Save machine type
101 str r2, [r6] @ Save atags pointer
102 cmp r7,
103 strne r0, [r7] @ Save control register values
104 b start_kernel
105ENDPROC(__mmap_switched)
106
107 .align 2
108 .type __mmap_switched_data, %object
109__mmap_switched_data:
110 .long __data_loc @ r4
111 .long _sdata @ r5
112 .long __bss_start @ r6
113 .long _end @ r7
114 .long processor_id @ r4
115 .long __machine_arch_type @ r5
116 .long __atags_pointer @ r6
117#ifdef CONFIG_CPU_CP15
118 .long cr_alignment @ r7
119#else
120 .long 0 @ r7
121#endif
122 .long init_thread_union + THREAD_START_SP @ sp
123 .size __mmap_switched_data, . - __mmap_switched_data
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125
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127
128ENTRY(lookup_processor_type)
129 stmfd sp!, {r4 - r6, r9, lr}
130 mov r9, r0
131 bl __lookup_processor_type
132 mov r0, r5
133 ldmfd sp!, {r4 - r6, r9, pc}
134ENDPROC(lookup_processor_type)
135
136 __FINIT
137 .text
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152__lookup_processor_type:
153 adr r3, __lookup_processor_type_data
154 ldmia r3, {r4 - r6}
155 sub r3, r3, r4 @ get offset between virt&phys
156 add r5, r5, r3 @ convert virt addresses to
157 add r6, r6, r3 @ physical address space
1581: ldmia r5, {r3, r4} @ value, mask
159 and r4, r4, r9 @ mask wanted bits
160 teq r3, r4
161 beq 2f
162 add r5, r5,
163 cmp r5, r6
164 blo 1b
165 mov r5,
1662: ret lr
167ENDPROC(__lookup_processor_type)
168
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171
172 .align 2
173 .type __lookup_processor_type_data, %object
174__lookup_processor_type_data:
175 .long .
176 .long __proc_info_begin
177 .long __proc_info_end
178 .size __lookup_processor_type_data, . - __lookup_processor_type_data
179
180__error_lpae:
181#ifdef CONFIG_DEBUG_LL
182 adr r0, str_lpae
183 bl printascii
184 b __error
185str_lpae: .asciz "\nError: Kernel with LPAE support, but CPU does not support LPAE.\n"
186#else
187 b __error
188#endif
189 .align
190ENDPROC(__error_lpae)
191
192__error_p:
193#ifdef CONFIG_DEBUG_LL
194 adr r0, str_p1
195 bl printascii
196 mov r0, r9
197 bl printhex8
198 adr r0, str_p2
199 bl printascii
200 b __error
201str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x"
202str_p2: .asciz ").\n"
203 .align
204#endif
205ENDPROC(__error_p)
206
207__error:
208#ifdef CONFIG_ARCH_RPC
209
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211
212 mov r0,
213 mov r3,
214 orr r3, r3, r3, lsl
215 orr r3, r3, r3, lsl
216 str r3, [r0],
217 str r3, [r0],
218 str r3, [r0],
219 str r3, [r0],
220#endif
2211: mov r0, r0
222 b 1b
223ENDPROC(__error)
224