LXR linux/arch/arm/mach-netx/time.c

   1/*
   2 * arch/arm/mach-netx/time.c
   3 *
   4 * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
   5 *
   6 * This program is free software; you can redistribute it and/or modify
   7 * it under the terms of the GNU General Public License version 2
   8 * as published by the Free Software Foundation.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 *
  15 * You should have received a copy of the GNU General Public License
  16 * along with this program; if not, write to the Free Software
  17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  18 */
  19
  20#include <linux/init.h>
  21#include <linux/interrupt.h>
  22#include <linux/irq.h>
  23#include <linux/clocksource.h>
  24#include <linux/clockchips.h>
  25#include <linux/io.h>
  26
  27#include <mach/hardware.h>
  28#include <asm/mach/time.h>
  29#include <mach/netx-regs.h>
  30
  31#define NETX_CLOCK_FREQ 100000000
  32#define NETX_LATCH DIV_ROUND_CLOSEST(NETX_CLOCK_FREQ, HZ)
  33
  34#define TIMER_CLOCKEVENT 0
  35#define TIMER_CLOCKSOURCE 1
  36
  37static inline void timer_shutdown(struct clock_event_device *evt)
  38{
  39        /* disable timer */
  40        writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
  41}
  42
  43static int netx_shutdown(struct clock_event_device *evt)
  44{
  45        timer_shutdown(evt);
  46
  47        return 0;
  48}
  49
  50static int netx_set_oneshot(struct clock_event_device *evt)
  51{
  52        u32 tmode = NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN;
  53
  54        timer_shutdown(evt);
  55        writel(0, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
  56        writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
  57
  58        return 0;
  59}
  60
  61static int netx_set_periodic(struct clock_event_device *evt)
  62{
  63        u32 tmode = NETX_GPIO_COUNTER_CTRL_RST_EN |
  64                    NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN;
  65
  66        timer_shutdown(evt);
  67        writel(NETX_LATCH, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKEVENT));
  68        writel(tmode, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKEVENT));
  69
  70        return 0;
  71}
  72
  73static int netx_set_next_event(unsigned long evt,
  74                struct clock_event_device *clk)
  75{
  76        writel(0 - evt, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKEVENT));
  77        return 0;
  78}
  79
  80static struct clock_event_device netx_clockevent = {
  81        .name = "netx-timer" __stringify(TIMER_CLOCKEVENT),
  82        .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
  83        .set_next_event = netx_set_next_event,
  84        .set_state_shutdown = netx_shutdown,
  85        .set_state_periodic = netx_set_periodic,
  86        .set_state_oneshot = netx_set_oneshot,
  87        .tick_resume = netx_shutdown,
  88};
  89
  90/*
  91 * IRQ handler for the timer
  92 */
  93static irqreturn_t
  94netx_timer_interrupt(int irq, void *dev_id)
  95{
  96        struct clock_event_device *evt = &netx_clockevent;
  97
  98        /* acknowledge interrupt */
  99        writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
 100
 101        evt->event_handler(evt);
 102
 103        return IRQ_HANDLED;
 104}
 105
 106static struct irqaction netx_timer_irq = {
 107        .name           = "NetX Timer Tick",
 108        .flags          = IRQF_TIMER | IRQF_IRQPOLL,
 109        .handler        = netx_timer_interrupt,
 110};
 111
 112/*
 113 * Set up timer interrupt
 114 */
 115void __init netx_timer_init(void)
 116{
 117        /* disable timer initially */
 118        writel(0, NETX_GPIO_COUNTER_CTRL(0));
 119
 120        /* Reset the timer value to zero */
 121        writel(0, NETX_GPIO_COUNTER_CURRENT(0));
 122
 123        writel(NETX_LATCH, NETX_GPIO_COUNTER_MAX(0));
 124
 125        /* acknowledge interrupt */
 126        writel(COUNTER_BIT(0), NETX_GPIO_IRQ);
 127
 128        /* Enable the interrupt in the specific timer
 129         * register and start timer
 130         */
 131        writel(COUNTER_BIT(0), NETX_GPIO_IRQ_ENABLE);
 132        writel(NETX_GPIO_COUNTER_CTRL_IRQ_EN | NETX_GPIO_COUNTER_CTRL_RUN,
 133                        NETX_GPIO_COUNTER_CTRL(0));
 134
 135        setup_irq(NETX_IRQ_TIMER0, &netx_timer_irq);
 136
 137        /* Setup timer one for clocksource */
 138        writel(0, NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE));
 139        writel(0, NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE));
 140        writel(0xffffffff, NETX_GPIO_COUNTER_MAX(TIMER_CLOCKSOURCE));
 141
 142        writel(NETX_GPIO_COUNTER_CTRL_RUN,
 143                        NETX_GPIO_COUNTER_CTRL(TIMER_CLOCKSOURCE));
 144
 145        clocksource_mmio_init(NETX_GPIO_COUNTER_CURRENT(TIMER_CLOCKSOURCE),
 146                "netx_timer", NETX_CLOCK_FREQ, 200, 32, clocksource_mmio_readl_up);
 147
 148        /* with max_delta_ns >= delta2ns(0x800) the system currently runs fine.
 149         * Adding some safety ... */
 150        netx_clockevent.cpumask = cpumask_of(0);
 151        clockevents_config_and_register(&netx_clockevent, NETX_CLOCK_FREQ,
 152                                        0xa00, 0xfffffffe);
 153}
 154