LXR linux/arch/arm/mach-omap2/common.h

   1/*
   2 * Header for code common to all OMAP2+ machines.
   3 *
   4 * This program is free software; you can redistribute it and/or modify it
   5 * under the terms of the GNU General Public License as published by the
   6 * Free Software Foundation; either version 2 of the License, or (at your
   7 * option) any later version.
   8 *
   9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  19 *
  20 * You should have received a copy of the  GNU General Public License along
  21 * with this program; if not, write  to the Free Software Foundation, Inc.,
  22 * 675 Mass Ave, Cambridge, MA 02139, USA.
  23 */
  24
  25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
  26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
  27#ifndef __ASSEMBLER__
  28
  29#include <linux/irq.h>
  30#include <linux/delay.h>
  31#include <linux/i2c.h>
  32#include <linux/i2c/twl.h>
  33#include <linux/i2c-omap.h>
  34#include <linux/reboot.h>
  35#include <linux/irqchip/irq-omap-intc.h>
  36
  37#include <asm/proc-fns.h>
  38#include <asm/hardware/cache-l2x0.h>
  39
  40#include "i2c.h"
  41#include "serial.h"
  42
  43#include "usb.h"
  44
  45#define OMAP_INTC_START         NR_IRQS
  46
  47#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
  48int omap2_pm_init(void);
  49#else
  50static inline int omap2_pm_init(void)
  51{
  52        return 0;
  53}
  54#endif
  55
  56#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
  57int omap3_pm_init(void);
  58#else
  59static inline int omap3_pm_init(void)
  60{
  61        return 0;
  62}
  63#endif
  64
  65#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
  66int omap4_pm_init(void);
  67int omap4_pm_init_early(void);
  68#else
  69static inline int omap4_pm_init(void)
  70{
  71        return 0;
  72}
  73
  74static inline int omap4_pm_init_early(void)
  75{
  76        return 0;
  77}
  78#endif
  79
  80#ifdef CONFIG_OMAP_MUX
  81int omap_mux_late_init(void);
  82#else
  83static inline int omap_mux_late_init(void)
  84{
  85        return 0;
  86}
  87#endif
  88
  89extern void omap2_init_common_infrastructure(void);
  90
  91extern void omap2_sync32k_timer_init(void);
  92extern void omap3_sync32k_timer_init(void);
  93extern void omap3_secure_sync32k_timer_init(void);
  94extern void omap3_gptimer_timer_init(void);
  95extern void omap4_local_timer_init(void);
  96#ifdef CONFIG_CACHE_L2X0
  97int omap_l2_cache_init(void);
  98#define OMAP_L2C_AUX_CTRL       (L2C_AUX_CTRL_SHARED_OVERRIDE | \
  99                                 L310_AUX_CTRL_DATA_PREFETCH | \
 100                                 L310_AUX_CTRL_INSTR_PREFETCH)
 101void omap4_l2c310_write_sec(unsigned long val, unsigned reg);
 102#else
 103static inline int omap_l2_cache_init(void)
 104{
 105        return 0;
 106}
 107
 108#define OMAP_L2C_AUX_CTRL       0
 109#define omap4_l2c310_write_sec  NULL
 110#endif
 111extern void omap5_realtime_timer_init(void);
 112
 113void omap2420_init_early(void);
 114void omap2430_init_early(void);
 115void omap3430_init_early(void);
 116void omap35xx_init_early(void);
 117void omap3630_init_early(void);
 118void omap3_init_early(void);    /* Do not use this one */
 119void am33xx_init_early(void);
 120void am35xx_init_early(void);
 121void ti814x_init_early(void);
 122void ti816x_init_early(void);
 123void am33xx_init_early(void);
 124void am43xx_init_early(void);
 125void am43xx_init_late(void);
 126void omap4430_init_early(void);
 127void omap5_init_early(void);
 128void omap3_init_late(void);     /* Do not use this one */
 129void omap4430_init_late(void);
 130void omap2420_init_late(void);
 131void omap2430_init_late(void);
 132void omap3430_init_late(void);
 133void omap35xx_init_late(void);
 134void omap3630_init_late(void);
 135void am35xx_init_late(void);
 136void ti81xx_init_late(void);
 137void am33xx_init_late(void);
 138void omap5_init_late(void);
 139int omap2_common_pm_late_init(void);
 140void dra7xx_init_early(void);
 141void dra7xx_init_late(void);
 142
 143#ifdef CONFIG_SOC_BUS
 144void omap_soc_device_init(void);
 145#else
 146static inline void omap_soc_device_init(void)
 147{
 148}
 149#endif
 150
 151#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
 152void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
 153#else
 154static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
 155{
 156}
 157#endif
 158
 159#ifdef CONFIG_SOC_AM33XX
 160void am33xx_restart(enum reboot_mode mode, const char *cmd);
 161#else
 162static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
 163{
 164}
 165#endif
 166
 167#ifdef CONFIG_ARCH_OMAP3
 168void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
 169#else
 170static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
 171{
 172}
 173#endif
 174
 175#ifdef CONFIG_SOC_TI81XX
 176void ti81xx_restart(enum reboot_mode mode, const char *cmd);
 177#else
 178static inline void ti81xx_restart(enum reboot_mode mode, const char *cmd)
 179{
 180}
 181#endif
 182
 183#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
 184        defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
 185void omap44xx_restart(enum reboot_mode mode, const char *cmd);
 186#else
 187static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
 188{
 189}
 190#endif
 191
 192#ifdef CONFIG_OMAP_INTERCONNECT_BARRIER
 193void omap_barrier_reserve_memblock(void);
 194void omap_barriers_init(void);
 195#else
 196static inline void omap_barrier_reserve_memblock(void)
 197{
 198}
 199#endif
 200
 201/* This gets called from mach-omap2/io.c, do not call this */
 202void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
 203
 204void __init omap242x_map_io(void);
 205void __init omap243x_map_io(void);
 206void __init omap3_map_io(void);
 207void __init am33xx_map_io(void);
 208void __init omap4_map_io(void);
 209void __init omap5_map_io(void);
 210void __init dra7xx_map_io(void);
 211void __init ti81xx_map_io(void);
 212
 213/**
 214 * omap_test_timeout - busy-loop, testing a condition
 215 * @cond: condition to test until it evaluates to true
 216 * @timeout: maximum number of microseconds in the timeout
 217 * @index: loop index (integer)
 218 *
 219 * Loop waiting for @cond to become true or until at least @timeout
 220 * microseconds have passed.  To use, define some integer @index in the
 221 * calling code.  After running, if @index == @timeout, then the loop has
 222 * timed out.
 223 */
 224#define omap_test_timeout(cond, timeout, index)                 \
 225({                                                              \
 226        for (index = 0; index < timeout; index++) {             \
 227                if (cond)                                       \
 228                        break;                                  \
 229                udelay(1);                                      \
 230        }                                                       \
 231})
 232
 233extern struct device *omap2_get_mpuss_device(void);
 234extern struct device *omap2_get_iva_device(void);
 235extern struct device *omap2_get_l3_device(void);
 236extern struct device *omap4_get_dsp_device(void);
 237
 238unsigned int omap4_xlate_irq(unsigned int hwirq);
 239void omap_gic_of_init(void);
 240
 241#ifdef CONFIG_CACHE_L2X0
 242extern void __iomem *omap4_get_l2cache_base(void);
 243#endif
 244
 245struct device_node;
 246
 247#ifdef CONFIG_SMP
 248extern void __iomem *omap4_get_scu_base(void);
 249#else
 250static inline void __iomem *omap4_get_scu_base(void)
 251{
 252        return NULL;
 253}
 254#endif
 255
 256extern void gic_dist_disable(void);
 257extern void gic_dist_enable(void);
 258extern bool gic_dist_disabled(void);
 259extern void gic_timer_retrigger(void);
 260extern void omap_smc1(u32 fn, u32 arg);
 261extern void __iomem *omap4_get_sar_ram_base(void);
 262extern void omap_do_wfi(void);
 263
 264#ifdef CONFIG_SMP
 265/* Needed for secondary core boot */
 266extern void omap4_secondary_startup(void);
 267extern void omap4460_secondary_startup(void);
 268extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
 269extern void omap_auxcoreboot_addr(u32 cpu_addr);
 270extern u32 omap_read_auxcoreboot0(void);
 271
 272extern void omap4_cpu_die(unsigned int cpu);
 273
 274extern struct smp_operations omap4_smp_ops;
 275
 276extern void omap5_secondary_startup(void);
 277extern void omap5_secondary_hyp_startup(void);
 278#endif
 279
 280#if defined(CONFIG_SMP) && defined(CONFIG_PM)
 281extern int omap4_mpuss_init(void);
 282extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
 283extern int omap4_finish_suspend(unsigned long cpu_state);
 284extern void omap4_cpu_resume(void);
 285extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
 286#else
 287static inline int omap4_enter_lowpower(unsigned int cpu,
 288                                        unsigned int power_state)
 289{
 290        cpu_do_idle();
 291        return 0;
 292}
 293
 294static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
 295{
 296        cpu_do_idle();
 297        return 0;
 298}
 299
 300static inline int omap4_mpuss_init(void)
 301{
 302        return 0;
 303}
 304
 305static inline int omap4_finish_suspend(unsigned long cpu_state)
 306{
 307        return 0;
 308}
 309
 310static inline void omap4_cpu_resume(void)
 311{}
 312
 313#endif
 314
 315void pdata_quirks_init(const struct of_device_id *);
 316void omap_auxdata_legacy_init(struct device *dev);
 317void omap_pcs_legacy_init(int irq, void (*rearm)(void));
 318
 319struct omap_sdrc_params;
 320extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
 321                                      struct omap_sdrc_params *sdrc_cs1);
 322struct omap2_hsmmc_info;
 323extern void omap_reserve(void);
 324
 325struct omap_hwmod;
 326extern int omap_dss_reset(struct omap_hwmod *);
 327
 328/* SoC specific clock initializer */
 329int omap_clk_init(void);
 330
 331int __init omapdss_init_of(void);
 332void __init omapdss_early_init_of(void);
 333
 334#endif /* __ASSEMBLER__ */
 335#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
 336