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24
25#include <linux/delay.h>
26#include <linux/export.h>
27#include <linux/gfp.h>
28#include <linux/kernel.h>
29#include <linux/pci.h>
30#include <linux/string.h>
31
32#include <asm/pci-bridge.h>
33#include <asm/ppc-pci.h>
34
35static int eeh_pe_aux_size = 0;
36static LIST_HEAD(eeh_phb_pe);
37
38
39
40
41
42
43
44void eeh_set_pe_aux_size(int size)
45{
46 if (size < 0)
47 return;
48
49 eeh_pe_aux_size = size;
50}
51
52
53
54
55
56
57
58
59static struct eeh_pe *eeh_pe_alloc(struct pci_controller *phb, int type)
60{
61 struct eeh_pe *pe;
62 size_t alloc_size;
63
64 alloc_size = sizeof(struct eeh_pe);
65 if (eeh_pe_aux_size) {
66 alloc_size = ALIGN(alloc_size, cache_line_size());
67 alloc_size += eeh_pe_aux_size;
68 }
69
70
71 pe = kzalloc(alloc_size, GFP_KERNEL);
72 if (!pe) return NULL;
73
74
75 pe->type = type;
76 pe->phb = phb;
77 INIT_LIST_HEAD(&pe->child_list);
78 INIT_LIST_HEAD(&pe->child);
79 INIT_LIST_HEAD(&pe->edevs);
80
81 pe->data = (void *)pe + ALIGN(sizeof(struct eeh_pe),
82 cache_line_size());
83 return pe;
84}
85
86
87
88
89
90
91
92
93int eeh_phb_pe_create(struct pci_controller *phb)
94{
95 struct eeh_pe *pe;
96
97
98 pe = eeh_pe_alloc(phb, EEH_PE_PHB);
99 if (!pe) {
100 pr_err("%s: out of memory!\n", __func__);
101 return -ENOMEM;
102 }
103
104
105 list_add_tail(&pe->child, &eeh_phb_pe);
106
107 pr_debug("EEH: Add PE for PHB#%d\n", phb->global_number);
108
109 return 0;
110}
111
112
113
114
115
116
117
118
119
120struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb)
121{
122 struct eeh_pe *pe;
123
124 list_for_each_entry(pe, &eeh_phb_pe, child) {
125
126
127
128
129
130 if ((pe->type & EEH_PE_PHB) && pe->phb == phb)
131 return pe;
132 }
133
134 return NULL;
135}
136
137
138
139
140
141
142
143
144
145static struct eeh_pe *eeh_pe_next(struct eeh_pe *pe,
146 struct eeh_pe *root)
147{
148 struct list_head *next = pe->child_list.next;
149
150 if (next == &pe->child_list) {
151 while (1) {
152 if (pe == root)
153 return NULL;
154 next = pe->child.next;
155 if (next != &pe->parent->child_list)
156 break;
157 pe = pe->parent;
158 }
159 }
160
161 return list_entry(next, struct eeh_pe, child);
162}
163
164
165
166
167
168
169
170
171
172
173
174
175void *eeh_pe_traverse(struct eeh_pe *root,
176 eeh_traverse_func fn, void *flag)
177{
178 struct eeh_pe *pe;
179 void *ret;
180
181 for (pe = root; pe; pe = eeh_pe_next(pe, root)) {
182 ret = fn(pe, flag);
183 if (ret) return ret;
184 }
185
186 return NULL;
187}
188
189
190
191
192
193
194
195
196
197
198void *eeh_pe_dev_traverse(struct eeh_pe *root,
199 eeh_traverse_func fn, void *flag)
200{
201 struct eeh_pe *pe;
202 struct eeh_dev *edev, *tmp;
203 void *ret;
204
205 if (!root) {
206 pr_warn("%s: Invalid PE %p\n",
207 __func__, root);
208 return NULL;
209 }
210
211
212 for (pe = root; pe; pe = eeh_pe_next(pe, root)) {
213 eeh_pe_for_each_dev(pe, edev, tmp) {
214 ret = fn(edev, flag);
215 if (ret)
216 return ret;
217 }
218 }
219
220 return NULL;
221}
222
223
224
225
226
227
228
229
230
231
232
233static void *__eeh_pe_get(void *data, void *flag)
234{
235 struct eeh_pe *pe = (struct eeh_pe *)data;
236 struct eeh_dev *edev = (struct eeh_dev *)flag;
237
238
239 if (pe->type & EEH_PE_PHB)
240 return NULL;
241
242
243
244
245
246 if (eeh_has_flag(EEH_VALID_PE_ZERO)) {
247 if (edev->pe_config_addr == pe->addr)
248 return pe;
249 } else {
250 if (edev->pe_config_addr &&
251 (edev->pe_config_addr == pe->addr))
252 return pe;
253 }
254
255
256 if (edev->config_addr &&
257 (edev->config_addr == pe->config_addr))
258 return pe;
259
260 return NULL;
261}
262
263
264
265
266
267
268
269
270
271
272
273
274struct eeh_pe *eeh_pe_get(struct eeh_dev *edev)
275{
276 struct eeh_pe *root = eeh_phb_pe_get(edev->phb);
277 struct eeh_pe *pe;
278
279 pe = eeh_pe_traverse(root, __eeh_pe_get, edev);
280
281 return pe;
282}
283
284
285
286
287
288
289
290
291
292static struct eeh_pe *eeh_pe_get_parent(struct eeh_dev *edev)
293{
294 struct eeh_dev *parent;
295 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
296
297
298
299
300
301
302 pdn = pdn ? pdn->parent : NULL;
303 while (pdn) {
304
305 parent = pdn_to_eeh_dev(pdn);
306 if (!parent)
307 return NULL;
308
309 if (parent->pe)
310 return parent->pe;
311
312 pdn = pdn->parent;
313 }
314
315 return NULL;
316}
317
318
319
320
321
322
323
324
325
326
327int eeh_add_to_parent_pe(struct eeh_dev *edev)
328{
329 struct eeh_pe *pe, *parent;
330
331
332 if (!eeh_has_flag(EEH_VALID_PE_ZERO) && !edev->pe_config_addr) {
333 pr_err("%s: Invalid PE#0 for edev 0x%x on PHB#%d\n",
334 __func__, edev->config_addr, edev->phb->global_number);
335 return -EINVAL;
336 }
337
338
339
340
341
342
343
344 pe = eeh_pe_get(edev);
345 if (pe && !(pe->type & EEH_PE_INVALID)) {
346
347 pe->type = EEH_PE_BUS;
348 edev->pe = pe;
349
350
351 list_add_tail(&edev->list, &pe->edevs);
352 pr_debug("EEH: Add %04x:%02x:%02x.%01x to Bus PE#%x\n",
353 edev->phb->global_number,
354 edev->config_addr >> 8,
355 PCI_SLOT(edev->config_addr & 0xFF),
356 PCI_FUNC(edev->config_addr & 0xFF),
357 pe->addr);
358 return 0;
359 } else if (pe && (pe->type & EEH_PE_INVALID)) {
360 list_add_tail(&edev->list, &pe->edevs);
361 edev->pe = pe;
362
363
364
365
366 parent = pe;
367 while (parent) {
368 if (!(parent->type & EEH_PE_INVALID))
369 break;
370 parent->type &= ~(EEH_PE_INVALID | EEH_PE_KEEP);
371 parent = parent->parent;
372 }
373
374 pr_debug("EEH: Add %04x:%02x:%02x.%01x to Device "
375 "PE#%x, Parent PE#%x\n",
376 edev->phb->global_number,
377 edev->config_addr >> 8,
378 PCI_SLOT(edev->config_addr & 0xFF),
379 PCI_FUNC(edev->config_addr & 0xFF),
380 pe->addr, pe->parent->addr);
381 return 0;
382 }
383
384
385 pe = eeh_pe_alloc(edev->phb, EEH_PE_DEVICE);
386 if (!pe) {
387 pr_err("%s: out of memory!\n", __func__);
388 return -ENOMEM;
389 }
390 pe->addr = edev->pe_config_addr;
391 pe->config_addr = edev->config_addr;
392
393
394
395
396
397
398
399 parent = eeh_pe_get_parent(edev);
400 if (!parent) {
401 parent = eeh_phb_pe_get(edev->phb);
402 if (!parent) {
403 pr_err("%s: No PHB PE is found (PHB Domain=%d)\n",
404 __func__, edev->phb->global_number);
405 edev->pe = NULL;
406 kfree(pe);
407 return -EEXIST;
408 }
409 }
410 pe->parent = parent;
411
412
413
414
415
416 list_add_tail(&pe->child, &parent->child_list);
417 list_add_tail(&edev->list, &pe->edevs);
418 edev->pe = pe;
419 pr_debug("EEH: Add %04x:%02x:%02x.%01x to "
420 "Device PE#%x, Parent PE#%x\n",
421 edev->phb->global_number,
422 edev->config_addr >> 8,
423 PCI_SLOT(edev->config_addr & 0xFF),
424 PCI_FUNC(edev->config_addr & 0xFF),
425 pe->addr, pe->parent->addr);
426
427 return 0;
428}
429
430
431
432
433
434
435
436
437
438
439int eeh_rmv_from_parent_pe(struct eeh_dev *edev)
440{
441 struct eeh_pe *pe, *parent, *child;
442 int cnt;
443
444 if (!edev->pe) {
445 pr_debug("%s: No PE found for device %04x:%02x:%02x.%01x\n",
446 __func__, edev->phb->global_number,
447 edev->config_addr >> 8,
448 PCI_SLOT(edev->config_addr & 0xFF),
449 PCI_FUNC(edev->config_addr & 0xFF));
450 return -EEXIST;
451 }
452
453
454 pe = eeh_dev_to_pe(edev);
455 edev->pe = NULL;
456 list_del(&edev->list);
457
458
459
460
461
462
463
464 while (1) {
465 parent = pe->parent;
466 if (pe->type & EEH_PE_PHB)
467 break;
468
469 if (!(pe->state & EEH_PE_KEEP)) {
470 if (list_empty(&pe->edevs) &&
471 list_empty(&pe->child_list)) {
472 list_del(&pe->child);
473 kfree(pe);
474 } else {
475 break;
476 }
477 } else {
478 if (list_empty(&pe->edevs)) {
479 cnt = 0;
480 list_for_each_entry(child, &pe->child_list, child) {
481 if (!(child->type & EEH_PE_INVALID)) {
482 cnt++;
483 break;
484 }
485 }
486
487 if (!cnt)
488 pe->type |= EEH_PE_INVALID;
489 else
490 break;
491 }
492 }
493
494 pe = parent;
495 }
496
497 return 0;
498}
499
500
501
502
503
504
505
506
507
508
509void eeh_pe_update_time_stamp(struct eeh_pe *pe)
510{
511 struct timeval tstamp;
512
513 if (!pe) return;
514
515 if (pe->freeze_count <= 0) {
516 pe->freeze_count = 0;
517 do_gettimeofday(&pe->tstamp);
518 } else {
519 do_gettimeofday(&tstamp);
520 if (tstamp.tv_sec - pe->tstamp.tv_sec > 3600) {
521 pe->tstamp = tstamp;
522 pe->freeze_count = 0;
523 }
524 }
525}
526
527
528
529
530
531
532
533
534
535
536static void *__eeh_pe_state_mark(void *data, void *flag)
537{
538 struct eeh_pe *pe = (struct eeh_pe *)data;
539 int state = *((int *)flag);
540 struct eeh_dev *edev, *tmp;
541 struct pci_dev *pdev;
542
543
544 if (pe->state & EEH_PE_REMOVED)
545 return NULL;
546
547 pe->state |= state;
548
549
550 if (!(state & EEH_PE_ISOLATED))
551 return NULL;
552
553 eeh_pe_for_each_dev(pe, edev, tmp) {
554 pdev = eeh_dev_to_pci_dev(edev);
555 if (pdev)
556 pdev->error_state = pci_channel_io_frozen;
557 }
558
559
560 if (pe->state & EEH_PE_CFG_RESTRICTED)
561 pe->state |= EEH_PE_CFG_BLOCKED;
562
563 return NULL;
564}
565
566
567
568
569
570
571
572
573
574void eeh_pe_state_mark(struct eeh_pe *pe, int state)
575{
576 eeh_pe_traverse(pe, __eeh_pe_state_mark, &state);
577}
578
579static void *__eeh_pe_dev_mode_mark(void *data, void *flag)
580{
581 struct eeh_dev *edev = data;
582 int mode = *((int *)flag);
583
584 edev->mode |= mode;
585
586 return NULL;
587}
588
589
590
591
592
593
594
595void eeh_pe_dev_mode_mark(struct eeh_pe *pe, int mode)
596{
597 eeh_pe_dev_traverse(pe, __eeh_pe_dev_mode_mark, &mode);
598}
599
600
601
602
603
604
605
606
607
608
609static void *__eeh_pe_state_clear(void *data, void *flag)
610{
611 struct eeh_pe *pe = (struct eeh_pe *)data;
612 int state = *((int *)flag);
613 struct eeh_dev *edev, *tmp;
614 struct pci_dev *pdev;
615
616
617 if (pe->state & EEH_PE_REMOVED)
618 return NULL;
619
620 pe->state &= ~state;
621
622
623
624
625
626
627 if (!(state & EEH_PE_ISOLATED))
628 return NULL;
629
630 pe->check_count = 0;
631 eeh_pe_for_each_dev(pe, edev, tmp) {
632 pdev = eeh_dev_to_pci_dev(edev);
633 if (!pdev)
634 continue;
635
636 pdev->error_state = pci_channel_io_normal;
637 }
638
639
640 if (pe->state & EEH_PE_CFG_RESTRICTED)
641 pe->state &= ~EEH_PE_CFG_BLOCKED;
642
643 return NULL;
644}
645
646
647
648
649
650
651
652
653
654
655void eeh_pe_state_clear(struct eeh_pe *pe, int state)
656{
657 eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
658}
659
660
661
662
663
664
665
666
667
668
669
670
671void eeh_pe_state_mark_with_cfg(struct eeh_pe *pe, int state)
672{
673 eeh_pe_traverse(pe, __eeh_pe_state_mark, &state);
674 if (!(state & EEH_PE_ISOLATED))
675 return;
676
677
678 state = EEH_PE_CFG_BLOCKED;
679 eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
680}
681
682
683
684
685
686
687
688
689
690
691
692
693static void eeh_bridge_check_link(struct eeh_dev *edev)
694{
695 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
696 int cap;
697 uint32_t val;
698 int timeout = 0;
699
700
701
702
703
704 if (!(edev->mode & (EEH_DEV_ROOT_PORT | EEH_DEV_DS_PORT)))
705 return;
706
707 pr_debug("%s: Check PCIe link for %04x:%02x:%02x.%01x ...\n",
708 __func__, edev->phb->global_number,
709 edev->config_addr >> 8,
710 PCI_SLOT(edev->config_addr & 0xFF),
711 PCI_FUNC(edev->config_addr & 0xFF));
712
713
714 cap = edev->pcie_cap;
715 eeh_ops->read_config(pdn, cap + PCI_EXP_SLTSTA, 2, &val);
716 if (!(val & PCI_EXP_SLTSTA_PDS)) {
717 pr_debug(" No card in the slot (0x%04x) !\n", val);
718 return;
719 }
720
721
722 eeh_ops->read_config(pdn, cap + PCI_EXP_SLTCAP, 2, &val);
723 if (val & PCI_EXP_SLTCAP_PCP) {
724 eeh_ops->read_config(pdn, cap + PCI_EXP_SLTCTL, 2, &val);
725 if (val & PCI_EXP_SLTCTL_PCC) {
726 pr_debug(" In power-off state, power it on ...\n");
727 val &= ~(PCI_EXP_SLTCTL_PCC | PCI_EXP_SLTCTL_PIC);
728 val |= (0x0100 & PCI_EXP_SLTCTL_PIC);
729 eeh_ops->write_config(pdn, cap + PCI_EXP_SLTCTL, 2, val);
730 msleep(2 * 1000);
731 }
732 }
733
734
735 eeh_ops->read_config(pdn, cap + PCI_EXP_LNKCTL, 2, &val);
736 val &= ~PCI_EXP_LNKCTL_LD;
737 eeh_ops->write_config(pdn, cap + PCI_EXP_LNKCTL, 2, val);
738
739
740 eeh_ops->read_config(pdn, cap + PCI_EXP_LNKCAP, 4, &val);
741 if (!(val & PCI_EXP_LNKCAP_DLLLARC)) {
742 pr_debug(" No link reporting capability (0x%08x) \n", val);
743 msleep(1000);
744 return;
745 }
746
747
748 timeout = 0;
749 while (timeout < 5000) {
750 msleep(20);
751 timeout += 20;
752
753 eeh_ops->read_config(pdn, cap + PCI_EXP_LNKSTA, 2, &val);
754 if (val & PCI_EXP_LNKSTA_DLLLA)
755 break;
756 }
757
758 if (val & PCI_EXP_LNKSTA_DLLLA)
759 pr_debug(" Link up (%s)\n",
760 (val & PCI_EXP_LNKSTA_CLS_2_5GB) ? "2.5GB" : "5GB");
761 else
762 pr_debug(" Link not ready (0x%04x)\n", val);
763}
764
765#define BYTE_SWAP(OFF) (8*((OFF)/4)+3-(OFF))
766#define SAVED_BYTE(OFF) (((u8 *)(edev->config_space))[BYTE_SWAP(OFF)])
767
768static void eeh_restore_bridge_bars(struct eeh_dev *edev)
769{
770 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
771 int i;
772
773
774
775
776
777 for (i = 4; i < 13; i++)
778 eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]);
779
780 eeh_ops->write_config(pdn, 14*4, 4, edev->config_space[14]);
781
782
783 eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1,
784 SAVED_BYTE(PCI_CACHE_LINE_SIZE));
785 eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1,
786 SAVED_BYTE(PCI_LATENCY_TIMER));
787
788 eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]);
789
790
791 eeh_ops->write_config(pdn, PCI_COMMAND, 4, edev->config_space[1]);
792
793
794 eeh_bridge_check_link(edev);
795}
796
797static void eeh_restore_device_bars(struct eeh_dev *edev)
798{
799 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
800 int i;
801 u32 cmd;
802
803 for (i = 4; i < 10; i++)
804 eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]);
805
806 eeh_ops->write_config(pdn, 12*4, 4, edev->config_space[12]);
807
808 eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1,
809 SAVED_BYTE(PCI_CACHE_LINE_SIZE));
810 eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1,
811 SAVED_BYTE(PCI_LATENCY_TIMER));
812
813
814 eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]);
815
816
817
818
819
820 eeh_ops->read_config(pdn, PCI_COMMAND, 4, &cmd);
821 if (edev->config_space[1] & PCI_COMMAND_PARITY)
822 cmd |= PCI_COMMAND_PARITY;
823 else
824 cmd &= ~PCI_COMMAND_PARITY;
825 if (edev->config_space[1] & PCI_COMMAND_SERR)
826 cmd |= PCI_COMMAND_SERR;
827 else
828 cmd &= ~PCI_COMMAND_SERR;
829 eeh_ops->write_config(pdn, PCI_COMMAND, 4, cmd);
830}
831
832
833
834
835
836
837
838
839
840
841static void *eeh_restore_one_device_bars(void *data, void *flag)
842{
843 struct eeh_dev *edev = (struct eeh_dev *)data;
844 struct pci_dn *pdn = eeh_dev_to_pdn(edev);
845
846
847 if (edev->mode & EEH_DEV_BRIDGE)
848 eeh_restore_bridge_bars(edev);
849 else
850 eeh_restore_device_bars(edev);
851
852 if (eeh_ops->restore_config && pdn)
853 eeh_ops->restore_config(pdn);
854
855 return NULL;
856}
857
858
859
860
861
862
863
864
865void eeh_pe_restore_bars(struct eeh_pe *pe)
866{
867
868
869
870
871 eeh_pe_dev_traverse(pe, eeh_restore_one_device_bars, NULL);
872}
873
874
875
876
877
878
879
880
881
882
883const char *eeh_pe_loc_get(struct eeh_pe *pe)
884{
885 struct pci_bus *bus = eeh_pe_bus_get(pe);
886 struct device_node *dn = pci_bus_to_OF_node(bus);
887 const char *loc = NULL;
888
889 if (!dn)
890 goto out;
891
892
893 if (pci_is_root_bus(bus)) {
894 loc = of_get_property(dn, "ibm,loc-code", NULL);
895 if (!loc)
896 loc = of_get_property(dn, "ibm,io-base-loc-code", NULL);
897 if (loc)
898 goto out;
899
900
901 dn = dn->child;
902 if (!dn)
903 goto out;
904 }
905
906 loc = of_get_property(dn, "ibm,loc-code", NULL);
907 if (!loc)
908 loc = of_get_property(dn, "ibm,slot-location-code", NULL);
909
910out:
911 return loc ? loc : "N/A";
912}
913
914
915
916
917
918
919
920
921
922
923
924struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe)
925{
926 struct pci_bus *bus = NULL;
927 struct eeh_dev *edev;
928 struct pci_dev *pdev;
929
930 if (pe->type & EEH_PE_PHB) {
931 bus = pe->phb->bus;
932 } else if (pe->type & EEH_PE_BUS ||
933 pe->type & EEH_PE_DEVICE) {
934 if (pe->bus) {
935 bus = pe->bus;
936 goto out;
937 }
938
939 edev = list_first_entry(&pe->edevs, struct eeh_dev, list);
940 pdev = eeh_dev_to_pci_dev(edev);
941 if (pdev)
942 bus = pdev->bus;
943 }
944
945out:
946 return bus;
947}
948