linux/arch/powerpc/kernel/eeh_pe.c
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   1/*
   2 * The file intends to implement PE based on the information from
   3 * platforms. Basically, there have 3 types of PEs: PHB/Bus/Device.
   4 * All the PEs should be organized as hierarchy tree. The first level
   5 * of the tree will be associated to existing PHBs since the particular
   6 * PE is only meaningful in one PHB domain.
   7 *
   8 * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2012.
   9 *
  10 * This program is free software; you can redistribute it and/or modify
  11 * it under the terms of the GNU General Public License as published by
  12 * the Free Software Foundation; either version 2 of the License, or
  13 * (at your option) any later version.
  14 *
  15 * This program is distributed in the hope that it will be useful,
  16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18 * GNU General Public License for more details.
  19 *
  20 * You should have received a copy of the GNU General Public License
  21 * along with this program; if not, write to the Free Software
  22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  23 */
  24
  25#include <linux/delay.h>
  26#include <linux/export.h>
  27#include <linux/gfp.h>
  28#include <linux/kernel.h>
  29#include <linux/pci.h>
  30#include <linux/string.h>
  31
  32#include <asm/pci-bridge.h>
  33#include <asm/ppc-pci.h>
  34
  35static int eeh_pe_aux_size = 0;
  36static LIST_HEAD(eeh_phb_pe);
  37
  38/**
  39 * eeh_set_pe_aux_size - Set PE auxillary data size
  40 * @size: PE auxillary data size
  41 *
  42 * Set PE auxillary data size
  43 */
  44void eeh_set_pe_aux_size(int size)
  45{
  46        if (size < 0)
  47                return;
  48
  49        eeh_pe_aux_size = size;
  50}
  51
  52/**
  53 * eeh_pe_alloc - Allocate PE
  54 * @phb: PCI controller
  55 * @type: PE type
  56 *
  57 * Allocate PE instance dynamically.
  58 */
  59static struct eeh_pe *eeh_pe_alloc(struct pci_controller *phb, int type)
  60{
  61        struct eeh_pe *pe;
  62        size_t alloc_size;
  63
  64        alloc_size = sizeof(struct eeh_pe);
  65        if (eeh_pe_aux_size) {
  66                alloc_size = ALIGN(alloc_size, cache_line_size());
  67                alloc_size += eeh_pe_aux_size;
  68        }
  69
  70        /* Allocate PHB PE */
  71        pe = kzalloc(alloc_size, GFP_KERNEL);
  72        if (!pe) return NULL;
  73
  74        /* Initialize PHB PE */
  75        pe->type = type;
  76        pe->phb = phb;
  77        INIT_LIST_HEAD(&pe->child_list);
  78        INIT_LIST_HEAD(&pe->child);
  79        INIT_LIST_HEAD(&pe->edevs);
  80
  81        pe->data = (void *)pe + ALIGN(sizeof(struct eeh_pe),
  82                                      cache_line_size());
  83        return pe;
  84}
  85
  86/**
  87 * eeh_phb_pe_create - Create PHB PE
  88 * @phb: PCI controller
  89 *
  90 * The function should be called while the PHB is detected during
  91 * system boot or PCI hotplug in order to create PHB PE.
  92 */
  93int eeh_phb_pe_create(struct pci_controller *phb)
  94{
  95        struct eeh_pe *pe;
  96
  97        /* Allocate PHB PE */
  98        pe = eeh_pe_alloc(phb, EEH_PE_PHB);
  99        if (!pe) {
 100                pr_err("%s: out of memory!\n", __func__);
 101                return -ENOMEM;
 102        }
 103
 104        /* Put it into the list */
 105        list_add_tail(&pe->child, &eeh_phb_pe);
 106
 107        pr_debug("EEH: Add PE for PHB#%d\n", phb->global_number);
 108
 109        return 0;
 110}
 111
 112/**
 113 * eeh_phb_pe_get - Retrieve PHB PE based on the given PHB
 114 * @phb: PCI controller
 115 *
 116 * The overall PEs form hierarchy tree. The first layer of the
 117 * hierarchy tree is composed of PHB PEs. The function is used
 118 * to retrieve the corresponding PHB PE according to the given PHB.
 119 */
 120struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb)
 121{
 122        struct eeh_pe *pe;
 123
 124        list_for_each_entry(pe, &eeh_phb_pe, child) {
 125                /*
 126                 * Actually, we needn't check the type since
 127                 * the PE for PHB has been determined when that
 128                 * was created.
 129                 */
 130                if ((pe->type & EEH_PE_PHB) && pe->phb == phb)
 131                        return pe;
 132        }
 133
 134        return NULL;
 135}
 136
 137/**
 138 * eeh_pe_next - Retrieve the next PE in the tree
 139 * @pe: current PE
 140 * @root: root PE
 141 *
 142 * The function is used to retrieve the next PE in the
 143 * hierarchy PE tree.
 144 */
 145static struct eeh_pe *eeh_pe_next(struct eeh_pe *pe,
 146                                  struct eeh_pe *root)
 147{
 148        struct list_head *next = pe->child_list.next;
 149
 150        if (next == &pe->child_list) {
 151                while (1) {
 152                        if (pe == root)
 153                                return NULL;
 154                        next = pe->child.next;
 155                        if (next != &pe->parent->child_list)
 156                                break;
 157                        pe = pe->parent;
 158                }
 159        }
 160
 161        return list_entry(next, struct eeh_pe, child);
 162}
 163
 164/**
 165 * eeh_pe_traverse - Traverse PEs in the specified PHB
 166 * @root: root PE
 167 * @fn: callback
 168 * @flag: extra parameter to callback
 169 *
 170 * The function is used to traverse the specified PE and its
 171 * child PEs. The traversing is to be terminated once the
 172 * callback returns something other than NULL, or no more PEs
 173 * to be traversed.
 174 */
 175void *eeh_pe_traverse(struct eeh_pe *root,
 176                      eeh_traverse_func fn, void *flag)
 177{
 178        struct eeh_pe *pe;
 179        void *ret;
 180
 181        for (pe = root; pe; pe = eeh_pe_next(pe, root)) {
 182                ret = fn(pe, flag);
 183                if (ret) return ret;
 184        }
 185
 186        return NULL;
 187}
 188
 189/**
 190 * eeh_pe_dev_traverse - Traverse the devices from the PE
 191 * @root: EEH PE
 192 * @fn: function callback
 193 * @flag: extra parameter to callback
 194 *
 195 * The function is used to traverse the devices of the specified
 196 * PE and its child PEs.
 197 */
 198void *eeh_pe_dev_traverse(struct eeh_pe *root,
 199                eeh_traverse_func fn, void *flag)
 200{
 201        struct eeh_pe *pe;
 202        struct eeh_dev *edev, *tmp;
 203        void *ret;
 204
 205        if (!root) {
 206                pr_warn("%s: Invalid PE %p\n",
 207                        __func__, root);
 208                return NULL;
 209        }
 210
 211        /* Traverse root PE */
 212        for (pe = root; pe; pe = eeh_pe_next(pe, root)) {
 213                eeh_pe_for_each_dev(pe, edev, tmp) {
 214                        ret = fn(edev, flag);
 215                        if (ret)
 216                                return ret;
 217                }
 218        }
 219
 220        return NULL;
 221}
 222
 223/**
 224 * __eeh_pe_get - Check the PE address
 225 * @data: EEH PE
 226 * @flag: EEH device
 227 *
 228 * For one particular PE, it can be identified by PE address
 229 * or tranditional BDF address. BDF address is composed of
 230 * Bus/Device/Function number. The extra data referred by flag
 231 * indicates which type of address should be used.
 232 */
 233static void *__eeh_pe_get(void *data, void *flag)
 234{
 235        struct eeh_pe *pe = (struct eeh_pe *)data;
 236        struct eeh_dev *edev = (struct eeh_dev *)flag;
 237
 238        /* Unexpected PHB PE */
 239        if (pe->type & EEH_PE_PHB)
 240                return NULL;
 241
 242        /*
 243         * We prefer PE address. For most cases, we should
 244         * have non-zero PE address
 245         */
 246        if (eeh_has_flag(EEH_VALID_PE_ZERO)) {
 247                if (edev->pe_config_addr == pe->addr)
 248                        return pe;
 249        } else {
 250                if (edev->pe_config_addr &&
 251                    (edev->pe_config_addr == pe->addr))
 252                return pe;
 253        }
 254
 255        /* Try BDF address */
 256        if (edev->config_addr &&
 257           (edev->config_addr == pe->config_addr))
 258                return pe;
 259
 260        return NULL;
 261}
 262
 263/**
 264 * eeh_pe_get - Search PE based on the given address
 265 * @edev: EEH device
 266 *
 267 * Search the corresponding PE based on the specified address which
 268 * is included in the eeh device. The function is used to check if
 269 * the associated PE has been created against the PE address. It's
 270 * notable that the PE address has 2 format: traditional PE address
 271 * which is composed of PCI bus/device/function number, or unified
 272 * PE address.
 273 */
 274struct eeh_pe *eeh_pe_get(struct eeh_dev *edev)
 275{
 276        struct eeh_pe *root = eeh_phb_pe_get(edev->phb);
 277        struct eeh_pe *pe;
 278
 279        pe = eeh_pe_traverse(root, __eeh_pe_get, edev);
 280
 281        return pe;
 282}
 283
 284/**
 285 * eeh_pe_get_parent - Retrieve the parent PE
 286 * @edev: EEH device
 287 *
 288 * The whole PEs existing in the system are organized as hierarchy
 289 * tree. The function is used to retrieve the parent PE according
 290 * to the parent EEH device.
 291 */
 292static struct eeh_pe *eeh_pe_get_parent(struct eeh_dev *edev)
 293{
 294        struct eeh_dev *parent;
 295        struct pci_dn *pdn = eeh_dev_to_pdn(edev);
 296
 297        /*
 298         * It might have the case for the indirect parent
 299         * EEH device already having associated PE, but
 300         * the direct parent EEH device doesn't have yet.
 301         */
 302        pdn = pdn ? pdn->parent : NULL;
 303        while (pdn) {
 304                /* We're poking out of PCI territory */
 305                parent = pdn_to_eeh_dev(pdn);
 306                if (!parent)
 307                        return NULL;
 308
 309                if (parent->pe)
 310                        return parent->pe;
 311
 312                pdn = pdn->parent;
 313        }
 314
 315        return NULL;
 316}
 317
 318/**
 319 * eeh_add_to_parent_pe - Add EEH device to parent PE
 320 * @edev: EEH device
 321 *
 322 * Add EEH device to the parent PE. If the parent PE already
 323 * exists, the PE type will be changed to EEH_PE_BUS. Otherwise,
 324 * we have to create new PE to hold the EEH device and the new
 325 * PE will be linked to its parent PE as well.
 326 */
 327int eeh_add_to_parent_pe(struct eeh_dev *edev)
 328{
 329        struct eeh_pe *pe, *parent;
 330
 331        /* Check if the PE number is valid */
 332        if (!eeh_has_flag(EEH_VALID_PE_ZERO) && !edev->pe_config_addr) {
 333                pr_err("%s: Invalid PE#0 for edev 0x%x on PHB#%d\n",
 334                       __func__, edev->config_addr, edev->phb->global_number);
 335                return -EINVAL;
 336        }
 337
 338        /*
 339         * Search the PE has been existing or not according
 340         * to the PE address. If that has been existing, the
 341         * PE should be composed of PCI bus and its subordinate
 342         * components.
 343         */
 344        pe = eeh_pe_get(edev);
 345        if (pe && !(pe->type & EEH_PE_INVALID)) {
 346                /* Mark the PE as type of PCI bus */
 347                pe->type = EEH_PE_BUS;
 348                edev->pe = pe;
 349
 350                /* Put the edev to PE */
 351                list_add_tail(&edev->list, &pe->edevs);
 352                pr_debug("EEH: Add %04x:%02x:%02x.%01x to Bus PE#%x\n",
 353                        edev->phb->global_number,
 354                        edev->config_addr >> 8,
 355                        PCI_SLOT(edev->config_addr & 0xFF),
 356                        PCI_FUNC(edev->config_addr & 0xFF),
 357                        pe->addr);
 358                return 0;
 359        } else if (pe && (pe->type & EEH_PE_INVALID)) {
 360                list_add_tail(&edev->list, &pe->edevs);
 361                edev->pe = pe;
 362                /*
 363                 * We're running to here because of PCI hotplug caused by
 364                 * EEH recovery. We need clear EEH_PE_INVALID until the top.
 365                 */
 366                parent = pe;
 367                while (parent) {
 368                        if (!(parent->type & EEH_PE_INVALID))
 369                                break;
 370                        parent->type &= ~(EEH_PE_INVALID | EEH_PE_KEEP);
 371                        parent = parent->parent;
 372                }
 373
 374                pr_debug("EEH: Add %04x:%02x:%02x.%01x to Device "
 375                         "PE#%x, Parent PE#%x\n",
 376                        edev->phb->global_number,
 377                        edev->config_addr >> 8,
 378                        PCI_SLOT(edev->config_addr & 0xFF),
 379                        PCI_FUNC(edev->config_addr & 0xFF),
 380                        pe->addr, pe->parent->addr);
 381                return 0;
 382        }
 383
 384        /* Create a new EEH PE */
 385        pe = eeh_pe_alloc(edev->phb, EEH_PE_DEVICE);
 386        if (!pe) {
 387                pr_err("%s: out of memory!\n", __func__);
 388                return -ENOMEM;
 389        }
 390        pe->addr        = edev->pe_config_addr;
 391        pe->config_addr = edev->config_addr;
 392
 393        /*
 394         * Put the new EEH PE into hierarchy tree. If the parent
 395         * can't be found, the newly created PE will be attached
 396         * to PHB directly. Otherwise, we have to associate the
 397         * PE with its parent.
 398         */
 399        parent = eeh_pe_get_parent(edev);
 400        if (!parent) {
 401                parent = eeh_phb_pe_get(edev->phb);
 402                if (!parent) {
 403                        pr_err("%s: No PHB PE is found (PHB Domain=%d)\n",
 404                                __func__, edev->phb->global_number);
 405                        edev->pe = NULL;
 406                        kfree(pe);
 407                        return -EEXIST;
 408                }
 409        }
 410        pe->parent = parent;
 411
 412        /*
 413         * Put the newly created PE into the child list and
 414         * link the EEH device accordingly.
 415         */
 416        list_add_tail(&pe->child, &parent->child_list);
 417        list_add_tail(&edev->list, &pe->edevs);
 418        edev->pe = pe;
 419        pr_debug("EEH: Add %04x:%02x:%02x.%01x to "
 420                 "Device PE#%x, Parent PE#%x\n",
 421                 edev->phb->global_number,
 422                 edev->config_addr >> 8,
 423                 PCI_SLOT(edev->config_addr & 0xFF),
 424                 PCI_FUNC(edev->config_addr & 0xFF),
 425                 pe->addr, pe->parent->addr);
 426
 427        return 0;
 428}
 429
 430/**
 431 * eeh_rmv_from_parent_pe - Remove one EEH device from the associated PE
 432 * @edev: EEH device
 433 *
 434 * The PE hierarchy tree might be changed when doing PCI hotplug.
 435 * Also, the PCI devices or buses could be removed from the system
 436 * during EEH recovery. So we have to call the function remove the
 437 * corresponding PE accordingly if necessary.
 438 */
 439int eeh_rmv_from_parent_pe(struct eeh_dev *edev)
 440{
 441        struct eeh_pe *pe, *parent, *child;
 442        int cnt;
 443
 444        if (!edev->pe) {
 445                pr_debug("%s: No PE found for device %04x:%02x:%02x.%01x\n",
 446                         __func__,  edev->phb->global_number,
 447                         edev->config_addr >> 8,
 448                         PCI_SLOT(edev->config_addr & 0xFF),
 449                         PCI_FUNC(edev->config_addr & 0xFF));
 450                return -EEXIST;
 451        }
 452
 453        /* Remove the EEH device */
 454        pe = eeh_dev_to_pe(edev);
 455        edev->pe = NULL;
 456        list_del(&edev->list);
 457
 458        /*
 459         * Check if the parent PE includes any EEH devices.
 460         * If not, we should delete that. Also, we should
 461         * delete the parent PE if it doesn't have associated
 462         * child PEs and EEH devices.
 463         */
 464        while (1) {
 465                parent = pe->parent;
 466                if (pe->type & EEH_PE_PHB)
 467                        break;
 468
 469                if (!(pe->state & EEH_PE_KEEP)) {
 470                        if (list_empty(&pe->edevs) &&
 471                            list_empty(&pe->child_list)) {
 472                                list_del(&pe->child);
 473                                kfree(pe);
 474                        } else {
 475                                break;
 476                        }
 477                } else {
 478                        if (list_empty(&pe->edevs)) {
 479                                cnt = 0;
 480                                list_for_each_entry(child, &pe->child_list, child) {
 481                                        if (!(child->type & EEH_PE_INVALID)) {
 482                                                cnt++;
 483                                                break;
 484                                        }
 485                                }
 486
 487                                if (!cnt)
 488                                        pe->type |= EEH_PE_INVALID;
 489                                else
 490                                        break;
 491                        }
 492                }
 493
 494                pe = parent;
 495        }
 496
 497        return 0;
 498}
 499
 500/**
 501 * eeh_pe_update_time_stamp - Update PE's frozen time stamp
 502 * @pe: EEH PE
 503 *
 504 * We have time stamp for each PE to trace its time of getting
 505 * frozen in last hour. The function should be called to update
 506 * the time stamp on first error of the specific PE. On the other
 507 * handle, we needn't account for errors happened in last hour.
 508 */
 509void eeh_pe_update_time_stamp(struct eeh_pe *pe)
 510{
 511        struct timeval tstamp;
 512
 513        if (!pe) return;
 514
 515        if (pe->freeze_count <= 0) {
 516                pe->freeze_count = 0;
 517                do_gettimeofday(&pe->tstamp);
 518        } else {
 519                do_gettimeofday(&tstamp);
 520                if (tstamp.tv_sec - pe->tstamp.tv_sec > 3600) {
 521                        pe->tstamp = tstamp;
 522                        pe->freeze_count = 0;
 523                }
 524        }
 525}
 526
 527/**
 528 * __eeh_pe_state_mark - Mark the state for the PE
 529 * @data: EEH PE
 530 * @flag: state
 531 *
 532 * The function is used to mark the indicated state for the given
 533 * PE. Also, the associated PCI devices will be put into IO frozen
 534 * state as well.
 535 */
 536static void *__eeh_pe_state_mark(void *data, void *flag)
 537{
 538        struct eeh_pe *pe = (struct eeh_pe *)data;
 539        int state = *((int *)flag);
 540        struct eeh_dev *edev, *tmp;
 541        struct pci_dev *pdev;
 542
 543        /* Keep the state of permanently removed PE intact */
 544        if (pe->state & EEH_PE_REMOVED)
 545                return NULL;
 546
 547        pe->state |= state;
 548
 549        /* Offline PCI devices if applicable */
 550        if (!(state & EEH_PE_ISOLATED))
 551                return NULL;
 552
 553        eeh_pe_for_each_dev(pe, edev, tmp) {
 554                pdev = eeh_dev_to_pci_dev(edev);
 555                if (pdev)
 556                        pdev->error_state = pci_channel_io_frozen;
 557        }
 558
 559        /* Block PCI config access if required */
 560        if (pe->state & EEH_PE_CFG_RESTRICTED)
 561                pe->state |= EEH_PE_CFG_BLOCKED;
 562
 563        return NULL;
 564}
 565
 566/**
 567 * eeh_pe_state_mark - Mark specified state for PE and its associated device
 568 * @pe: EEH PE
 569 *
 570 * EEH error affects the current PE and its child PEs. The function
 571 * is used to mark appropriate state for the affected PEs and the
 572 * associated devices.
 573 */
 574void eeh_pe_state_mark(struct eeh_pe *pe, int state)
 575{
 576        eeh_pe_traverse(pe, __eeh_pe_state_mark, &state);
 577}
 578
 579static void *__eeh_pe_dev_mode_mark(void *data, void *flag)
 580{
 581        struct eeh_dev *edev = data;
 582        int mode = *((int *)flag);
 583
 584        edev->mode |= mode;
 585
 586        return NULL;
 587}
 588
 589/**
 590 * eeh_pe_dev_state_mark - Mark state for all device under the PE
 591 * @pe: EEH PE
 592 *
 593 * Mark specific state for all child devices of the PE.
 594 */
 595void eeh_pe_dev_mode_mark(struct eeh_pe *pe, int mode)
 596{
 597        eeh_pe_dev_traverse(pe, __eeh_pe_dev_mode_mark, &mode);
 598}
 599
 600/**
 601 * __eeh_pe_state_clear - Clear state for the PE
 602 * @data: EEH PE
 603 * @flag: state
 604 *
 605 * The function is used to clear the indicated state from the
 606 * given PE. Besides, we also clear the check count of the PE
 607 * as well.
 608 */
 609static void *__eeh_pe_state_clear(void *data, void *flag)
 610{
 611        struct eeh_pe *pe = (struct eeh_pe *)data;
 612        int state = *((int *)flag);
 613        struct eeh_dev *edev, *tmp;
 614        struct pci_dev *pdev;
 615
 616        /* Keep the state of permanently removed PE intact */
 617        if (pe->state & EEH_PE_REMOVED)
 618                return NULL;
 619
 620        pe->state &= ~state;
 621
 622        /*
 623         * Special treatment on clearing isolated state. Clear
 624         * check count since last isolation and put all affected
 625         * devices to normal state.
 626         */
 627        if (!(state & EEH_PE_ISOLATED))
 628                return NULL;
 629
 630        pe->check_count = 0;
 631        eeh_pe_for_each_dev(pe, edev, tmp) {
 632                pdev = eeh_dev_to_pci_dev(edev);
 633                if (!pdev)
 634                        continue;
 635
 636                pdev->error_state = pci_channel_io_normal;
 637        }
 638
 639        /* Unblock PCI config access if required */
 640        if (pe->state & EEH_PE_CFG_RESTRICTED)
 641                pe->state &= ~EEH_PE_CFG_BLOCKED;
 642
 643        return NULL;
 644}
 645
 646/**
 647 * eeh_pe_state_clear - Clear state for the PE and its children
 648 * @pe: PE
 649 * @state: state to be cleared
 650 *
 651 * When the PE and its children has been recovered from error,
 652 * we need clear the error state for that. The function is used
 653 * for the purpose.
 654 */
 655void eeh_pe_state_clear(struct eeh_pe *pe, int state)
 656{
 657        eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
 658}
 659
 660/**
 661 * eeh_pe_state_mark_with_cfg - Mark PE state with unblocked config space
 662 * @pe: PE
 663 * @state: PE state to be set
 664 *
 665 * Set specified flag to PE and its child PEs. The PCI config space
 666 * of some PEs is blocked automatically when EEH_PE_ISOLATED is set,
 667 * which isn't needed in some situations. The function allows to set
 668 * the specified flag to indicated PEs without blocking their PCI
 669 * config space.
 670 */
 671void eeh_pe_state_mark_with_cfg(struct eeh_pe *pe, int state)
 672{
 673        eeh_pe_traverse(pe, __eeh_pe_state_mark, &state);
 674        if (!(state & EEH_PE_ISOLATED))
 675                return;
 676
 677        /* Clear EEH_PE_CFG_BLOCKED, which might be set just now */
 678        state = EEH_PE_CFG_BLOCKED;
 679        eeh_pe_traverse(pe, __eeh_pe_state_clear, &state);
 680}
 681
 682/*
 683 * Some PCI bridges (e.g. PLX bridges) have primary/secondary
 684 * buses assigned explicitly by firmware, and we probably have
 685 * lost that after reset. So we have to delay the check until
 686 * the PCI-CFG registers have been restored for the parent
 687 * bridge.
 688 *
 689 * Don't use normal PCI-CFG accessors, which probably has been
 690 * blocked on normal path during the stage. So we need utilize
 691 * eeh operations, which is always permitted.
 692 */
 693static void eeh_bridge_check_link(struct eeh_dev *edev)
 694{
 695        struct pci_dn *pdn = eeh_dev_to_pdn(edev);
 696        int cap;
 697        uint32_t val;
 698        int timeout = 0;
 699
 700        /*
 701         * We only check root port and downstream ports of
 702         * PCIe switches
 703         */
 704        if (!(edev->mode & (EEH_DEV_ROOT_PORT | EEH_DEV_DS_PORT)))
 705                return;
 706
 707        pr_debug("%s: Check PCIe link for %04x:%02x:%02x.%01x ...\n",
 708                 __func__, edev->phb->global_number,
 709                 edev->config_addr >> 8,
 710                 PCI_SLOT(edev->config_addr & 0xFF),
 711                 PCI_FUNC(edev->config_addr & 0xFF));
 712
 713        /* Check slot status */
 714        cap = edev->pcie_cap;
 715        eeh_ops->read_config(pdn, cap + PCI_EXP_SLTSTA, 2, &val);
 716        if (!(val & PCI_EXP_SLTSTA_PDS)) {
 717                pr_debug("  No card in the slot (0x%04x) !\n", val);
 718                return;
 719        }
 720
 721        /* Check power status if we have the capability */
 722        eeh_ops->read_config(pdn, cap + PCI_EXP_SLTCAP, 2, &val);
 723        if (val & PCI_EXP_SLTCAP_PCP) {
 724                eeh_ops->read_config(pdn, cap + PCI_EXP_SLTCTL, 2, &val);
 725                if (val & PCI_EXP_SLTCTL_PCC) {
 726                        pr_debug("  In power-off state, power it on ...\n");
 727                        val &= ~(PCI_EXP_SLTCTL_PCC | PCI_EXP_SLTCTL_PIC);
 728                        val |= (0x0100 & PCI_EXP_SLTCTL_PIC);
 729                        eeh_ops->write_config(pdn, cap + PCI_EXP_SLTCTL, 2, val);
 730                        msleep(2 * 1000);
 731                }
 732        }
 733
 734        /* Enable link */
 735        eeh_ops->read_config(pdn, cap + PCI_EXP_LNKCTL, 2, &val);
 736        val &= ~PCI_EXP_LNKCTL_LD;
 737        eeh_ops->write_config(pdn, cap + PCI_EXP_LNKCTL, 2, val);
 738
 739        /* Check link */
 740        eeh_ops->read_config(pdn, cap + PCI_EXP_LNKCAP, 4, &val);
 741        if (!(val & PCI_EXP_LNKCAP_DLLLARC)) {
 742                pr_debug("  No link reporting capability (0x%08x) \n", val);
 743                msleep(1000);
 744                return;
 745        }
 746
 747        /* Wait the link is up until timeout (5s) */
 748        timeout = 0;
 749        while (timeout < 5000) {
 750                msleep(20);
 751                timeout += 20;
 752
 753                eeh_ops->read_config(pdn, cap + PCI_EXP_LNKSTA, 2, &val);
 754                if (val & PCI_EXP_LNKSTA_DLLLA)
 755                        break;
 756        }
 757
 758        if (val & PCI_EXP_LNKSTA_DLLLA)
 759                pr_debug("  Link up (%s)\n",
 760                         (val & PCI_EXP_LNKSTA_CLS_2_5GB) ? "2.5GB" : "5GB");
 761        else
 762                pr_debug("  Link not ready (0x%04x)\n", val);
 763}
 764
 765#define BYTE_SWAP(OFF)  (8*((OFF)/4)+3-(OFF))
 766#define SAVED_BYTE(OFF) (((u8 *)(edev->config_space))[BYTE_SWAP(OFF)])
 767
 768static void eeh_restore_bridge_bars(struct eeh_dev *edev)
 769{
 770        struct pci_dn *pdn = eeh_dev_to_pdn(edev);
 771        int i;
 772
 773        /*
 774         * Device BARs: 0x10 - 0x18
 775         * Bus numbers and windows: 0x18 - 0x30
 776         */
 777        for (i = 4; i < 13; i++)
 778                eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]);
 779        /* Rom: 0x38 */
 780        eeh_ops->write_config(pdn, 14*4, 4, edev->config_space[14]);
 781
 782        /* Cache line & Latency timer: 0xC 0xD */
 783        eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1,
 784                SAVED_BYTE(PCI_CACHE_LINE_SIZE));
 785        eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1,
 786                SAVED_BYTE(PCI_LATENCY_TIMER));
 787        /* Max latency, min grant, interrupt ping and line: 0x3C */
 788        eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]);
 789
 790        /* PCI Command: 0x4 */
 791        eeh_ops->write_config(pdn, PCI_COMMAND, 4, edev->config_space[1]);
 792
 793        /* Check the PCIe link is ready */
 794        eeh_bridge_check_link(edev);
 795}
 796
 797static void eeh_restore_device_bars(struct eeh_dev *edev)
 798{
 799        struct pci_dn *pdn = eeh_dev_to_pdn(edev);
 800        int i;
 801        u32 cmd;
 802
 803        for (i = 4; i < 10; i++)
 804                eeh_ops->write_config(pdn, i*4, 4, edev->config_space[i]);
 805        /* 12 == Expansion ROM Address */
 806        eeh_ops->write_config(pdn, 12*4, 4, edev->config_space[12]);
 807
 808        eeh_ops->write_config(pdn, PCI_CACHE_LINE_SIZE, 1,
 809                SAVED_BYTE(PCI_CACHE_LINE_SIZE));
 810        eeh_ops->write_config(pdn, PCI_LATENCY_TIMER, 1,
 811                SAVED_BYTE(PCI_LATENCY_TIMER));
 812
 813        /* max latency, min grant, interrupt pin and line */
 814        eeh_ops->write_config(pdn, 15*4, 4, edev->config_space[15]);
 815
 816        /*
 817         * Restore PERR & SERR bits, some devices require it,
 818         * don't touch the other command bits
 819         */
 820        eeh_ops->read_config(pdn, PCI_COMMAND, 4, &cmd);
 821        if (edev->config_space[1] & PCI_COMMAND_PARITY)
 822                cmd |= PCI_COMMAND_PARITY;
 823        else
 824                cmd &= ~PCI_COMMAND_PARITY;
 825        if (edev->config_space[1] & PCI_COMMAND_SERR)
 826                cmd |= PCI_COMMAND_SERR;
 827        else
 828                cmd &= ~PCI_COMMAND_SERR;
 829        eeh_ops->write_config(pdn, PCI_COMMAND, 4, cmd);
 830}
 831
 832/**
 833 * eeh_restore_one_device_bars - Restore the Base Address Registers for one device
 834 * @data: EEH device
 835 * @flag: Unused
 836 *
 837 * Loads the PCI configuration space base address registers,
 838 * the expansion ROM base address, the latency timer, and etc.
 839 * from the saved values in the device node.
 840 */
 841static void *eeh_restore_one_device_bars(void *data, void *flag)
 842{
 843        struct eeh_dev *edev = (struct eeh_dev *)data;
 844        struct pci_dn *pdn = eeh_dev_to_pdn(edev);
 845
 846        /* Do special restore for bridges */
 847        if (edev->mode & EEH_DEV_BRIDGE)
 848                eeh_restore_bridge_bars(edev);
 849        else
 850                eeh_restore_device_bars(edev);
 851
 852        if (eeh_ops->restore_config && pdn)
 853                eeh_ops->restore_config(pdn);
 854
 855        return NULL;
 856}
 857
 858/**
 859 * eeh_pe_restore_bars - Restore the PCI config space info
 860 * @pe: EEH PE
 861 *
 862 * This routine performs a recursive walk to the children
 863 * of this device as well.
 864 */
 865void eeh_pe_restore_bars(struct eeh_pe *pe)
 866{
 867        /*
 868         * We needn't take the EEH lock since eeh_pe_dev_traverse()
 869         * will take that.
 870         */
 871        eeh_pe_dev_traverse(pe, eeh_restore_one_device_bars, NULL);
 872}
 873
 874/**
 875 * eeh_pe_loc_get - Retrieve location code binding to the given PE
 876 * @pe: EEH PE
 877 *
 878 * Retrieve the location code of the given PE. If the primary PE bus
 879 * is root bus, we will grab location code from PHB device tree node
 880 * or root port. Otherwise, the upstream bridge's device tree node
 881 * of the primary PE bus will be checked for the location code.
 882 */
 883const char *eeh_pe_loc_get(struct eeh_pe *pe)
 884{
 885        struct pci_bus *bus = eeh_pe_bus_get(pe);
 886        struct device_node *dn = pci_bus_to_OF_node(bus);
 887        const char *loc = NULL;
 888
 889        if (!dn)
 890                goto out;
 891
 892        /* PHB PE or root PE ? */
 893        if (pci_is_root_bus(bus)) {
 894                loc = of_get_property(dn, "ibm,loc-code", NULL);
 895                if (!loc)
 896                        loc = of_get_property(dn, "ibm,io-base-loc-code", NULL);
 897                if (loc)
 898                        goto out;
 899
 900                /* Check the root port */
 901                dn = dn->child;
 902                if (!dn)
 903                        goto out;
 904        }
 905
 906        loc = of_get_property(dn, "ibm,loc-code", NULL);
 907        if (!loc)
 908                loc = of_get_property(dn, "ibm,slot-location-code", NULL);
 909
 910out:
 911        return loc ? loc : "N/A";
 912}
 913
 914/**
 915 * eeh_pe_bus_get - Retrieve PCI bus according to the given PE
 916 * @pe: EEH PE
 917 *
 918 * Retrieve the PCI bus according to the given PE. Basically,
 919 * there're 3 types of PEs: PHB/Bus/Device. For PHB PE, the
 920 * primary PCI bus will be retrieved. The parent bus will be
 921 * returned for BUS PE. However, we don't have associated PCI
 922 * bus for DEVICE PE.
 923 */
 924struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe)
 925{
 926        struct pci_bus *bus = NULL;
 927        struct eeh_dev *edev;
 928        struct pci_dev *pdev;
 929
 930        if (pe->type & EEH_PE_PHB) {
 931                bus = pe->phb->bus;
 932        } else if (pe->type & EEH_PE_BUS ||
 933                   pe->type & EEH_PE_DEVICE) {
 934                if (pe->bus) {
 935                        bus = pe->bus;
 936                        goto out;
 937                }
 938
 939                edev = list_first_entry(&pe->edevs, struct eeh_dev, list);
 940                pdev = eeh_dev_to_pci_dev(edev);
 941                if (pdev)
 942                        bus = pdev->bus;
 943        }
 944
 945out:
 946        return bus;
 947}
 948