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13#ifndef _XTENSA_ATOMIC_H
14#define _XTENSA_ATOMIC_H
15
16#include <linux/stringify.h>
17#include <linux/types.h>
18
19#ifdef __KERNEL__
20#include <asm/processor.h>
21#include <asm/cmpxchg.h>
22#include <asm/barrier.h>
23
24#define ATOMIC_INIT(i) { (i) }
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50#define atomic_read(v) ACCESS_ONCE((v)->counter)
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59#define atomic_set(v,i) ((v)->counter = (i))
60
61#if XCHAL_HAVE_S32C1I
62#define ATOMIC_OP(op) \
63static inline void atomic_##op(int i, atomic_t * v) \
64{ \
65 unsigned long tmp; \
66 int result; \
67 \
68 __asm__ __volatile__( \
69 "1: l32i %1, %3, 0\n" \
70 " wsr %1, scompare1\n" \
71 " " #op " %0, %1, %2\n" \
72 " s32c1i %0, %3, 0\n" \
73 " bne %0, %1, 1b\n" \
74 : "=&a" (result), "=&a" (tmp) \
75 : "a" (i), "a" (v) \
76 : "memory" \
77 ); \
78} \
79
80#define ATOMIC_OP_RETURN(op) \
81static inline int atomic_##op##_return(int i, atomic_t * v) \
82{ \
83 unsigned long tmp; \
84 int result; \
85 \
86 __asm__ __volatile__( \
87 "1: l32i %1, %3, 0\n" \
88 " wsr %1, scompare1\n" \
89 " " #op " %0, %1, %2\n" \
90 " s32c1i %0, %3, 0\n" \
91 " bne %0, %1, 1b\n" \
92 " " #op " %0, %0, %2\n" \
93 : "=&a" (result), "=&a" (tmp) \
94 : "a" (i), "a" (v) \
95 : "memory" \
96 ); \
97 \
98 return result; \
99}
100
101#else
102
103#define ATOMIC_OP(op) \
104static inline void atomic_##op(int i, atomic_t * v) \
105{ \
106 unsigned int vval; \
107 \
108 __asm__ __volatile__( \
109 " rsil a15, "__stringify(TOPLEVEL)"\n"\
110 " l32i %0, %2, 0\n" \
111 " " #op " %0, %0, %1\n" \
112 " s32i %0, %2, 0\n" \
113 " wsr a15, ps\n" \
114 " rsync\n" \
115 : "=&a" (vval) \
116 : "a" (i), "a" (v) \
117 : "a15", "memory" \
118 ); \
119} \
120
121#define ATOMIC_OP_RETURN(op) \
122static inline int atomic_##op##_return(int i, atomic_t * v) \
123{ \
124 unsigned int vval; \
125 \
126 __asm__ __volatile__( \
127 " rsil a15,"__stringify(TOPLEVEL)"\n" \
128 " l32i %0, %2, 0\n" \
129 " " #op " %0, %0, %1\n" \
130 " s32i %0, %2, 0\n" \
131 " wsr a15, ps\n" \
132 " rsync\n" \
133 : "=&a" (vval) \
134 : "a" (i), "a" (v) \
135 : "a15", "memory" \
136 ); \
137 \
138 return vval; \
139}
140
141#endif
142
143#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op)
144
145ATOMIC_OPS(add)
146ATOMIC_OPS(sub)
147
148ATOMIC_OP(and)
149ATOMIC_OP(or)
150ATOMIC_OP(xor)
151
152#undef ATOMIC_OPS
153#undef ATOMIC_OP_RETURN
154#undef ATOMIC_OP
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165#define atomic_sub_and_test(i,v) (atomic_sub_return((i),(v)) == 0)
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173#define atomic_inc(v) atomic_add(1,(v))
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181#define atomic_inc_return(v) atomic_add_return(1,(v))
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189#define atomic_dec(v) atomic_sub(1,(v))
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197#define atomic_dec_return(v) atomic_sub_return(1,(v))
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207#define atomic_dec_and_test(v) (atomic_sub_return(1,(v)) == 0)
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217#define atomic_inc_and_test(v) (atomic_add_return(1,(v)) == 0)
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228#define atomic_add_negative(i,v) (atomic_add_return((i),(v)) < 0)
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230#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
231#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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242static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
243{
244 int c, old;
245 c = atomic_read(v);
246 for (;;) {
247 if (unlikely(c == (u)))
248 break;
249 old = atomic_cmpxchg((v), c, c + (a));
250 if (likely(old == c))
251 break;
252 c = old;
253 }
254 return c;
255}
256
257#endif
258
259#endif
260