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26#include <linux/module.h>
27#include <linux/slab.h>
28#include <linux/fb.h>
29
30#include <drm/drmP.h>
31#include <drm/drm_crtc.h>
32#include <drm/drm_crtc_helper.h>
33#include <drm/radeon_drm.h>
34#include "radeon.h"
35
36#include <drm/drm_fb_helper.h>
37
38#include <linux/vga_switcheroo.h>
39
40
41
42
43
44struct radeon_fbdev {
45 struct drm_fb_helper helper;
46 struct radeon_framebuffer rfb;
47 struct list_head fbdev_list;
48 struct radeon_device *rdev;
49};
50
51static struct fb_ops radeonfb_ops = {
52 .owner = THIS_MODULE,
53 .fb_check_var = drm_fb_helper_check_var,
54 .fb_set_par = drm_fb_helper_set_par,
55 .fb_fillrect = drm_fb_helper_cfb_fillrect,
56 .fb_copyarea = drm_fb_helper_cfb_copyarea,
57 .fb_imageblit = drm_fb_helper_cfb_imageblit,
58 .fb_pan_display = drm_fb_helper_pan_display,
59 .fb_blank = drm_fb_helper_blank,
60 .fb_setcmap = drm_fb_helper_setcmap,
61 .fb_debug_enter = drm_fb_helper_debug_enter,
62 .fb_debug_leave = drm_fb_helper_debug_leave,
63};
64
65
66int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
67{
68 int aligned = width;
69 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
70 int pitch_mask = 0;
71
72 switch (bpp / 8) {
73 case 1:
74 pitch_mask = align_large ? 255 : 127;
75 break;
76 case 2:
77 pitch_mask = align_large ? 127 : 31;
78 break;
79 case 3:
80 case 4:
81 pitch_mask = align_large ? 63 : 15;
82 break;
83 }
84
85 aligned += pitch_mask;
86 aligned &= ~pitch_mask;
87 return aligned;
88}
89
90static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
91{
92 struct radeon_bo *rbo = gem_to_radeon_bo(gobj);
93 int ret;
94
95 ret = radeon_bo_reserve(rbo, false);
96 if (likely(ret == 0)) {
97 radeon_bo_kunmap(rbo);
98 radeon_bo_unpin(rbo);
99 radeon_bo_unreserve(rbo);
100 }
101 drm_gem_object_unreference_unlocked(gobj);
102}
103
104static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
105 struct drm_mode_fb_cmd2 *mode_cmd,
106 struct drm_gem_object **gobj_p)
107{
108 struct radeon_device *rdev = rfbdev->rdev;
109 struct drm_gem_object *gobj = NULL;
110 struct radeon_bo *rbo = NULL;
111 bool fb_tiled = false;
112 u32 tiling_flags = 0;
113 int ret;
114 int aligned_size, size;
115 int height = mode_cmd->height;
116 u32 bpp, depth;
117
118 drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
119
120
121 mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp,
122 fb_tiled) * ((bpp + 1) / 8);
123
124 if (rdev->family >= CHIP_R600)
125 height = ALIGN(mode_cmd->height, 8);
126 size = mode_cmd->pitches[0] * height;
127 aligned_size = ALIGN(size, PAGE_SIZE);
128 ret = radeon_gem_object_create(rdev, aligned_size, 0,
129 RADEON_GEM_DOMAIN_VRAM,
130 0, true, &gobj);
131 if (ret) {
132 printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
133 aligned_size);
134 return -ENOMEM;
135 }
136 rbo = gem_to_radeon_bo(gobj);
137
138 if (fb_tiled)
139 tiling_flags = RADEON_TILING_MACRO;
140
141#ifdef __BIG_ENDIAN
142 switch (bpp) {
143 case 32:
144 tiling_flags |= RADEON_TILING_SWAP_32BIT;
145 break;
146 case 16:
147 tiling_flags |= RADEON_TILING_SWAP_16BIT;
148 default:
149 break;
150 }
151#endif
152
153 if (tiling_flags) {
154 ret = radeon_bo_set_tiling_flags(rbo,
155 tiling_flags | RADEON_TILING_SURFACE,
156 mode_cmd->pitches[0]);
157 if (ret)
158 dev_err(rdev->dev, "FB failed to set tiling flags\n");
159 }
160
161
162 ret = radeon_bo_reserve(rbo, false);
163 if (unlikely(ret != 0))
164 goto out_unref;
165
166 ret = radeon_bo_pin_restricted(rbo, RADEON_GEM_DOMAIN_VRAM,
167 ASIC_IS_AVIVO(rdev) ? 0 : 1 << 27,
168 NULL);
169 if (ret) {
170 radeon_bo_unreserve(rbo);
171 goto out_unref;
172 }
173 if (fb_tiled)
174 radeon_bo_check_tiling(rbo, 0, 0);
175 ret = radeon_bo_kmap(rbo, NULL);
176 radeon_bo_unreserve(rbo);
177 if (ret) {
178 goto out_unref;
179 }
180
181 *gobj_p = gobj;
182 return 0;
183out_unref:
184 radeonfb_destroy_pinned_object(gobj);
185 *gobj_p = NULL;
186 return ret;
187}
188
189static int radeonfb_create(struct drm_fb_helper *helper,
190 struct drm_fb_helper_surface_size *sizes)
191{
192 struct radeon_fbdev *rfbdev =
193 container_of(helper, struct radeon_fbdev, helper);
194 struct radeon_device *rdev = rfbdev->rdev;
195 struct fb_info *info;
196 struct drm_framebuffer *fb = NULL;
197 struct drm_mode_fb_cmd2 mode_cmd;
198 struct drm_gem_object *gobj = NULL;
199 struct radeon_bo *rbo = NULL;
200 int ret;
201 unsigned long tmp;
202
203 mode_cmd.width = sizes->surface_width;
204 mode_cmd.height = sizes->surface_height;
205
206
207 if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
208 sizes->surface_bpp = 32;
209
210 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
211 sizes->surface_depth);
212
213 ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
214 if (ret) {
215 DRM_ERROR("failed to create fbcon object %d\n", ret);
216 return ret;
217 }
218
219 rbo = gem_to_radeon_bo(gobj);
220
221
222 info = drm_fb_helper_alloc_fbi(helper);
223 if (IS_ERR(info)) {
224 ret = PTR_ERR(info);
225 goto out_unref;
226 }
227
228 info->par = rfbdev;
229 info->skip_vt_switch = true;
230
231 ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
232 if (ret) {
233 DRM_ERROR("failed to initialize framebuffer %d\n", ret);
234 goto out_destroy_fbi;
235 }
236
237 fb = &rfbdev->rfb.base;
238
239
240 rfbdev->helper.fb = fb;
241
242 memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
243
244 strcpy(info->fix.id, "radeondrmfb");
245
246 drm_fb_helper_fill_fix(info, fb->pitches[0], fb->depth);
247
248 info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
249 info->fbops = &radeonfb_ops;
250
251 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
252 info->fix.smem_start = rdev->mc.aper_base + tmp;
253 info->fix.smem_len = radeon_bo_size(rbo);
254 info->screen_base = rbo->kptr;
255 info->screen_size = radeon_bo_size(rbo);
256
257 drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
258
259
260 info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
261 info->apertures->ranges[0].size = rdev->mc.aper_size;
262
263
264
265 if (info->screen_base == NULL) {
266 ret = -ENOSPC;
267 goto out_destroy_fbi;
268 }
269
270 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
271 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
272 DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
273 DRM_INFO("fb depth is %d\n", fb->depth);
274 DRM_INFO(" pitch is %d\n", fb->pitches[0]);
275
276 vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
277 return 0;
278
279out_destroy_fbi:
280 drm_fb_helper_release_fbi(helper);
281out_unref:
282 if (rbo) {
283
284 }
285 if (fb && ret) {
286 drm_gem_object_unreference(gobj);
287 drm_framebuffer_unregister_private(fb);
288 drm_framebuffer_cleanup(fb);
289 kfree(fb);
290 }
291 return ret;
292}
293
294void radeon_fb_output_poll_changed(struct radeon_device *rdev)
295{
296 drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
297}
298
299static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
300{
301 struct radeon_framebuffer *rfb = &rfbdev->rfb;
302
303 drm_fb_helper_unregister_fbi(&rfbdev->helper);
304 drm_fb_helper_release_fbi(&rfbdev->helper);
305
306 if (rfb->obj) {
307 radeonfb_destroy_pinned_object(rfb->obj);
308 rfb->obj = NULL;
309 }
310 drm_fb_helper_fini(&rfbdev->helper);
311 drm_framebuffer_unregister_private(&rfb->base);
312 drm_framebuffer_cleanup(&rfb->base);
313
314 return 0;
315}
316
317static const struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
318 .gamma_set = radeon_crtc_fb_gamma_set,
319 .gamma_get = radeon_crtc_fb_gamma_get,
320 .fb_probe = radeonfb_create,
321};
322
323int radeon_fbdev_init(struct radeon_device *rdev)
324{
325 struct radeon_fbdev *rfbdev;
326 int bpp_sel = 32;
327 int ret;
328
329
330 if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
331 bpp_sel = 8;
332
333 rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
334 if (!rfbdev)
335 return -ENOMEM;
336
337 rfbdev->rdev = rdev;
338 rdev->mode_info.rfbdev = rfbdev;
339
340 drm_fb_helper_prepare(rdev->ddev, &rfbdev->helper,
341 &radeon_fb_helper_funcs);
342
343 ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
344 rdev->num_crtc,
345 RADEONFB_CONN_LIMIT);
346 if (ret)
347 goto free;
348
349 ret = drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
350 if (ret)
351 goto fini;
352
353
354 drm_helper_disable_unused_functions(rdev->ddev);
355
356 ret = drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
357 if (ret)
358 goto fini;
359
360 return 0;
361
362fini:
363 drm_fb_helper_fini(&rfbdev->helper);
364free:
365 kfree(rfbdev);
366 return ret;
367}
368
369void radeon_fbdev_fini(struct radeon_device *rdev)
370{
371 if (!rdev->mode_info.rfbdev)
372 return;
373
374 radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
375 kfree(rdev->mode_info.rfbdev);
376 rdev->mode_info.rfbdev = NULL;
377}
378
379void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
380{
381 fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state);
382}
383
384bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
385{
386 if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj))
387 return true;
388 return false;
389}
390
391void radeon_fb_add_connector(struct radeon_device *rdev, struct drm_connector *connector)
392{
393 drm_fb_helper_add_one_connector(&rdev->mode_info.rfbdev->helper, connector);
394}
395
396void radeon_fb_remove_connector(struct radeon_device *rdev, struct drm_connector *connector)
397{
398 drm_fb_helper_remove_one_connector(&rdev->mode_info.rfbdev->helper, connector);
399}
400
401void radeon_fbdev_restore_mode(struct radeon_device *rdev)
402{
403 struct radeon_fbdev *rfbdev = rdev->mode_info.rfbdev;
404 struct drm_fb_helper *fb_helper;
405 int ret;
406
407 if (!rfbdev)
408 return;
409
410 fb_helper = &rfbdev->helper;
411
412 ret = drm_fb_helper_restore_fbdev_mode_unlocked(fb_helper);
413 if (ret)
414 DRM_DEBUG("failed to restore crtc mode\n");
415}
416
