LXR linux/drivers/gpu/drm/radeon/uvd_v3

   1/*
   2 * Copyright 2013 Advanced Micro Devices, Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Christian König <christian.koenig@amd.com>
  23 */
  24
  25#include <drm/drmP.h>
  26#include "radeon.h"
  27#include "radeon_asic.h"
  28#include "nid.h"
  29
  30/**
  31 * uvd_v3_1_semaphore_emit - emit semaphore command
  32 *
  33 * @rdev: radeon_device pointer
  34 * @ring: radeon_ring pointer
  35 * @semaphore: semaphore to emit commands for
  36 * @emit_wait: true if we should emit a wait command
  37 *
  38 * Emit a semaphore command (either wait or signal) to the UVD ring.
  39 */
  40bool uvd_v3_1_semaphore_emit(struct radeon_device *rdev,
  41                             struct radeon_ring *ring,
  42                             struct radeon_semaphore *semaphore,
  43                             bool emit_wait)
  44{
  45        uint64_t addr = semaphore->gpu_addr;
  46
  47        radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_LOW, 0));
  48        radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF);
  49
  50        radeon_ring_write(ring, PACKET0(UVD_SEMA_ADDR_HIGH, 0));
  51        radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF);
  52
  53        radeon_ring_write(ring, PACKET0(UVD_SEMA_CMD, 0));
  54        radeon_ring_write(ring, 0x80 | (emit_wait ? 1 : 0));
  55
  56        return true;
  57}
  58