linux/drivers/media/platform/soc_camera/mx3_camera.c
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   1/*
   2 * V4L2 Driver for i.MX3x camera host
   3 *
   4 * Copyright (C) 2008
   5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License version 2 as
   9 * published by the Free Software Foundation.
  10 */
  11
  12#include <linux/init.h>
  13#include <linux/module.h>
  14#include <linux/videodev2.h>
  15#include <linux/platform_device.h>
  16#include <linux/clk.h>
  17#include <linux/vmalloc.h>
  18#include <linux/interrupt.h>
  19#include <linux/sched.h>
  20#include <linux/dma/ipu-dma.h>
  21
  22#include <media/v4l2-common.h>
  23#include <media/v4l2-dev.h>
  24#include <media/videobuf2-dma-contig.h>
  25#include <media/soc_camera.h>
  26#include <media/soc_mediabus.h>
  27
  28#include <linux/platform_data/camera-mx3.h>
  29#include <linux/platform_data/dma-imx.h>
  30
  31#define MX3_CAM_DRV_NAME "mx3-camera"
  32
  33/* CMOS Sensor Interface Registers */
  34#define CSI_REG_START           0x60
  35
  36#define CSI_SENS_CONF           (0x60 - CSI_REG_START)
  37#define CSI_SENS_FRM_SIZE       (0x64 - CSI_REG_START)
  38#define CSI_ACT_FRM_SIZE        (0x68 - CSI_REG_START)
  39#define CSI_OUT_FRM_CTRL        (0x6C - CSI_REG_START)
  40#define CSI_TST_CTRL            (0x70 - CSI_REG_START)
  41#define CSI_CCIR_CODE_1         (0x74 - CSI_REG_START)
  42#define CSI_CCIR_CODE_2         (0x78 - CSI_REG_START)
  43#define CSI_CCIR_CODE_3         (0x7C - CSI_REG_START)
  44#define CSI_FLASH_STROBE_1      (0x80 - CSI_REG_START)
  45#define CSI_FLASH_STROBE_2      (0x84 - CSI_REG_START)
  46
  47#define CSI_SENS_CONF_VSYNC_POL_SHIFT           0
  48#define CSI_SENS_CONF_HSYNC_POL_SHIFT           1
  49#define CSI_SENS_CONF_DATA_POL_SHIFT            2
  50#define CSI_SENS_CONF_PIX_CLK_POL_SHIFT         3
  51#define CSI_SENS_CONF_SENS_PRTCL_SHIFT          4
  52#define CSI_SENS_CONF_SENS_CLKSRC_SHIFT         7
  53#define CSI_SENS_CONF_DATA_FMT_SHIFT            8
  54#define CSI_SENS_CONF_DATA_WIDTH_SHIFT          10
  55#define CSI_SENS_CONF_EXT_VSYNC_SHIFT           15
  56#define CSI_SENS_CONF_DIVRATIO_SHIFT            16
  57
  58#define CSI_SENS_CONF_DATA_FMT_RGB_YUV444       (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  59#define CSI_SENS_CONF_DATA_FMT_YUV422           (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  60#define CSI_SENS_CONF_DATA_FMT_BAYER            (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
  61
  62#define MAX_VIDEO_MEM 16
  63
  64struct mx3_camera_buffer {
  65        /* common v4l buffer stuff -- must be first */
  66        struct vb2_buffer                       vb;
  67        struct list_head                        queue;
  68
  69        /* One descriptot per scatterlist (per frame) */
  70        struct dma_async_tx_descriptor          *txd;
  71
  72        /* We have to "build" a scatterlist ourselves - one element per frame */
  73        struct scatterlist                      sg;
  74};
  75
  76/**
  77 * struct mx3_camera_dev - i.MX3x camera (CSI) object
  78 * @dev:                camera device, to which the coherent buffer is attached
  79 * @icd:                currently attached camera sensor
  80 * @clk:                pointer to clock
  81 * @base:               remapped register base address
  82 * @pdata:              platform data
  83 * @platform_flags:     platform flags
  84 * @mclk:               master clock frequency in Hz
  85 * @capture:            list of capture videobuffers
  86 * @lock:               protects video buffer lists
  87 * @active:             active video buffer
  88 * @idmac_channel:      array of pointers to IPU DMAC DMA channels
  89 * @soc_host:           embedded soc_host object
  90 */
  91struct mx3_camera_dev {
  92        /*
  93         * i.MX3x is only supposed to handle one camera on its Camera Sensor
  94         * Interface. If anyone ever builds hardware to enable more than one
  95         * camera _simultaneously_, they will have to modify this driver too
  96         */
  97        struct clk              *clk;
  98
  99        void __iomem            *base;
 100
 101        struct mx3_camera_pdata *pdata;
 102
 103        unsigned long           platform_flags;
 104        unsigned long           mclk;
 105        u16                     width_flags;    /* max 15 bits */
 106
 107        struct list_head        capture;
 108        spinlock_t              lock;           /* Protects video buffer lists */
 109        struct mx3_camera_buffer *active;
 110        size_t                  buf_total;
 111        struct vb2_alloc_ctx    *alloc_ctx;
 112        enum v4l2_field         field;
 113        int                     sequence;
 114
 115        /* IDMAC / dmaengine interface */
 116        struct idmac_channel    *idmac_channel[1];      /* We need one channel */
 117
 118        struct soc_camera_host  soc_host;
 119};
 120
 121struct dma_chan_request {
 122        struct mx3_camera_dev   *mx3_cam;
 123        enum ipu_channel        id;
 124};
 125
 126static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
 127{
 128        return __raw_readl(mx3->base + reg);
 129}
 130
 131static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
 132{
 133        __raw_writel(value, mx3->base + reg);
 134}
 135
 136static struct mx3_camera_buffer *to_mx3_vb(struct vb2_buffer *vb)
 137{
 138        return container_of(vb, struct mx3_camera_buffer, vb);
 139}
 140
 141/* Called from the IPU IDMAC ISR */
 142static void mx3_cam_dma_done(void *arg)
 143{
 144        struct idmac_tx_desc *desc = to_tx_desc(arg);
 145        struct dma_chan *chan = desc->txd.chan;
 146        struct idmac_channel *ichannel = to_idmac_chan(chan);
 147        struct mx3_camera_dev *mx3_cam = ichannel->client;
 148
 149        dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
 150                desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
 151
 152        spin_lock(&mx3_cam->lock);
 153        if (mx3_cam->active) {
 154                struct vb2_buffer *vb = &mx3_cam->active->vb;
 155                struct mx3_camera_buffer *buf = to_mx3_vb(vb);
 156
 157                list_del_init(&buf->queue);
 158                v4l2_get_timestamp(&vb->v4l2_buf.timestamp);
 159                vb->v4l2_buf.field = mx3_cam->field;
 160                vb->v4l2_buf.sequence = mx3_cam->sequence++;
 161                vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
 162        }
 163
 164        if (list_empty(&mx3_cam->capture)) {
 165                mx3_cam->active = NULL;
 166                spin_unlock(&mx3_cam->lock);
 167
 168                /*
 169                 * stop capture - without further buffers IPU_CHA_BUF0_RDY will
 170                 * not get updated
 171                 */
 172                return;
 173        }
 174
 175        mx3_cam->active = list_entry(mx3_cam->capture.next,
 176                                     struct mx3_camera_buffer, queue);
 177        spin_unlock(&mx3_cam->lock);
 178}
 179
 180/*
 181 * Videobuf operations
 182 */
 183
 184/*
 185 * Calculate the __buffer__ (not data) size and number of buffers.
 186 */
 187static int mx3_videobuf_setup(struct vb2_queue *vq,
 188                        const struct v4l2_format *fmt,
 189                        unsigned int *count, unsigned int *num_planes,
 190                        unsigned int sizes[], void *alloc_ctxs[])
 191{
 192        struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
 193        struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
 194        struct mx3_camera_dev *mx3_cam = ici->priv;
 195
 196        if (!mx3_cam->idmac_channel[0])
 197                return -EINVAL;
 198
 199        if (fmt) {
 200                const struct soc_camera_format_xlate *xlate = soc_camera_xlate_by_fourcc(icd,
 201                                                                fmt->fmt.pix.pixelformat);
 202                unsigned int bytes_per_line;
 203                int ret;
 204
 205                if (!xlate)
 206                        return -EINVAL;
 207
 208                ret = soc_mbus_bytes_per_line(fmt->fmt.pix.width,
 209                                              xlate->host_fmt);
 210                if (ret < 0)
 211                        return ret;
 212
 213                bytes_per_line = max_t(u32, fmt->fmt.pix.bytesperline, ret);
 214
 215                ret = soc_mbus_image_size(xlate->host_fmt, bytes_per_line,
 216                                          fmt->fmt.pix.height);
 217                if (ret < 0)
 218                        return ret;
 219
 220                sizes[0] = max_t(u32, fmt->fmt.pix.sizeimage, ret);
 221        } else {
 222                /* Called from VIDIOC_REQBUFS or in compatibility mode */
 223                sizes[0] = icd->sizeimage;
 224        }
 225
 226        alloc_ctxs[0] = mx3_cam->alloc_ctx;
 227
 228        if (!vq->num_buffers)
 229                mx3_cam->sequence = 0;
 230
 231        if (!*count)
 232                *count = 2;
 233
 234        /* If *num_planes != 0, we have already verified *count. */
 235        if (!*num_planes &&
 236            sizes[0] * *count + mx3_cam->buf_total > MAX_VIDEO_MEM * 1024 * 1024)
 237                *count = (MAX_VIDEO_MEM * 1024 * 1024 - mx3_cam->buf_total) /
 238                        sizes[0];
 239
 240        *num_planes = 1;
 241
 242        return 0;
 243}
 244
 245static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
 246{
 247        /* Add more formats as need arises and test possibilities appear... */
 248        switch (fourcc) {
 249        case V4L2_PIX_FMT_RGB24:
 250                return IPU_PIX_FMT_RGB24;
 251        case V4L2_PIX_FMT_UYVY:
 252        case V4L2_PIX_FMT_RGB565:
 253        default:
 254                return IPU_PIX_FMT_GENERIC;
 255        }
 256}
 257
 258static void mx3_videobuf_queue(struct vb2_buffer *vb)
 259{
 260        struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
 261        struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
 262        struct mx3_camera_dev *mx3_cam = ici->priv;
 263        struct mx3_camera_buffer *buf = to_mx3_vb(vb);
 264        struct scatterlist *sg = &buf->sg;
 265        struct dma_async_tx_descriptor *txd;
 266        struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
 267        struct idmac_video_param *video = &ichan->params.video;
 268        const struct soc_mbus_pixelfmt *host_fmt = icd->current_fmt->host_fmt;
 269        dma_cookie_t cookie;
 270        size_t new_size;
 271
 272        new_size = icd->sizeimage;
 273
 274        if (vb2_plane_size(vb, 0) < new_size) {
 275                dev_err(icd->parent, "Buffer #%d too small (%lu < %zu)\n",
 276                        vb->v4l2_buf.index, vb2_plane_size(vb, 0), new_size);
 277                goto error;
 278        }
 279
 280        if (!buf->txd) {
 281                sg_dma_address(sg)      = vb2_dma_contig_plane_dma_addr(vb, 0);
 282                sg_dma_len(sg)          = new_size;
 283
 284                txd = dmaengine_prep_slave_sg(
 285                        &ichan->dma_chan, sg, 1, DMA_DEV_TO_MEM,
 286                        DMA_PREP_INTERRUPT);
 287                if (!txd)
 288                        goto error;
 289
 290                txd->callback_param     = txd;
 291                txd->callback           = mx3_cam_dma_done;
 292
 293                buf->txd                = txd;
 294        } else {
 295                txd = buf->txd;
 296        }
 297
 298        vb2_set_plane_payload(vb, 0, new_size);
 299
 300        /* This is the configuration of one sg-element */
 301        video->out_pixel_fmt = fourcc_to_ipu_pix(host_fmt->fourcc);
 302
 303        if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) {
 304                /*
 305                 * If the IPU DMA channel is configured to transfer generic
 306                 * 8-bit data, we have to set up the geometry parameters
 307                 * correctly, according to the current pixel format. The DMA
 308                 * horizontal parameters in this case are expressed in bytes,
 309                 * not in pixels.
 310                 */
 311                video->out_width        = icd->bytesperline;
 312                video->out_height       = icd->user_height;
 313                video->out_stride       = icd->bytesperline;
 314        } else {
 315                /*
 316                 * For IPU known formats the pixel unit will be managed
 317                 * successfully by the IPU code
 318                 */
 319                video->out_width        = icd->user_width;
 320                video->out_height       = icd->user_height;
 321                video->out_stride       = icd->user_width;
 322        }
 323
 324#ifdef DEBUG
 325        /* helps to see what DMA actually has written */
 326        if (vb2_plane_vaddr(vb, 0))
 327                memset(vb2_plane_vaddr(vb, 0), 0xaa, vb2_get_plane_payload(vb, 0));
 328#endif
 329
 330        spin_lock_irq(&mx3_cam->lock);
 331        list_add_tail(&buf->queue, &mx3_cam->capture);
 332
 333        if (!mx3_cam->active)
 334                mx3_cam->active = buf;
 335
 336        spin_unlock_irq(&mx3_cam->lock);
 337
 338        cookie = txd->tx_submit(txd);
 339        dev_dbg(icd->parent, "Submitted cookie %d DMA 0x%08x\n",
 340                cookie, sg_dma_address(&buf->sg));
 341
 342        if (cookie >= 0)
 343                return;
 344
 345        spin_lock_irq(&mx3_cam->lock);
 346
 347        /* Submit error */
 348        list_del_init(&buf->queue);
 349
 350        if (mx3_cam->active == buf)
 351                mx3_cam->active = NULL;
 352
 353        spin_unlock_irq(&mx3_cam->lock);
 354error:
 355        vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
 356}
 357
 358static void mx3_videobuf_release(struct vb2_buffer *vb)
 359{
 360        struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
 361        struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
 362        struct mx3_camera_dev *mx3_cam = ici->priv;
 363        struct mx3_camera_buffer *buf = to_mx3_vb(vb);
 364        struct dma_async_tx_descriptor *txd = buf->txd;
 365        unsigned long flags;
 366
 367        dev_dbg(icd->parent,
 368                "Release%s DMA 0x%08x, queue %sempty\n",
 369                mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
 370                list_empty(&buf->queue) ? "" : "not ");
 371
 372        spin_lock_irqsave(&mx3_cam->lock, flags);
 373
 374        if (mx3_cam->active == buf)
 375                mx3_cam->active = NULL;
 376
 377        /* Doesn't hurt also if the list is empty */
 378        list_del_init(&buf->queue);
 379
 380        if (txd) {
 381                buf->txd = NULL;
 382                if (mx3_cam->idmac_channel[0])
 383                        async_tx_ack(txd);
 384        }
 385
 386        spin_unlock_irqrestore(&mx3_cam->lock, flags);
 387
 388        mx3_cam->buf_total -= vb2_plane_size(vb, 0);
 389}
 390
 391static int mx3_videobuf_init(struct vb2_buffer *vb)
 392{
 393        struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
 394        struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
 395        struct mx3_camera_dev *mx3_cam = ici->priv;
 396        struct mx3_camera_buffer *buf = to_mx3_vb(vb);
 397
 398        if (!buf->txd) {
 399                /* This is for locking debugging only */
 400                INIT_LIST_HEAD(&buf->queue);
 401                sg_init_table(&buf->sg, 1);
 402
 403                mx3_cam->buf_total += vb2_plane_size(vb, 0);
 404        }
 405
 406        return 0;
 407}
 408
 409static void mx3_stop_streaming(struct vb2_queue *q)
 410{
 411        struct soc_camera_device *icd = soc_camera_from_vb2q(q);
 412        struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
 413        struct mx3_camera_dev *mx3_cam = ici->priv;
 414        struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
 415        struct mx3_camera_buffer *buf, *tmp;
 416        unsigned long flags;
 417
 418        if (ichan)
 419                dmaengine_pause(&ichan->dma_chan);
 420
 421        spin_lock_irqsave(&mx3_cam->lock, flags);
 422
 423        mx3_cam->active = NULL;
 424
 425        list_for_each_entry_safe(buf, tmp, &mx3_cam->capture, queue) {
 426                list_del_init(&buf->queue);
 427                vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
 428        }
 429
 430        spin_unlock_irqrestore(&mx3_cam->lock, flags);
 431}
 432
 433static struct vb2_ops mx3_videobuf_ops = {
 434        .queue_setup    = mx3_videobuf_setup,
 435        .buf_queue      = mx3_videobuf_queue,
 436        .buf_cleanup    = mx3_videobuf_release,
 437        .buf_init       = mx3_videobuf_init,
 438        .wait_prepare   = vb2_ops_wait_prepare,
 439        .wait_finish    = vb2_ops_wait_finish,
 440        .stop_streaming = mx3_stop_streaming,
 441};
 442
 443static int mx3_camera_init_videobuf(struct vb2_queue *q,
 444                                     struct soc_camera_device *icd)
 445{
 446        struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
 447
 448        q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
 449        q->io_modes = VB2_MMAP | VB2_USERPTR;
 450        q->drv_priv = icd;
 451        q->ops = &mx3_videobuf_ops;
 452        q->mem_ops = &vb2_dma_contig_memops;
 453        q->buf_struct_size = sizeof(struct mx3_camera_buffer);
 454        q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
 455        q->lock = &ici->host_lock;
 456
 457        return vb2_queue_init(q);
 458}
 459
 460/* First part of ipu_csi_init_interface() */
 461static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam)
 462{
 463        u32 conf;
 464        long rate;
 465
 466        /* Set default size: ipu_csi_set_window_size() */
 467        csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
 468        /* ...and position to 0:0: ipu_csi_set_window_pos() */
 469        conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
 470        csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
 471
 472        /* We use only gated clock synchronisation mode so far */
 473        conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
 474
 475        /* Set generic data, platform-biggest bus-width */
 476        conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
 477
 478        if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
 479                conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
 480        else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
 481                conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
 482        else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
 483                conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
 484        else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
 485                conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
 486
 487        if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
 488                conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
 489        if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
 490                conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
 491        if (mx3_cam->platform_flags & MX3_CAMERA_DP)
 492                conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
 493        if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
 494                conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
 495        if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
 496                conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
 497        if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
 498                conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
 499
 500        /* ipu_csi_init_interface() */
 501        csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
 502
 503        clk_prepare_enable(mx3_cam->clk);
 504        rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
 505        dev_dbg(mx3_cam->soc_host.v4l2_dev.dev, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
 506        if (rate)
 507                clk_set_rate(mx3_cam->clk, rate);
 508}
 509
 510static int mx3_camera_add_device(struct soc_camera_device *icd)
 511{
 512        dev_info(icd->parent, "MX3 Camera driver attached to camera %d\n",
 513                 icd->devnum);
 514
 515        return 0;
 516}
 517
 518static void mx3_camera_remove_device(struct soc_camera_device *icd)
 519{
 520        dev_info(icd->parent, "MX3 Camera driver detached from camera %d\n",
 521                 icd->devnum);
 522}
 523
 524/* Called with .host_lock held */
 525static int mx3_camera_clock_start(struct soc_camera_host *ici)
 526{
 527        struct mx3_camera_dev *mx3_cam = ici->priv;
 528
 529        mx3_camera_activate(mx3_cam);
 530
 531        mx3_cam->buf_total = 0;
 532
 533        return 0;
 534}
 535
 536/* Called with .host_lock held */
 537static void mx3_camera_clock_stop(struct soc_camera_host *ici)
 538{
 539        struct mx3_camera_dev *mx3_cam = ici->priv;
 540        struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
 541
 542        if (*ichan) {
 543                dma_release_channel(&(*ichan)->dma_chan);
 544                *ichan = NULL;
 545        }
 546
 547        clk_disable_unprepare(mx3_cam->clk);
 548}
 549
 550static int test_platform_param(struct mx3_camera_dev *mx3_cam,
 551                               unsigned char buswidth, unsigned long *flags)
 552{
 553        /*
 554         * If requested data width is supported by the platform, use it or any
 555         * possible lower value - i.MX31 is smart enough to shift bits
 556         */
 557        if (buswidth > fls(mx3_cam->width_flags))
 558                return -EINVAL;
 559
 560        /*
 561         * Platform specified synchronization and pixel clock polarities are
 562         * only a recommendation and are only used during probing. MX3x
 563         * camera interface only works in master mode, i.e., uses HSYNC and
 564         * VSYNC signals from the sensor
 565         */
 566        *flags = V4L2_MBUS_MASTER |
 567                V4L2_MBUS_HSYNC_ACTIVE_HIGH |
 568                V4L2_MBUS_HSYNC_ACTIVE_LOW |
 569                V4L2_MBUS_VSYNC_ACTIVE_HIGH |
 570                V4L2_MBUS_VSYNC_ACTIVE_LOW |
 571                V4L2_MBUS_PCLK_SAMPLE_RISING |
 572                V4L2_MBUS_PCLK_SAMPLE_FALLING |
 573                V4L2_MBUS_DATA_ACTIVE_HIGH |
 574                V4L2_MBUS_DATA_ACTIVE_LOW;
 575
 576        return 0;
 577}
 578
 579static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
 580                                    const unsigned int depth)
 581{
 582        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
 583        struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
 584        struct mx3_camera_dev *mx3_cam = ici->priv;
 585        struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
 586        unsigned long bus_flags, common_flags;
 587        int ret = test_platform_param(mx3_cam, depth, &bus_flags);
 588
 589        dev_dbg(icd->parent, "request bus width %d bit: %d\n", depth, ret);
 590
 591        if (ret < 0)
 592                return ret;
 593
 594        ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
 595        if (!ret) {
 596                common_flags = soc_mbus_config_compatible(&cfg,
 597                                                          bus_flags);
 598                if (!common_flags) {
 599                        dev_warn(icd->parent,
 600                                 "Flags incompatible: camera 0x%x, host 0x%lx\n",
 601                                 cfg.flags, bus_flags);
 602                        return -EINVAL;
 603                }
 604        } else if (ret != -ENOIOCTLCMD) {
 605                return ret;
 606        }
 607
 608        return 0;
 609}
 610
 611static bool chan_filter(struct dma_chan *chan, void *arg)
 612{
 613        struct dma_chan_request *rq = arg;
 614        struct mx3_camera_pdata *pdata;
 615
 616        if (!imx_dma_is_ipu(chan))
 617                return false;
 618
 619        if (!rq)
 620                return false;
 621
 622        pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data;
 623
 624        return rq->id == chan->chan_id &&
 625                pdata->dma_dev == chan->device->dev;
 626}
 627
 628static const struct soc_mbus_pixelfmt mx3_camera_formats[] = {
 629        {
 630                .fourcc                 = V4L2_PIX_FMT_SBGGR8,
 631                .name                   = "Bayer BGGR (sRGB) 8 bit",
 632                .bits_per_sample        = 8,
 633                .packing                = SOC_MBUS_PACKING_NONE,
 634                .order                  = SOC_MBUS_ORDER_LE,
 635                .layout                 = SOC_MBUS_LAYOUT_PACKED,
 636        }, {
 637                .fourcc                 = V4L2_PIX_FMT_GREY,
 638                .name                   = "Monochrome 8 bit",
 639                .bits_per_sample        = 8,
 640                .packing                = SOC_MBUS_PACKING_NONE,
 641                .order                  = SOC_MBUS_ORDER_LE,
 642                .layout                 = SOC_MBUS_LAYOUT_PACKED,
 643        },
 644};
 645
 646/* This will be corrected as we get more formats */
 647static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
 648{
 649        return  fmt->packing == SOC_MBUS_PACKING_NONE ||
 650                (fmt->bits_per_sample == 8 &&
 651                 fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
 652                (fmt->bits_per_sample > 8 &&
 653                 fmt->packing == SOC_MBUS_PACKING_EXTEND16);
 654}
 655
 656static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int idx,
 657                                  struct soc_camera_format_xlate *xlate)
 658{
 659        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
 660        struct device *dev = icd->parent;
 661        int formats = 0, ret;
 662        struct v4l2_subdev_mbus_code_enum code = {
 663                .which = V4L2_SUBDEV_FORMAT_ACTIVE,
 664                .index = idx,
 665        };
 666        const struct soc_mbus_pixelfmt *fmt;
 667
 668        ret = v4l2_subdev_call(sd, pad, enum_mbus_code, NULL, &code);
 669        if (ret < 0)
 670                /* No more formats */
 671                return 0;
 672
 673        fmt = soc_mbus_get_fmtdesc(code.code);
 674        if (!fmt) {
 675                dev_warn(icd->parent,
 676                         "Unsupported format code #%u: 0x%x\n", idx, code.code);
 677                return 0;
 678        }
 679
 680        /* This also checks support for the requested bits-per-sample */
 681        ret = mx3_camera_try_bus_param(icd, fmt->bits_per_sample);
 682        if (ret < 0)
 683                return 0;
 684
 685        switch (code.code) {
 686        case MEDIA_BUS_FMT_SBGGR10_1X10:
 687                formats++;
 688                if (xlate) {
 689                        xlate->host_fmt = &mx3_camera_formats[0];
 690                        xlate->code     = code.code;
 691                        xlate++;
 692                        dev_dbg(dev, "Providing format %s using code 0x%x\n",
 693                                mx3_camera_formats[0].name, code.code);
 694                }
 695                break;
 696        case MEDIA_BUS_FMT_Y10_1X10:
 697                formats++;
 698                if (xlate) {
 699                        xlate->host_fmt = &mx3_camera_formats[1];
 700                        xlate->code     = code.code;
 701                        xlate++;
 702                        dev_dbg(dev, "Providing format %s using code 0x%x\n",
 703                                mx3_camera_formats[1].name, code.code);
 704                }
 705                break;
 706        default:
 707                if (!mx3_camera_packing_supported(fmt))
 708                        return 0;
 709        }
 710
 711        /* Generic pass-through */
 712        formats++;
 713        if (xlate) {
 714                xlate->host_fmt = fmt;
 715                xlate->code     = code.code;
 716                dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n",
 717                        (fmt->fourcc >> (0*8)) & 0xFF,
 718                        (fmt->fourcc >> (1*8)) & 0xFF,
 719                        (fmt->fourcc >> (2*8)) & 0xFF,
 720                        (fmt->fourcc >> (3*8)) & 0xFF);
 721                xlate++;
 722        }
 723
 724        return formats;
 725}
 726
 727static void configure_geometry(struct mx3_camera_dev *mx3_cam,
 728                               unsigned int width, unsigned int height,
 729                               const struct soc_mbus_pixelfmt *fmt)
 730{
 731        u32 ctrl, width_field, height_field;
 732
 733        if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) {
 734                /*
 735                 * As the CSI will be configured to output BAYER, here
 736                 * the width parameter count the number of samples to
 737                 * capture to complete the whole image width.
 738                 */
 739                unsigned int num, den;
 740                int ret = soc_mbus_samples_per_pixel(fmt, &num, &den);
 741                BUG_ON(ret < 0);
 742                width = width * num / den;
 743        }
 744
 745        /* Setup frame size - this cannot be changed on-the-fly... */
 746        width_field = width - 1;
 747        height_field = height - 1;
 748        csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
 749
 750        csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
 751        csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
 752
 753        csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
 754
 755        /* ...and position */
 756        ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
 757        /* Sensor does the cropping */
 758        csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
 759}
 760
 761static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
 762{
 763        dma_cap_mask_t mask;
 764        struct dma_chan *chan;
 765        struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
 766        /* We have to use IDMAC_IC_7 for Bayer / generic data */
 767        struct dma_chan_request rq = {.mx3_cam = mx3_cam,
 768                                      .id = IDMAC_IC_7};
 769
 770        dma_cap_zero(mask);
 771        dma_cap_set(DMA_SLAVE, mask);
 772        dma_cap_set(DMA_PRIVATE, mask);
 773        chan = dma_request_channel(mask, chan_filter, &rq);
 774        if (!chan)
 775                return -EBUSY;
 776
 777        *ichan = to_idmac_chan(chan);
 778        (*ichan)->client = mx3_cam;
 779
 780        return 0;
 781}
 782
 783/*
 784 * FIXME: learn to use stride != width, then we can keep stride properly aligned
 785 * and support arbitrary (even) widths.
 786 */
 787static inline void stride_align(__u32 *width)
 788{
 789        if (ALIGN(*width, 8) < 4096)
 790                *width = ALIGN(*width, 8);
 791        else
 792                *width = *width &  ~7;
 793}
 794
 795/*
 796 * As long as we don't implement host-side cropping and scaling, we can use
 797 * default g_crop and cropcap from soc_camera.c
 798 */
 799static int mx3_camera_set_crop(struct soc_camera_device *icd,
 800                               const struct v4l2_crop *a)
 801{
 802        struct v4l2_crop a_writable = *a;
 803        struct v4l2_rect *rect = &a_writable.c;
 804        struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
 805        struct mx3_camera_dev *mx3_cam = ici->priv;
 806        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
 807        struct v4l2_subdev_format fmt = {
 808                .which = V4L2_SUBDEV_FORMAT_ACTIVE,
 809        };
 810        struct v4l2_mbus_framefmt *mf = &fmt.format;
 811        int ret;
 812
 813        soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096);
 814        soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096);
 815
 816        ret = v4l2_subdev_call(sd, video, s_crop, a);
 817        if (ret < 0)
 818                return ret;
 819
 820        /* The capture device might have changed its output sizes */
 821        ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &fmt);
 822        if (ret < 0)
 823                return ret;
 824
 825        if (mf->code != icd->current_fmt->code)
 826                return -EINVAL;
 827
 828        if (mf->width & 7) {
 829                /* Ouch! We can only handle 8-byte aligned width... */
 830                stride_align(&mf->width);
 831                ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &fmt);
 832                if (ret < 0)
 833                        return ret;
 834        }
 835
 836        if (mf->width != icd->user_width || mf->height != icd->user_height)
 837                configure_geometry(mx3_cam, mf->width, mf->height,
 838                                   icd->current_fmt->host_fmt);
 839
 840        dev_dbg(icd->parent, "Sensor cropped %dx%d\n",
 841                mf->width, mf->height);
 842
 843        icd->user_width         = mf->width;
 844        icd->user_height        = mf->height;
 845
 846        return ret;
 847}
 848
 849static int mx3_camera_set_fmt(struct soc_camera_device *icd,
 850                              struct v4l2_format *f)
 851{
 852        struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
 853        struct mx3_camera_dev *mx3_cam = ici->priv;
 854        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
 855        const struct soc_camera_format_xlate *xlate;
 856        struct v4l2_pix_format *pix = &f->fmt.pix;
 857        struct v4l2_subdev_format format = {
 858                .which = V4L2_SUBDEV_FORMAT_ACTIVE,
 859        };
 860        struct v4l2_mbus_framefmt *mf = &format.format;
 861        int ret;
 862
 863        xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
 864        if (!xlate) {
 865                dev_warn(icd->parent, "Format %x not found\n",
 866                         pix->pixelformat);
 867                return -EINVAL;
 868        }
 869
 870        stride_align(&pix->width);
 871        dev_dbg(icd->parent, "Set format %dx%d\n", pix->width, pix->height);
 872
 873        /*
 874         * Might have to perform a complete interface initialisation like in
 875         * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
 876         * mxc_v4l2_s_fmt()
 877         */
 878
 879        configure_geometry(mx3_cam, pix->width, pix->height, xlate->host_fmt);
 880
 881        mf->width       = pix->width;
 882        mf->height      = pix->height;
 883        mf->field       = pix->field;
 884        mf->colorspace  = pix->colorspace;
 885        mf->code        = xlate->code;
 886
 887        ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &format);
 888        if (ret < 0)
 889                return ret;
 890
 891        if (mf->code != xlate->code)
 892                return -EINVAL;
 893
 894        if (!mx3_cam->idmac_channel[0]) {
 895                ret = acquire_dma_channel(mx3_cam);
 896                if (ret < 0)
 897                        return ret;
 898        }
 899
 900        pix->width              = mf->width;
 901        pix->height             = mf->height;
 902        pix->field              = mf->field;
 903        mx3_cam->field          = mf->field;
 904        pix->colorspace         = mf->colorspace;
 905        icd->current_fmt        = xlate;
 906
 907        dev_dbg(icd->parent, "Sensor set %dx%d\n", pix->width, pix->height);
 908
 909        return ret;
 910}
 911
 912static int mx3_camera_try_fmt(struct soc_camera_device *icd,
 913                              struct v4l2_format *f)
 914{
 915        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
 916        const struct soc_camera_format_xlate *xlate;
 917        struct v4l2_pix_format *pix = &f->fmt.pix;
 918        struct v4l2_subdev_pad_config pad_cfg;
 919        struct v4l2_subdev_format format = {
 920                .which = V4L2_SUBDEV_FORMAT_TRY,
 921        };
 922        struct v4l2_mbus_framefmt *mf = &format.format;
 923        __u32 pixfmt = pix->pixelformat;
 924        int ret;
 925
 926        xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
 927        if (pixfmt && !xlate) {
 928                dev_warn(icd->parent, "Format %x not found\n", pixfmt);
 929                return -EINVAL;
 930        }
 931
 932        /* limit to MX3 hardware capabilities */
 933        if (pix->height > 4096)
 934                pix->height = 4096;
 935        if (pix->width > 4096)
 936                pix->width = 4096;
 937
 938        /* limit to sensor capabilities */
 939        mf->width       = pix->width;
 940        mf->height      = pix->height;
 941        mf->field       = pix->field;
 942        mf->colorspace  = pix->colorspace;
 943        mf->code        = xlate->code;
 944
 945        ret = v4l2_subdev_call(sd, pad, set_fmt, &pad_cfg, &format);
 946        if (ret < 0)
 947                return ret;
 948
 949        pix->width      = mf->width;
 950        pix->height     = mf->height;
 951        pix->colorspace = mf->colorspace;
 952
 953        switch (mf->field) {
 954        case V4L2_FIELD_ANY:
 955                pix->field = V4L2_FIELD_NONE;
 956                break;
 957        case V4L2_FIELD_NONE:
 958                break;
 959        default:
 960                dev_err(icd->parent, "Field type %d unsupported.\n",
 961                        mf->field);
 962                ret = -EINVAL;
 963        }
 964
 965        return ret;
 966}
 967
 968static int mx3_camera_reqbufs(struct soc_camera_device *icd,
 969                              struct v4l2_requestbuffers *p)
 970{
 971        return 0;
 972}
 973
 974static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
 975{
 976        struct soc_camera_device *icd = file->private_data;
 977
 978        return vb2_poll(&icd->vb2_vidq, file, pt);
 979}
 980
 981static int mx3_camera_querycap(struct soc_camera_host *ici,
 982                               struct v4l2_capability *cap)
 983{
 984        /* cap->name is set by the firendly caller:-> */
 985        strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
 986        cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
 987        cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
 988
 989        return 0;
 990}
 991
 992static int mx3_camera_set_bus_param(struct soc_camera_device *icd)
 993{
 994        struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
 995        struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
 996        struct mx3_camera_dev *mx3_cam = ici->priv;
 997        struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
 998        u32 pixfmt = icd->current_fmt->host_fmt->fourcc;
 999        unsigned long bus_flags, common_flags;
1000        u32 dw, sens_conf;
1001        const struct soc_mbus_pixelfmt *fmt;
1002        int buswidth;
1003        int ret;
1004        const struct soc_camera_format_xlate *xlate;
1005        struct device *dev = icd->parent;
1006
1007        fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code);
1008        if (!fmt)
1009                return -EINVAL;
1010
1011        xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
1012        if (!xlate) {
1013                dev_warn(dev, "Format %x not found\n", pixfmt);
1014                return -EINVAL;
1015        }
1016
1017        buswidth = fmt->bits_per_sample;
1018        ret = test_platform_param(mx3_cam, buswidth, &bus_flags);
1019
1020        dev_dbg(dev, "requested bus width %d bit: %d\n", buswidth, ret);
1021
1022        if (ret < 0)
1023                return ret;
1024
1025        ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
1026        if (!ret) {
1027                common_flags = soc_mbus_config_compatible(&cfg,
1028                                                          bus_flags);
1029                if (!common_flags) {
1030                        dev_warn(icd->parent,
1031                                 "Flags incompatible: camera 0x%x, host 0x%lx\n",
1032                                 cfg.flags, bus_flags);
1033                        return -EINVAL;
1034                }
1035        } else if (ret != -ENOIOCTLCMD) {
1036                return ret;
1037        } else {
1038                common_flags = bus_flags;
1039        }
1040
1041        dev_dbg(dev, "Flags cam: 0x%x host: 0x%lx common: 0x%lx\n",
1042                cfg.flags, bus_flags, common_flags);
1043
1044        /* Make choices, based on platform preferences */
1045        if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
1046            (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
1047                if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
1048                        common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH;
1049                else
1050                        common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW;
1051        }
1052
1053        if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
1054            (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
1055                if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
1056                        common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
1057                else
1058                        common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
1059        }
1060
1061        if ((common_flags & V4L2_MBUS_DATA_ACTIVE_HIGH) &&
1062            (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)) {
1063                if (mx3_cam->platform_flags & MX3_CAMERA_DP)
1064                        common_flags &= ~V4L2_MBUS_DATA_ACTIVE_HIGH;
1065                else
1066                        common_flags &= ~V4L2_MBUS_DATA_ACTIVE_LOW;
1067        }
1068
1069        if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) &&
1070            (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) {
1071                if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
1072                        common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING;
1073                else
1074                        common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING;
1075        }
1076
1077        cfg.flags = common_flags;
1078        ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
1079        if (ret < 0 && ret != -ENOIOCTLCMD) {
1080                dev_dbg(dev, "camera s_mbus_config(0x%lx) returned %d\n",
1081                        common_flags, ret);
1082                return ret;
1083        }
1084
1085        /*
1086         * So far only gated clock mode is supported. Add a line
1087         *      (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
1088         * below and select the required mode when supporting other
1089         * synchronisation protocols.
1090         */
1091        sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
1092                ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
1093                  (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
1094                  (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
1095                  (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
1096                  (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
1097                  (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
1098
1099        /* TODO: Support RGB and YUV formats */
1100
1101        /* This has been set in mx3_camera_activate(), but we clear it above */
1102        sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
1103
1104        if (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
1105                sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
1106        if (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
1107                sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
1108        if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
1109                sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
1110        if (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)
1111                sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
1112
1113        /* Just do what we're asked to do */
1114        switch (xlate->host_fmt->bits_per_sample) {
1115        case 4:
1116                dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1117                break;
1118        case 8:
1119                dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1120                break;
1121        case 10:
1122                dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1123                break;
1124        default:
1125                /*
1126                 * Actually it can only be 15 now, default is just to silence
1127                 * compiler warnings
1128                 */
1129        case 15:
1130                dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1131        }
1132
1133        csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
1134
1135        dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw);
1136
1137        return 0;
1138}
1139
1140static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
1141        .owner          = THIS_MODULE,
1142        .add            = mx3_camera_add_device,
1143        .remove         = mx3_camera_remove_device,
1144        .clock_start    = mx3_camera_clock_start,
1145        .clock_stop     = mx3_camera_clock_stop,
1146        .set_crop       = mx3_camera_set_crop,
1147        .set_fmt        = mx3_camera_set_fmt,
1148        .try_fmt        = mx3_camera_try_fmt,
1149        .get_formats    = mx3_camera_get_formats,
1150        .init_videobuf2 = mx3_camera_init_videobuf,
1151        .reqbufs        = mx3_camera_reqbufs,
1152        .poll           = mx3_camera_poll,
1153        .querycap       = mx3_camera_querycap,
1154        .set_bus_param  = mx3_camera_set_bus_param,
1155};
1156
1157static int mx3_camera_probe(struct platform_device *pdev)
1158{
1159        struct mx3_camera_pdata *pdata = pdev->dev.platform_data;
1160        struct mx3_camera_dev *mx3_cam;
1161        struct resource *res;
1162        void __iomem *base;
1163        int err = 0;
1164        struct soc_camera_host *soc_host;
1165
1166        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1167        base = devm_ioremap_resource(&pdev->dev, res);
1168        if (IS_ERR(base))
1169                return PTR_ERR(base);
1170
1171        if (!pdata)
1172                return -EINVAL;
1173
1174        mx3_cam = devm_kzalloc(&pdev->dev, sizeof(*mx3_cam), GFP_KERNEL);
1175        if (!mx3_cam) {
1176                dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
1177                return -ENOMEM;
1178        }
1179
1180        mx3_cam->clk = devm_clk_get(&pdev->dev, NULL);
1181        if (IS_ERR(mx3_cam->clk))
1182                return PTR_ERR(mx3_cam->clk);
1183
1184        mx3_cam->pdata = pdata;
1185        mx3_cam->platform_flags = pdata->flags;
1186        if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_MASK)) {
1187                /*
1188                 * Platform hasn't set available data widths. This is bad.
1189                 * Warn and use a default.
1190                 */
1191                dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
1192                         "data widths, using default 8 bit\n");
1193                mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
1194        }
1195        if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)
1196                mx3_cam->width_flags = 1 << 3;
1197        if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
1198                mx3_cam->width_flags |= 1 << 7;
1199        if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
1200                mx3_cam->width_flags |= 1 << 9;
1201        if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
1202                mx3_cam->width_flags |= 1 << 14;
1203
1204        mx3_cam->mclk = pdata->mclk_10khz * 10000;
1205        if (!mx3_cam->mclk) {
1206                dev_warn(&pdev->dev,
1207                         "mclk_10khz == 0! Please, fix your platform data. "
1208                         "Using default 20MHz\n");
1209                mx3_cam->mclk = 20000000;
1210        }
1211
1212        /* list of video-buffers */
1213        INIT_LIST_HEAD(&mx3_cam->capture);
1214        spin_lock_init(&mx3_cam->lock);
1215
1216        mx3_cam->base   = base;
1217
1218        soc_host                = &mx3_cam->soc_host;
1219        soc_host->drv_name      = MX3_CAM_DRV_NAME;
1220        soc_host->ops           = &mx3_soc_camera_host_ops;
1221        soc_host->priv          = mx3_cam;
1222        soc_host->v4l2_dev.dev  = &pdev->dev;
1223        soc_host->nr            = pdev->id;
1224
1225        mx3_cam->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1226        if (IS_ERR(mx3_cam->alloc_ctx))
1227                return PTR_ERR(mx3_cam->alloc_ctx);
1228
1229        if (pdata->asd_sizes) {
1230                soc_host->asd = pdata->asd;
1231                soc_host->asd_sizes = pdata->asd_sizes;
1232        }
1233
1234        err = soc_camera_host_register(soc_host);
1235        if (err)
1236                goto ecamhostreg;
1237
1238        /* IDMAC interface */
1239        dmaengine_get();
1240
1241        return 0;
1242
1243ecamhostreg:
1244        vb2_dma_contig_cleanup_ctx(mx3_cam->alloc_ctx);
1245        return err;
1246}
1247
1248static int mx3_camera_remove(struct platform_device *pdev)
1249{
1250        struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
1251        struct mx3_camera_dev *mx3_cam = container_of(soc_host,
1252                                        struct mx3_camera_dev, soc_host);
1253
1254        soc_camera_host_unregister(soc_host);
1255
1256        /*
1257         * The channel has either not been allocated,
1258         * or should have been released
1259         */
1260        if (WARN_ON(mx3_cam->idmac_channel[0]))
1261                dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
1262
1263        vb2_dma_contig_cleanup_ctx(mx3_cam->alloc_ctx);
1264
1265        dmaengine_put();
1266
1267        return 0;
1268}
1269
1270static struct platform_driver mx3_camera_driver = {
1271        .driver         = {
1272                .name   = MX3_CAM_DRV_NAME,
1273        },
1274        .probe          = mx3_camera_probe,
1275        .remove         = mx3_camera_remove,
1276};
1277
1278module_platform_driver(mx3_camera_driver);
1279
1280MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1281MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
1282MODULE_LICENSE("GPL v2");
1283MODULE_VERSION("0.2.3");
1284MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);
1285