LXR linux/drivers/mfd/rts5229.c

   1/* Driver for Realtek PCI-Express card reader
   2 *
   3 * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of the GNU General Public License as published by the
   7 * Free Software Foundation; either version 2, or (at your option) any
   8 * later version.
   9 *
  10 * This program is distributed in the hope that it will be useful, but
  11 * WITHOUT ANY WARRANTY; without even the implied warranty of
  12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13 * General Public License for more details.
  14 *
  15 * You should have received a copy of the GNU General Public License along
  16 * with this program; if not, see <http://www.gnu.org/licenses/>.
  17 *
  18 * Author:
  19 *   Wei WANG <wei_wang@realsil.com.cn>
  20 */
  21
  22#include <linux/module.h>
  23#include <linux/delay.h>
  24#include <linux/mfd/rtsx_pci.h>
  25
  26#include "rtsx_pcr.h"
  27
  28static u8 rts5229_get_ic_version(struct rtsx_pcr *pcr)
  29{
  30        u8 val;
  31
  32        rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val);
  33        return val & 0x0F;
  34}
  35
  36static void rts5229_fetch_vendor_settings(struct rtsx_pcr *pcr)
  37{
  38        u32 reg;
  39
  40        rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
  41        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
  42
  43        if (!rtsx_vendor_setting_valid(reg))
  44                return;
  45
  46        pcr->aspm_en = rtsx_reg_to_aspm(reg);
  47        pcr->sd30_drive_sel_1v8 =
  48                map_sd_drive(rtsx_reg_to_sd30_drive_sel_1v8(reg));
  49        pcr->card_drive_sel &= 0x3F;
  50        pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
  51
  52        rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
  53        pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
  54        pcr->sd30_drive_sel_3v3 =
  55                map_sd_drive(rtsx_reg_to_sd30_drive_sel_3v3(reg));
  56}
  57
  58static void rts5229_force_power_down(struct rtsx_pcr *pcr, u8 pm_state)
  59{
  60        rtsx_pci_write_register(pcr, FPDCTL, 0x03, 0x03);
  61}
  62
  63static int rts5229_extra_init_hw(struct rtsx_pcr *pcr)
  64{
  65        rtsx_pci_init_cmd(pcr);
  66
  67        /* Configure GPIO as output */
  68        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);
  69        /* Reset ASPM state to default value */
  70        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);
  71        /* Force CLKREQ# PIN to drive 0 to request clock */
  72        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08);
  73        /* Switch LDO3318 source from DV33 to card_3v3 */
  74        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00);
  75        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01);
  76        /* LED shine disabled, set initial shine cycle period */
  77        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02);
  78        /* Configure driving */
  79        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL,
  80                        0xFF, pcr->sd30_drive_sel_3v3);
  81
  82        return rtsx_pci_send_cmd(pcr, 100);
  83}
  84
  85static int rts5229_optimize_phy(struct rtsx_pcr *pcr)
  86{
  87        /* Optimize RX sensitivity */
  88        return rtsx_pci_write_phy_register(pcr, 0x00, 0xBA42);
  89}
  90
  91static int rts5229_turn_on_led(struct rtsx_pcr *pcr)
  92{
  93        return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02);
  94}
  95
  96static int rts5229_turn_off_led(struct rtsx_pcr *pcr)
  97{
  98        return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00);
  99}
 100
 101static int rts5229_enable_auto_blink(struct rtsx_pcr *pcr)
 102{
 103        return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08);
 104}
 105
 106static int rts5229_disable_auto_blink(struct rtsx_pcr *pcr)
 107{
 108        return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00);
 109}
 110
 111static int rts5229_card_power_on(struct rtsx_pcr *pcr, int card)
 112{
 113        int err;
 114
 115        rtsx_pci_init_cmd(pcr);
 116        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
 117                        SD_POWER_MASK, SD_PARTIAL_POWER_ON);
 118        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
 119                        LDO3318_PWR_MASK, 0x02);
 120        err = rtsx_pci_send_cmd(pcr, 100);
 121        if (err < 0)
 122                return err;
 123
 124        /* To avoid too large in-rush current */
 125        udelay(150);
 126
 127        rtsx_pci_init_cmd(pcr);
 128        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
 129                        SD_POWER_MASK, SD_POWER_ON);
 130        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
 131                        LDO3318_PWR_MASK, 0x06);
 132        err = rtsx_pci_send_cmd(pcr, 100);
 133        if (err < 0)
 134                return err;
 135
 136        return 0;
 137}
 138
 139static int rts5229_card_power_off(struct rtsx_pcr *pcr, int card)
 140{
 141        rtsx_pci_init_cmd(pcr);
 142        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
 143                        SD_POWER_MASK | PMOS_STRG_MASK,
 144                        SD_POWER_OFF | PMOS_STRG_400mA);
 145        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
 146                        LDO3318_PWR_MASK, 0x00);
 147        return rtsx_pci_send_cmd(pcr, 100);
 148}
 149
 150static int rts5229_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
 151{
 152        int err;
 153
 154        if (voltage == OUTPUT_3V3) {
 155                err = rtsx_pci_write_register(pcr,
 156                                SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3);
 157                if (err < 0)
 158                        return err;
 159                err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);
 160                if (err < 0)
 161                        return err;
 162        } else if (voltage == OUTPUT_1V8) {
 163                err = rtsx_pci_write_register(pcr,
 164                                SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8);
 165                if (err < 0)
 166                        return err;
 167                err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24);
 168                if (err < 0)
 169                        return err;
 170        } else {
 171                return -EINVAL;
 172        }
 173
 174        return 0;
 175}
 176
 177static const struct pcr_ops rts5229_pcr_ops = {
 178        .fetch_vendor_settings = rts5229_fetch_vendor_settings,
 179        .extra_init_hw = rts5229_extra_init_hw,
 180        .optimize_phy = rts5229_optimize_phy,
 181        .turn_on_led = rts5229_turn_on_led,
 182        .turn_off_led = rts5229_turn_off_led,
 183        .enable_auto_blink = rts5229_enable_auto_blink,
 184        .disable_auto_blink = rts5229_disable_auto_blink,
 185        .card_power_on = rts5229_card_power_on,
 186        .card_power_off = rts5229_card_power_off,
 187        .switch_output_voltage = rts5229_switch_output_voltage,
 188        .cd_deglitch = NULL,
 189        .conv_clk_and_div_n = NULL,
 190        .force_power_down = rts5229_force_power_down,
 191};
 192
 193/* SD Pull Control Enable:
 194 *     SD_DAT[3:0] ==> pull up
 195 *     SD_CD       ==> pull up
 196 *     SD_WP       ==> pull up
 197 *     SD_CMD      ==> pull up
 198 *     SD_CLK      ==> pull down
 199 */
 200static const u32 rts5229_sd_pull_ctl_enable_tbl1[] = {
 201        RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
 202        RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
 203        0,
 204};
 205
 206/* For RTS5229 version C */
 207static const u32 rts5229_sd_pull_ctl_enable_tbl2[] = {
 208        RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
 209        RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD9),
 210        0,
 211};
 212
 213/* SD Pull Control Disable:
 214 *     SD_DAT[3:0] ==> pull down
 215 *     SD_CD       ==> pull up
 216 *     SD_WP       ==> pull down
 217 *     SD_CMD      ==> pull down
 218 *     SD_CLK      ==> pull down
 219 */
 220static const u32 rts5229_sd_pull_ctl_disable_tbl1[] = {
 221        RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
 222        RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
 223        0,
 224};
 225
 226/* For RTS5229 version C */
 227static const u32 rts5229_sd_pull_ctl_disable_tbl2[] = {
 228        RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
 229        RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE5),
 230        0,
 231};
 232
 233/* MS Pull Control Enable:
 234 *     MS CD       ==> pull up
 235 *     others      ==> pull down
 236 */
 237static const u32 rts5229_ms_pull_ctl_enable_tbl[] = {
 238        RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
 239        RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
 240        0,
 241};
 242
 243/* MS Pull Control Disable:
 244 *     MS CD       ==> pull up
 245 *     others      ==> pull down
 246 */
 247static const u32 rts5229_ms_pull_ctl_disable_tbl[] = {
 248        RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
 249        RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
 250        0,
 251};
 252
 253void rts5229_init_params(struct rtsx_pcr *pcr)
 254{
 255        pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
 256        pcr->num_slots = 2;
 257        pcr->ops = &rts5229_pcr_ops;
 258
 259        pcr->flags = 0;
 260        pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT;
 261        pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
 262        pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
 263        pcr->aspm_en = ASPM_L1_EN;
 264        pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 15);
 265        pcr->rx_initial_phase = SET_CLOCK_PHASE(30, 6, 6);
 266
 267        pcr->ic_version = rts5229_get_ic_version(pcr);
 268        if (pcr->ic_version == IC_VER_C) {
 269                pcr->sd_pull_ctl_enable_tbl = rts5229_sd_pull_ctl_enable_tbl2;
 270                pcr->sd_pull_ctl_disable_tbl = rts5229_sd_pull_ctl_disable_tbl2;
 271        } else {
 272                pcr->sd_pull_ctl_enable_tbl = rts5229_sd_pull_ctl_enable_tbl1;
 273                pcr->sd_pull_ctl_disable_tbl = rts5229_sd_pull_ctl_disable_tbl1;
 274        }
 275        pcr->ms_pull_ctl_enable_tbl = rts5229_ms_pull_ctl_enable_tbl;
 276        pcr->ms_pull_ctl_disable_tbl = rts5229_ms_pull_ctl_disable_tbl;
 277}
 278