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21#include <linux/module.h>
22#include <linux/delay.h>
23#include <linux/init.h>
24
25#include <net/irda/irda.h>
26
27#include "sir-dev.h"
28
29static int mcp2120_reset(struct sir_dev *dev);
30static int mcp2120_open(struct sir_dev *dev);
31static int mcp2120_close(struct sir_dev *dev);
32static int mcp2120_change_speed(struct sir_dev *dev, unsigned speed);
33
34#define MCP2120_9600 0x87
35#define MCP2120_19200 0x8B
36#define MCP2120_38400 0x85
37#define MCP2120_57600 0x83
38#define MCP2120_115200 0x81
39
40#define MCP2120_COMMIT 0x11
41
42static struct dongle_driver mcp2120 = {
43 .owner = THIS_MODULE,
44 .driver_name = "Microchip MCP2120",
45 .type = IRDA_MCP2120_DONGLE,
46 .open = mcp2120_open,
47 .close = mcp2120_close,
48 .reset = mcp2120_reset,
49 .set_speed = mcp2120_change_speed,
50};
51
52static int __init mcp2120_sir_init(void)
53{
54 return irda_register_dongle(&mcp2120);
55}
56
57static void __exit mcp2120_sir_cleanup(void)
58{
59 irda_unregister_dongle(&mcp2120);
60}
61
62static int mcp2120_open(struct sir_dev *dev)
63{
64 struct qos_info *qos = &dev->qos;
65
66
67
68 qos->baud_rate.bits &= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200;
69 qos->min_turn_time.bits = 0x01;
70 irda_qos_bits_to_value(qos);
71
72 return 0;
73}
74
75static int mcp2120_close(struct sir_dev *dev)
76{
77
78
79 sirdev_set_dtr_rts(dev, TRUE, TRUE);
80
81
82 return 0;
83}
84
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90
91
92#define MCP2120_STATE_WAIT_SPEED (SIRDEV_STATE_DONGLE_SPEED+1)
93
94static int mcp2120_change_speed(struct sir_dev *dev, unsigned speed)
95{
96 unsigned state = dev->fsm.substate;
97 unsigned delay = 0;
98 u8 control[2];
99 static int ret = 0;
100
101 switch (state) {
102 case SIRDEV_STATE_DONGLE_SPEED:
103
104 sirdev_set_dtr_rts(dev, TRUE, FALSE);
105 udelay(500);
106
107 ret = 0;
108 switch (speed) {
109 default:
110 speed = 9600;
111 ret = -EINVAL;
112
113 case 9600:
114 control[0] = MCP2120_9600;
115
116 break;
117 case 19200:
118 control[0] = MCP2120_19200;
119
120 break;
121 case 34800:
122 control[0] = MCP2120_38400;
123
124 break;
125 case 57600:
126 control[0] = MCP2120_57600;
127
128 break;
129 case 115200:
130 control[0] = MCP2120_115200;
131
132 break;
133 }
134 control[1] = MCP2120_COMMIT;
135
136
137 sirdev_raw_write(dev, control, 2);
138 dev->speed = speed;
139
140 state = MCP2120_STATE_WAIT_SPEED;
141 delay = 100;
142
143 break;
144
145 case MCP2120_STATE_WAIT_SPEED:
146
147 sirdev_set_dtr_rts(dev, FALSE, FALSE);
148
149 break;
150
151 default:
152 net_err_ratelimited("%s(), undefine state %d\n",
153 __func__, state);
154 ret = -EINVAL;
155 break;
156 }
157 dev->fsm.substate = state;
158 return (delay > 0) ? delay : ret;
159}
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175
176#define MCP2120_STATE_WAIT1_RESET (SIRDEV_STATE_DONGLE_RESET+1)
177#define MCP2120_STATE_WAIT2_RESET (SIRDEV_STATE_DONGLE_RESET+2)
178
179static int mcp2120_reset(struct sir_dev *dev)
180{
181 unsigned state = dev->fsm.substate;
182 unsigned delay = 0;
183 int ret = 0;
184
185 switch (state) {
186 case SIRDEV_STATE_DONGLE_RESET:
187
188
189 sirdev_set_dtr_rts(dev, TRUE, TRUE);
190 state = MCP2120_STATE_WAIT1_RESET;
191 delay = 50;
192 break;
193
194 case MCP2120_STATE_WAIT1_RESET:
195
196
197 sirdev_set_dtr_rts(dev, FALSE, FALSE);
198 state = MCP2120_STATE_WAIT2_RESET;
199 delay = 50;
200 break;
201
202 case MCP2120_STATE_WAIT2_RESET:
203
204
205 sirdev_set_dtr_rts(dev, FALSE, FALSE);
206 break;
207
208 default:
209 net_err_ratelimited("%s(), undefined state %d\n",
210 __func__, state);
211 ret = -EINVAL;
212 break;
213 }
214 dev->fsm.substate = state;
215 return (delay > 0) ? delay : ret;
216}
217
218MODULE_AUTHOR("Felix Tang <tangf@eyetap.org>");
219MODULE_DESCRIPTION("Microchip MCP2120");
220MODULE_LICENSE("GPL");
221MODULE_ALIAS("irda-dongle-9");
222
223module_init(mcp2120_sir_init);
224module_exit(mcp2120_sir_cleanup);
225