linux/drivers/scsi/ufs/ufshcd.h
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   1/*
   2 * Universal Flash Storage Host controller driver
   3 *
   4 * This code is based on drivers/scsi/ufs/ufshcd.h
   5 * Copyright (C) 2011-2013 Samsung India Software Operations
   6 *
   7 * Authors:
   8 *      Santosh Yaraganavi <santosh.sy@samsung.com>
   9 *      Vinayak Holikatti <h.vinayak@samsung.com>
  10 *
  11 * This program is free software; you can redistribute it and/or
  12 * modify it under the terms of the GNU General Public License
  13 * as published by the Free Software Foundation; either version 2
  14 * of the License, or (at your option) any later version.
  15 * See the COPYING file in the top-level directory or visit
  16 * <http://www.gnu.org/licenses/gpl-2.0.html>
  17 *
  18 * This program is distributed in the hope that it will be useful,
  19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21 * GNU General Public License for more details.
  22 *
  23 * This program is provided "AS IS" and "WITH ALL FAULTS" and
  24 * without warranty of any kind. You are solely responsible for
  25 * determining the appropriateness of using and distributing
  26 * the program and assume all risks associated with your exercise
  27 * of rights with respect to the program, including but not limited
  28 * to infringement of third party rights, the risks and costs of
  29 * program errors, damage to or loss of data, programs or equipment,
  30 * and unavailability or interruption of operations. Under no
  31 * circumstances will the contributor of this Program be liable for
  32 * any damages of any kind arising from your use or distribution of
  33 * this program.
  34 */
  35
  36#ifndef _UFSHCD_H
  37#define _UFSHCD_H
  38
  39#include <linux/module.h>
  40#include <linux/kernel.h>
  41#include <linux/init.h>
  42#include <linux/interrupt.h>
  43#include <linux/io.h>
  44#include <linux/delay.h>
  45#include <linux/slab.h>
  46#include <linux/spinlock.h>
  47#include <linux/workqueue.h>
  48#include <linux/errno.h>
  49#include <linux/types.h>
  50#include <linux/wait.h>
  51#include <linux/bitops.h>
  52#include <linux/pm_runtime.h>
  53#include <linux/clk.h>
  54#include <linux/completion.h>
  55#include <linux/regulator/consumer.h>
  56
  57#include <asm/irq.h>
  58#include <asm/byteorder.h>
  59#include <scsi/scsi.h>
  60#include <scsi/scsi_cmnd.h>
  61#include <scsi/scsi_host.h>
  62#include <scsi/scsi_tcq.h>
  63#include <scsi/scsi_dbg.h>
  64#include <scsi/scsi_eh.h>
  65
  66#include "ufs.h"
  67#include "ufshci.h"
  68
  69#define UFSHCD "ufshcd"
  70#define UFSHCD_DRIVER_VERSION "0.2"
  71
  72struct ufs_hba;
  73
  74enum dev_cmd_type {
  75        DEV_CMD_TYPE_NOP                = 0x0,
  76        DEV_CMD_TYPE_QUERY              = 0x1,
  77};
  78
  79/**
  80 * struct uic_command - UIC command structure
  81 * @command: UIC command
  82 * @argument1: UIC command argument 1
  83 * @argument2: UIC command argument 2
  84 * @argument3: UIC command argument 3
  85 * @cmd_active: Indicate if UIC command is outstanding
  86 * @result: UIC command result
  87 * @done: UIC command completion
  88 */
  89struct uic_command {
  90        u32 command;
  91        u32 argument1;
  92        u32 argument2;
  93        u32 argument3;
  94        int cmd_active;
  95        int result;
  96        struct completion done;
  97};
  98
  99/* Used to differentiate the power management options */
 100enum ufs_pm_op {
 101        UFS_RUNTIME_PM,
 102        UFS_SYSTEM_PM,
 103        UFS_SHUTDOWN_PM,
 104};
 105
 106#define ufshcd_is_runtime_pm(op) ((op) == UFS_RUNTIME_PM)
 107#define ufshcd_is_system_pm(op) ((op) == UFS_SYSTEM_PM)
 108#define ufshcd_is_shutdown_pm(op) ((op) == UFS_SHUTDOWN_PM)
 109
 110/* Host <-> Device UniPro Link state */
 111enum uic_link_state {
 112        UIC_LINK_OFF_STATE      = 0, /* Link powered down or disabled */
 113        UIC_LINK_ACTIVE_STATE   = 1, /* Link is in Fast/Slow/Sleep state */
 114        UIC_LINK_HIBERN8_STATE  = 2, /* Link is in Hibernate state */
 115};
 116
 117#define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
 118#define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
 119                                    UIC_LINK_ACTIVE_STATE)
 120#define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
 121                                    UIC_LINK_HIBERN8_STATE)
 122#define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
 123#define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
 124                                    UIC_LINK_ACTIVE_STATE)
 125#define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
 126                                    UIC_LINK_HIBERN8_STATE)
 127
 128/*
 129 * UFS Power management levels.
 130 * Each level is in increasing order of power savings.
 131 */
 132enum ufs_pm_level {
 133        UFS_PM_LVL_0, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE */
 134        UFS_PM_LVL_1, /* UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE */
 135        UFS_PM_LVL_2, /* UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE */
 136        UFS_PM_LVL_3, /* UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE */
 137        UFS_PM_LVL_4, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE */
 138        UFS_PM_LVL_5, /* UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE */
 139        UFS_PM_LVL_MAX
 140};
 141
 142struct ufs_pm_lvl_states {
 143        enum ufs_dev_pwr_mode dev_state;
 144        enum uic_link_state link_state;
 145};
 146
 147/**
 148 * struct ufshcd_lrb - local reference block
 149 * @utr_descriptor_ptr: UTRD address of the command
 150 * @ucd_req_ptr: UCD address of the command
 151 * @ucd_rsp_ptr: Response UPIU address for this command
 152 * @ucd_prdt_ptr: PRDT address of the command
 153 * @cmd: pointer to SCSI command
 154 * @sense_buffer: pointer to sense buffer address of the SCSI command
 155 * @sense_bufflen: Length of the sense buffer
 156 * @scsi_status: SCSI status of the command
 157 * @command_type: SCSI, UFS, Query.
 158 * @task_tag: Task tag of the command
 159 * @lun: LUN of the command
 160 * @intr_cmd: Interrupt command (doesn't participate in interrupt aggregation)
 161 */
 162struct ufshcd_lrb {
 163        struct utp_transfer_req_desc *utr_descriptor_ptr;
 164        struct utp_upiu_req *ucd_req_ptr;
 165        struct utp_upiu_rsp *ucd_rsp_ptr;
 166        struct ufshcd_sg_entry *ucd_prdt_ptr;
 167
 168        struct scsi_cmnd *cmd;
 169        u8 *sense_buffer;
 170        unsigned int sense_bufflen;
 171        int scsi_status;
 172
 173        int command_type;
 174        int task_tag;
 175        u8 lun; /* UPIU LUN id field is only 8-bit wide */
 176        bool intr_cmd;
 177};
 178
 179/**
 180 * struct ufs_query - holds relevent data structures for query request
 181 * @request: request upiu and function
 182 * @descriptor: buffer for sending/receiving descriptor
 183 * @response: response upiu and response
 184 */
 185struct ufs_query {
 186        struct ufs_query_req request;
 187        u8 *descriptor;
 188        struct ufs_query_res response;
 189};
 190
 191/**
 192 * struct ufs_dev_cmd - all assosiated fields with device management commands
 193 * @type: device management command type - Query, NOP OUT
 194 * @lock: lock to allow one command at a time
 195 * @complete: internal commands completion
 196 * @tag_wq: wait queue until free command slot is available
 197 */
 198struct ufs_dev_cmd {
 199        enum dev_cmd_type type;
 200        struct mutex lock;
 201        struct completion *complete;
 202        wait_queue_head_t tag_wq;
 203        struct ufs_query query;
 204};
 205
 206/**
 207 * struct ufs_clk_info - UFS clock related info
 208 * @list: list headed by hba->clk_list_head
 209 * @clk: clock node
 210 * @name: clock name
 211 * @max_freq: maximum frequency supported by the clock
 212 * @min_freq: min frequency that can be used for clock scaling
 213 * @curr_freq: indicates the current frequency that it is set to
 214 * @enabled: variable to check against multiple enable/disable
 215 */
 216struct ufs_clk_info {
 217        struct list_head list;
 218        struct clk *clk;
 219        const char *name;
 220        u32 max_freq;
 221        u32 min_freq;
 222        u32 curr_freq;
 223        bool enabled;
 224};
 225
 226#define PRE_CHANGE      0
 227#define POST_CHANGE     1
 228
 229struct ufs_pa_layer_attr {
 230        u32 gear_rx;
 231        u32 gear_tx;
 232        u32 lane_rx;
 233        u32 lane_tx;
 234        u32 pwr_rx;
 235        u32 pwr_tx;
 236        u32 hs_rate;
 237};
 238
 239struct ufs_pwr_mode_info {
 240        bool is_valid;
 241        struct ufs_pa_layer_attr info;
 242};
 243
 244/**
 245 * struct ufs_hba_variant_ops - variant specific callbacks
 246 * @name: variant name
 247 * @init: called when the driver is initialized
 248 * @exit: called to cleanup everything done in init
 249 * @get_ufs_hci_version: called to get UFS HCI version
 250 * @clk_scale_notify: notifies that clks are scaled up/down
 251 * @setup_clocks: called before touching any of the controller registers
 252 * @setup_regulators: called before accessing the host controller
 253 * @hce_enable_notify: called before and after HCE enable bit is set to allow
 254 *                     variant specific Uni-Pro initialization.
 255 * @link_startup_notify: called before and after Link startup is carried out
 256 *                       to allow variant specific Uni-Pro initialization.
 257 * @pwr_change_notify: called before and after a power mode change
 258 *                      is carried out to allow vendor spesific capabilities
 259 *                      to be set.
 260 * @suspend: called during host controller PM callback
 261 * @resume: called during host controller PM callback
 262 */
 263struct ufs_hba_variant_ops {
 264        const char *name;
 265        int     (*init)(struct ufs_hba *);
 266        void    (*exit)(struct ufs_hba *);
 267        u32     (*get_ufs_hci_version)(struct ufs_hba *);
 268        void    (*clk_scale_notify)(struct ufs_hba *);
 269        int     (*setup_clocks)(struct ufs_hba *, bool);
 270        int     (*setup_regulators)(struct ufs_hba *, bool);
 271        int     (*hce_enable_notify)(struct ufs_hba *, bool);
 272        int     (*link_startup_notify)(struct ufs_hba *, bool);
 273        int     (*pwr_change_notify)(struct ufs_hba *,
 274                                        bool, struct ufs_pa_layer_attr *,
 275                                        struct ufs_pa_layer_attr *);
 276        int     (*suspend)(struct ufs_hba *, enum ufs_pm_op);
 277        int     (*resume)(struct ufs_hba *, enum ufs_pm_op);
 278};
 279
 280/* clock gating state  */
 281enum clk_gating_state {
 282        CLKS_OFF,
 283        CLKS_ON,
 284        REQ_CLKS_OFF,
 285        REQ_CLKS_ON,
 286};
 287
 288/**
 289 * struct ufs_clk_gating - UFS clock gating related info
 290 * @gate_work: worker to turn off clocks after some delay as specified in
 291 * delay_ms
 292 * @ungate_work: worker to turn on clocks that will be used in case of
 293 * interrupt context
 294 * @state: the current clocks state
 295 * @delay_ms: gating delay in ms
 296 * @is_suspended: clk gating is suspended when set to 1 which can be used
 297 * during suspend/resume
 298 * @delay_attr: sysfs attribute to control delay_attr
 299 * @active_reqs: number of requests that are pending and should be waited for
 300 * completion before gating clocks.
 301 */
 302struct ufs_clk_gating {
 303        struct delayed_work gate_work;
 304        struct work_struct ungate_work;
 305        enum clk_gating_state state;
 306        unsigned long delay_ms;
 307        bool is_suspended;
 308        struct device_attribute delay_attr;
 309        int active_reqs;
 310};
 311
 312struct ufs_clk_scaling {
 313        ktime_t  busy_start_t;
 314        bool is_busy_started;
 315        unsigned long  tot_busy_t;
 316        unsigned long window_start_t;
 317};
 318
 319/**
 320 * struct ufs_init_prefetch - contains data that is pre-fetched once during
 321 * initialization
 322 * @icc_level: icc level which was read during initialization
 323 */
 324struct ufs_init_prefetch {
 325        u32 icc_level;
 326};
 327
 328/**
 329 * struct ufs_hba - per adapter private structure
 330 * @mmio_base: UFSHCI base register address
 331 * @ucdl_base_addr: UFS Command Descriptor base address
 332 * @utrdl_base_addr: UTP Transfer Request Descriptor base address
 333 * @utmrdl_base_addr: UTP Task Management Descriptor base address
 334 * @ucdl_dma_addr: UFS Command Descriptor DMA address
 335 * @utrdl_dma_addr: UTRDL DMA address
 336 * @utmrdl_dma_addr: UTMRDL DMA address
 337 * @host: Scsi_Host instance of the driver
 338 * @dev: device handle
 339 * @lrb: local reference block
 340 * @lrb_in_use: lrb in use
 341 * @outstanding_tasks: Bits representing outstanding task requests
 342 * @outstanding_reqs: Bits representing outstanding transfer requests
 343 * @capabilities: UFS Controller Capabilities
 344 * @nutrs: Transfer Request Queue depth supported by controller
 345 * @nutmrs: Task Management Queue depth supported by controller
 346 * @ufs_version: UFS Version to which controller complies
 347 * @vops: pointer to variant specific operations
 348 * @priv: pointer to variant specific private data
 349 * @irq: Irq number of the controller
 350 * @active_uic_cmd: handle of active UIC command
 351 * @uic_cmd_mutex: mutex for uic command
 352 * @tm_wq: wait queue for task management
 353 * @tm_tag_wq: wait queue for free task management slots
 354 * @tm_slots_in_use: bit map of task management request slots in use
 355 * @pwr_done: completion for power mode change
 356 * @tm_condition: condition variable for task management
 357 * @ufshcd_state: UFSHCD states
 358 * @eh_flags: Error handling flags
 359 * @intr_mask: Interrupt Mask Bits
 360 * @ee_ctrl_mask: Exception event control mask
 361 * @is_powered: flag to check if HBA is powered
 362 * @is_init_prefetch: flag to check if data was pre-fetched in initialization
 363 * @init_prefetch_data: data pre-fetched during initialization
 364 * @eh_work: Worker to handle UFS errors that require s/w attention
 365 * @eeh_work: Worker to handle exception events
 366 * @errors: HBA errors
 367 * @uic_error: UFS interconnect layer error status
 368 * @saved_err: sticky error mask
 369 * @saved_uic_err: sticky UIC error mask
 370 * @dev_cmd: ufs device management command information
 371 * @last_dme_cmd_tstamp: time stamp of the last completed DME command
 372 * @auto_bkops_enabled: to track whether bkops is enabled in device
 373 * @vreg_info: UFS device voltage regulator information
 374 * @clk_list_head: UFS host controller clocks list node head
 375 * @pwr_info: holds current power mode
 376 * @max_pwr_info: keeps the device max valid pwm
 377 */
 378struct ufs_hba {
 379        void __iomem *mmio_base;
 380
 381        /* Virtual memory reference */
 382        struct utp_transfer_cmd_desc *ucdl_base_addr;
 383        struct utp_transfer_req_desc *utrdl_base_addr;
 384        struct utp_task_req_desc *utmrdl_base_addr;
 385
 386        /* DMA memory reference */
 387        dma_addr_t ucdl_dma_addr;
 388        dma_addr_t utrdl_dma_addr;
 389        dma_addr_t utmrdl_dma_addr;
 390
 391        struct Scsi_Host *host;
 392        struct device *dev;
 393        /*
 394         * This field is to keep a reference to "scsi_device" corresponding to
 395         * "UFS device" W-LU.
 396         */
 397        struct scsi_device *sdev_ufs_device;
 398
 399        enum ufs_dev_pwr_mode curr_dev_pwr_mode;
 400        enum uic_link_state uic_link_state;
 401        /* Desired UFS power management level during runtime PM */
 402        enum ufs_pm_level rpm_lvl;
 403        /* Desired UFS power management level during system PM */
 404        enum ufs_pm_level spm_lvl;
 405        int pm_op_in_progress;
 406
 407        struct ufshcd_lrb *lrb;
 408        unsigned long lrb_in_use;
 409
 410        unsigned long outstanding_tasks;
 411        unsigned long outstanding_reqs;
 412
 413        u32 capabilities;
 414        int nutrs;
 415        int nutmrs;
 416        u32 ufs_version;
 417        struct ufs_hba_variant_ops *vops;
 418        void *priv;
 419        unsigned int irq;
 420        bool is_irq_enabled;
 421
 422        /* Interrupt aggregation support is broken */
 423        #define UFSHCD_QUIRK_BROKEN_INTR_AGGR                   UFS_BIT(0)
 424
 425        /*
 426         * delay before each dme command is required as the unipro
 427         * layer has shown instabilities
 428         */
 429        #define UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS              UFS_BIT(1)
 430
 431        /*
 432         * If UFS host controller is having issue in processing LCC (Line
 433         * Control Command) coming from device then enable this quirk.
 434         * When this quirk is enabled, host controller driver should disable
 435         * the LCC transmission on UFS device (by clearing TX_LCC_ENABLE
 436         * attribute of device to 0).
 437         */
 438        #define UFSHCD_QUIRK_BROKEN_LCC                         UFS_BIT(2)
 439
 440        /*
 441         * The attribute PA_RXHSUNTERMCAP specifies whether or not the
 442         * inbound Link supports unterminated line in HS mode. Setting this
 443         * attribute to 1 fixes moving to HS gear.
 444         */
 445        #define UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP            UFS_BIT(3)
 446
 447        /*
 448         * This quirk needs to be enabled if the host contoller only allows
 449         * accessing the peer dme attributes in AUTO mode (FAST AUTO or
 450         * SLOW AUTO).
 451         */
 452        #define UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE          UFS_BIT(4)
 453
 454        /*
 455         * This quirk needs to be enabled if the host contoller doesn't
 456         * advertise the correct version in UFS_VER register. If this quirk
 457         * is enabled, standard UFS host driver will call the vendor specific
 458         * ops (get_ufs_hci_version) to get the correct version.
 459         */
 460        #define UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION             UFS_BIT(5)
 461
 462        unsigned int quirks;    /* Deviations from standard UFSHCI spec. */
 463
 464        wait_queue_head_t tm_wq;
 465        wait_queue_head_t tm_tag_wq;
 466        unsigned long tm_condition;
 467        unsigned long tm_slots_in_use;
 468
 469        struct uic_command *active_uic_cmd;
 470        struct mutex uic_cmd_mutex;
 471        struct completion *uic_async_done;
 472
 473        u32 ufshcd_state;
 474        u32 eh_flags;
 475        u32 intr_mask;
 476        u16 ee_ctrl_mask;
 477        bool is_powered;
 478        bool is_init_prefetch;
 479        struct ufs_init_prefetch init_prefetch_data;
 480
 481        /* Work Queues */
 482        struct work_struct eh_work;
 483        struct work_struct eeh_work;
 484
 485        /* HBA Errors */
 486        u32 errors;
 487        u32 uic_error;
 488        u32 saved_err;
 489        u32 saved_uic_err;
 490
 491        /* Device management request data */
 492        struct ufs_dev_cmd dev_cmd;
 493        ktime_t last_dme_cmd_tstamp;
 494
 495        /* Keeps information of the UFS device connected to this host */
 496        struct ufs_dev_info dev_info;
 497        bool auto_bkops_enabled;
 498        struct ufs_vreg_info vreg_info;
 499        struct list_head clk_list_head;
 500
 501        bool wlun_dev_clr_ua;
 502
 503        struct ufs_pa_layer_attr pwr_info;
 504        struct ufs_pwr_mode_info max_pwr_info;
 505
 506        struct ufs_clk_gating clk_gating;
 507        /* Control to enable/disable host capabilities */
 508        u32 caps;
 509        /* Allow dynamic clk gating */
 510#define UFSHCD_CAP_CLK_GATING   (1 << 0)
 511        /* Allow hiberb8 with clk gating */
 512#define UFSHCD_CAP_HIBERN8_WITH_CLK_GATING (1 << 1)
 513        /* Allow dynamic clk scaling */
 514#define UFSHCD_CAP_CLK_SCALING  (1 << 2)
 515        /* Allow auto bkops to enabled during runtime suspend */
 516#define UFSHCD_CAP_AUTO_BKOPS_SUSPEND (1 << 3)
 517        /*
 518         * This capability allows host controller driver to use the UFS HCI's
 519         * interrupt aggregation capability.
 520         * CAUTION: Enabling this might reduce overall UFS throughput.
 521         */
 522#define UFSHCD_CAP_INTR_AGGR (1 << 4)
 523
 524        struct devfreq *devfreq;
 525        struct ufs_clk_scaling clk_scaling;
 526        bool is_sys_suspended;
 527};
 528
 529/* Returns true if clocks can be gated. Otherwise false */
 530static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
 531{
 532        return hba->caps & UFSHCD_CAP_CLK_GATING;
 533}
 534static inline bool ufshcd_can_hibern8_during_gating(struct ufs_hba *hba)
 535{
 536        return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING;
 537}
 538static inline int ufshcd_is_clkscaling_enabled(struct ufs_hba *hba)
 539{
 540        return hba->caps & UFSHCD_CAP_CLK_SCALING;
 541}
 542static inline bool ufshcd_can_autobkops_during_suspend(struct ufs_hba *hba)
 543{
 544        return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND;
 545}
 546
 547static inline bool ufshcd_is_intr_aggr_allowed(struct ufs_hba *hba)
 548{
 549        if ((hba->caps & UFSHCD_CAP_INTR_AGGR) &&
 550            !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR))
 551                return true;
 552        else
 553                return false;
 554}
 555
 556#define ufshcd_writel(hba, val, reg)    \
 557        writel((val), (hba)->mmio_base + (reg))
 558#define ufshcd_readl(hba, reg)  \
 559        readl((hba)->mmio_base + (reg))
 560
 561/**
 562 * ufshcd_rmwl - read modify write into a register
 563 * @hba - per adapter instance
 564 * @mask - mask to apply on read value
 565 * @val - actual value to write
 566 * @reg - register address
 567 */
 568static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg)
 569{
 570        u32 tmp;
 571
 572        tmp = ufshcd_readl(hba, reg);
 573        tmp &= ~mask;
 574        tmp |= (val & mask);
 575        ufshcd_writel(hba, tmp, reg);
 576}
 577
 578int ufshcd_alloc_host(struct device *, struct ufs_hba **);
 579int ufshcd_init(struct ufs_hba * , void __iomem * , unsigned int);
 580void ufshcd_remove(struct ufs_hba *);
 581
 582/**
 583 * ufshcd_hba_stop - Send controller to reset state
 584 * @hba: per adapter instance
 585 */
 586static inline void ufshcd_hba_stop(struct ufs_hba *hba)
 587{
 588        ufshcd_writel(hba, CONTROLLER_DISABLE,  REG_CONTROLLER_ENABLE);
 589}
 590
 591static inline void check_upiu_size(void)
 592{
 593        BUILD_BUG_ON(ALIGNED_UPIU_SIZE <
 594                GENERAL_UPIU_REQUEST_SIZE + QUERY_DESC_MAX_SIZE);
 595}
 596
 597extern int ufshcd_runtime_suspend(struct ufs_hba *hba);
 598extern int ufshcd_runtime_resume(struct ufs_hba *hba);
 599extern int ufshcd_runtime_idle(struct ufs_hba *hba);
 600extern int ufshcd_system_suspend(struct ufs_hba *hba);
 601extern int ufshcd_system_resume(struct ufs_hba *hba);
 602extern int ufshcd_shutdown(struct ufs_hba *hba);
 603extern int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
 604                               u8 attr_set, u32 mib_val, u8 peer);
 605extern int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
 606                               u32 *mib_val, u8 peer);
 607
 608/* UIC command interfaces for DME primitives */
 609#define DME_LOCAL       0
 610#define DME_PEER        1
 611#define ATTR_SET_NOR    0       /* NORMAL */
 612#define ATTR_SET_ST     1       /* STATIC */
 613
 614static inline int ufshcd_dme_set(struct ufs_hba *hba, u32 attr_sel,
 615                                 u32 mib_val)
 616{
 617        return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
 618                                   mib_val, DME_LOCAL);
 619}
 620
 621static inline int ufshcd_dme_st_set(struct ufs_hba *hba, u32 attr_sel,
 622                                    u32 mib_val)
 623{
 624        return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
 625                                   mib_val, DME_LOCAL);
 626}
 627
 628static inline int ufshcd_dme_peer_set(struct ufs_hba *hba, u32 attr_sel,
 629                                      u32 mib_val)
 630{
 631        return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_NOR,
 632                                   mib_val, DME_PEER);
 633}
 634
 635static inline int ufshcd_dme_peer_st_set(struct ufs_hba *hba, u32 attr_sel,
 636                                         u32 mib_val)
 637{
 638        return ufshcd_dme_set_attr(hba, attr_sel, ATTR_SET_ST,
 639                                   mib_val, DME_PEER);
 640}
 641
 642static inline int ufshcd_dme_get(struct ufs_hba *hba,
 643                                 u32 attr_sel, u32 *mib_val)
 644{
 645        return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_LOCAL);
 646}
 647
 648static inline int ufshcd_dme_peer_get(struct ufs_hba *hba,
 649                                      u32 attr_sel, u32 *mib_val)
 650{
 651        return ufshcd_dme_get_attr(hba, attr_sel, mib_val, DME_PEER);
 652}
 653
 654int ufshcd_hold(struct ufs_hba *hba, bool async);
 655void ufshcd_release(struct ufs_hba *hba);
 656#endif /* End of Header */
 657