linux/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
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   1/******************************************************************************
   2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
   3 *
   4 * This program is distributed in the hope that it will be useful, but WITHOUT
   5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   6 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   7 * more details.
   8 *
   9 * You should have received a copy of the GNU General Public License along with
  10 * this program; if not, write to the Free Software Foundation, Inc.,
  11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  12 *
  13 * The full GNU General Public License is included in this distribution in the
  14 * file called LICENSE.
  15 *
  16 * Contact Information:
  17 * wlanfae <wlanfae@realtek.com>
  18******************************************************************************/
  19#ifndef _R819XU_PHY_H
  20#define _R819XU_PHY_H
  21
  22#define MAX_DOZE_WAITING_TIMES_9x 64
  23
  24#define AGCTAB_ArrayLength                      AGCTAB_ArrayLengthPciE
  25#define MACPHY_ArrayLength                      MACPHY_ArrayLengthPciE
  26#define RadioA_ArrayLength                      RadioA_ArrayLengthPciE
  27#define RadioB_ArrayLength                      RadioB_ArrayLengthPciE
  28#define MACPHY_Array_PGLength                   MACPHY_Array_PGLengthPciE
  29#define RadioC_ArrayLength                      RadioC_ArrayLengthPciE
  30#define RadioD_ArrayLength                      RadioD_ArrayLengthPciE
  31#define PHY_REGArrayLength                      PHY_REGArrayLengthPciE
  32#define PHY_REG_1T2RArrayLength                 PHY_REG_1T2RArrayLengthPciE
  33
  34#define Rtl819XMACPHY_Array_PG                  Rtl8192PciEMACPHY_Array_PG
  35#define Rtl819XMACPHY_Array                     Rtl8192PciEMACPHY_Array
  36#define Rtl819XRadioA_Array                     Rtl8192PciERadioA_Array
  37#define Rtl819XRadioB_Array                     Rtl8192PciERadioB_Array
  38#define Rtl819XRadioC_Array                     Rtl8192PciERadioC_Array
  39#define Rtl819XRadioD_Array                     Rtl8192PciERadioD_Array
  40#define Rtl819XAGCTAB_Array                     Rtl8192PciEAGCTAB_Array
  41#define Rtl819XPHY_REGArray                     Rtl8192PciEPHY_REGArray
  42#define Rtl819XPHY_REG_1T2RArray                Rtl8192PciEPHY_REG_1T2RArray
  43
  44extern u32 rtl819XAGCTAB_Array[];
  45
  46enum hw90_block {
  47        HW90_BLOCK_MAC = 0,
  48        HW90_BLOCK_PHY0 = 1,
  49        HW90_BLOCK_PHY1 = 2,
  50        HW90_BLOCK_RF = 3,
  51        HW90_BLOCK_MAXIMUM = 4,
  52};
  53
  54enum rf90_radio_path {
  55        RF90_PATH_A = 0,
  56        RF90_PATH_B = 1,
  57        RF90_PATH_C = 2,
  58        RF90_PATH_D = 3,
  59        RF90_PATH_MAX
  60};
  61
  62#define bMaskByte0                0xff
  63#define bMaskByte1                0xff00
  64#define bMaskByte2                0xff0000
  65#define bMaskByte3                0xff000000
  66#define bMaskHWord                0xffff0000
  67#define bMaskLWord                0x0000ffff
  68#define bMaskDWord                0xffffffff
  69
  70u8 rtl92e_is_legal_rf_path(struct net_device *dev, u32 eRFPath);
  71void rtl92e_set_bb_reg(struct net_device *dev, u32 dwRegAddr,
  72                       u32 dwBitMask, u32 dwData);
  73u32 rtl92e_get_bb_reg(struct net_device *dev, u32 dwRegAddr, u32 dwBitMask);
  74void rtl92e_set_rf_reg(struct net_device *dev, enum rf90_radio_path eRFPath,
  75                       u32 RegAddr, u32 BitMask, u32 Data);
  76u32 rtl92e_get_rf_reg(struct net_device *dev, enum rf90_radio_path eRFPath,
  77                      u32 RegAddr, u32 BitMask);
  78void rtl92e_config_mac(struct net_device *dev);
  79bool rtl92e_check_bb_and_rf(struct net_device *dev,
  80                            enum hw90_block CheckBlock,
  81                            enum rf90_radio_path eRFPath);
  82bool rtl92e_config_bb(struct net_device *dev);
  83void rtl92e_get_tx_power(struct net_device *dev);
  84void rtl92e_set_tx_power(struct net_device *dev, u8 channel);
  85bool rtl92e_config_phy(struct net_device *dev);
  86u8 rtl92e_config_rf_path(struct net_device *dev, enum rf90_radio_path eRFPath);
  87
  88u8 rtl92e_set_channel(struct net_device *dev, u8 channel);
  89void rtl92e_set_bw_mode(struct net_device *dev,
  90                        enum ht_channel_width Bandwidth,
  91                        enum ht_extchnl_offset Offset);
  92void rtl92e_init_gain(struct net_device *dev, u8 Operation);
  93
  94void rtl92e_set_rf_off(struct net_device *dev);
  95
  96bool rtl92e_set_rf_power_state(struct net_device *dev,
  97                               enum rt_rf_power_state eRFPowerState);
  98#define PHY_SetRFPowerState rtl92e_set_rf_power_state
  99
 100void rtl92e_scan_op_backup(struct net_device *dev, u8 Operation);
 101
 102#endif
 103