1/****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 ******************************************************************************/ 15#ifndef __RTL8723A_PG_H__ 16#define __RTL8723A_PG_H__ 17 18/* EEPROM/Efuse PG Offset for 8723E/8723U/8723S */ 19#define EEPROM_CCK_TX_PWR_INX_8723A 0x10 20#define EEPROM_HT40_1S_TX_PWR_INX_8723A 0x16 21#define EEPROM_HT20_TX_PWR_INX_DIFF_8723A 0x1C 22#define EEPROM_OFDM_TX_PWR_INX_DIFF_8723A 0x1F 23#define EEPROM_HT40_MAX_PWR_OFFSET_8723A 0x22 24#define EEPROM_HT20_MAX_PWR_OFFSET_8723A 0x25 25 26#define EEPROM_ChannelPlan_8723A 0x28 27#define EEPROM_TSSI_A_8723A 0x29 28#define EEPROM_THERMAL_METER_8723A 0x2A 29#define RF_OPTION1_8723A 0x2B 30#define RF_OPTION2_8723A 0x2C 31#define RF_OPTION3_8723A 0x2D 32#define RF_OPTION4_8723A 0x2E 33#define EEPROM_VERSION_8723A 0x30 34#define EEPROM_CustomID_8723A 0x31 35#define EEPROM_SubCustomID_8723A 0x32 36#define EEPROM_XTAL_K_8723A 0x33 37#define EEPROM_Chipset_8723A 0x34 38 39/* RTL8723AE */ 40#define EEPROM_VID_8723AE 0x49 41#define EEPROM_DID_8723AE 0x4B 42#define EEPROM_SVID_8723AE 0x4D 43#define EEPROM_SMID_8723AE 0x4F 44#define EEPROM_MAC_ADDR_8723AE 0x67 45 46/* RTL8723AU */ 47#define EEPROM_MAC_ADDR_8723AU 0xC6 48#define EEPROM_VID_8723AU 0xB7 49#define EEPROM_PID_8723AU 0xB9 50 51/* RTL8723AS */ 52#define EEPROM_MAC_ADDR_8723AS 0xAA 53 54/* EEPROM/Efuse Value Type */ 55#define EETYPE_TX_PWR 0x0 56 57/* EEPROM/Efuse Default Value */ 58#define EEPROM_Default_CrystalCap_8723A 0x20 59 60 61/* EEPROM/EFUSE data structure definition. */ 62#define MAX_CHNL_GROUP 3+9 63 64struct txpowerinfo { 65 u8 CCKIndex[RF_PATH_MAX][MAX_CHNL_GROUP]; 66 u8 HT40_1SIndex[RF_PATH_MAX][MAX_CHNL_GROUP]; 67 u8 HT40_2SIndexDiff[RF_PATH_MAX][MAX_CHNL_GROUP]; 68 u8 HT20IndexDiff[RF_PATH_MAX][MAX_CHNL_GROUP]; 69 u8 OFDMIndexDiff[RF_PATH_MAX][MAX_CHNL_GROUP]; 70 u8 HT40MaxOffset[RF_PATH_MAX][MAX_CHNL_GROUP]; 71 u8 HT20MaxOffset[RF_PATH_MAX][MAX_CHNL_GROUP]; 72 u8 TSSI_A[3]; 73 u8 TSSI_B[3]; 74 u8 TSSI_A_5G[3]; /* 5GL/5GM/5GH */ 75 u8 TSSI_B_5G[3]; 76}; 77 78enum bt_ant_num { 79 Ant_x2 = 0, 80 Ant_x1 = 1 81}; 82 83enum bt_cotype { 84 BT_2Wire = 0, 85 BT_ISSC_3Wire = 1, 86 BT_Accel = 2, 87 BT_CSR_BC4 = 3, 88 BT_CSR_BC8 = 4, 89 BT_RTL8756 = 5, 90 BT_RTL8723A = 6 91}; 92 93enum bt_radioshared { 94 BT_Radio_Shared = 0, 95 BT_Radio_Individual = 1, 96}; 97 98#endif 99