1#ifndef __LINUX_FUSBH200_H
2#define __LINUX_FUSBH200_H
3
4#include <linux/usb/ehci-dbgp.h>
5
6
7
8
9
10
11
12
13
14
15
16#define __hc32 __le32
17#define __hc16 __le16
18
19
20struct fusbh200_stats {
21
22 unsigned long normal;
23 unsigned long error;
24 unsigned long iaa;
25 unsigned long lost_iaa;
26
27
28 unsigned long complete;
29 unsigned long unlink;
30};
31
32
33
34
35
36
37
38
39
40
41
42#define FUSBH200_MAX_ROOT_PORTS 1
43
44
45
46
47
48enum fusbh200_rh_state {
49 FUSBH200_RH_HALTED,
50 FUSBH200_RH_SUSPENDED,
51 FUSBH200_RH_RUNNING,
52 FUSBH200_RH_STOPPING
53};
54
55
56
57
58
59
60enum fusbh200_hrtimer_event {
61 FUSBH200_HRTIMER_POLL_ASS,
62 FUSBH200_HRTIMER_POLL_PSS,
63 FUSBH200_HRTIMER_POLL_DEAD,
64 FUSBH200_HRTIMER_UNLINK_INTR,
65 FUSBH200_HRTIMER_FREE_ITDS,
66 FUSBH200_HRTIMER_ASYNC_UNLINKS,
67 FUSBH200_HRTIMER_IAA_WATCHDOG,
68 FUSBH200_HRTIMER_DISABLE_PERIODIC,
69 FUSBH200_HRTIMER_DISABLE_ASYNC,
70 FUSBH200_HRTIMER_IO_WATCHDOG,
71 FUSBH200_HRTIMER_NUM_EVENTS
72};
73#define FUSBH200_HRTIMER_NO_EVENT 99
74
75struct fusbh200_hcd {
76
77 enum fusbh200_hrtimer_event next_hrtimer_event;
78 unsigned enabled_hrtimer_events;
79 ktime_t hr_timeouts[FUSBH200_HRTIMER_NUM_EVENTS];
80 struct hrtimer hrtimer;
81
82 int PSS_poll_count;
83 int ASS_poll_count;
84 int died_poll_count;
85
86
87 struct fusbh200_caps __iomem *caps;
88 struct fusbh200_regs __iomem *regs;
89 struct ehci_dbg_port __iomem *debug;
90
91 __u32 hcs_params;
92 spinlock_t lock;
93 enum fusbh200_rh_state rh_state;
94
95
96 bool scanning:1;
97 bool need_rescan:1;
98 bool intr_unlinking:1;
99 bool async_unlinking:1;
100 bool shutdown:1;
101 struct fusbh200_qh *qh_scan_next;
102
103
104 struct fusbh200_qh *async;
105 struct fusbh200_qh *dummy;
106 struct fusbh200_qh *async_unlink;
107 struct fusbh200_qh *async_unlink_last;
108 struct fusbh200_qh *async_iaa;
109 unsigned async_unlink_cycle;
110 unsigned async_count;
111
112
113#define DEFAULT_I_TDPS 1024
114 unsigned periodic_size;
115 __hc32 *periodic;
116 dma_addr_t periodic_dma;
117 struct list_head intr_qh_list;
118 unsigned i_thresh;
119
120 union fusbh200_shadow *pshadow;
121 struct fusbh200_qh *intr_unlink;
122 struct fusbh200_qh *intr_unlink_last;
123 unsigned intr_unlink_cycle;
124 unsigned now_frame;
125 unsigned next_frame;
126 unsigned intr_count;
127 unsigned isoc_count;
128 unsigned periodic_count;
129 unsigned uframe_periodic_max;
130
131
132
133 struct list_head cached_itd_list;
134 struct fusbh200_itd *last_itd_to_free;
135
136
137 unsigned long reset_done [FUSBH200_MAX_ROOT_PORTS];
138
139
140 unsigned long bus_suspended;
141
142 unsigned long companion_ports;
143
144 unsigned long owned_ports;
145
146 unsigned long port_c_suspend;
147
148 unsigned long suspended_ports;
149
150 unsigned long resuming_ports;
151
152
153
154 struct dma_pool *qh_pool;
155 struct dma_pool *qtd_pool;
156 struct dma_pool *itd_pool;
157
158 unsigned random_frame;
159 unsigned long next_statechange;
160 ktime_t last_periodic_enable;
161 u32 command;
162
163
164 unsigned need_io_watchdog:1;
165 unsigned fs_i_thresh:1;
166
167 u8 sbrn;
168
169
170 struct fusbh200_stats stats;
171# define COUNT(x) do { (x)++; } while (0)
172
173
174 struct dentry *debug_dir;
175};
176
177
178static inline struct fusbh200_hcd *hcd_to_fusbh200 (struct usb_hcd *hcd)
179{
180 return (struct fusbh200_hcd *) (hcd->hcd_priv);
181}
182static inline struct usb_hcd *fusbh200_to_hcd (struct fusbh200_hcd *fusbh200)
183{
184 return container_of ((void *) fusbh200, struct usb_hcd, hcd_priv);
185}
186
187
188
189
190
191
192struct fusbh200_caps {
193
194
195
196
197
198
199 u32 hc_capbase;
200#define HC_LENGTH(fusbh200, p) (0x00ff&((p) >> \
201 (fusbh200_big_endian_capbase(fusbh200) ? 24 : 0)))
202#define HC_VERSION(fusbh200, p) (0xffff&((p) >> \
203 (fusbh200_big_endian_capbase(fusbh200) ? 0 : 16)))
204 u32 hcs_params;
205#define HCS_N_PORTS(p) (((p)>>0)&0xf)
206
207 u32 hcc_params;
208#define HCC_CANPARK(p) ((p)&(1 << 2))
209#define HCC_PGM_FRAMELISTLEN(p) ((p)&(1 << 1))
210 u8 portroute[8];
211};
212
213
214
215struct fusbh200_regs {
216
217
218 u32 command;
219
220
221
222#define CMD_PARK (1<<11)
223#define CMD_PARK_CNT(c) (((c)>>8)&3)
224#define CMD_IAAD (1<<6)
225#define CMD_ASE (1<<5)
226#define CMD_PSE (1<<4)
227
228#define CMD_RESET (1<<1)
229#define CMD_RUN (1<<0)
230
231
232 u32 status;
233#define STS_ASS (1<<15)
234#define STS_PSS (1<<14)
235#define STS_RECL (1<<13)
236#define STS_HALT (1<<12)
237
238
239#define STS_IAA (1<<5)
240#define STS_FATAL (1<<4)
241#define STS_FLR (1<<3)
242#define STS_PCD (1<<2)
243#define STS_ERR (1<<1)
244#define STS_INT (1<<0)
245
246
247 u32 intr_enable;
248
249
250 u32 frame_index;
251
252 u32 segment;
253
254 u32 frame_list;
255
256 u32 async_next;
257
258 u32 reserved1;
259
260 u32 port_status;
261
262#define PORT_USB11(x) (((x)&(3<<10)) == (1<<10))
263#define PORT_RESET (1<<8)
264#define PORT_SUSPEND (1<<7)
265#define PORT_RESUME (1<<6)
266#define PORT_PEC (1<<3)
267#define PORT_PE (1<<2)
268#define PORT_CSC (1<<1)
269#define PORT_CONNECT (1<<0)
270#define PORT_RWC_BITS (PORT_CSC | PORT_PEC)
271
272 u32 reserved2[3];
273
274
275 u32 bmcsr;
276#define BMCSR_HOST_SPD_TYP (3<<9)
277#define BMCSR_VBUS_OFF (1<<4)
278#define BMCSR_INT_POLARITY (1<<3)
279
280
281 u32 bmisr;
282#define BMISR_OVC (1<<1)
283
284
285 u32 bmier;
286#define BMIER_OVC_EN (1<<1)
287#define BMIER_VBUS_ERR_EN (1<<0)
288};
289
290
291
292#define QTD_NEXT(fusbh200, dma) cpu_to_hc32(fusbh200, (u32)dma)
293
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298
299
300
301
302struct fusbh200_qtd {
303
304 __hc32 hw_next;
305 __hc32 hw_alt_next;
306 __hc32 hw_token;
307#define QTD_TOGGLE (1 << 31)
308#define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff)
309#define QTD_IOC (1 << 15)
310#define QTD_CERR(tok) (((tok)>>10) & 0x3)
311#define QTD_PID(tok) (((tok)>>8) & 0x3)
312#define QTD_STS_ACTIVE (1 << 7)
313#define QTD_STS_HALT (1 << 6)
314#define QTD_STS_DBE (1 << 5)
315#define QTD_STS_BABBLE (1 << 4)
316#define QTD_STS_XACT (1 << 3)
317#define QTD_STS_MMF (1 << 2)
318#define QTD_STS_STS (1 << 1)
319#define QTD_STS_PING (1 << 0)
320
321#define ACTIVE_BIT(fusbh200) cpu_to_hc32(fusbh200, QTD_STS_ACTIVE)
322#define HALT_BIT(fusbh200) cpu_to_hc32(fusbh200, QTD_STS_HALT)
323#define STATUS_BIT(fusbh200) cpu_to_hc32(fusbh200, QTD_STS_STS)
324
325 __hc32 hw_buf [5];
326 __hc32 hw_buf_hi [5];
327
328
329 dma_addr_t qtd_dma;
330 struct list_head qtd_list;
331 struct urb *urb;
332 size_t length;
333} __attribute__ ((aligned (32)));
334
335
336#define QTD_MASK(fusbh200) cpu_to_hc32 (fusbh200, ~0x1f)
337
338#define IS_SHORT_READ(token) (QTD_LENGTH (token) != 0 && QTD_PID (token) == 1)
339
340
341
342
343#define Q_NEXT_TYPE(fusbh200,dma) ((dma) & cpu_to_hc32(fusbh200, 3 << 1))
344
345
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348
349
350
351
352
353#define Q_TYPE_ITD (0 << 1)
354#define Q_TYPE_QH (1 << 1)
355#define Q_TYPE_SITD (2 << 1)
356#define Q_TYPE_FSTN (3 << 1)
357
358
359#define QH_NEXT(fusbh200,dma) (cpu_to_hc32(fusbh200, (((u32)dma)&~0x01f)|Q_TYPE_QH))
360
361
362#define FUSBH200_LIST_END(fusbh200) cpu_to_hc32(fusbh200, 1)
363
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369
370
371
372union fusbh200_shadow {
373 struct fusbh200_qh *qh;
374 struct fusbh200_itd *itd;
375 struct fusbh200_fstn *fstn;
376 __hc32 *hw_next;
377 void *ptr;
378};
379
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387
388
389
390
391struct fusbh200_qh_hw {
392 __hc32 hw_next;
393 __hc32 hw_info1;
394#define QH_CONTROL_EP (1 << 27)
395#define QH_HEAD (1 << 15)
396#define QH_TOGGLE_CTL (1 << 14)
397#define QH_HIGH_SPEED (2 << 12)
398#define QH_LOW_SPEED (1 << 12)
399#define QH_FULL_SPEED (0 << 12)
400#define QH_INACTIVATE (1 << 7)
401 __hc32 hw_info2;
402#define QH_SMASK 0x000000ff
403#define QH_CMASK 0x0000ff00
404#define QH_HUBADDR 0x007f0000
405#define QH_HUBPORT 0x3f800000
406#define QH_MULT 0xc0000000
407 __hc32 hw_current;
408
409
410 __hc32 hw_qtd_next;
411 __hc32 hw_alt_next;
412 __hc32 hw_token;
413 __hc32 hw_buf [5];
414 __hc32 hw_buf_hi [5];
415} __attribute__ ((aligned(32)));
416
417struct fusbh200_qh {
418 struct fusbh200_qh_hw *hw;
419
420 dma_addr_t qh_dma;
421 union fusbh200_shadow qh_next;
422 struct list_head qtd_list;
423 struct list_head intr_node;
424 struct fusbh200_qtd *dummy;
425 struct fusbh200_qh *unlink_next;
426
427 unsigned unlink_cycle;
428
429 u8 needs_rescan;
430 u8 qh_state;
431#define QH_STATE_LINKED 1
432#define QH_STATE_UNLINK 2
433#define QH_STATE_IDLE 3
434#define QH_STATE_UNLINK_WAIT 4
435#define QH_STATE_COMPLETING 5
436
437 u8 xacterrs;
438#define QH_XACTERR_MAX 32
439
440
441 u8 usecs;
442 u8 gap_uf;
443 u8 c_usecs;
444 u16 tt_usecs;
445 unsigned short period;
446 unsigned short start;
447#define NO_FRAME ((unsigned short)~0)
448
449 struct usb_device *dev;
450 unsigned is_out:1;
451 unsigned clearing_tt:1;
452};
453
454
455
456
457struct fusbh200_iso_packet {
458
459 u64 bufp;
460 __hc32 transaction;
461 u8 cross;
462
463 u32 buf1;
464};
465
466
467
468
469
470struct fusbh200_iso_sched {
471 struct list_head td_list;
472 unsigned span;
473 struct fusbh200_iso_packet packet [0];
474};
475
476
477
478
479
480struct fusbh200_iso_stream {
481
482 struct fusbh200_qh_hw *hw;
483
484 u8 bEndpointAddress;
485 u8 highspeed;
486 struct list_head td_list;
487 struct list_head free_list;
488 struct usb_device *udev;
489 struct usb_host_endpoint *ep;
490
491
492 int next_uframe;
493 __hc32 splits;
494
495
496
497
498
499 u8 usecs, c_usecs;
500 u16 interval;
501 u16 tt_usecs;
502 u16 maxp;
503 u16 raw_mask;
504 unsigned bandwidth;
505
506
507 __hc32 buf0;
508 __hc32 buf1;
509 __hc32 buf2;
510
511
512 __hc32 address;
513};
514
515
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517
518
519
520
521
522
523struct fusbh200_itd {
524
525 __hc32 hw_next;
526 __hc32 hw_transaction [8];
527#define FUSBH200_ISOC_ACTIVE (1<<31)
528#define FUSBH200_ISOC_BUF_ERR (1<<30)
529#define FUSBH200_ISOC_BABBLE (1<<29)
530#define FUSBH200_ISOC_XACTERR (1<<28)
531#define FUSBH200_ITD_LENGTH(tok) (((tok)>>16) & 0x0fff)
532#define FUSBH200_ITD_IOC (1 << 15)
533
534#define ITD_ACTIVE(fusbh200) cpu_to_hc32(fusbh200, FUSBH200_ISOC_ACTIVE)
535
536 __hc32 hw_bufp [7];
537 __hc32 hw_bufp_hi [7];
538
539
540 dma_addr_t itd_dma;
541 union fusbh200_shadow itd_next;
542
543 struct urb *urb;
544 struct fusbh200_iso_stream *stream;
545 struct list_head itd_list;
546
547
548 unsigned frame;
549 unsigned pg;
550 unsigned index[8];
551} __attribute__ ((aligned (32)));
552
553
554
555
556
557
558
559
560
561
562
563
564struct fusbh200_fstn {
565 __hc32 hw_next;
566 __hc32 hw_prev;
567
568
569 dma_addr_t fstn_dma;
570 union fusbh200_shadow fstn_next;
571} __attribute__ ((aligned (32)));
572
573
574
575
576
577#define fusbh200_prepare_ports_for_controller_suspend(fusbh200, do_wakeup) \
578 fusbh200_adjust_port_wakeup_flags(fusbh200, true, do_wakeup);
579
580#define fusbh200_prepare_ports_for_controller_resume(fusbh200) \
581 fusbh200_adjust_port_wakeup_flags(fusbh200, false, false);
582
583
584
585
586
587
588
589
590
591
592static inline unsigned int
593fusbh200_get_speed(struct fusbh200_hcd *fusbh200, unsigned int portsc)
594{
595 return (readl(&fusbh200->regs->bmcsr)
596 & BMCSR_HOST_SPD_TYP) >> 9;
597}
598
599
600static inline unsigned int
601fusbh200_port_speed(struct fusbh200_hcd *fusbh200, unsigned int portsc)
602{
603 switch (fusbh200_get_speed(fusbh200, portsc)) {
604 case 0:
605 return 0;
606 case 1:
607 return USB_PORT_STAT_LOW_SPEED;
608 case 2:
609 default:
610 return USB_PORT_STAT_HIGH_SPEED;
611 }
612}
613
614
615
616#define fusbh200_has_fsl_portno_bug(e) (0)
617
618
619
620
621
622
623
624
625
626
627
628
629#define fusbh200_big_endian_mmio(e) 0
630#define fusbh200_big_endian_capbase(e) 0
631
632static inline unsigned int fusbh200_readl(const struct fusbh200_hcd *fusbh200,
633 __u32 __iomem * regs)
634{
635 return readl(regs);
636}
637
638static inline void fusbh200_writel(const struct fusbh200_hcd *fusbh200,
639 const unsigned int val, __u32 __iomem *regs)
640{
641 writel(val, regs);
642}
643
644
645static inline __hc32 cpu_to_hc32 (const struct fusbh200_hcd *fusbh200, const u32 x)
646{
647 return cpu_to_le32(x);
648}
649
650
651static inline u32 hc32_to_cpu (const struct fusbh200_hcd *fusbh200, const __hc32 x)
652{
653 return le32_to_cpu(x);
654}
655
656static inline u32 hc32_to_cpup (const struct fusbh200_hcd *fusbh200, const __hc32 *x)
657{
658 return le32_to_cpup(x);
659}
660
661
662
663static inline unsigned fusbh200_read_frame_index(struct fusbh200_hcd *fusbh200)
664{
665 return fusbh200_readl(fusbh200, &fusbh200->regs->frame_index);
666}
667
668#define fusbh200_itdlen(urb, desc, t) ({ \
669 usb_pipein((urb)->pipe) ? \
670 (desc)->length - FUSBH200_ITD_LENGTH(t) : \
671 FUSBH200_ITD_LENGTH(t); \
672})
673
674
675#endif
676