linux/drivers/video/fbdev/aty/atyfb.h
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   1/*
   2 *  ATI Frame Buffer Device Driver Core Definitions
   3 */
   4
   5#include <linux/spinlock.h>
   6#include <linux/wait.h>
   7    /*
   8     *  Elements of the hardware specific atyfb_par structure
   9     */
  10
  11struct crtc {
  12        u32 vxres;
  13        u32 vyres;
  14        u32 xoffset;
  15        u32 yoffset;
  16        u32 bpp;
  17        u32 h_tot_disp;
  18        u32 h_sync_strt_wid;
  19        u32 v_tot_disp;
  20        u32 v_sync_strt_wid;
  21        u32 vline_crnt_vline;
  22        u32 off_pitch;
  23        u32 gen_cntl;
  24        u32 dp_pix_width;       /* acceleration */
  25        u32 dp_chain_mask;      /* acceleration */
  26#ifdef CONFIG_FB_ATY_GENERIC_LCD
  27        u32 horz_stretching;
  28        u32 vert_stretching;
  29        u32 ext_vert_stretch;
  30        u32 shadow_h_tot_disp;
  31        u32 shadow_h_sync_strt_wid;
  32        u32 shadow_v_tot_disp;
  33        u32 shadow_v_sync_strt_wid;
  34        u32 lcd_gen_cntl;
  35        u32 lcd_config_panel;
  36        u32 lcd_index;
  37#endif
  38};
  39
  40struct aty_interrupt {
  41        wait_queue_head_t wait;
  42        unsigned int count;
  43        int pan_display;
  44};
  45
  46struct pll_info {
  47        int pll_max;
  48        int pll_min;
  49        int sclk, mclk, mclk_pm, xclk;
  50        int ref_div;
  51        int ref_clk;
  52        int ecp_max;
  53};
  54
  55typedef struct {
  56        u16 unknown1;
  57        u16 PCLK_min_freq;
  58        u16 PCLK_max_freq;
  59        u16 unknown2;
  60        u16 ref_freq;
  61        u16 ref_divider;
  62        u16 unknown3;
  63        u16 MCLK_pwd;
  64        u16 MCLK_max_freq;
  65        u16 XCLK_max_freq;
  66        u16 SCLK_freq;
  67} __attribute__ ((packed)) PLL_BLOCK_MACH64;
  68
  69struct pll_514 {
  70        u8 m;
  71        u8 n;
  72};
  73
  74struct pll_18818 {
  75        u32 program_bits;
  76        u32 locationAddr;
  77        u32 period_in_ps;
  78        u32 post_divider;
  79};
  80
  81struct pll_ct {
  82        u8 pll_ref_div;
  83        u8 pll_gen_cntl;
  84        u8 mclk_fb_div;
  85        u8 mclk_fb_mult; /* 2 ro 4 */
  86        u8 sclk_fb_div;
  87        u8 pll_vclk_cntl;
  88        u8 vclk_post_div;
  89        u8 vclk_fb_div;
  90        u8 pll_ext_cntl;
  91        u8 ext_vpll_cntl;
  92        u8 spll_cntl2;
  93        u32 dsp_config; /* Mach64 GTB DSP */
  94        u32 dsp_on_off; /* Mach64 GTB DSP */
  95        u32 dsp_loop_latency;
  96        u32 fifo_size;
  97        u32 xclkpagefaultdelay;
  98        u32 xclkmaxrasdelay;
  99        u8 xclk_ref_div;
 100        u8 xclk_post_div;
 101        u8 mclk_post_div_real;
 102        u8 xclk_post_div_real;
 103        u8 vclk_post_div_real;
 104        u8 features;
 105#ifdef CONFIG_FB_ATY_GENERIC_LCD
 106        u32 xres; /* use for LCD stretching/scaling */
 107#endif
 108};
 109
 110/*
 111        for pll_ct.features
 112*/
 113#define DONT_USE_SPLL 0x1
 114#define DONT_USE_XDLL 0x2
 115#define USE_CPUCLK    0x4
 116#define POWERDOWN_PLL 0x8
 117
 118union aty_pll {
 119        struct pll_ct ct;
 120        struct pll_514 ibm514;
 121        struct pll_18818 ics2595;
 122};
 123
 124    /*
 125     *  The hardware parameters for each card
 126     */
 127
 128struct atyfb_par {
 129        u32 pseudo_palette[16];
 130        struct { u8 red, green, blue; } palette[256];
 131        const struct aty_dac_ops *dac_ops;
 132        const struct aty_pll_ops *pll_ops;
 133        void __iomem *ati_regbase;
 134        unsigned long clk_wr_offset; /* meaning overloaded, clock id by CT */
 135        struct crtc crtc;
 136        union aty_pll pll;
 137        struct pll_info pll_limits;
 138        u32 features;
 139        u32 ref_clk_per;
 140        u32 pll_per;
 141        u32 mclk_per;
 142        u32 xclk_per;
 143        u8 bus_type;
 144        u8 ram_type;
 145        u8 mem_refresh_rate;
 146        u16 pci_id;
 147        u32 accel_flags;
 148        int blitter_may_be_busy;
 149        int asleep;
 150        int lock_blank;
 151        unsigned long res_start;
 152        unsigned long res_size;
 153        struct pci_dev *pdev;
 154#ifdef __sparc__
 155        struct pci_mmap_map *mmap_map;
 156        u8 mmaped;
 157#endif
 158        int open;
 159#ifdef CONFIG_FB_ATY_GENERIC_LCD
 160        unsigned long bios_base_phys;
 161        unsigned long bios_base;
 162        unsigned long lcd_table;
 163        u16 lcd_width;
 164        u16 lcd_height;
 165        u32 lcd_pixclock;
 166        u16 lcd_refreshrate;
 167        u16 lcd_htotal;
 168        u16 lcd_hdisp;
 169        u16 lcd_hsync_dly;
 170        u16 lcd_hsync_len;
 171        u16 lcd_vtotal;
 172        u16 lcd_vdisp;
 173        u16 lcd_vsync_len;
 174        u16 lcd_right_margin;
 175        u16 lcd_lower_margin;
 176        u16 lcd_hblank_len;
 177        u16 lcd_vblank_len;
 178#endif
 179        unsigned long aux_start; /* auxiliary aperture */
 180        unsigned long aux_size;
 181        struct aty_interrupt vblank;
 182        unsigned long irq_flags;
 183        unsigned int irq;
 184        spinlock_t int_lock;
 185        int wc_cookie;
 186        u32 mem_cntl;
 187        struct crtc saved_crtc;
 188        union aty_pll saved_pll;
 189};
 190
 191    /*
 192     *  ATI Mach64 features
 193     */
 194
 195#define M64_HAS(feature)        ((par)->features & (M64F_##feature))
 196
 197#define M64F_RESET_3D           0x00000001
 198#define M64F_MAGIC_FIFO         0x00000002
 199#define M64F_GTB_DSP            0x00000004
 200#define M64F_FIFO_32            0x00000008
 201#define M64F_SDRAM_MAGIC_PLL    0x00000010
 202#define M64F_MAGIC_POSTDIV      0x00000020
 203#define M64F_INTEGRATED         0x00000040
 204#define M64F_CT_BUS             0x00000080
 205#define M64F_VT_BUS             0x00000100
 206#define M64F_MOBIL_BUS          0x00000200
 207#define M64F_GX                 0x00000400
 208#define M64F_CT                 0x00000800
 209#define M64F_VT                 0x00001000
 210#define M64F_GT                 0x00002000
 211#define M64F_MAGIC_VRAM_SIZE    0x00004000
 212#define M64F_G3_PB_1_1          0x00008000
 213#define M64F_G3_PB_1024x768     0x00010000
 214#define M64F_EXTRA_BRIGHT       0x00020000
 215#define M64F_LT_LCD_REGS        0x00040000
 216#define M64F_XL_DLL             0x00080000
 217#define M64F_MFB_FORCE_4        0x00100000
 218#define M64F_HW_TRIPLE          0x00200000
 219#define M64F_XL_MEM             0x00400000
 220    /*
 221     *  Register access
 222     */
 223
 224static inline u32 aty_ld_le32(int regindex, const struct atyfb_par *par)
 225{
 226        /* Hack for bloc 1, should be cleanly optimized by compiler */
 227        if (regindex >= 0x400)
 228                regindex -= 0x800;
 229
 230#ifdef CONFIG_ATARI
 231        return in_le32(par->ati_regbase + regindex);
 232#else
 233        return readl(par->ati_regbase + regindex);
 234#endif
 235}
 236
 237static inline void aty_st_le32(int regindex, u32 val, const struct atyfb_par *par)
 238{
 239        /* Hack for bloc 1, should be cleanly optimized by compiler */
 240        if (regindex >= 0x400)
 241                regindex -= 0x800;
 242
 243#ifdef CONFIG_ATARI
 244        out_le32(par->ati_regbase + regindex, val);
 245#else
 246        writel(val, par->ati_regbase + regindex);
 247#endif
 248}
 249
 250static inline void aty_st_le16(int regindex, u16 val,
 251                               const struct atyfb_par *par)
 252{
 253        /* Hack for bloc 1, should be cleanly optimized by compiler */
 254        if (regindex >= 0x400)
 255                regindex -= 0x800;
 256#ifdef CONFIG_ATARI
 257        out_le16(par->ati_regbase + regindex, val);
 258#else
 259        writel(val, par->ati_regbase + regindex);
 260#endif
 261}
 262
 263static inline u8 aty_ld_8(int regindex, const struct atyfb_par *par)
 264{
 265        /* Hack for bloc 1, should be cleanly optimized by compiler */
 266        if (regindex >= 0x400)
 267                regindex -= 0x800;
 268#ifdef CONFIG_ATARI
 269        return in_8(par->ati_regbase + regindex);
 270#else
 271        return readb(par->ati_regbase + regindex);
 272#endif
 273}
 274
 275static inline void aty_st_8(int regindex, u8 val, const struct atyfb_par *par)
 276{
 277        /* Hack for bloc 1, should be cleanly optimized by compiler */
 278        if (regindex >= 0x400)
 279                regindex -= 0x800;
 280
 281#ifdef CONFIG_ATARI
 282        out_8(par->ati_regbase + regindex, val);
 283#else
 284        writeb(val, par->ati_regbase + regindex);
 285#endif
 286}
 287
 288#if defined(CONFIG_PM) || defined(CONFIG_PMAC_BACKLIGHT) || \
 289defined (CONFIG_FB_ATY_GENERIC_LCD) || defined (CONFIG_FB_ATY_BACKLIGHT)
 290extern void aty_st_lcd(int index, u32 val, const struct atyfb_par *par);
 291extern u32 aty_ld_lcd(int index, const struct atyfb_par *par);
 292#endif
 293
 294    /*
 295     *  DAC operations
 296     */
 297
 298struct aty_dac_ops {
 299        int (*set_dac) (const struct fb_info * info,
 300                const union aty_pll * pll, u32 bpp, u32 accel);
 301};
 302
 303extern const struct aty_dac_ops aty_dac_ibm514; /* IBM RGB514 */
 304extern const struct aty_dac_ops aty_dac_ati68860b; /* ATI 68860-B */
 305extern const struct aty_dac_ops aty_dac_att21c498; /* AT&T 21C498 */
 306extern const struct aty_dac_ops aty_dac_unsupported; /* unsupported */
 307extern const struct aty_dac_ops aty_dac_ct; /* Integrated */
 308
 309
 310    /*
 311     *  Clock operations
 312     */
 313
 314struct aty_pll_ops {
 315        int (*var_to_pll) (const struct fb_info * info, u32 vclk_per, u32 bpp, union aty_pll * pll);
 316        u32 (*pll_to_var) (const struct fb_info * info, const union aty_pll * pll);
 317        void (*set_pll)   (const struct fb_info * info, const union aty_pll * pll);
 318        void (*get_pll)   (const struct fb_info *info, union aty_pll * pll);
 319        int (*init_pll)   (const struct fb_info * info, union aty_pll * pll);
 320        void (*resume_pll)(const struct fb_info *info, union aty_pll *pll);
 321};
 322
 323extern const struct aty_pll_ops aty_pll_ati18818_1; /* ATI 18818 */
 324extern const struct aty_pll_ops aty_pll_stg1703; /* STG 1703 */
 325extern const struct aty_pll_ops aty_pll_ch8398; /* Chrontel 8398 */
 326extern const struct aty_pll_ops aty_pll_att20c408; /* AT&T 20C408 */
 327extern const struct aty_pll_ops aty_pll_ibm514; /* IBM RGB514 */
 328extern const struct aty_pll_ops aty_pll_unsupported; /* unsupported */
 329extern const struct aty_pll_ops aty_pll_ct; /* Integrated */
 330
 331
 332extern void aty_set_pll_ct(const struct fb_info *info, const union aty_pll *pll);
 333extern u8 aty_ld_pll_ct(int offset, const struct atyfb_par *par);
 334
 335
 336    /*
 337     *  Hardware cursor support
 338     */
 339
 340extern int aty_init_cursor(struct fb_info *info);
 341
 342    /*
 343     *  Hardware acceleration
 344     */
 345
 346static inline void wait_for_fifo(u16 entries, const struct atyfb_par *par)
 347{
 348        while ((aty_ld_le32(FIFO_STAT, par) & 0xffff) >
 349               ((u32) (0x8000 >> entries)));
 350}
 351
 352static inline void wait_for_idle(struct atyfb_par *par)
 353{
 354        wait_for_fifo(16, par);
 355        while ((aty_ld_le32(GUI_STAT, par) & 1) != 0);
 356        par->blitter_may_be_busy = 0;
 357}
 358
 359extern void aty_reset_engine(const struct atyfb_par *par);
 360extern void aty_init_engine(struct atyfb_par *par, struct fb_info *info);
 361extern u8   aty_ld_pll_ct(int offset, const struct atyfb_par *par);
 362
 363void atyfb_copyarea(struct fb_info *info, const struct fb_copyarea *area);
 364void atyfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
 365void atyfb_imageblit(struct fb_info *info, const struct fb_image *image);
 366
 367