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21#ifndef __SKL_TOPOLOGY_H__
22#define __SKL_TOPOLOGY_H__
23
24#include <linux/types.h>
25
26#include <sound/hdaudio_ext.h>
27#include <sound/soc.h>
28#include "skl.h"
29#include "skl-tplg-interface.h"
30
31#define BITS_PER_BYTE 8
32#define MAX_TS_GROUPS 8
33#define MAX_DMIC_TS_GROUPS 4
34#define MAX_FIXED_DMIC_PARAMS_SIZE 727
35
36
37#define UP_DOWN_MIXER_MAX_COEFF 6
38
39enum skl_channel_index {
40 SKL_CHANNEL_LEFT = 0,
41 SKL_CHANNEL_RIGHT = 1,
42 SKL_CHANNEL_CENTER = 2,
43 SKL_CHANNEL_LEFT_SURROUND = 3,
44 SKL_CHANNEL_CENTER_SURROUND = 3,
45 SKL_CHANNEL_RIGHT_SURROUND = 4,
46 SKL_CHANNEL_LFE = 7,
47 SKL_CHANNEL_INVALID = 0xF,
48};
49
50enum skl_bitdepth {
51 SKL_DEPTH_8BIT = 8,
52 SKL_DEPTH_16BIT = 16,
53 SKL_DEPTH_24BIT = 24,
54 SKL_DEPTH_32BIT = 32,
55 SKL_DEPTH_INVALID
56};
57
58enum skl_interleaving {
59
60 SKL_INTERLEAVING_PER_CHANNEL = 0,
61
62 SKL_INTERLEAVING_PER_SAMPLE = 1,
63};
64
65enum skl_s_freq {
66 SKL_FS_8000 = 8000,
67 SKL_FS_11025 = 11025,
68 SKL_FS_12000 = 12000,
69 SKL_FS_16000 = 16000,
70 SKL_FS_22050 = 22050,
71 SKL_FS_24000 = 24000,
72 SKL_FS_32000 = 32000,
73 SKL_FS_44100 = 44100,
74 SKL_FS_48000 = 48000,
75 SKL_FS_64000 = 64000,
76 SKL_FS_88200 = 88200,
77 SKL_FS_96000 = 96000,
78 SKL_FS_128000 = 128000,
79 SKL_FS_176400 = 176400,
80 SKL_FS_192000 = 192000,
81 SKL_FS_INVALID
82};
83
84enum skl_widget_type {
85 SKL_WIDGET_VMIXER = 1,
86 SKL_WIDGET_MIXER = 2,
87 SKL_WIDGET_PGA = 3,
88 SKL_WIDGET_MUX = 4
89};
90
91struct skl_audio_data_format {
92 enum skl_s_freq s_freq;
93 enum skl_bitdepth bit_depth;
94 u32 channel_map;
95 enum skl_ch_cfg ch_cfg;
96 enum skl_interleaving interleaving;
97 u8 number_of_channels;
98 u8 valid_bit_depth;
99 u8 sample_type;
100 u8 reserved[1];
101} __packed;
102
103struct skl_base_cfg {
104 u32 cps;
105 u32 ibs;
106 u32 obs;
107 u32 is_pages;
108 struct skl_audio_data_format audio_fmt;
109};
110
111struct skl_cpr_gtw_cfg {
112 u32 node_id;
113 u32 dma_buffer_size;
114 u32 config_length;
115
116 u32 config_data[1];
117} __packed;
118
119struct skl_cpr_cfg {
120 struct skl_base_cfg base_cfg;
121 struct skl_audio_data_format out_fmt;
122 u32 cpr_feature_mask;
123 struct skl_cpr_gtw_cfg gtw_cfg;
124} __packed;
125
126
127struct skl_src_module_cfg {
128 struct skl_base_cfg base_cfg;
129 enum skl_s_freq src_cfg;
130} __packed;
131
132struct skl_up_down_mixer_cfg {
133 struct skl_base_cfg base_cfg;
134 enum skl_ch_cfg out_ch_cfg;
135
136 u32 coeff_sel;
137
138 s32 coeff[UP_DOWN_MIXER_MAX_COEFF];
139} __packed;
140
141enum skl_dma_type {
142 SKL_DMA_HDA_HOST_OUTPUT_CLASS = 0,
143 SKL_DMA_HDA_HOST_INPUT_CLASS = 1,
144 SKL_DMA_HDA_HOST_INOUT_CLASS = 2,
145 SKL_DMA_HDA_LINK_OUTPUT_CLASS = 8,
146 SKL_DMA_HDA_LINK_INPUT_CLASS = 9,
147 SKL_DMA_HDA_LINK_INOUT_CLASS = 0xA,
148 SKL_DMA_DMIC_LINK_INPUT_CLASS = 0xB,
149 SKL_DMA_I2S_LINK_OUTPUT_CLASS = 0xC,
150 SKL_DMA_I2S_LINK_INPUT_CLASS = 0xD,
151};
152
153union skl_ssp_dma_node {
154 u8 val;
155 struct {
156 u8 dual_mono:1;
157 u8 time_slot:3;
158 u8 i2s_instance:4;
159 } dma_node;
160};
161
162union skl_connector_node_id {
163 u32 val;
164 struct {
165 u32 vindex:8;
166 u32 dma_type:4;
167 u32 rsvd:20;
168 } node;
169};
170
171struct skl_module_fmt {
172 u32 channels;
173 u32 s_freq;
174 u32 bit_depth;
175 u32 valid_bit_depth;
176 u32 ch_cfg;
177};
178
179struct skl_module_inst_id {
180 u32 module_id;
181 u32 instance_id;
182};
183
184struct skl_module_pin {
185 struct skl_module_inst_id id;
186 u8 pin_index;
187 bool is_dynamic;
188 bool in_use;
189};
190
191struct skl_specific_cfg {
192 u32 caps_size;
193 u32 *caps;
194};
195
196enum skl_pipe_state {
197 SKL_PIPE_INVALID = 0,
198 SKL_PIPE_CREATED = 1,
199 SKL_PIPE_PAUSED = 2,
200 SKL_PIPE_STARTED = 3
201};
202
203struct skl_pipe_module {
204 struct snd_soc_dapm_widget *w;
205 struct list_head node;
206};
207
208struct skl_pipe_params {
209 u8 host_dma_id;
210 u8 link_dma_id;
211 u32 ch;
212 u32 s_freq;
213 u32 s_fmt;
214 u8 linktype;
215 int stream;
216};
217
218struct skl_pipe {
219 u8 ppl_id;
220 u8 pipe_priority;
221 u16 conn_type;
222 u32 memory_pages;
223 struct skl_pipe_params *p_params;
224 enum skl_pipe_state state;
225 struct list_head w_list;
226};
227
228enum skl_module_state {
229 SKL_MODULE_UNINIT = 0,
230 SKL_MODULE_INIT_DONE = 1,
231 SKL_MODULE_LOADED = 2,
232 SKL_MODULE_UNLOADED = 3,
233 SKL_MODULE_BIND_DONE = 4
234};
235
236struct skl_module_cfg {
237 struct skl_module_inst_id id;
238 struct skl_module_fmt in_fmt;
239 struct skl_module_fmt out_fmt;
240 u8 max_in_queue;
241 u8 max_out_queue;
242 u8 in_queue_mask;
243 u8 out_queue_mask;
244 u8 in_queue;
245 u8 out_queue;
246 u32 mcps;
247 u32 ibs;
248 u32 obs;
249 u8 is_loadable;
250 u8 core_id;
251 u8 dev_type;
252 u8 dma_id;
253 u8 time_slot;
254 u32 params_fixup;
255 u32 converter;
256 u32 vbus_id;
257 struct skl_module_pin *m_in_pin;
258 struct skl_module_pin *m_out_pin;
259 enum skl_module_type m_type;
260 enum skl_hw_conn_type hw_conn_type;
261 enum skl_module_state m_state;
262 struct skl_pipe *pipe;
263 struct skl_specific_cfg formats_config;
264};
265
266int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe);
267
268int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
269
270int skl_pause_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
271
272int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
273
274int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
275
276int skl_init_module(struct skl_sst *ctx, struct skl_module_cfg *module_config,
277 char *param);
278
279int skl_bind_modules(struct skl_sst *ctx, struct skl_module_cfg
280 *src_module, struct skl_module_cfg *dst_module);
281
282int skl_unbind_modules(struct skl_sst *ctx, struct skl_module_cfg
283 *src_module, struct skl_module_cfg *dst_module);
284
285enum skl_bitdepth skl_get_bit_depth(int params);
286#endif
287
