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14#ifndef __EDP_CONNECTOR_H__
15#define __EDP_CONNECTOR_H__
16
17#include <linux/i2c.h>
18#include <linux/interrupt.h>
19#include <linux/kernel.h>
20#include <linux/platform_device.h>
21
22#include "drm_crtc.h"
23#include "drm_dp_helper.h"
24#include "msm_drv.h"
25
26#define edp_read(offset) msm_readl((offset))
27#define edp_write(offset, data) msm_writel((data), (offset))
28
29struct edp_ctrl;
30struct edp_aux;
31struct edp_phy;
32
33struct msm_edp {
34 struct drm_device *dev;
35 struct platform_device *pdev;
36
37 struct drm_connector *connector;
38 struct drm_bridge *bridge;
39
40
41 struct drm_encoder *encoder;
42
43 struct edp_ctrl *ctrl;
44
45 int irq;
46};
47
48
49struct drm_bridge *msm_edp_bridge_init(struct msm_edp *edp);
50void edp_bridge_destroy(struct drm_bridge *bridge);
51
52
53struct drm_connector *msm_edp_connector_init(struct msm_edp *edp);
54
55
56void *msm_edp_aux_init(struct device *dev, void __iomem *regbase,
57 struct drm_dp_aux **drm_aux);
58void msm_edp_aux_destroy(struct device *dev, struct edp_aux *aux);
59irqreturn_t msm_edp_aux_irq(struct edp_aux *aux, u32 isr);
60void msm_edp_aux_ctrl(struct edp_aux *aux, int enable);
61
62
63bool msm_edp_phy_ready(struct edp_phy *phy);
64void msm_edp_phy_ctrl(struct edp_phy *phy, int enable);
65void msm_edp_phy_vm_pe_init(struct edp_phy *phy);
66void msm_edp_phy_vm_pe_cfg(struct edp_phy *phy, u32 v0, u32 v1);
67void msm_edp_phy_lane_power_ctrl(struct edp_phy *phy, bool up, u32 max_lane);
68void *msm_edp_phy_init(struct device *dev, void __iomem *regbase);
69
70
71irqreturn_t msm_edp_ctrl_irq(struct edp_ctrl *ctrl);
72void msm_edp_ctrl_power(struct edp_ctrl *ctrl, bool on);
73int msm_edp_ctrl_init(struct msm_edp *edp);
74void msm_edp_ctrl_destroy(struct edp_ctrl *ctrl);
75bool msm_edp_ctrl_panel_connected(struct edp_ctrl *ctrl);
76int msm_edp_ctrl_get_panel_info(struct edp_ctrl *ctrl,
77 struct drm_connector *connector, struct edid **edid);
78int msm_edp_ctrl_timing_cfg(struct edp_ctrl *ctrl,
79 const struct drm_display_mode *mode,
80 const struct drm_display_info *info);
81
82bool msm_edp_ctrl_pixel_clock_valid(struct edp_ctrl *ctrl,
83 u32 pixel_rate, u32 *pm, u32 *pn);
84
85#endif
86