LXR linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c

   1/*
   2 * Copyright 2012 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs
  23 */
  24#include "channv50.h"
  25
  26#include <core/client.h>
  27#include <core/ramht.h>
  28
  29#include <nvif/class.h>
  30#include <nvif/unpack.h>
  31
  32static int
  33g84_fifo_gpfifo_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass,
  34                    void *data, u32 size, struct nvkm_object **pobject)
  35{
  36        struct nvkm_object *parent = oclass->parent;
  37        union {
  38                struct nv50_channel_gpfifo_v0 v0;
  39        } *args = data;
  40        struct nv50_fifo *fifo = nv50_fifo(base);
  41        struct nv50_fifo_chan *chan;
  42        u64 ioffset, ilength;
  43        int ret;
  44
  45        nvif_ioctl(parent, "create channel gpfifo size %d\n", size);
  46        if (nvif_unpack(args->v0, 0, 0, false)) {
  47                nvif_ioctl(parent, "create channel gpfifo vers %d vm %llx "
  48                                   "pushbuf %llx ioffset %016llx "
  49                                   "ilength %08x\n",
  50                           args->v0.version, args->v0.vm, args->v0.pushbuf,
  51                           args->v0.ioffset, args->v0.ilength);
  52                if (!args->v0.pushbuf)
  53                        return -EINVAL;
  54        } else
  55                return ret;
  56
  57        if (!(chan = kzalloc(sizeof(*chan), GFP_KERNEL)))
  58                return -ENOMEM;
  59        *pobject = &chan->base.object;
  60
  61        ret = g84_fifo_chan_ctor(fifo, args->v0.vm, args->v0.pushbuf,
  62                                 oclass, chan);
  63        if (ret)
  64                return ret;
  65
  66        args->v0.chid = chan->base.chid;
  67        ioffset = args->v0.ioffset;
  68        ilength = order_base_2(args->v0.ilength / 8);
  69
  70        nvkm_kmap(chan->ramfc);
  71        nvkm_wo32(chan->ramfc, 0x3c, 0x403f6078);
  72        nvkm_wo32(chan->ramfc, 0x44, 0x01003fff);
  73        nvkm_wo32(chan->ramfc, 0x48, chan->base.push->node->offset >> 4);
  74        nvkm_wo32(chan->ramfc, 0x50, lower_32_bits(ioffset));
  75        nvkm_wo32(chan->ramfc, 0x54, upper_32_bits(ioffset) | (ilength << 16));
  76        nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff);
  77        nvkm_wo32(chan->ramfc, 0x78, 0x00000000);
  78        nvkm_wo32(chan->ramfc, 0x7c, 0x30000001);
  79        nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) |
  80                                     (4 << 24) /* SEARCH_FULL */ |
  81                                     (chan->ramht->gpuobj->node->offset >> 4));
  82        nvkm_wo32(chan->ramfc, 0x88, chan->cache->addr >> 10);
  83        nvkm_wo32(chan->ramfc, 0x98, chan->base.inst->addr >> 12);
  84        nvkm_done(chan->ramfc);
  85        return 0;
  86}
  87
  88const struct nvkm_fifo_chan_oclass
  89g84_fifo_gpfifo_oclass = {
  90        .base.oclass = G82_CHANNEL_GPFIFO,
  91        .base.minver = 0,
  92        .base.maxver = 0,
  93        .ctor = g84_fifo_gpfifo_new,
  94};
  95