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24#include "nv50.h"
25
26#include <subdev/bios.h>
27#include <subdev/bios/bit.h>
28#include <subdev/bios/pmu.h>
29
30static void
31pmu_code(struct nv50_devinit *init, u32 pmu, u32 img, u32 len, bool sec)
32{
33 struct nvkm_device *device = init->base.subdev.device;
34 struct nvkm_bios *bios = device->bios;
35 int i;
36
37 nvkm_wr32(device, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu);
38 for (i = 0; i < len; i += 4) {
39 if ((i & 0xff) == 0)
40 nvkm_wr32(device, 0x10a188, (pmu + i) >> 8);
41 nvkm_wr32(device, 0x10a184, nvbios_rd32(bios, img + i));
42 }
43
44 while (i & 0xff) {
45 nvkm_wr32(device, 0x10a184, 0x00000000);
46 i += 4;
47 }
48}
49
50static void
51pmu_data(struct nv50_devinit *init, u32 pmu, u32 img, u32 len)
52{
53 struct nvkm_device *device = init->base.subdev.device;
54 struct nvkm_bios *bios = device->bios;
55 int i;
56
57 nvkm_wr32(device, 0x10a1c0, 0x01000000 | pmu);
58 for (i = 0; i < len; i += 4)
59 nvkm_wr32(device, 0x10a1c4, nvbios_rd32(bios, img + i));
60}
61
62static u32
63pmu_args(struct nv50_devinit *init, u32 argp, u32 argi)
64{
65 struct nvkm_device *device = init->base.subdev.device;
66 nvkm_wr32(device, 0x10a1c0, argp);
67 nvkm_wr32(device, 0x10a1c0, nvkm_rd32(device, 0x10a1c4) + argi);
68 return nvkm_rd32(device, 0x10a1c4);
69}
70
71static void
72pmu_exec(struct nv50_devinit *init, u32 init_addr)
73{
74 struct nvkm_device *device = init->base.subdev.device;
75 nvkm_wr32(device, 0x10a104, init_addr);
76 nvkm_wr32(device, 0x10a10c, 0x00000000);
77 nvkm_wr32(device, 0x10a100, 0x00000002);
78}
79
80static int
81pmu_load(struct nv50_devinit *init, u8 type, bool post,
82 u32 *init_addr_pmu, u32 *args_addr_pmu)
83{
84 struct nvkm_subdev *subdev = &init->base.subdev;
85 struct nvkm_bios *bios = subdev->device->bios;
86 struct nvbios_pmuR pmu;
87
88 if (!nvbios_pmuRm(bios, type, &pmu)) {
89 nvkm_error(subdev, "VBIOS PMU fuc %02x not found\n", type);
90 return -EINVAL;
91 }
92
93 if (!post)
94 return 0;
95
96 pmu_code(init, pmu.boot_addr_pmu, pmu.boot_addr, pmu.boot_size, false);
97 pmu_code(init, pmu.code_addr_pmu, pmu.code_addr, pmu.code_size, true);
98 pmu_data(init, pmu.data_addr_pmu, pmu.data_addr, pmu.data_size);
99
100 if (init_addr_pmu) {
101 *init_addr_pmu = pmu.init_addr_pmu;
102 *args_addr_pmu = pmu.args_addr_pmu;
103 return 0;
104 }
105
106 return pmu_exec(init, pmu.init_addr_pmu), 0;
107}
108
109static int
110gm204_devinit_post(struct nvkm_devinit *base, bool post)
111{
112 struct nv50_devinit *init = nv50_devinit(base);
113 struct nvkm_subdev *subdev = &init->base.subdev;
114 struct nvkm_device *device = subdev->device;
115 struct nvkm_bios *bios = device->bios;
116 struct bit_entry bit_I;
117 u32 exec, args;
118 int ret;
119
120 if (bit_entry(bios, 'I', &bit_I) || bit_I.version != 1 ||
121 bit_I.length < 0x1c) {
122 nvkm_error(subdev, "VBIOS PMU init data not found\n");
123 return -EINVAL;
124 }
125
126
127 if (post) {
128 nvkm_mask(device, 0x000200, 0x00002000, 0x00000000);
129 nvkm_mask(device, 0x000200, 0x00002000, 0x00002000);
130 nvkm_rd32(device, 0x000200);
131 while (nvkm_rd32(device, 0x10a10c) & 0x00000006) {
132 }
133 }
134
135 ret = pmu_load(init, 0x04, post, &exec, &args);
136 if (ret)
137 return ret;
138
139
140 if (post) {
141 u32 pmu = pmu_args(init, args + 0x08, 0x08);
142 u32 img = nvbios_rd16(bios, bit_I.offset + 0x14);
143 u32 len = nvbios_rd16(bios, bit_I.offset + 0x16);
144 pmu_data(init, pmu, img, len);
145 }
146
147
148 if (post) {
149 u32 pmu = pmu_args(init, args + 0x08, 0x10);
150 u32 img = nvbios_rd16(bios, bit_I.offset + 0x18);
151 u32 len = nvbios_rd16(bios, bit_I.offset + 0x1a);
152 pmu_data(init, pmu, img, len);
153 }
154
155
156 if (post) {
157 nvkm_wr32(device, 0x10a040, 0x00005000);
158 pmu_exec(init, exec);
159 while (!(nvkm_rd32(device, 0x10a040) & 0x00002000)) {
160 }
161 }
162
163
164 return pmu_load(init, 0x01, post, NULL, NULL);
165}
166
167static const struct nvkm_devinit_func
168gm204_devinit = {
169 .preinit = nv50_devinit_preinit,
170 .init = nv50_devinit_init,
171 .post = gm204_devinit_post,
172 .pll_set = gf100_devinit_pll_set,
173 .disable = gm107_devinit_disable,
174};
175
176int
177gm204_devinit_new(struct nvkm_device *device, int index,
178 struct nvkm_devinit **pinit)
179{
180 return nv50_devinit_new_(&gm204_devinit, device, index, pinit);
181}
182