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28#include "drm_atomic_helper.h"
29#include "drm_crtc_helper.h"
30#include "drm_edid.h"
31#include "linux/clk.h"
32#include "linux/component.h"
33#include "linux/i2c.h"
34#include "linux/of_gpio.h"
35#include "linux/of_platform.h"
36#include "vc4_drv.h"
37#include "vc4_regs.h"
38
39
40struct vc4_hdmi {
41 struct platform_device *pdev;
42
43 struct drm_encoder *encoder;
44 struct drm_connector *connector;
45
46 struct i2c_adapter *ddc;
47 void __iomem *hdmicore_regs;
48 void __iomem *hd_regs;
49 int hpd_gpio;
50
51 struct clk *pixel_clock;
52 struct clk *hsm_clock;
53};
54
55#define HDMI_READ(offset) readl(vc4->hdmi->hdmicore_regs + offset)
56#define HDMI_WRITE(offset, val) writel(val, vc4->hdmi->hdmicore_regs + offset)
57#define HD_READ(offset) readl(vc4->hdmi->hd_regs + offset)
58#define HD_WRITE(offset, val) writel(val, vc4->hdmi->hd_regs + offset)
59
60
61struct vc4_hdmi_encoder {
62 struct vc4_encoder base;
63 bool hdmi_monitor;
64};
65
66static inline struct vc4_hdmi_encoder *
67to_vc4_hdmi_encoder(struct drm_encoder *encoder)
68{
69 return container_of(encoder, struct vc4_hdmi_encoder, base.base);
70}
71
72
73struct vc4_hdmi_connector {
74 struct drm_connector base;
75
76
77
78
79
80 struct drm_encoder *encoder;
81};
82
83static inline struct vc4_hdmi_connector *
84to_vc4_hdmi_connector(struct drm_connector *connector)
85{
86 return container_of(connector, struct vc4_hdmi_connector, base);
87}
88
89#define HDMI_REG(reg) { reg, #reg }
90static const struct {
91 u32 reg;
92 const char *name;
93} hdmi_regs[] = {
94 HDMI_REG(VC4_HDMI_CORE_REV),
95 HDMI_REG(VC4_HDMI_SW_RESET_CONTROL),
96 HDMI_REG(VC4_HDMI_HOTPLUG_INT),
97 HDMI_REG(VC4_HDMI_HOTPLUG),
98 HDMI_REG(VC4_HDMI_HORZA),
99 HDMI_REG(VC4_HDMI_HORZB),
100 HDMI_REG(VC4_HDMI_FIFO_CTL),
101 HDMI_REG(VC4_HDMI_SCHEDULER_CONTROL),
102 HDMI_REG(VC4_HDMI_VERTA0),
103 HDMI_REG(VC4_HDMI_VERTA1),
104 HDMI_REG(VC4_HDMI_VERTB0),
105 HDMI_REG(VC4_HDMI_VERTB1),
106 HDMI_REG(VC4_HDMI_TX_PHY_RESET_CTL),
107};
108
109static const struct {
110 u32 reg;
111 const char *name;
112} hd_regs[] = {
113 HDMI_REG(VC4_HD_M_CTL),
114 HDMI_REG(VC4_HD_MAI_CTL),
115 HDMI_REG(VC4_HD_VID_CTL),
116 HDMI_REG(VC4_HD_CSC_CTL),
117 HDMI_REG(VC4_HD_FRAME_COUNT),
118};
119
120#ifdef CONFIG_DEBUG_FS
121int vc4_hdmi_debugfs_regs(struct seq_file *m, void *unused)
122{
123 struct drm_info_node *node = (struct drm_info_node *)m->private;
124 struct drm_device *dev = node->minor->dev;
125 struct vc4_dev *vc4 = to_vc4_dev(dev);
126 int i;
127
128 for (i = 0; i < ARRAY_SIZE(hdmi_regs); i++) {
129 seq_printf(m, "%s (0x%04x): 0x%08x\n",
130 hdmi_regs[i].name, hdmi_regs[i].reg,
131 HDMI_READ(hdmi_regs[i].reg));
132 }
133
134 for (i = 0; i < ARRAY_SIZE(hd_regs); i++) {
135 seq_printf(m, "%s (0x%04x): 0x%08x\n",
136 hd_regs[i].name, hd_regs[i].reg,
137 HD_READ(hd_regs[i].reg));
138 }
139
140 return 0;
141}
142#endif
143
144static void vc4_hdmi_dump_regs(struct drm_device *dev)
145{
146 struct vc4_dev *vc4 = to_vc4_dev(dev);
147 int i;
148
149 for (i = 0; i < ARRAY_SIZE(hdmi_regs); i++) {
150 DRM_INFO("0x%04x (%s): 0x%08x\n",
151 hdmi_regs[i].reg, hdmi_regs[i].name,
152 HDMI_READ(hdmi_regs[i].reg));
153 }
154 for (i = 0; i < ARRAY_SIZE(hd_regs); i++) {
155 DRM_INFO("0x%04x (%s): 0x%08x\n",
156 hd_regs[i].reg, hd_regs[i].name,
157 HD_READ(hd_regs[i].reg));
158 }
159}
160
161static enum drm_connector_status
162vc4_hdmi_connector_detect(struct drm_connector *connector, bool force)
163{
164 struct drm_device *dev = connector->dev;
165 struct vc4_dev *vc4 = to_vc4_dev(dev);
166
167 if (vc4->hdmi->hpd_gpio) {
168 if (gpio_get_value(vc4->hdmi->hpd_gpio))
169 return connector_status_connected;
170 else
171 return connector_status_disconnected;
172 }
173
174 if (HDMI_READ(VC4_HDMI_HOTPLUG) & VC4_HDMI_HOTPLUG_CONNECTED)
175 return connector_status_connected;
176 else
177 return connector_status_disconnected;
178}
179
180static void vc4_hdmi_connector_destroy(struct drm_connector *connector)
181{
182 drm_connector_unregister(connector);
183 drm_connector_cleanup(connector);
184}
185
186static int vc4_hdmi_connector_get_modes(struct drm_connector *connector)
187{
188 struct vc4_hdmi_connector *vc4_connector =
189 to_vc4_hdmi_connector(connector);
190 struct drm_encoder *encoder = vc4_connector->encoder;
191 struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
192 struct drm_device *dev = connector->dev;
193 struct vc4_dev *vc4 = to_vc4_dev(dev);
194 int ret = 0;
195 struct edid *edid;
196
197 edid = drm_get_edid(connector, vc4->hdmi->ddc);
198 if (!edid)
199 return -ENODEV;
200
201 vc4_encoder->hdmi_monitor = drm_detect_hdmi_monitor(edid);
202 drm_mode_connector_update_edid_property(connector, edid);
203 ret = drm_add_edid_modes(connector, edid);
204
205 return ret;
206}
207
208static struct drm_encoder *
209vc4_hdmi_connector_best_encoder(struct drm_connector *connector)
210{
211 struct vc4_hdmi_connector *hdmi_connector =
212 to_vc4_hdmi_connector(connector);
213 return hdmi_connector->encoder;
214}
215
216static const struct drm_connector_funcs vc4_hdmi_connector_funcs = {
217 .dpms = drm_atomic_helper_connector_dpms,
218 .detect = vc4_hdmi_connector_detect,
219 .fill_modes = drm_helper_probe_single_connector_modes,
220 .destroy = vc4_hdmi_connector_destroy,
221 .reset = drm_atomic_helper_connector_reset,
222 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
223 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
224};
225
226static const struct drm_connector_helper_funcs vc4_hdmi_connector_helper_funcs = {
227 .get_modes = vc4_hdmi_connector_get_modes,
228 .best_encoder = vc4_hdmi_connector_best_encoder,
229};
230
231static struct drm_connector *vc4_hdmi_connector_init(struct drm_device *dev,
232 struct drm_encoder *encoder)
233{
234 struct drm_connector *connector = NULL;
235 struct vc4_hdmi_connector *hdmi_connector;
236 int ret = 0;
237
238 hdmi_connector = devm_kzalloc(dev->dev, sizeof(*hdmi_connector),
239 GFP_KERNEL);
240 if (!hdmi_connector) {
241 ret = -ENOMEM;
242 goto fail;
243 }
244 connector = &hdmi_connector->base;
245
246 hdmi_connector->encoder = encoder;
247
248 drm_connector_init(dev, connector, &vc4_hdmi_connector_funcs,
249 DRM_MODE_CONNECTOR_HDMIA);
250 drm_connector_helper_add(connector, &vc4_hdmi_connector_helper_funcs);
251
252 connector->polled = (DRM_CONNECTOR_POLL_CONNECT |
253 DRM_CONNECTOR_POLL_DISCONNECT);
254
255 connector->interlace_allowed = 0;
256 connector->doublescan_allowed = 0;
257
258 drm_mode_connector_attach_encoder(connector, encoder);
259
260 return connector;
261
262 fail:
263 if (connector)
264 vc4_hdmi_connector_destroy(connector);
265
266 return ERR_PTR(ret);
267}
268
269static void vc4_hdmi_encoder_destroy(struct drm_encoder *encoder)
270{
271 drm_encoder_cleanup(encoder);
272}
273
274static const struct drm_encoder_funcs vc4_hdmi_encoder_funcs = {
275 .destroy = vc4_hdmi_encoder_destroy,
276};
277
278static void vc4_hdmi_encoder_mode_set(struct drm_encoder *encoder,
279 struct drm_display_mode *unadjusted_mode,
280 struct drm_display_mode *mode)
281{
282 struct drm_device *dev = encoder->dev;
283 struct vc4_dev *vc4 = to_vc4_dev(dev);
284 bool debug_dump_regs = false;
285 bool hsync_pos = mode->flags & DRM_MODE_FLAG_PHSYNC;
286 bool vsync_pos = mode->flags & DRM_MODE_FLAG_PVSYNC;
287 u32 vactive = (mode->vdisplay >>
288 ((mode->flags & DRM_MODE_FLAG_INTERLACE) ? 1 : 0));
289 u32 verta = (VC4_SET_FIELD(mode->vsync_end - mode->vsync_start,
290 VC4_HDMI_VERTA_VSP) |
291 VC4_SET_FIELD(mode->vsync_start - mode->vdisplay,
292 VC4_HDMI_VERTA_VFP) |
293 VC4_SET_FIELD(vactive, VC4_HDMI_VERTA_VAL));
294 u32 vertb = (VC4_SET_FIELD(0, VC4_HDMI_VERTB_VSPO) |
295 VC4_SET_FIELD(mode->vtotal - mode->vsync_end,
296 VC4_HDMI_VERTB_VBP));
297
298 if (debug_dump_regs) {
299 DRM_INFO("HDMI regs before:\n");
300 vc4_hdmi_dump_regs(dev);
301 }
302
303 HD_WRITE(VC4_HD_VID_CTL, 0);
304
305 clk_set_rate(vc4->hdmi->pixel_clock, mode->clock * 1000);
306
307 HDMI_WRITE(VC4_HDMI_SCHEDULER_CONTROL,
308 HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) |
309 VC4_HDMI_SCHEDULER_CONTROL_MANUAL_FORMAT |
310 VC4_HDMI_SCHEDULER_CONTROL_IGNORE_VSYNC_PREDICTS);
311
312 HDMI_WRITE(VC4_HDMI_HORZA,
313 (vsync_pos ? VC4_HDMI_HORZA_VPOS : 0) |
314 (hsync_pos ? VC4_HDMI_HORZA_HPOS : 0) |
315 VC4_SET_FIELD(mode->hdisplay, VC4_HDMI_HORZA_HAP));
316
317 HDMI_WRITE(VC4_HDMI_HORZB,
318 VC4_SET_FIELD(mode->htotal - mode->hsync_end,
319 VC4_HDMI_HORZB_HBP) |
320 VC4_SET_FIELD(mode->hsync_end - mode->hsync_start,
321 VC4_HDMI_HORZB_HSP) |
322 VC4_SET_FIELD(mode->hsync_start - mode->hdisplay,
323 VC4_HDMI_HORZB_HFP));
324
325 HDMI_WRITE(VC4_HDMI_VERTA0, verta);
326 HDMI_WRITE(VC4_HDMI_VERTA1, verta);
327
328 HDMI_WRITE(VC4_HDMI_VERTB0, vertb);
329 HDMI_WRITE(VC4_HDMI_VERTB1, vertb);
330
331 HD_WRITE(VC4_HD_VID_CTL,
332 (vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
333 (hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
334
335
336 HD_WRITE(VC4_HD_CSC_CTL, VC4_SET_FIELD(VC4_HD_CSC_CTL_ORDER_BGR,
337 VC4_HD_CSC_CTL_ORDER));
338
339 HDMI_WRITE(VC4_HDMI_FIFO_CTL, VC4_HDMI_FIFO_CTL_MASTER_SLAVE_N);
340
341 if (debug_dump_regs) {
342 DRM_INFO("HDMI regs after:\n");
343 vc4_hdmi_dump_regs(dev);
344 }
345}
346
347static void vc4_hdmi_encoder_disable(struct drm_encoder *encoder)
348{
349 struct drm_device *dev = encoder->dev;
350 struct vc4_dev *vc4 = to_vc4_dev(dev);
351
352 HDMI_WRITE(VC4_HDMI_TX_PHY_RESET_CTL, 0xf << 16);
353 HD_WRITE(VC4_HD_VID_CTL,
354 HD_READ(VC4_HD_VID_CTL) & ~VC4_HD_VID_CTL_ENABLE);
355}
356
357static void vc4_hdmi_encoder_enable(struct drm_encoder *encoder)
358{
359 struct vc4_hdmi_encoder *vc4_encoder = to_vc4_hdmi_encoder(encoder);
360 struct drm_device *dev = encoder->dev;
361 struct vc4_dev *vc4 = to_vc4_dev(dev);
362 int ret;
363
364 HDMI_WRITE(VC4_HDMI_TX_PHY_RESET_CTL, 0);
365
366 HD_WRITE(VC4_HD_VID_CTL,
367 HD_READ(VC4_HD_VID_CTL) |
368 VC4_HD_VID_CTL_ENABLE |
369 VC4_HD_VID_CTL_UNDERFLOW_ENABLE |
370 VC4_HD_VID_CTL_FRAME_COUNTER_RESET);
371
372 if (vc4_encoder->hdmi_monitor) {
373 HDMI_WRITE(VC4_HDMI_SCHEDULER_CONTROL,
374 HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) |
375 VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI);
376
377 ret = wait_for(HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) &
378 VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE, 1);
379 WARN_ONCE(ret, "Timeout waiting for "
380 "VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE\n");
381 } else {
382 HDMI_WRITE(VC4_HDMI_RAM_PACKET_CONFIG,
383 HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) &
384 ~(VC4_HDMI_RAM_PACKET_ENABLE));
385 HDMI_WRITE(VC4_HDMI_SCHEDULER_CONTROL,
386 HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) &
387 ~VC4_HDMI_SCHEDULER_CONTROL_MODE_HDMI);
388
389 ret = wait_for(!(HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) &
390 VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE), 1);
391 WARN_ONCE(ret, "Timeout waiting for "
392 "!VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE\n");
393 }
394
395 if (vc4_encoder->hdmi_monitor) {
396 u32 drift;
397
398 WARN_ON(!(HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) &
399 VC4_HDMI_SCHEDULER_CONTROL_HDMI_ACTIVE));
400 HDMI_WRITE(VC4_HDMI_SCHEDULER_CONTROL,
401 HDMI_READ(VC4_HDMI_SCHEDULER_CONTROL) |
402 VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT);
403
404
405
406
407
408 drift = HDMI_READ(VC4_HDMI_FIFO_CTL);
409 drift &= VC4_HDMI_FIFO_VALID_WRITE_MASK;
410
411 HDMI_WRITE(VC4_HDMI_FIFO_CTL,
412 drift & ~VC4_HDMI_FIFO_CTL_RECENTER);
413 HDMI_WRITE(VC4_HDMI_FIFO_CTL,
414 drift | VC4_HDMI_FIFO_CTL_RECENTER);
415 udelay(1000);
416 HDMI_WRITE(VC4_HDMI_FIFO_CTL,
417 drift & ~VC4_HDMI_FIFO_CTL_RECENTER);
418 HDMI_WRITE(VC4_HDMI_FIFO_CTL,
419 drift | VC4_HDMI_FIFO_CTL_RECENTER);
420
421 ret = wait_for(HDMI_READ(VC4_HDMI_FIFO_CTL) &
422 VC4_HDMI_FIFO_CTL_RECENTER_DONE, 1);
423 WARN_ONCE(ret, "Timeout waiting for "
424 "VC4_HDMI_FIFO_CTL_RECENTER_DONE");
425 }
426}
427
428static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = {
429 .mode_set = vc4_hdmi_encoder_mode_set,
430 .disable = vc4_hdmi_encoder_disable,
431 .enable = vc4_hdmi_encoder_enable,
432};
433
434static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
435{
436 struct platform_device *pdev = to_platform_device(dev);
437 struct drm_device *drm = dev_get_drvdata(master);
438 struct vc4_dev *vc4 = drm->dev_private;
439 struct vc4_hdmi *hdmi;
440 struct vc4_hdmi_encoder *vc4_hdmi_encoder;
441 struct device_node *ddc_node;
442 u32 value;
443 int ret;
444
445 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
446 if (!hdmi)
447 return -ENOMEM;
448
449 vc4_hdmi_encoder = devm_kzalloc(dev, sizeof(*vc4_hdmi_encoder),
450 GFP_KERNEL);
451 if (!vc4_hdmi_encoder)
452 return -ENOMEM;
453 vc4_hdmi_encoder->base.type = VC4_ENCODER_TYPE_HDMI;
454 hdmi->encoder = &vc4_hdmi_encoder->base.base;
455
456 hdmi->pdev = pdev;
457 hdmi->hdmicore_regs = vc4_ioremap_regs(pdev, 0);
458 if (IS_ERR(hdmi->hdmicore_regs))
459 return PTR_ERR(hdmi->hdmicore_regs);
460
461 hdmi->hd_regs = vc4_ioremap_regs(pdev, 1);
462 if (IS_ERR(hdmi->hd_regs))
463 return PTR_ERR(hdmi->hd_regs);
464
465 ddc_node = of_parse_phandle(dev->of_node, "ddc", 0);
466 if (!ddc_node) {
467 DRM_ERROR("Failed to find ddc node in device tree\n");
468 return -ENODEV;
469 }
470
471 hdmi->pixel_clock = devm_clk_get(dev, "pixel");
472 if (IS_ERR(hdmi->pixel_clock)) {
473 DRM_ERROR("Failed to get pixel clock\n");
474 return PTR_ERR(hdmi->pixel_clock);
475 }
476 hdmi->hsm_clock = devm_clk_get(dev, "hdmi");
477 if (IS_ERR(hdmi->hsm_clock)) {
478 DRM_ERROR("Failed to get HDMI state machine clock\n");
479 return PTR_ERR(hdmi->hsm_clock);
480 }
481
482 hdmi->ddc = of_find_i2c_adapter_by_node(ddc_node);
483 if (!hdmi->ddc) {
484 DRM_DEBUG("Failed to get ddc i2c adapter by node\n");
485 return -EPROBE_DEFER;
486 }
487
488
489
490
491
492 ret = clk_prepare_enable(hdmi->pixel_clock);
493 if (ret) {
494 DRM_ERROR("Failed to turn on pixel clock: %d\n", ret);
495 goto err_put_i2c;
496 }
497
498 ret = clk_prepare_enable(hdmi->hsm_clock);
499 if (ret) {
500 DRM_ERROR("Failed to turn on HDMI state machine clock: %d\n",
501 ret);
502 goto err_unprepare_pix;
503 }
504
505
506
507
508 if (of_find_property(dev->of_node, "hpd-gpios", &value)) {
509 hdmi->hpd_gpio = of_get_named_gpio(dev->of_node, "hpd-gpios", 0);
510 if (hdmi->hpd_gpio < 0) {
511 ret = hdmi->hpd_gpio;
512 goto err_unprepare_hsm;
513 }
514 }
515
516 vc4->hdmi = hdmi;
517
518
519 WARN_ON_ONCE((HD_READ(VC4_HD_M_CTL) & VC4_HD_M_ENABLE) == 0);
520
521 drm_encoder_init(drm, hdmi->encoder, &vc4_hdmi_encoder_funcs,
522 DRM_MODE_ENCODER_TMDS);
523 drm_encoder_helper_add(hdmi->encoder, &vc4_hdmi_encoder_helper_funcs);
524
525 hdmi->connector = vc4_hdmi_connector_init(drm, hdmi->encoder);
526 if (IS_ERR(hdmi->connector)) {
527 ret = PTR_ERR(hdmi->connector);
528 goto err_destroy_encoder;
529 }
530
531 return 0;
532
533err_destroy_encoder:
534 vc4_hdmi_encoder_destroy(hdmi->encoder);
535err_unprepare_hsm:
536 clk_disable_unprepare(hdmi->hsm_clock);
537err_unprepare_pix:
538 clk_disable_unprepare(hdmi->pixel_clock);
539err_put_i2c:
540 put_device(&vc4->hdmi->ddc->dev);
541
542 return ret;
543}
544
545static void vc4_hdmi_unbind(struct device *dev, struct device *master,
546 void *data)
547{
548 struct drm_device *drm = dev_get_drvdata(master);
549 struct vc4_dev *vc4 = drm->dev_private;
550 struct vc4_hdmi *hdmi = vc4->hdmi;
551
552 vc4_hdmi_connector_destroy(hdmi->connector);
553 vc4_hdmi_encoder_destroy(hdmi->encoder);
554
555 clk_disable_unprepare(hdmi->pixel_clock);
556 clk_disable_unprepare(hdmi->hsm_clock);
557 put_device(&hdmi->ddc->dev);
558
559 vc4->hdmi = NULL;
560}
561
562static const struct component_ops vc4_hdmi_ops = {
563 .bind = vc4_hdmi_bind,
564 .unbind = vc4_hdmi_unbind,
565};
566
567static int vc4_hdmi_dev_probe(struct platform_device *pdev)
568{
569 return component_add(&pdev->dev, &vc4_hdmi_ops);
570}
571
572static int vc4_hdmi_dev_remove(struct platform_device *pdev)
573{
574 component_del(&pdev->dev, &vc4_hdmi_ops);
575 return 0;
576}
577
578static const struct of_device_id vc4_hdmi_dt_match[] = {
579 { .compatible = "brcm,bcm2835-hdmi" },
580 {}
581};
582
583struct platform_driver vc4_hdmi_driver = {
584 .probe = vc4_hdmi_dev_probe,
585 .remove = vc4_hdmi_dev_remove,
586 .driver = {
587 .name = "vc4_hdmi",
588 .of_match_table = vc4_hdmi_dt_match,
589 },
590};
591
