1#ifndef __SDHCI_PCI_H 2#define __SDHCI_PCI_H 3 4/* 5 * PCI device IDs 6 */ 7 8#define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809 9#define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a 10#define PCI_DEVICE_ID_INTEL_BYT_EMMC 0x0f14 11#define PCI_DEVICE_ID_INTEL_BYT_SDIO 0x0f15 12#define PCI_DEVICE_ID_INTEL_BYT_SD 0x0f16 13#define PCI_DEVICE_ID_INTEL_BYT_EMMC2 0x0f50 14#define PCI_DEVICE_ID_INTEL_BSW_EMMC 0x2294 15#define PCI_DEVICE_ID_INTEL_BSW_SDIO 0x2295 16#define PCI_DEVICE_ID_INTEL_BSW_SD 0x2296 17#define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190 18#define PCI_DEVICE_ID_INTEL_CLV_SDIO0 0x08f9 19#define PCI_DEVICE_ID_INTEL_CLV_SDIO1 0x08fa 20#define PCI_DEVICE_ID_INTEL_CLV_SDIO2 0x08fb 21#define PCI_DEVICE_ID_INTEL_CLV_EMMC0 0x08e5 22#define PCI_DEVICE_ID_INTEL_CLV_EMMC1 0x08e6 23#define PCI_DEVICE_ID_INTEL_QRK_SD 0x08A7 24#define PCI_DEVICE_ID_INTEL_SPT_EMMC 0x9d2b 25#define PCI_DEVICE_ID_INTEL_SPT_SDIO 0x9d2c 26#define PCI_DEVICE_ID_INTEL_SPT_SD 0x9d2d 27#define PCI_DEVICE_ID_INTEL_DNV_EMMC 0x19db 28#define PCI_DEVICE_ID_INTEL_BXT_SD 0x0aca 29#define PCI_DEVICE_ID_INTEL_BXT_EMMC 0x0acc 30#define PCI_DEVICE_ID_INTEL_BXT_SDIO 0x0ad0 31#define PCI_DEVICE_ID_INTEL_APL_SD 0x5aca 32#define PCI_DEVICE_ID_INTEL_APL_EMMC 0x5acc 33#define PCI_DEVICE_ID_INTEL_APL_SDIO 0x5ad0 34 35/* 36 * PCI registers 37 */ 38 39#define PCI_SDHCI_IFPIO 0x00 40#define PCI_SDHCI_IFDMA 0x01 41#define PCI_SDHCI_IFVENDOR 0x02 42 43#define PCI_SLOT_INFO 0x40 /* 8 bits */ 44#define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7) 45#define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07 46 47#define MAX_SLOTS 8 48 49struct sdhci_pci_chip; 50struct sdhci_pci_slot; 51 52struct sdhci_pci_fixes { 53 unsigned int quirks; 54 unsigned int quirks2; 55 bool allow_runtime_pm; 56 bool own_cd_for_runtime_pm; 57 58 int (*probe) (struct sdhci_pci_chip *); 59 60 int (*probe_slot) (struct sdhci_pci_slot *); 61 void (*remove_slot) (struct sdhci_pci_slot *, int); 62 63 int (*suspend) (struct sdhci_pci_chip *); 64 int (*resume) (struct sdhci_pci_chip *); 65}; 66 67struct sdhci_pci_slot { 68 struct sdhci_pci_chip *chip; 69 struct sdhci_host *host; 70 struct sdhci_pci_data *data; 71 72 int pci_bar; 73 int rst_n_gpio; 74 int cd_gpio; 75 int cd_irq; 76 77 char *cd_con_id; 78 int cd_idx; 79 bool cd_override_level; 80 81 void (*hw_reset)(struct sdhci_host *host); 82 int (*select_drive_strength)(struct sdhci_host *host, 83 struct mmc_card *card, 84 unsigned int max_dtr, int host_drv, 85 int card_drv, int *drv_type); 86}; 87 88struct sdhci_pci_chip { 89 struct pci_dev *pdev; 90 91 unsigned int quirks; 92 unsigned int quirks2; 93 bool allow_runtime_pm; 94 const struct sdhci_pci_fixes *fixes; 95 96 int num_slots; /* Slots on controller */ 97 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */ 98}; 99 100#endif /* __SDHCI_PCI_H */ 101