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18#ifndef _WMI_H_
19#define _WMI_H_
20
21#include <linux/types.h>
22#include <net/mac80211.h>
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64struct wmi_cmd_hdr {
65 __le32 cmd_id;
66} __packed;
67
68#define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF
69#define WMI_CMD_HDR_CMD_ID_LSB 0
70#define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
71#define WMI_CMD_HDR_PLT_PRIV_LSB 24
72
73#define HTC_PROTOCOL_VERSION 0x0002
74#define WMI_PROTOCOL_VERSION 0x0002
75
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82
83typedef __s32 __bitwise a_sle32;
84
85static inline a_sle32 a_cpu_to_sle32(s32 val)
86{
87 return (__force a_sle32)cpu_to_le32(val);
88}
89
90static inline s32 a_sle32_to_cpu(a_sle32 val)
91{
92 return le32_to_cpu((__force __le32)val);
93}
94
95enum wmi_service {
96 WMI_SERVICE_BEACON_OFFLOAD = 0,
97 WMI_SERVICE_SCAN_OFFLOAD,
98 WMI_SERVICE_ROAM_OFFLOAD,
99 WMI_SERVICE_BCN_MISS_OFFLOAD,
100 WMI_SERVICE_STA_PWRSAVE,
101 WMI_SERVICE_STA_ADVANCED_PWRSAVE,
102 WMI_SERVICE_AP_UAPSD,
103 WMI_SERVICE_AP_DFS,
104 WMI_SERVICE_11AC,
105 WMI_SERVICE_BLOCKACK,
106 WMI_SERVICE_PHYERR,
107 WMI_SERVICE_BCN_FILTER,
108 WMI_SERVICE_RTT,
109 WMI_SERVICE_RATECTRL,
110 WMI_SERVICE_WOW,
111 WMI_SERVICE_RATECTRL_CACHE,
112 WMI_SERVICE_IRAM_TIDS,
113 WMI_SERVICE_ARPNS_OFFLOAD,
114 WMI_SERVICE_NLO,
115 WMI_SERVICE_GTK_OFFLOAD,
116 WMI_SERVICE_SCAN_SCH,
117 WMI_SERVICE_CSA_OFFLOAD,
118 WMI_SERVICE_CHATTER,
119 WMI_SERVICE_COEX_FREQAVOID,
120 WMI_SERVICE_PACKET_POWER_SAVE,
121 WMI_SERVICE_FORCE_FW_HANG,
122 WMI_SERVICE_GPIO,
123 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
124 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
125 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
126 WMI_SERVICE_STA_KEEP_ALIVE,
127 WMI_SERVICE_TX_ENCAP,
128 WMI_SERVICE_BURST,
129 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
130 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
131 WMI_SERVICE_ROAM_SCAN_OFFLOAD,
132 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
133 WMI_SERVICE_EARLY_RX,
134 WMI_SERVICE_STA_SMPS,
135 WMI_SERVICE_FWTEST,
136 WMI_SERVICE_STA_WMMAC,
137 WMI_SERVICE_TDLS,
138 WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
139 WMI_SERVICE_ADAPTIVE_OCS,
140 WMI_SERVICE_BA_SSN_SUPPORT,
141 WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
142 WMI_SERVICE_WLAN_HB,
143 WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
144 WMI_SERVICE_BATCH_SCAN,
145 WMI_SERVICE_QPOWER,
146 WMI_SERVICE_PLMREQ,
147 WMI_SERVICE_THERMAL_MGMT,
148 WMI_SERVICE_RMC,
149 WMI_SERVICE_MHF_OFFLOAD,
150 WMI_SERVICE_COEX_SAR,
151 WMI_SERVICE_BCN_TXRATE_OVERRIDE,
152 WMI_SERVICE_NAN,
153 WMI_SERVICE_L1SS_STAT,
154 WMI_SERVICE_ESTIMATE_LINKSPEED,
155 WMI_SERVICE_OBSS_SCAN,
156 WMI_SERVICE_TDLS_OFFCHAN,
157 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
158 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
159 WMI_SERVICE_IBSS_PWRSAVE,
160 WMI_SERVICE_LPASS,
161 WMI_SERVICE_EXTSCAN,
162 WMI_SERVICE_D0WOW,
163 WMI_SERVICE_HSOFFLOAD,
164 WMI_SERVICE_ROAM_HO_OFFLOAD,
165 WMI_SERVICE_RX_FULL_REORDER,
166 WMI_SERVICE_DHCP_OFFLOAD,
167 WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
168 WMI_SERVICE_MDNS_OFFLOAD,
169 WMI_SERVICE_SAP_AUTH_OFFLOAD,
170 WMI_SERVICE_ATF,
171 WMI_SERVICE_COEX_GPIO,
172 WMI_SERVICE_ENHANCED_PROXY_STA,
173 WMI_SERVICE_TT,
174 WMI_SERVICE_PEER_CACHING,
175 WMI_SERVICE_AUX_SPECTRAL_INTF,
176 WMI_SERVICE_AUX_CHAN_LOAD_INTF,
177 WMI_SERVICE_BSS_CHANNEL_INFO_64,
178
179
180 WMI_SERVICE_MAX,
181};
182
183enum wmi_10x_service {
184 WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
185 WMI_10X_SERVICE_SCAN_OFFLOAD,
186 WMI_10X_SERVICE_ROAM_OFFLOAD,
187 WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
188 WMI_10X_SERVICE_STA_PWRSAVE,
189 WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
190 WMI_10X_SERVICE_AP_UAPSD,
191 WMI_10X_SERVICE_AP_DFS,
192 WMI_10X_SERVICE_11AC,
193 WMI_10X_SERVICE_BLOCKACK,
194 WMI_10X_SERVICE_PHYERR,
195 WMI_10X_SERVICE_BCN_FILTER,
196 WMI_10X_SERVICE_RTT,
197 WMI_10X_SERVICE_RATECTRL,
198 WMI_10X_SERVICE_WOW,
199 WMI_10X_SERVICE_RATECTRL_CACHE,
200 WMI_10X_SERVICE_IRAM_TIDS,
201 WMI_10X_SERVICE_BURST,
202
203
204 WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
205 WMI_10X_SERVICE_FORCE_FW_HANG,
206 WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
207 WMI_10X_SERVICE_ATF,
208 WMI_10X_SERVICE_COEX_GPIO,
209};
210
211enum wmi_main_service {
212 WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
213 WMI_MAIN_SERVICE_SCAN_OFFLOAD,
214 WMI_MAIN_SERVICE_ROAM_OFFLOAD,
215 WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
216 WMI_MAIN_SERVICE_STA_PWRSAVE,
217 WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
218 WMI_MAIN_SERVICE_AP_UAPSD,
219 WMI_MAIN_SERVICE_AP_DFS,
220 WMI_MAIN_SERVICE_11AC,
221 WMI_MAIN_SERVICE_BLOCKACK,
222 WMI_MAIN_SERVICE_PHYERR,
223 WMI_MAIN_SERVICE_BCN_FILTER,
224 WMI_MAIN_SERVICE_RTT,
225 WMI_MAIN_SERVICE_RATECTRL,
226 WMI_MAIN_SERVICE_WOW,
227 WMI_MAIN_SERVICE_RATECTRL_CACHE,
228 WMI_MAIN_SERVICE_IRAM_TIDS,
229 WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
230 WMI_MAIN_SERVICE_NLO,
231 WMI_MAIN_SERVICE_GTK_OFFLOAD,
232 WMI_MAIN_SERVICE_SCAN_SCH,
233 WMI_MAIN_SERVICE_CSA_OFFLOAD,
234 WMI_MAIN_SERVICE_CHATTER,
235 WMI_MAIN_SERVICE_COEX_FREQAVOID,
236 WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
237 WMI_MAIN_SERVICE_FORCE_FW_HANG,
238 WMI_MAIN_SERVICE_GPIO,
239 WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
240 WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
241 WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
242 WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
243 WMI_MAIN_SERVICE_TX_ENCAP,
244};
245
246enum wmi_10_4_service {
247 WMI_10_4_SERVICE_BEACON_OFFLOAD = 0,
248 WMI_10_4_SERVICE_SCAN_OFFLOAD,
249 WMI_10_4_SERVICE_ROAM_OFFLOAD,
250 WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
251 WMI_10_4_SERVICE_STA_PWRSAVE,
252 WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
253 WMI_10_4_SERVICE_AP_UAPSD,
254 WMI_10_4_SERVICE_AP_DFS,
255 WMI_10_4_SERVICE_11AC,
256 WMI_10_4_SERVICE_BLOCKACK,
257 WMI_10_4_SERVICE_PHYERR,
258 WMI_10_4_SERVICE_BCN_FILTER,
259 WMI_10_4_SERVICE_RTT,
260 WMI_10_4_SERVICE_RATECTRL,
261 WMI_10_4_SERVICE_WOW,
262 WMI_10_4_SERVICE_RATECTRL_CACHE,
263 WMI_10_4_SERVICE_IRAM_TIDS,
264 WMI_10_4_SERVICE_BURST,
265 WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
266 WMI_10_4_SERVICE_GTK_OFFLOAD,
267 WMI_10_4_SERVICE_SCAN_SCH,
268 WMI_10_4_SERVICE_CSA_OFFLOAD,
269 WMI_10_4_SERVICE_CHATTER,
270 WMI_10_4_SERVICE_COEX_FREQAVOID,
271 WMI_10_4_SERVICE_PACKET_POWER_SAVE,
272 WMI_10_4_SERVICE_FORCE_FW_HANG,
273 WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
274 WMI_10_4_SERVICE_GPIO,
275 WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
276 WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
277 WMI_10_4_SERVICE_STA_KEEP_ALIVE,
278 WMI_10_4_SERVICE_TX_ENCAP,
279 WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
280 WMI_10_4_SERVICE_EARLY_RX,
281 WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
282 WMI_10_4_SERVICE_TT,
283 WMI_10_4_SERVICE_ATF,
284 WMI_10_4_SERVICE_PEER_CACHING,
285 WMI_10_4_SERVICE_COEX_GPIO,
286 WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
287 WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
288 WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
289};
290
291static inline char *wmi_service_name(int service_id)
292{
293#define SVCSTR(x) case x: return #x
294
295 switch (service_id) {
296 SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
297 SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
298 SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
299 SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
300 SVCSTR(WMI_SERVICE_STA_PWRSAVE);
301 SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
302 SVCSTR(WMI_SERVICE_AP_UAPSD);
303 SVCSTR(WMI_SERVICE_AP_DFS);
304 SVCSTR(WMI_SERVICE_11AC);
305 SVCSTR(WMI_SERVICE_BLOCKACK);
306 SVCSTR(WMI_SERVICE_PHYERR);
307 SVCSTR(WMI_SERVICE_BCN_FILTER);
308 SVCSTR(WMI_SERVICE_RTT);
309 SVCSTR(WMI_SERVICE_RATECTRL);
310 SVCSTR(WMI_SERVICE_WOW);
311 SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
312 SVCSTR(WMI_SERVICE_IRAM_TIDS);
313 SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
314 SVCSTR(WMI_SERVICE_NLO);
315 SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
316 SVCSTR(WMI_SERVICE_SCAN_SCH);
317 SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
318 SVCSTR(WMI_SERVICE_CHATTER);
319 SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
320 SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
321 SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
322 SVCSTR(WMI_SERVICE_GPIO);
323 SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
324 SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
325 SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
326 SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
327 SVCSTR(WMI_SERVICE_TX_ENCAP);
328 SVCSTR(WMI_SERVICE_BURST);
329 SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
330 SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
331 SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
332 SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
333 SVCSTR(WMI_SERVICE_EARLY_RX);
334 SVCSTR(WMI_SERVICE_STA_SMPS);
335 SVCSTR(WMI_SERVICE_FWTEST);
336 SVCSTR(WMI_SERVICE_STA_WMMAC);
337 SVCSTR(WMI_SERVICE_TDLS);
338 SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
339 SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
340 SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
341 SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
342 SVCSTR(WMI_SERVICE_WLAN_HB);
343 SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
344 SVCSTR(WMI_SERVICE_BATCH_SCAN);
345 SVCSTR(WMI_SERVICE_QPOWER);
346 SVCSTR(WMI_SERVICE_PLMREQ);
347 SVCSTR(WMI_SERVICE_THERMAL_MGMT);
348 SVCSTR(WMI_SERVICE_RMC);
349 SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
350 SVCSTR(WMI_SERVICE_COEX_SAR);
351 SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
352 SVCSTR(WMI_SERVICE_NAN);
353 SVCSTR(WMI_SERVICE_L1SS_STAT);
354 SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
355 SVCSTR(WMI_SERVICE_OBSS_SCAN);
356 SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
357 SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
358 SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
359 SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
360 SVCSTR(WMI_SERVICE_LPASS);
361 SVCSTR(WMI_SERVICE_EXTSCAN);
362 SVCSTR(WMI_SERVICE_D0WOW);
363 SVCSTR(WMI_SERVICE_HSOFFLOAD);
364 SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
365 SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
366 SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
367 SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
368 SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
369 SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
370 SVCSTR(WMI_SERVICE_ATF);
371 SVCSTR(WMI_SERVICE_COEX_GPIO);
372 SVCSTR(WMI_SERVICE_ENHANCED_PROXY_STA);
373 SVCSTR(WMI_SERVICE_TT);
374 SVCSTR(WMI_SERVICE_PEER_CACHING);
375 SVCSTR(WMI_SERVICE_AUX_SPECTRAL_INTF);
376 SVCSTR(WMI_SERVICE_AUX_CHAN_LOAD_INTF);
377 SVCSTR(WMI_SERVICE_BSS_CHANNEL_INFO_64);
378 default:
379 return NULL;
380 }
381
382#undef SVCSTR
383}
384
385#define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
386 ((svc_id) < (len) && \
387 __le32_to_cpu((wmi_svc_bmap)[(svc_id)/(sizeof(u32))]) & \
388 BIT((svc_id)%(sizeof(u32))))
389
390#define SVCMAP(x, y, len) \
391 do { \
392 if (WMI_SERVICE_IS_ENABLED((in), (x), (len))) \
393 __set_bit(y, out); \
394 } while (0)
395
396static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
397 size_t len)
398{
399 SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
400 WMI_SERVICE_BEACON_OFFLOAD, len);
401 SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
402 WMI_SERVICE_SCAN_OFFLOAD, len);
403 SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
404 WMI_SERVICE_ROAM_OFFLOAD, len);
405 SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
406 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
407 SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
408 WMI_SERVICE_STA_PWRSAVE, len);
409 SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
410 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
411 SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
412 WMI_SERVICE_AP_UAPSD, len);
413 SVCMAP(WMI_10X_SERVICE_AP_DFS,
414 WMI_SERVICE_AP_DFS, len);
415 SVCMAP(WMI_10X_SERVICE_11AC,
416 WMI_SERVICE_11AC, len);
417 SVCMAP(WMI_10X_SERVICE_BLOCKACK,
418 WMI_SERVICE_BLOCKACK, len);
419 SVCMAP(WMI_10X_SERVICE_PHYERR,
420 WMI_SERVICE_PHYERR, len);
421 SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
422 WMI_SERVICE_BCN_FILTER, len);
423 SVCMAP(WMI_10X_SERVICE_RTT,
424 WMI_SERVICE_RTT, len);
425 SVCMAP(WMI_10X_SERVICE_RATECTRL,
426 WMI_SERVICE_RATECTRL, len);
427 SVCMAP(WMI_10X_SERVICE_WOW,
428 WMI_SERVICE_WOW, len);
429 SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
430 WMI_SERVICE_RATECTRL_CACHE, len);
431 SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
432 WMI_SERVICE_IRAM_TIDS, len);
433 SVCMAP(WMI_10X_SERVICE_BURST,
434 WMI_SERVICE_BURST, len);
435 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
436 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
437 SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
438 WMI_SERVICE_FORCE_FW_HANG, len);
439 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
440 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
441 SVCMAP(WMI_10X_SERVICE_ATF,
442 WMI_SERVICE_ATF, len);
443 SVCMAP(WMI_10X_SERVICE_COEX_GPIO,
444 WMI_SERVICE_COEX_GPIO, len);
445}
446
447static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
448 size_t len)
449{
450 SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
451 WMI_SERVICE_BEACON_OFFLOAD, len);
452 SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
453 WMI_SERVICE_SCAN_OFFLOAD, len);
454 SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
455 WMI_SERVICE_ROAM_OFFLOAD, len);
456 SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
457 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
458 SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
459 WMI_SERVICE_STA_PWRSAVE, len);
460 SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
461 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
462 SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
463 WMI_SERVICE_AP_UAPSD, len);
464 SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
465 WMI_SERVICE_AP_DFS, len);
466 SVCMAP(WMI_MAIN_SERVICE_11AC,
467 WMI_SERVICE_11AC, len);
468 SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
469 WMI_SERVICE_BLOCKACK, len);
470 SVCMAP(WMI_MAIN_SERVICE_PHYERR,
471 WMI_SERVICE_PHYERR, len);
472 SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
473 WMI_SERVICE_BCN_FILTER, len);
474 SVCMAP(WMI_MAIN_SERVICE_RTT,
475 WMI_SERVICE_RTT, len);
476 SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
477 WMI_SERVICE_RATECTRL, len);
478 SVCMAP(WMI_MAIN_SERVICE_WOW,
479 WMI_SERVICE_WOW, len);
480 SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
481 WMI_SERVICE_RATECTRL_CACHE, len);
482 SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
483 WMI_SERVICE_IRAM_TIDS, len);
484 SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
485 WMI_SERVICE_ARPNS_OFFLOAD, len);
486 SVCMAP(WMI_MAIN_SERVICE_NLO,
487 WMI_SERVICE_NLO, len);
488 SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
489 WMI_SERVICE_GTK_OFFLOAD, len);
490 SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
491 WMI_SERVICE_SCAN_SCH, len);
492 SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
493 WMI_SERVICE_CSA_OFFLOAD, len);
494 SVCMAP(WMI_MAIN_SERVICE_CHATTER,
495 WMI_SERVICE_CHATTER, len);
496 SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
497 WMI_SERVICE_COEX_FREQAVOID, len);
498 SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
499 WMI_SERVICE_PACKET_POWER_SAVE, len);
500 SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
501 WMI_SERVICE_FORCE_FW_HANG, len);
502 SVCMAP(WMI_MAIN_SERVICE_GPIO,
503 WMI_SERVICE_GPIO, len);
504 SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
505 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
506 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
507 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
508 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
509 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
510 SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
511 WMI_SERVICE_STA_KEEP_ALIVE, len);
512 SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
513 WMI_SERVICE_TX_ENCAP, len);
514}
515
516static inline void wmi_10_4_svc_map(const __le32 *in, unsigned long *out,
517 size_t len)
518{
519 SVCMAP(WMI_10_4_SERVICE_BEACON_OFFLOAD,
520 WMI_SERVICE_BEACON_OFFLOAD, len);
521 SVCMAP(WMI_10_4_SERVICE_SCAN_OFFLOAD,
522 WMI_SERVICE_SCAN_OFFLOAD, len);
523 SVCMAP(WMI_10_4_SERVICE_ROAM_OFFLOAD,
524 WMI_SERVICE_ROAM_OFFLOAD, len);
525 SVCMAP(WMI_10_4_SERVICE_BCN_MISS_OFFLOAD,
526 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
527 SVCMAP(WMI_10_4_SERVICE_STA_PWRSAVE,
528 WMI_SERVICE_STA_PWRSAVE, len);
529 SVCMAP(WMI_10_4_SERVICE_STA_ADVANCED_PWRSAVE,
530 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
531 SVCMAP(WMI_10_4_SERVICE_AP_UAPSD,
532 WMI_SERVICE_AP_UAPSD, len);
533 SVCMAP(WMI_10_4_SERVICE_AP_DFS,
534 WMI_SERVICE_AP_DFS, len);
535 SVCMAP(WMI_10_4_SERVICE_11AC,
536 WMI_SERVICE_11AC, len);
537 SVCMAP(WMI_10_4_SERVICE_BLOCKACK,
538 WMI_SERVICE_BLOCKACK, len);
539 SVCMAP(WMI_10_4_SERVICE_PHYERR,
540 WMI_SERVICE_PHYERR, len);
541 SVCMAP(WMI_10_4_SERVICE_BCN_FILTER,
542 WMI_SERVICE_BCN_FILTER, len);
543 SVCMAP(WMI_10_4_SERVICE_RTT,
544 WMI_SERVICE_RTT, len);
545 SVCMAP(WMI_10_4_SERVICE_RATECTRL,
546 WMI_SERVICE_RATECTRL, len);
547 SVCMAP(WMI_10_4_SERVICE_WOW,
548 WMI_SERVICE_WOW, len);
549 SVCMAP(WMI_10_4_SERVICE_RATECTRL_CACHE,
550 WMI_SERVICE_RATECTRL_CACHE, len);
551 SVCMAP(WMI_10_4_SERVICE_IRAM_TIDS,
552 WMI_SERVICE_IRAM_TIDS, len);
553 SVCMAP(WMI_10_4_SERVICE_BURST,
554 WMI_SERVICE_BURST, len);
555 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_SW_SUPPORT,
556 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
557 SVCMAP(WMI_10_4_SERVICE_GTK_OFFLOAD,
558 WMI_SERVICE_GTK_OFFLOAD, len);
559 SVCMAP(WMI_10_4_SERVICE_SCAN_SCH,
560 WMI_SERVICE_SCAN_SCH, len);
561 SVCMAP(WMI_10_4_SERVICE_CSA_OFFLOAD,
562 WMI_SERVICE_CSA_OFFLOAD, len);
563 SVCMAP(WMI_10_4_SERVICE_CHATTER,
564 WMI_SERVICE_CHATTER, len);
565 SVCMAP(WMI_10_4_SERVICE_COEX_FREQAVOID,
566 WMI_SERVICE_COEX_FREQAVOID, len);
567 SVCMAP(WMI_10_4_SERVICE_PACKET_POWER_SAVE,
568 WMI_SERVICE_PACKET_POWER_SAVE, len);
569 SVCMAP(WMI_10_4_SERVICE_FORCE_FW_HANG,
570 WMI_SERVICE_FORCE_FW_HANG, len);
571 SVCMAP(WMI_10_4_SERVICE_SMART_ANTENNA_HW_SUPPORT,
572 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
573 SVCMAP(WMI_10_4_SERVICE_GPIO,
574 WMI_SERVICE_GPIO, len);
575 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
576 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
577 SVCMAP(WMI_10_4_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
578 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
579 SVCMAP(WMI_10_4_SERVICE_STA_KEEP_ALIVE,
580 WMI_SERVICE_STA_KEEP_ALIVE, len);
581 SVCMAP(WMI_10_4_SERVICE_TX_ENCAP,
582 WMI_SERVICE_TX_ENCAP, len);
583 SVCMAP(WMI_10_4_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
584 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC, len);
585 SVCMAP(WMI_10_4_SERVICE_EARLY_RX,
586 WMI_SERVICE_EARLY_RX, len);
587 SVCMAP(WMI_10_4_SERVICE_ENHANCED_PROXY_STA,
588 WMI_SERVICE_ENHANCED_PROXY_STA, len);
589 SVCMAP(WMI_10_4_SERVICE_TT,
590 WMI_SERVICE_TT, len);
591 SVCMAP(WMI_10_4_SERVICE_ATF,
592 WMI_SERVICE_ATF, len);
593 SVCMAP(WMI_10_4_SERVICE_PEER_CACHING,
594 WMI_SERVICE_PEER_CACHING, len);
595 SVCMAP(WMI_10_4_SERVICE_COEX_GPIO,
596 WMI_SERVICE_COEX_GPIO, len);
597 SVCMAP(WMI_10_4_SERVICE_AUX_SPECTRAL_INTF,
598 WMI_SERVICE_AUX_SPECTRAL_INTF, len);
599 SVCMAP(WMI_10_4_SERVICE_AUX_CHAN_LOAD_INTF,
600 WMI_SERVICE_AUX_CHAN_LOAD_INTF, len);
601 SVCMAP(WMI_10_4_SERVICE_BSS_CHANNEL_INFO_64,
602 WMI_SERVICE_BSS_CHANNEL_INFO_64, len);
603}
604
605#undef SVCMAP
606
607
608struct wmi_mac_addr {
609 union {
610 u8 addr[6];
611 struct {
612 u32 word0;
613 u32 word1;
614 } __packed;
615 } __packed;
616} __packed;
617
618struct wmi_cmd_map {
619 u32 init_cmdid;
620 u32 start_scan_cmdid;
621 u32 stop_scan_cmdid;
622 u32 scan_chan_list_cmdid;
623 u32 scan_sch_prio_tbl_cmdid;
624 u32 pdev_set_regdomain_cmdid;
625 u32 pdev_set_channel_cmdid;
626 u32 pdev_set_param_cmdid;
627 u32 pdev_pktlog_enable_cmdid;
628 u32 pdev_pktlog_disable_cmdid;
629 u32 pdev_set_wmm_params_cmdid;
630 u32 pdev_set_ht_cap_ie_cmdid;
631 u32 pdev_set_vht_cap_ie_cmdid;
632 u32 pdev_set_dscp_tid_map_cmdid;
633 u32 pdev_set_quiet_mode_cmdid;
634 u32 pdev_green_ap_ps_enable_cmdid;
635 u32 pdev_get_tpc_config_cmdid;
636 u32 pdev_set_base_macaddr_cmdid;
637 u32 vdev_create_cmdid;
638 u32 vdev_delete_cmdid;
639 u32 vdev_start_request_cmdid;
640 u32 vdev_restart_request_cmdid;
641 u32 vdev_up_cmdid;
642 u32 vdev_stop_cmdid;
643 u32 vdev_down_cmdid;
644 u32 vdev_set_param_cmdid;
645 u32 vdev_install_key_cmdid;
646 u32 peer_create_cmdid;
647 u32 peer_delete_cmdid;
648 u32 peer_flush_tids_cmdid;
649 u32 peer_set_param_cmdid;
650 u32 peer_assoc_cmdid;
651 u32 peer_add_wds_entry_cmdid;
652 u32 peer_remove_wds_entry_cmdid;
653 u32 peer_mcast_group_cmdid;
654 u32 bcn_tx_cmdid;
655 u32 pdev_send_bcn_cmdid;
656 u32 bcn_tmpl_cmdid;
657 u32 bcn_filter_rx_cmdid;
658 u32 prb_req_filter_rx_cmdid;
659 u32 mgmt_tx_cmdid;
660 u32 prb_tmpl_cmdid;
661 u32 addba_clear_resp_cmdid;
662 u32 addba_send_cmdid;
663 u32 addba_status_cmdid;
664 u32 delba_send_cmdid;
665 u32 addba_set_resp_cmdid;
666 u32 send_singleamsdu_cmdid;
667 u32 sta_powersave_mode_cmdid;
668 u32 sta_powersave_param_cmdid;
669 u32 sta_mimo_ps_mode_cmdid;
670 u32 pdev_dfs_enable_cmdid;
671 u32 pdev_dfs_disable_cmdid;
672 u32 roam_scan_mode;
673 u32 roam_scan_rssi_threshold;
674 u32 roam_scan_period;
675 u32 roam_scan_rssi_change_threshold;
676 u32 roam_ap_profile;
677 u32 ofl_scan_add_ap_profile;
678 u32 ofl_scan_remove_ap_profile;
679 u32 ofl_scan_period;
680 u32 p2p_dev_set_device_info;
681 u32 p2p_dev_set_discoverability;
682 u32 p2p_go_set_beacon_ie;
683 u32 p2p_go_set_probe_resp_ie;
684 u32 p2p_set_vendor_ie_data_cmdid;
685 u32 ap_ps_peer_param_cmdid;
686 u32 ap_ps_peer_uapsd_coex_cmdid;
687 u32 peer_rate_retry_sched_cmdid;
688 u32 wlan_profile_trigger_cmdid;
689 u32 wlan_profile_set_hist_intvl_cmdid;
690 u32 wlan_profile_get_profile_data_cmdid;
691 u32 wlan_profile_enable_profile_id_cmdid;
692 u32 wlan_profile_list_profile_id_cmdid;
693 u32 pdev_suspend_cmdid;
694 u32 pdev_resume_cmdid;
695 u32 add_bcn_filter_cmdid;
696 u32 rmv_bcn_filter_cmdid;
697 u32 wow_add_wake_pattern_cmdid;
698 u32 wow_del_wake_pattern_cmdid;
699 u32 wow_enable_disable_wake_event_cmdid;
700 u32 wow_enable_cmdid;
701 u32 wow_hostwakeup_from_sleep_cmdid;
702 u32 rtt_measreq_cmdid;
703 u32 rtt_tsf_cmdid;
704 u32 vdev_spectral_scan_configure_cmdid;
705 u32 vdev_spectral_scan_enable_cmdid;
706 u32 request_stats_cmdid;
707 u32 set_arp_ns_offload_cmdid;
708 u32 network_list_offload_config_cmdid;
709 u32 gtk_offload_cmdid;
710 u32 csa_offload_enable_cmdid;
711 u32 csa_offload_chanswitch_cmdid;
712 u32 chatter_set_mode_cmdid;
713 u32 peer_tid_addba_cmdid;
714 u32 peer_tid_delba_cmdid;
715 u32 sta_dtim_ps_method_cmdid;
716 u32 sta_uapsd_auto_trig_cmdid;
717 u32 sta_keepalive_cmd;
718 u32 echo_cmdid;
719 u32 pdev_utf_cmdid;
720 u32 dbglog_cfg_cmdid;
721 u32 pdev_qvit_cmdid;
722 u32 pdev_ftm_intg_cmdid;
723 u32 vdev_set_keepalive_cmdid;
724 u32 vdev_get_keepalive_cmdid;
725 u32 force_fw_hang_cmdid;
726 u32 gpio_config_cmdid;
727 u32 gpio_output_cmdid;
728 u32 pdev_get_temperature_cmdid;
729 u32 vdev_set_wmm_params_cmdid;
730 u32 tdls_set_state_cmdid;
731 u32 tdls_peer_update_cmdid;
732 u32 adaptive_qcs_cmdid;
733 u32 scan_update_request_cmdid;
734 u32 vdev_standby_response_cmdid;
735 u32 vdev_resume_response_cmdid;
736 u32 wlan_peer_caching_add_peer_cmdid;
737 u32 wlan_peer_caching_evict_peer_cmdid;
738 u32 wlan_peer_caching_restore_peer_cmdid;
739 u32 wlan_peer_caching_print_all_peers_info_cmdid;
740 u32 peer_update_wds_entry_cmdid;
741 u32 peer_add_proxy_sta_entry_cmdid;
742 u32 rtt_keepalive_cmdid;
743 u32 oem_req_cmdid;
744 u32 nan_cmdid;
745 u32 vdev_ratemask_cmdid;
746 u32 qboost_cfg_cmdid;
747 u32 pdev_smart_ant_enable_cmdid;
748 u32 pdev_smart_ant_set_rx_antenna_cmdid;
749 u32 peer_smart_ant_set_tx_antenna_cmdid;
750 u32 peer_smart_ant_set_train_info_cmdid;
751 u32 peer_smart_ant_set_node_config_ops_cmdid;
752 u32 pdev_set_antenna_switch_table_cmdid;
753 u32 pdev_set_ctl_table_cmdid;
754 u32 pdev_set_mimogain_table_cmdid;
755 u32 pdev_ratepwr_table_cmdid;
756 u32 pdev_ratepwr_chainmsk_table_cmdid;
757 u32 pdev_fips_cmdid;
758 u32 tt_set_conf_cmdid;
759 u32 fwtest_cmdid;
760 u32 vdev_atf_request_cmdid;
761 u32 peer_atf_request_cmdid;
762 u32 pdev_get_ani_cck_config_cmdid;
763 u32 pdev_get_ani_ofdm_config_cmdid;
764 u32 pdev_reserve_ast_entry_cmdid;
765 u32 pdev_get_nfcal_power_cmdid;
766 u32 pdev_get_tpc_cmdid;
767 u32 pdev_get_ast_info_cmdid;
768 u32 vdev_set_dscp_tid_map_cmdid;
769 u32 pdev_get_info_cmdid;
770 u32 vdev_get_info_cmdid;
771 u32 vdev_filter_neighbor_rx_packets_cmdid;
772 u32 mu_cal_start_cmdid;
773 u32 set_cca_params_cmdid;
774 u32 pdev_bss_chan_info_request_cmdid;
775 u32 pdev_enable_adaptive_cca_cmdid;
776};
777
778
779
780
781enum wmi_cmd_group {
782
783 WMI_GRP_START = 0x3,
784 WMI_GRP_SCAN = WMI_GRP_START,
785 WMI_GRP_PDEV,
786 WMI_GRP_VDEV,
787 WMI_GRP_PEER,
788 WMI_GRP_MGMT,
789 WMI_GRP_BA_NEG,
790 WMI_GRP_STA_PS,
791 WMI_GRP_DFS,
792 WMI_GRP_ROAM,
793 WMI_GRP_OFL_SCAN,
794 WMI_GRP_P2P,
795 WMI_GRP_AP_PS,
796 WMI_GRP_RATE_CTRL,
797 WMI_GRP_PROFILE,
798 WMI_GRP_SUSPEND,
799 WMI_GRP_BCN_FILTER,
800 WMI_GRP_WOW,
801 WMI_GRP_RTT,
802 WMI_GRP_SPECTRAL,
803 WMI_GRP_STATS,
804 WMI_GRP_ARP_NS_OFL,
805 WMI_GRP_NLO_OFL,
806 WMI_GRP_GTK_OFL,
807 WMI_GRP_CSA_OFL,
808 WMI_GRP_CHATTER,
809 WMI_GRP_TID_ADDBA,
810 WMI_GRP_MISC,
811 WMI_GRP_GPIO,
812};
813
814#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
815#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
816
817#define WMI_CMD_UNSUPPORTED 0
818
819
820enum wmi_cmd_id {
821 WMI_INIT_CMDID = 0x1,
822
823
824 WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
825 WMI_STOP_SCAN_CMDID,
826 WMI_SCAN_CHAN_LIST_CMDID,
827 WMI_SCAN_SCH_PRIO_TBL_CMDID,
828
829
830 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
831 WMI_PDEV_SET_CHANNEL_CMDID,
832 WMI_PDEV_SET_PARAM_CMDID,
833 WMI_PDEV_PKTLOG_ENABLE_CMDID,
834 WMI_PDEV_PKTLOG_DISABLE_CMDID,
835 WMI_PDEV_SET_WMM_PARAMS_CMDID,
836 WMI_PDEV_SET_HT_CAP_IE_CMDID,
837 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
838 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
839 WMI_PDEV_SET_QUIET_MODE_CMDID,
840 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
841 WMI_PDEV_GET_TPC_CONFIG_CMDID,
842 WMI_PDEV_SET_BASE_MACADDR_CMDID,
843
844
845 WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
846 WMI_VDEV_DELETE_CMDID,
847 WMI_VDEV_START_REQUEST_CMDID,
848 WMI_VDEV_RESTART_REQUEST_CMDID,
849 WMI_VDEV_UP_CMDID,
850 WMI_VDEV_STOP_CMDID,
851 WMI_VDEV_DOWN_CMDID,
852 WMI_VDEV_SET_PARAM_CMDID,
853 WMI_VDEV_INSTALL_KEY_CMDID,
854
855
856 WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
857 WMI_PEER_DELETE_CMDID,
858 WMI_PEER_FLUSH_TIDS_CMDID,
859 WMI_PEER_SET_PARAM_CMDID,
860 WMI_PEER_ASSOC_CMDID,
861 WMI_PEER_ADD_WDS_ENTRY_CMDID,
862 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
863 WMI_PEER_MCAST_GROUP_CMDID,
864
865
866 WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
867 WMI_PDEV_SEND_BCN_CMDID,
868 WMI_BCN_TMPL_CMDID,
869 WMI_BCN_FILTER_RX_CMDID,
870 WMI_PRB_REQ_FILTER_RX_CMDID,
871 WMI_MGMT_TX_CMDID,
872 WMI_PRB_TMPL_CMDID,
873
874
875 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
876 WMI_ADDBA_SEND_CMDID,
877 WMI_ADDBA_STATUS_CMDID,
878 WMI_DELBA_SEND_CMDID,
879 WMI_ADDBA_SET_RESP_CMDID,
880 WMI_SEND_SINGLEAMSDU_CMDID,
881
882
883 WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
884 WMI_STA_POWERSAVE_PARAM_CMDID,
885 WMI_STA_MIMO_PS_MODE_CMDID,
886
887
888 WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
889 WMI_PDEV_DFS_DISABLE_CMDID,
890
891
892 WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
893 WMI_ROAM_SCAN_RSSI_THRESHOLD,
894 WMI_ROAM_SCAN_PERIOD,
895 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
896 WMI_ROAM_AP_PROFILE,
897
898
899 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
900 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
901 WMI_OFL_SCAN_PERIOD,
902
903
904 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
905 WMI_P2P_DEV_SET_DISCOVERABILITY,
906 WMI_P2P_GO_SET_BEACON_IE,
907 WMI_P2P_GO_SET_PROBE_RESP_IE,
908 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
909
910
911 WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
912 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
913
914
915 WMI_PEER_RATE_RETRY_SCHED_CMDID =
916 WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
917
918
919 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
920 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
921 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
922 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
923 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
924
925
926 WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
927 WMI_PDEV_RESUME_CMDID,
928
929
930 WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
931 WMI_RMV_BCN_FILTER_CMDID,
932
933
934 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
935 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
936 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
937 WMI_WOW_ENABLE_CMDID,
938 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
939
940
941 WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
942 WMI_RTT_TSF_CMDID,
943
944
945 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
946 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
947
948
949 WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
950
951
952 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
953
954
955 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
956
957
958 WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
959
960
961 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
962 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
963
964
965 WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
966
967
968 WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
969 WMI_PEER_TID_DELBA_CMDID,
970
971
972 WMI_STA_DTIM_PS_METHOD_CMDID,
973
974 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
975
976
977
978 WMI_STA_KEEPALIVE_CMD,
979
980
981 WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
982 WMI_PDEV_UTF_CMDID,
983 WMI_DBGLOG_CFG_CMDID,
984 WMI_PDEV_QVIT_CMDID,
985 WMI_PDEV_FTM_INTG_CMDID,
986 WMI_VDEV_SET_KEEPALIVE_CMDID,
987 WMI_VDEV_GET_KEEPALIVE_CMDID,
988 WMI_FORCE_FW_HANG_CMDID,
989
990
991 WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
992 WMI_GPIO_OUTPUT_CMDID,
993};
994
995enum wmi_event_id {
996 WMI_SERVICE_READY_EVENTID = 0x1,
997 WMI_READY_EVENTID,
998
999
1000 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
1001
1002
1003 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
1004 WMI_CHAN_INFO_EVENTID,
1005 WMI_PHYERR_EVENTID,
1006
1007
1008 WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
1009 WMI_VDEV_STOPPED_EVENTID,
1010 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
1011
1012
1013 WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
1014
1015
1016 WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
1017 WMI_HOST_SWBA_EVENTID,
1018 WMI_TBTTOFFSET_UPDATE_EVENTID,
1019
1020
1021 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
1022 WMI_TX_ADDBA_COMPLETE_EVENTID,
1023
1024
1025 WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
1026 WMI_PROFILE_MATCH,
1027
1028
1029 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
1030
1031
1032 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
1033 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
1034 WMI_RTT_ERROR_REPORT_EVENTID,
1035
1036
1037 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
1038 WMI_GTK_REKEY_FAIL_EVENTID,
1039
1040
1041 WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
1042
1043
1044 WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
1045 WMI_PDEV_UTF_EVENTID,
1046 WMI_DEBUG_MESG_EVENTID,
1047 WMI_UPDATE_STATS_EVENTID,
1048 WMI_DEBUG_PRINT_EVENTID,
1049 WMI_DCS_INTERFERENCE_EVENTID,
1050 WMI_PDEV_QVIT_EVENTID,
1051 WMI_WLAN_PROFILE_DATA_EVENTID,
1052 WMI_PDEV_FTM_INTG_EVENTID,
1053 WMI_WLAN_FREQ_AVOID_EVENTID,
1054 WMI_VDEV_GET_KEEPALIVE_EVENTID,
1055
1056
1057 WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
1058};
1059
1060
1061enum wmi_10x_cmd_id {
1062 WMI_10X_START_CMDID = 0x9000,
1063 WMI_10X_END_CMDID = 0x9FFF,
1064
1065
1066 WMI_10X_INIT_CMDID,
1067
1068
1069
1070 WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
1071 WMI_10X_STOP_SCAN_CMDID,
1072 WMI_10X_SCAN_CHAN_LIST_CMDID,
1073 WMI_10X_ECHO_CMDID,
1074
1075
1076 WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
1077 WMI_10X_PDEV_SET_CHANNEL_CMDID,
1078 WMI_10X_PDEV_SET_PARAM_CMDID,
1079 WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
1080 WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
1081 WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
1082 WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
1083 WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
1084 WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
1085 WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
1086 WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
1087 WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1088 WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
1089
1090
1091 WMI_10X_VDEV_CREATE_CMDID,
1092 WMI_10X_VDEV_DELETE_CMDID,
1093 WMI_10X_VDEV_START_REQUEST_CMDID,
1094 WMI_10X_VDEV_RESTART_REQUEST_CMDID,
1095 WMI_10X_VDEV_UP_CMDID,
1096 WMI_10X_VDEV_STOP_CMDID,
1097 WMI_10X_VDEV_DOWN_CMDID,
1098 WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
1099 WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
1100 WMI_10X_VDEV_SET_PARAM_CMDID,
1101 WMI_10X_VDEV_INSTALL_KEY_CMDID,
1102
1103
1104 WMI_10X_PEER_CREATE_CMDID,
1105 WMI_10X_PEER_DELETE_CMDID,
1106 WMI_10X_PEER_FLUSH_TIDS_CMDID,
1107 WMI_10X_PEER_SET_PARAM_CMDID,
1108 WMI_10X_PEER_ASSOC_CMDID,
1109 WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
1110 WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
1111 WMI_10X_PEER_MCAST_GROUP_CMDID,
1112
1113
1114
1115 WMI_10X_BCN_TX_CMDID,
1116 WMI_10X_BCN_PRB_TMPL_CMDID,
1117 WMI_10X_BCN_FILTER_RX_CMDID,
1118 WMI_10X_PRB_REQ_FILTER_RX_CMDID,
1119 WMI_10X_MGMT_TX_CMDID,
1120
1121
1122 WMI_10X_ADDBA_CLEAR_RESP_CMDID,
1123 WMI_10X_ADDBA_SEND_CMDID,
1124 WMI_10X_ADDBA_STATUS_CMDID,
1125 WMI_10X_DELBA_SEND_CMDID,
1126 WMI_10X_ADDBA_SET_RESP_CMDID,
1127 WMI_10X_SEND_SINGLEAMSDU_CMDID,
1128
1129
1130 WMI_10X_STA_POWERSAVE_MODE_CMDID,
1131 WMI_10X_STA_POWERSAVE_PARAM_CMDID,
1132 WMI_10X_STA_MIMO_PS_MODE_CMDID,
1133
1134
1135 WMI_10X_DBGLOG_CFG_CMDID,
1136
1137
1138 WMI_10X_PDEV_DFS_ENABLE_CMDID,
1139 WMI_10X_PDEV_DFS_DISABLE_CMDID,
1140
1141
1142 WMI_10X_PDEV_QVIT_CMDID,
1143
1144
1145 WMI_10X_ROAM_SCAN_MODE,
1146 WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
1147 WMI_10X_ROAM_SCAN_PERIOD,
1148 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1149 WMI_10X_ROAM_AP_PROFILE,
1150 WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
1151 WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
1152 WMI_10X_OFL_SCAN_PERIOD,
1153
1154
1155 WMI_10X_P2P_DEV_SET_DEVICE_INFO,
1156 WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
1157 WMI_10X_P2P_GO_SET_BEACON_IE,
1158 WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
1159
1160
1161 WMI_10X_AP_PS_PEER_PARAM_CMDID,
1162 WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
1163
1164
1165 WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
1166
1167
1168 WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
1169 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1170 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1171 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1172 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1173
1174
1175 WMI_10X_PDEV_SUSPEND_CMDID,
1176 WMI_10X_PDEV_RESUME_CMDID,
1177
1178
1179 WMI_10X_ADD_BCN_FILTER_CMDID,
1180 WMI_10X_RMV_BCN_FILTER_CMDID,
1181
1182
1183 WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
1184 WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
1185 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1186 WMI_10X_WOW_ENABLE_CMDID,
1187 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1188
1189
1190 WMI_10X_RTT_MEASREQ_CMDID,
1191 WMI_10X_RTT_TSF_CMDID,
1192
1193
1194 WMI_10X_PDEV_SEND_BCN_CMDID,
1195
1196
1197 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1198 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1199 WMI_10X_REQUEST_STATS_CMDID,
1200
1201
1202 WMI_10X_GPIO_CONFIG_CMDID,
1203 WMI_10X_GPIO_OUTPUT_CMDID,
1204
1205 WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
1206};
1207
1208enum wmi_10x_event_id {
1209 WMI_10X_SERVICE_READY_EVENTID = 0x8000,
1210 WMI_10X_READY_EVENTID,
1211 WMI_10X_START_EVENTID = 0x9000,
1212 WMI_10X_END_EVENTID = 0x9FFF,
1213
1214
1215 WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
1216 WMI_10X_ECHO_EVENTID,
1217 WMI_10X_DEBUG_MESG_EVENTID,
1218 WMI_10X_UPDATE_STATS_EVENTID,
1219
1220
1221 WMI_10X_INST_RSSI_STATS_EVENTID,
1222
1223
1224 WMI_10X_VDEV_START_RESP_EVENTID,
1225 WMI_10X_VDEV_STANDBY_REQ_EVENTID,
1226 WMI_10X_VDEV_RESUME_REQ_EVENTID,
1227 WMI_10X_VDEV_STOPPED_EVENTID,
1228
1229
1230 WMI_10X_PEER_STA_KICKOUT_EVENTID,
1231
1232
1233 WMI_10X_HOST_SWBA_EVENTID,
1234 WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
1235 WMI_10X_MGMT_RX_EVENTID,
1236
1237
1238 WMI_10X_CHAN_INFO_EVENTID,
1239
1240
1241 WMI_10X_PHYERR_EVENTID,
1242
1243
1244 WMI_10X_ROAM_EVENTID,
1245
1246
1247 WMI_10X_PROFILE_MATCH,
1248
1249
1250 WMI_10X_DEBUG_PRINT_EVENTID,
1251
1252 WMI_10X_PDEV_QVIT_EVENTID,
1253
1254 WMI_10X_WLAN_PROFILE_DATA_EVENTID,
1255
1256
1257 WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
1258 WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
1259 WMI_10X_RTT_ERROR_REPORT_EVENTID,
1260
1261 WMI_10X_WOW_WAKEUP_HOST_EVENTID,
1262 WMI_10X_DCS_INTERFERENCE_EVENTID,
1263
1264
1265 WMI_10X_PDEV_TPC_CONFIG_EVENTID,
1266
1267 WMI_10X_GPIO_INPUT_EVENTID,
1268 WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID-1,
1269};
1270
1271enum wmi_10_2_cmd_id {
1272 WMI_10_2_START_CMDID = 0x9000,
1273 WMI_10_2_END_CMDID = 0x9FFF,
1274 WMI_10_2_INIT_CMDID,
1275 WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
1276 WMI_10_2_STOP_SCAN_CMDID,
1277 WMI_10_2_SCAN_CHAN_LIST_CMDID,
1278 WMI_10_2_ECHO_CMDID,
1279 WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1280 WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1281 WMI_10_2_PDEV_SET_PARAM_CMDID,
1282 WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1283 WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1284 WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1285 WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1286 WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1287 WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1288 WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1289 WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1290 WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1291 WMI_10_2_VDEV_CREATE_CMDID,
1292 WMI_10_2_VDEV_DELETE_CMDID,
1293 WMI_10_2_VDEV_START_REQUEST_CMDID,
1294 WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1295 WMI_10_2_VDEV_UP_CMDID,
1296 WMI_10_2_VDEV_STOP_CMDID,
1297 WMI_10_2_VDEV_DOWN_CMDID,
1298 WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
1299 WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
1300 WMI_10_2_VDEV_SET_PARAM_CMDID,
1301 WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1302 WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
1303 WMI_10_2_PEER_CREATE_CMDID,
1304 WMI_10_2_PEER_DELETE_CMDID,
1305 WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1306 WMI_10_2_PEER_SET_PARAM_CMDID,
1307 WMI_10_2_PEER_ASSOC_CMDID,
1308 WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1309 WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
1310 WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1311 WMI_10_2_PEER_MCAST_GROUP_CMDID,
1312 WMI_10_2_BCN_TX_CMDID,
1313 WMI_10_2_BCN_PRB_TMPL_CMDID,
1314 WMI_10_2_BCN_FILTER_RX_CMDID,
1315 WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1316 WMI_10_2_MGMT_TX_CMDID,
1317 WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1318 WMI_10_2_ADDBA_SEND_CMDID,
1319 WMI_10_2_ADDBA_STATUS_CMDID,
1320 WMI_10_2_DELBA_SEND_CMDID,
1321 WMI_10_2_ADDBA_SET_RESP_CMDID,
1322 WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1323 WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1324 WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1325 WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1326 WMI_10_2_DBGLOG_CFG_CMDID,
1327 WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1328 WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1329 WMI_10_2_PDEV_QVIT_CMDID,
1330 WMI_10_2_ROAM_SCAN_MODE,
1331 WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1332 WMI_10_2_ROAM_SCAN_PERIOD,
1333 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1334 WMI_10_2_ROAM_AP_PROFILE,
1335 WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1336 WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1337 WMI_10_2_OFL_SCAN_PERIOD,
1338 WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1339 WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1340 WMI_10_2_P2P_GO_SET_BEACON_IE,
1341 WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1342 WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1343 WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
1344 WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1345 WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1346 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1347 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1348 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1349 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1350 WMI_10_2_PDEV_SUSPEND_CMDID,
1351 WMI_10_2_PDEV_RESUME_CMDID,
1352 WMI_10_2_ADD_BCN_FILTER_CMDID,
1353 WMI_10_2_RMV_BCN_FILTER_CMDID,
1354 WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1355 WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1356 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1357 WMI_10_2_WOW_ENABLE_CMDID,
1358 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1359 WMI_10_2_RTT_MEASREQ_CMDID,
1360 WMI_10_2_RTT_TSF_CMDID,
1361 WMI_10_2_RTT_KEEPALIVE_CMDID,
1362 WMI_10_2_PDEV_SEND_BCN_CMDID,
1363 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1364 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1365 WMI_10_2_REQUEST_STATS_CMDID,
1366 WMI_10_2_GPIO_CONFIG_CMDID,
1367 WMI_10_2_GPIO_OUTPUT_CMDID,
1368 WMI_10_2_VDEV_RATEMASK_CMDID,
1369 WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
1370 WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1371 WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1372 WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1373 WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1374 WMI_10_2_FORCE_FW_HANG_CMDID,
1375 WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1376 WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
1377 WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1378 WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
1379 WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1380 WMI_10_2_PDEV_GET_INFO,
1381 WMI_10_2_VDEV_GET_INFO,
1382 WMI_10_2_VDEV_ATF_REQUEST_CMDID,
1383 WMI_10_2_PEER_ATF_REQUEST_CMDID,
1384 WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
1385 WMI_10_2_MU_CAL_START_CMDID,
1386 WMI_10_2_SET_LTEU_CONFIG_CMDID,
1387 WMI_10_2_SET_CCA_PARAMS,
1388 WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
1389};
1390
1391enum wmi_10_2_event_id {
1392 WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
1393 WMI_10_2_READY_EVENTID,
1394 WMI_10_2_DEBUG_MESG_EVENTID,
1395 WMI_10_2_START_EVENTID = 0x9000,
1396 WMI_10_2_END_EVENTID = 0x9FFF,
1397 WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
1398 WMI_10_2_ECHO_EVENTID,
1399 WMI_10_2_UPDATE_STATS_EVENTID,
1400 WMI_10_2_INST_RSSI_STATS_EVENTID,
1401 WMI_10_2_VDEV_START_RESP_EVENTID,
1402 WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
1403 WMI_10_2_VDEV_RESUME_REQ_EVENTID,
1404 WMI_10_2_VDEV_STOPPED_EVENTID,
1405 WMI_10_2_PEER_STA_KICKOUT_EVENTID,
1406 WMI_10_2_HOST_SWBA_EVENTID,
1407 WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
1408 WMI_10_2_MGMT_RX_EVENTID,
1409 WMI_10_2_CHAN_INFO_EVENTID,
1410 WMI_10_2_PHYERR_EVENTID,
1411 WMI_10_2_ROAM_EVENTID,
1412 WMI_10_2_PROFILE_MATCH,
1413 WMI_10_2_DEBUG_PRINT_EVENTID,
1414 WMI_10_2_PDEV_QVIT_EVENTID,
1415 WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
1416 WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
1417 WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
1418 WMI_10_2_RTT_ERROR_REPORT_EVENTID,
1419 WMI_10_2_RTT_KEEPALIVE_EVENTID,
1420 WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
1421 WMI_10_2_DCS_INTERFERENCE_EVENTID,
1422 WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
1423 WMI_10_2_GPIO_INPUT_EVENTID,
1424 WMI_10_2_PEER_RATECODE_LIST_EVENTID,
1425 WMI_10_2_GENERIC_BUFFER_EVENTID,
1426 WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
1427 WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
1428 WMI_10_2_WDS_PEER_EVENTID,
1429 WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
1430 WMI_10_2_PDEV_TEMPERATURE_EVENTID,
1431 WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
1432};
1433
1434enum wmi_10_4_cmd_id {
1435 WMI_10_4_START_CMDID = 0x9000,
1436 WMI_10_4_END_CMDID = 0x9FFF,
1437 WMI_10_4_INIT_CMDID,
1438 WMI_10_4_START_SCAN_CMDID = WMI_10_4_START_CMDID,
1439 WMI_10_4_STOP_SCAN_CMDID,
1440 WMI_10_4_SCAN_CHAN_LIST_CMDID,
1441 WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
1442 WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
1443 WMI_10_4_ECHO_CMDID,
1444 WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
1445 WMI_10_4_PDEV_SET_CHANNEL_CMDID,
1446 WMI_10_4_PDEV_SET_PARAM_CMDID,
1447 WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
1448 WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
1449 WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
1450 WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
1451 WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
1452 WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
1453 WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
1454 WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
1455 WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1456 WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
1457 WMI_10_4_VDEV_CREATE_CMDID,
1458 WMI_10_4_VDEV_DELETE_CMDID,
1459 WMI_10_4_VDEV_START_REQUEST_CMDID,
1460 WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
1461 WMI_10_4_VDEV_UP_CMDID,
1462 WMI_10_4_VDEV_STOP_CMDID,
1463 WMI_10_4_VDEV_DOWN_CMDID,
1464 WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
1465 WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
1466 WMI_10_4_VDEV_SET_PARAM_CMDID,
1467 WMI_10_4_VDEV_INSTALL_KEY_CMDID,
1468 WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
1469 WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
1470 WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
1471 WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
1472 WMI_10_4_PEER_CREATE_CMDID,
1473 WMI_10_4_PEER_DELETE_CMDID,
1474 WMI_10_4_PEER_FLUSH_TIDS_CMDID,
1475 WMI_10_4_PEER_SET_PARAM_CMDID,
1476 WMI_10_4_PEER_ASSOC_CMDID,
1477 WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
1478 WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
1479 WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
1480 WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
1481 WMI_10_4_PEER_MCAST_GROUP_CMDID,
1482 WMI_10_4_BCN_TX_CMDID,
1483 WMI_10_4_PDEV_SEND_BCN_CMDID,
1484 WMI_10_4_BCN_PRB_TMPL_CMDID,
1485 WMI_10_4_BCN_FILTER_RX_CMDID,
1486 WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
1487 WMI_10_4_MGMT_TX_CMDID,
1488 WMI_10_4_PRB_TMPL_CMDID,
1489 WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
1490 WMI_10_4_ADDBA_SEND_CMDID,
1491 WMI_10_4_ADDBA_STATUS_CMDID,
1492 WMI_10_4_DELBA_SEND_CMDID,
1493 WMI_10_4_ADDBA_SET_RESP_CMDID,
1494 WMI_10_4_SEND_SINGLEAMSDU_CMDID,
1495 WMI_10_4_STA_POWERSAVE_MODE_CMDID,
1496 WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
1497 WMI_10_4_STA_MIMO_PS_MODE_CMDID,
1498 WMI_10_4_DBGLOG_CFG_CMDID,
1499 WMI_10_4_PDEV_DFS_ENABLE_CMDID,
1500 WMI_10_4_PDEV_DFS_DISABLE_CMDID,
1501 WMI_10_4_PDEV_QVIT_CMDID,
1502 WMI_10_4_ROAM_SCAN_MODE,
1503 WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
1504 WMI_10_4_ROAM_SCAN_PERIOD,
1505 WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1506 WMI_10_4_ROAM_AP_PROFILE,
1507 WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
1508 WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
1509 WMI_10_4_OFL_SCAN_PERIOD,
1510 WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
1511 WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
1512 WMI_10_4_P2P_GO_SET_BEACON_IE,
1513 WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
1514 WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
1515 WMI_10_4_AP_PS_PEER_PARAM_CMDID,
1516 WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
1517 WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
1518 WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
1519 WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1520 WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1521 WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1522 WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1523 WMI_10_4_PDEV_SUSPEND_CMDID,
1524 WMI_10_4_PDEV_RESUME_CMDID,
1525 WMI_10_4_ADD_BCN_FILTER_CMDID,
1526 WMI_10_4_RMV_BCN_FILTER_CMDID,
1527 WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
1528 WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
1529 WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1530 WMI_10_4_WOW_ENABLE_CMDID,
1531 WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1532 WMI_10_4_RTT_MEASREQ_CMDID,
1533 WMI_10_4_RTT_TSF_CMDID,
1534 WMI_10_4_RTT_KEEPALIVE_CMDID,
1535 WMI_10_4_OEM_REQ_CMDID,
1536 WMI_10_4_NAN_CMDID,
1537 WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1538 WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1539 WMI_10_4_REQUEST_STATS_CMDID,
1540 WMI_10_4_GPIO_CONFIG_CMDID,
1541 WMI_10_4_GPIO_OUTPUT_CMDID,
1542 WMI_10_4_VDEV_RATEMASK_CMDID,
1543 WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
1544 WMI_10_4_GTK_OFFLOAD_CMDID,
1545 WMI_10_4_QBOOST_CFG_CMDID,
1546 WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
1547 WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
1548 WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1549 WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1550 WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1551 WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1552 WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
1553 WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
1554 WMI_10_4_FORCE_FW_HANG_CMDID,
1555 WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1556 WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
1557 WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1558 WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
1559 WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1560 WMI_10_4_PDEV_FIPS_CMDID,
1561 WMI_10_4_TT_SET_CONF_CMDID,
1562 WMI_10_4_FWTEST_CMDID,
1563 WMI_10_4_VDEV_ATF_REQUEST_CMDID,
1564 WMI_10_4_PEER_ATF_REQUEST_CMDID,
1565 WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
1566 WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
1567 WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
1568 WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
1569 WMI_10_4_PDEV_GET_TPC_CMDID,
1570 WMI_10_4_PDEV_GET_AST_INFO_CMDID,
1571 WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
1572 WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
1573 WMI_10_4_PDEV_GET_INFO_CMDID,
1574 WMI_10_4_VDEV_GET_INFO_CMDID,
1575 WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
1576 WMI_10_4_MU_CAL_START_CMDID,
1577 WMI_10_4_SET_CCA_PARAMS_CMDID,
1578 WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
1579 WMI_10_4_PDEV_UTF_CMDID = WMI_10_4_END_CMDID - 1,
1580};
1581
1582enum wmi_10_4_event_id {
1583 WMI_10_4_SERVICE_READY_EVENTID = 0x8000,
1584 WMI_10_4_READY_EVENTID,
1585 WMI_10_4_DEBUG_MESG_EVENTID,
1586 WMI_10_4_START_EVENTID = 0x9000,
1587 WMI_10_4_END_EVENTID = 0x9FFF,
1588 WMI_10_4_SCAN_EVENTID = WMI_10_4_START_EVENTID,
1589 WMI_10_4_ECHO_EVENTID,
1590 WMI_10_4_UPDATE_STATS_EVENTID,
1591 WMI_10_4_INST_RSSI_STATS_EVENTID,
1592 WMI_10_4_VDEV_START_RESP_EVENTID,
1593 WMI_10_4_VDEV_STANDBY_REQ_EVENTID,
1594 WMI_10_4_VDEV_RESUME_REQ_EVENTID,
1595 WMI_10_4_VDEV_STOPPED_EVENTID,
1596 WMI_10_4_PEER_STA_KICKOUT_EVENTID,
1597 WMI_10_4_HOST_SWBA_EVENTID,
1598 WMI_10_4_TBTTOFFSET_UPDATE_EVENTID,
1599 WMI_10_4_MGMT_RX_EVENTID,
1600 WMI_10_4_CHAN_INFO_EVENTID,
1601 WMI_10_4_PHYERR_EVENTID,
1602 WMI_10_4_ROAM_EVENTID,
1603 WMI_10_4_PROFILE_MATCH,
1604 WMI_10_4_DEBUG_PRINT_EVENTID,
1605 WMI_10_4_PDEV_QVIT_EVENTID,
1606 WMI_10_4_WLAN_PROFILE_DATA_EVENTID,
1607 WMI_10_4_RTT_MEASUREMENT_REPORT_EVENTID,
1608 WMI_10_4_TSF_MEASUREMENT_REPORT_EVENTID,
1609 WMI_10_4_RTT_ERROR_REPORT_EVENTID,
1610 WMI_10_4_RTT_KEEPALIVE_EVENTID,
1611 WMI_10_4_OEM_CAPABILITY_EVENTID,
1612 WMI_10_4_OEM_MEASUREMENT_REPORT_EVENTID,
1613 WMI_10_4_OEM_ERROR_REPORT_EVENTID,
1614 WMI_10_4_NAN_EVENTID,
1615 WMI_10_4_WOW_WAKEUP_HOST_EVENTID,
1616 WMI_10_4_GTK_OFFLOAD_STATUS_EVENTID,
1617 WMI_10_4_GTK_REKEY_FAIL_EVENTID,
1618 WMI_10_4_DCS_INTERFERENCE_EVENTID,
1619 WMI_10_4_PDEV_TPC_CONFIG_EVENTID,
1620 WMI_10_4_CSA_HANDLING_EVENTID,
1621 WMI_10_4_GPIO_INPUT_EVENTID,
1622 WMI_10_4_PEER_RATECODE_LIST_EVENTID,
1623 WMI_10_4_GENERIC_BUFFER_EVENTID,
1624 WMI_10_4_MCAST_BUF_RELEASE_EVENTID,
1625 WMI_10_4_MCAST_LIST_AGEOUT_EVENTID,
1626 WMI_10_4_VDEV_GET_KEEPALIVE_EVENTID,
1627 WMI_10_4_WDS_PEER_EVENTID,
1628 WMI_10_4_PEER_STA_PS_STATECHG_EVENTID,
1629 WMI_10_4_PDEV_FIPS_EVENTID,
1630 WMI_10_4_TT_STATS_EVENTID,
1631 WMI_10_4_PDEV_CHANNEL_HOPPING_EVENTID,
1632 WMI_10_4_PDEV_ANI_CCK_LEVEL_EVENTID,
1633 WMI_10_4_PDEV_ANI_OFDM_LEVEL_EVENTID,
1634 WMI_10_4_PDEV_RESERVE_AST_ENTRY_EVENTID,
1635 WMI_10_4_PDEV_NFCAL_POWER_EVENTID,
1636 WMI_10_4_PDEV_TPC_EVENTID,
1637 WMI_10_4_PDEV_GET_AST_INFO_EVENTID,
1638 WMI_10_4_PDEV_TEMPERATURE_EVENTID,
1639 WMI_10_4_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID,
1640 WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID,
1641 WMI_10_4_PDEV_UTF_EVENTID = WMI_10_4_END_EVENTID - 1,
1642};
1643
1644enum wmi_phy_mode {
1645 MODE_11A = 0,
1646 MODE_11G = 1,
1647 MODE_11B = 2,
1648 MODE_11GONLY = 3,
1649 MODE_11NA_HT20 = 4,
1650 MODE_11NG_HT20 = 5,
1651 MODE_11NA_HT40 = 6,
1652 MODE_11NG_HT40 = 7,
1653 MODE_11AC_VHT20 = 8,
1654 MODE_11AC_VHT40 = 9,
1655 MODE_11AC_VHT80 = 10,
1656
1657 MODE_11AC_VHT20_2G = 11,
1658 MODE_11AC_VHT40_2G = 12,
1659 MODE_11AC_VHT80_2G = 13,
1660 MODE_UNKNOWN = 14,
1661 MODE_MAX = 14
1662};
1663
1664static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
1665{
1666 switch (mode) {
1667 case MODE_11A:
1668 return "11a";
1669 case MODE_11G:
1670 return "11g";
1671 case MODE_11B:
1672 return "11b";
1673 case MODE_11GONLY:
1674 return "11gonly";
1675 case MODE_11NA_HT20:
1676 return "11na-ht20";
1677 case MODE_11NG_HT20:
1678 return "11ng-ht20";
1679 case MODE_11NA_HT40:
1680 return "11na-ht40";
1681 case MODE_11NG_HT40:
1682 return "11ng-ht40";
1683 case MODE_11AC_VHT20:
1684 return "11ac-vht20";
1685 case MODE_11AC_VHT40:
1686 return "11ac-vht40";
1687 case MODE_11AC_VHT80:
1688 return "11ac-vht80";
1689 case MODE_11AC_VHT20_2G:
1690 return "11ac-vht20-2g";
1691 case MODE_11AC_VHT40_2G:
1692 return "11ac-vht40-2g";
1693 case MODE_11AC_VHT80_2G:
1694 return "11ac-vht80-2g";
1695 case MODE_UNKNOWN:
1696
1697 break;
1698
1699
1700
1701 };
1702
1703 return "<unknown>";
1704}
1705
1706#define WMI_CHAN_LIST_TAG 0x1
1707#define WMI_SSID_LIST_TAG 0x2
1708#define WMI_BSSID_LIST_TAG 0x3
1709#define WMI_IE_TAG 0x4
1710
1711struct wmi_channel {
1712 __le32 mhz;
1713 __le32 band_center_freq1;
1714 __le32 band_center_freq2;
1715 union {
1716 __le32 flags;
1717 struct {
1718 u8 mode;
1719 } __packed;
1720 } __packed;
1721 union {
1722 __le32 reginfo0;
1723 struct {
1724
1725 u8 min_power;
1726 u8 max_power;
1727 u8 reg_power;
1728 u8 reg_classid;
1729 } __packed;
1730 } __packed;
1731 union {
1732 __le32 reginfo1;
1733 struct {
1734 u8 antenna_max;
1735 } __packed;
1736 } __packed;
1737} __packed;
1738
1739struct wmi_channel_arg {
1740 u32 freq;
1741 u32 band_center_freq1;
1742 bool passive;
1743 bool allow_ibss;
1744 bool allow_ht;
1745 bool allow_vht;
1746 bool ht40plus;
1747 bool chan_radar;
1748
1749 u32 min_power;
1750 u32 max_power;
1751 u32 max_reg_power;
1752 u32 max_antenna_gain;
1753 u32 reg_class_id;
1754 enum wmi_phy_mode mode;
1755};
1756
1757enum wmi_channel_change_cause {
1758 WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
1759 WMI_CHANNEL_CHANGE_CAUSE_CSA,
1760};
1761
1762#define WMI_CHAN_FLAG_HT40_PLUS (1 << 6)
1763#define WMI_CHAN_FLAG_PASSIVE (1 << 7)
1764#define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8)
1765#define WMI_CHAN_FLAG_AP_DISABLED (1 << 9)
1766#define WMI_CHAN_FLAG_DFS (1 << 10)
1767#define WMI_CHAN_FLAG_ALLOW_HT (1 << 11)
1768#define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12)
1769
1770
1771#define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
1772
1773#define WMI_MAX_SPATIAL_STREAM 3
1774#define WMI_10_4_MAX_SPATIAL_STREAM 4
1775
1776
1777#define WMI_HT_CAP_ENABLED 0x0001
1778#define WMI_HT_CAP_HT20_SGI 0x0002
1779#define WMI_HT_CAP_DYNAMIC_SMPS 0x0004
1780#define WMI_HT_CAP_TX_STBC 0x0008
1781#define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3
1782#define WMI_HT_CAP_RX_STBC 0x0030
1783#define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4
1784#define WMI_HT_CAP_LDPC 0x0040
1785#define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080
1786#define WMI_HT_CAP_MPDU_DENSITY 0x0700
1787#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
1788#define WMI_HT_CAP_HT40_SGI 0x0800
1789
1790#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \
1791 WMI_HT_CAP_HT20_SGI | \
1792 WMI_HT_CAP_HT40_SGI | \
1793 WMI_HT_CAP_TX_STBC | \
1794 WMI_HT_CAP_RX_STBC | \
1795 WMI_HT_CAP_LDPC)
1796
1797
1798
1799
1800
1801
1802
1803
1804#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003
1805#define WMI_VHT_CAP_RX_LDPC 0x00000010
1806#define WMI_VHT_CAP_SGI_80MHZ 0x00000020
1807#define WMI_VHT_CAP_TX_STBC 0x00000080
1808#define WMI_VHT_CAP_RX_STBC_MASK 0x00000300
1809#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8
1810#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000
1811#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23
1812#define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000
1813#define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000
1814
1815
1816#define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000
1817#define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001
1818#define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002
1819
1820#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \
1821 WMI_VHT_CAP_RX_LDPC | \
1822 WMI_VHT_CAP_SGI_80MHZ | \
1823 WMI_VHT_CAP_TX_STBC | \
1824 WMI_VHT_CAP_RX_STBC_MASK | \
1825 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \
1826 WMI_VHT_CAP_RX_FIXED_ANT | \
1827 WMI_VHT_CAP_TX_FIXED_ANT)
1828
1829
1830
1831
1832
1833#define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1))
1834#define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000
1835#define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16
1836
1837enum {
1838 REGDMN_MODE_11A = 0x00001,
1839 REGDMN_MODE_TURBO = 0x00002,
1840 REGDMN_MODE_11B = 0x00004,
1841 REGDMN_MODE_PUREG = 0x00008,
1842 REGDMN_MODE_11G = 0x00008,
1843 REGDMN_MODE_108G = 0x00020,
1844 REGDMN_MODE_108A = 0x00040,
1845 REGDMN_MODE_XR = 0x00100,
1846 REGDMN_MODE_11A_HALF_RATE = 0x00200,
1847 REGDMN_MODE_11A_QUARTER_RATE = 0x00400,
1848 REGDMN_MODE_11NG_HT20 = 0x00800,
1849 REGDMN_MODE_11NA_HT20 = 0x01000,
1850 REGDMN_MODE_11NG_HT40PLUS = 0x02000,
1851 REGDMN_MODE_11NG_HT40MINUS = 0x04000,
1852 REGDMN_MODE_11NA_HT40PLUS = 0x08000,
1853 REGDMN_MODE_11NA_HT40MINUS = 0x10000,
1854 REGDMN_MODE_11AC_VHT20 = 0x20000,
1855 REGDMN_MODE_11AC_VHT40PLUS = 0x40000,
1856 REGDMN_MODE_11AC_VHT40MINUS = 0x80000,
1857 REGDMN_MODE_11AC_VHT80 = 0x100000,
1858 REGDMN_MODE_ALL = 0xffffffff
1859};
1860
1861#define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001
1862#define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002
1863#define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004
1864
1865
1866#define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
1867#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
1868#define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100
1869#define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
1870#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
1871#define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
1872
1873struct hal_reg_capabilities {
1874
1875 __le32 eeprom_rd;
1876
1877 __le32 eeprom_rd_ext;
1878
1879 __le32 regcap1;
1880
1881 __le32 regcap2;
1882
1883 __le32 wireless_modes;
1884 __le32 low_2ghz_chan;
1885 __le32 high_2ghz_chan;
1886 __le32 low_5ghz_chan;
1887 __le32 high_5ghz_chan;
1888} __packed;
1889
1890enum wlan_mode_capability {
1891 WHAL_WLAN_11A_CAPABILITY = 0x1,
1892 WHAL_WLAN_11G_CAPABILITY = 0x2,
1893 WHAL_WLAN_11AG_CAPABILITY = 0x3,
1894};
1895
1896
1897struct wlan_host_mem_req {
1898
1899 __le32 req_id;
1900
1901 __le32 unit_size;
1902
1903
1904
1905
1906 __le32 num_unit_info;
1907
1908
1909
1910
1911
1912
1913
1914 __le32 num_units;
1915} __packed;
1916
1917
1918
1919
1920
1921
1922struct wmi_service_ready_event {
1923 __le32 sw_version;
1924 __le32 sw_version_1;
1925 __le32 abi_version;
1926
1927 __le32 phy_capability;
1928
1929 __le32 max_frag_entry;
1930 __le32 wmi_service_bitmap[16];
1931 __le32 num_rf_chains;
1932
1933
1934
1935
1936 __le32 ht_cap_info;
1937 __le32 vht_cap_info;
1938 __le32 vht_supp_mcs;
1939 __le32 hw_min_tx_power;
1940 __le32 hw_max_tx_power;
1941 struct hal_reg_capabilities hal_reg_capabilities;
1942 __le32 sys_cap_info;
1943 __le32 min_pkt_size_enable;
1944
1945
1946
1947
1948 __le32 max_bcn_ie_size;
1949
1950
1951
1952
1953
1954
1955 __le32 num_mem_reqs;
1956 struct wlan_host_mem_req mem_reqs[0];
1957} __packed;
1958
1959
1960struct wmi_10x_service_ready_event {
1961 __le32 sw_version;
1962 __le32 abi_version;
1963
1964
1965 __le32 phy_capability;
1966
1967
1968 __le32 max_frag_entry;
1969 __le32 wmi_service_bitmap[16];
1970 __le32 num_rf_chains;
1971
1972
1973
1974
1975
1976 __le32 ht_cap_info;
1977 __le32 vht_cap_info;
1978 __le32 vht_supp_mcs;
1979 __le32 hw_min_tx_power;
1980 __le32 hw_max_tx_power;
1981
1982 struct hal_reg_capabilities hal_reg_capabilities;
1983
1984 __le32 sys_cap_info;
1985 __le32 min_pkt_size_enable;
1986
1987
1988
1989
1990
1991
1992
1993 __le32 num_mem_reqs;
1994
1995 struct wlan_host_mem_req mem_reqs[0];
1996} __packed;
1997
1998#define WMI_SERVICE_READY_TIMEOUT_HZ (5*HZ)
1999#define WMI_UNIFIED_READY_TIMEOUT_HZ (5*HZ)
2000
2001struct wmi_ready_event {
2002 __le32 sw_version;
2003 __le32 abi_version;
2004 struct wmi_mac_addr mac_addr;
2005 __le32 status;
2006} __packed;
2007
2008struct wmi_resource_config {
2009
2010 __le32 num_vdevs;
2011
2012
2013 __le32 num_peers;
2014
2015
2016
2017
2018
2019
2020
2021
2022 __le32 num_offload_peers;
2023
2024
2025 __le32 num_offload_reorder_bufs;
2026
2027
2028 __le32 num_peer_keys;
2029
2030
2031 __le32 num_tids;
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043 __le32 ast_skid_limit;
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053 __le32 tx_chain_mask;
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065 __le32 rx_chain_mask;
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077 __le32 rx_timeout_pri_vi;
2078 __le32 rx_timeout_pri_vo;
2079 __le32 rx_timeout_pri_be;
2080 __le32 rx_timeout_pri_bk;
2081
2082
2083
2084
2085
2086
2087
2088
2089 __le32 rx_decap_mode;
2090
2091
2092 __le32 scan_max_pending_reqs;
2093
2094
2095 __le32 bmiss_offload_max_vdev;
2096
2097
2098 __le32 roam_offload_max_vdev;
2099
2100
2101 __le32 roam_offload_max_ap_profiles;
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115 __le32 num_mcast_groups;
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126 __le32 num_mcast_table_elems;
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146 __le32 mcast2ucast_mode;
2147
2148
2149
2150
2151
2152
2153
2154
2155 __le32 tx_dbg_log_size;
2156
2157
2158 __le32 num_wds_entries;
2159
2160
2161
2162
2163
2164 __le32 dma_burst_size;
2165
2166
2167
2168
2169
2170 __le32 mac_aggr_delim;
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181 __le32 rx_skip_defrag_timeout_dup_detection_check;
2182
2183
2184
2185
2186
2187
2188 __le32 vow_config;
2189
2190
2191 __le32 gtk_offload_max_vdev;
2192
2193
2194 __le32 num_msdu_desc;
2195
2196
2197
2198
2199
2200
2201
2202 __le32 max_frag_entries;
2203} __packed;
2204
2205struct wmi_resource_config_10x {
2206
2207 __le32 num_vdevs;
2208
2209
2210 __le32 num_peers;
2211
2212
2213 __le32 num_peer_keys;
2214
2215
2216 __le32 num_tids;
2217
2218
2219
2220
2221
2222
2223
2224
2225
2226
2227
2228 __le32 ast_skid_limit;
2229
2230
2231
2232
2233
2234
2235
2236
2237
2238 __le32 tx_chain_mask;
2239
2240
2241
2242
2243
2244
2245
2246
2247
2248
2249
2250 __le32 rx_chain_mask;
2251
2252
2253
2254
2255
2256
2257
2258
2259
2260
2261
2262 __le32 rx_timeout_pri_vi;
2263 __le32 rx_timeout_pri_vo;
2264 __le32 rx_timeout_pri_be;
2265 __le32 rx_timeout_pri_bk;
2266
2267
2268
2269
2270
2271
2272
2273
2274 __le32 rx_decap_mode;
2275
2276
2277 __le32 scan_max_pending_reqs;
2278
2279
2280 __le32 bmiss_offload_max_vdev;
2281
2282
2283 __le32 roam_offload_max_vdev;
2284
2285
2286 __le32 roam_offload_max_ap_profiles;
2287
2288
2289
2290
2291
2292
2293
2294
2295
2296
2297
2298
2299
2300 __le32 num_mcast_groups;
2301
2302
2303
2304
2305
2306
2307
2308
2309
2310
2311 __le32 num_mcast_table_elems;
2312
2313
2314
2315
2316
2317
2318
2319
2320
2321
2322
2323
2324
2325
2326
2327
2328
2329
2330
2331 __le32 mcast2ucast_mode;
2332
2333
2334
2335
2336
2337
2338
2339
2340 __le32 tx_dbg_log_size;
2341
2342
2343 __le32 num_wds_entries;
2344
2345
2346
2347
2348
2349 __le32 dma_burst_size;
2350
2351
2352
2353
2354
2355 __le32 mac_aggr_delim;
2356
2357
2358
2359
2360
2361
2362
2363
2364
2365
2366 __le32 rx_skip_defrag_timeout_dup_detection_check;
2367
2368
2369
2370
2371
2372
2373 __le32 vow_config;
2374
2375
2376 __le32 num_msdu_desc;
2377
2378
2379
2380
2381
2382
2383
2384 __le32 max_frag_entries;
2385} __packed;
2386
2387enum wmi_10_2_feature_mask {
2388 WMI_10_2_RX_BATCH_MODE = BIT(0),
2389 WMI_10_2_ATF_CONFIG = BIT(1),
2390 WMI_10_2_COEX_GPIO = BIT(3),
2391};
2392
2393struct wmi_resource_config_10_2 {
2394 struct wmi_resource_config_10x common;
2395 __le32 max_peer_ext_stats;
2396 __le32 smart_ant_cap;
2397 __le32 bk_min_free;
2398 __le32 be_min_free;
2399 __le32 vi_min_free;
2400 __le32 vo_min_free;
2401 __le32 feature_mask;
2402} __packed;
2403
2404#define NUM_UNITS_IS_NUM_VDEVS BIT(0)
2405#define NUM_UNITS_IS_NUM_PEERS BIT(1)
2406#define NUM_UNITS_IS_NUM_ACTIVE_PEERS BIT(2)
2407
2408struct wmi_resource_config_10_4 {
2409
2410 __le32 num_vdevs;
2411
2412
2413 __le32 num_peers;
2414
2415
2416 __le32 num_active_peers;
2417
2418
2419
2420
2421
2422
2423
2424 __le32 num_offload_peers;
2425
2426
2427
2428
2429 __le32 num_offload_reorder_buffs;
2430
2431
2432 __le32 num_peer_keys;
2433
2434
2435 __le32 num_tids;
2436
2437
2438
2439
2440
2441
2442
2443
2444
2445 __le32 ast_skid_limit;
2446
2447
2448
2449
2450
2451
2452
2453 __le32 tx_chain_mask;
2454
2455
2456
2457
2458
2459
2460
2461
2462
2463 __le32 rx_chain_mask;
2464
2465
2466
2467
2468
2469
2470
2471
2472 __le32 rx_timeout_pri[4];
2473
2474
2475
2476
2477
2478
2479 __le32 rx_decap_mode;
2480
2481 __le32 scan_max_pending_req;
2482
2483 __le32 bmiss_offload_max_vdev;
2484
2485 __le32 roam_offload_max_vdev;
2486
2487 __le32 roam_offload_max_ap_profiles;
2488
2489
2490
2491
2492
2493
2494
2495
2496
2497
2498 __le32 num_mcast_groups;
2499
2500
2501
2502
2503
2504
2505
2506
2507 __le32 num_mcast_table_elems;
2508
2509
2510
2511
2512
2513
2514
2515
2516
2517
2518
2519
2520
2521
2522
2523
2524 __le32 mcast2ucast_mode;
2525
2526
2527
2528
2529
2530
2531 __le32 tx_dbg_log_size;
2532
2533
2534 __le32 num_wds_entries;
2535
2536
2537 __le32 dma_burst_size;
2538
2539
2540
2541
2542 __le32 mac_aggr_delim;
2543
2544
2545
2546
2547
2548
2549
2550
2551 __le32 rx_skip_defrag_timeout_dup_detection_check;
2552
2553
2554
2555
2556 __le32 vow_config;
2557
2558
2559 __le32 gtk_offload_max_vdev;
2560
2561
2562 __le32 num_msdu_desc;
2563
2564
2565
2566
2567
2568
2569 __le32 max_frag_entries;
2570
2571
2572
2573
2574
2575 __le32 max_peer_ext_stats;
2576
2577
2578
2579
2580
2581
2582 __le32 smart_ant_cap;
2583
2584
2585
2586
2587 __le32 bk_minfree;
2588 __le32 be_minfree;
2589 __le32 vi_minfree;
2590 __le32 vo_minfree;
2591
2592
2593
2594
2595
2596 __le32 rx_batchmode;
2597
2598
2599
2600
2601
2602 __le32 tt_support;
2603
2604
2605
2606
2607
2608 __le32 atf_config;
2609
2610
2611
2612
2613
2614 __le32 iphdr_pad_config;
2615
2616
2617
2618
2619
2620 __le32 qwrap_config;
2621} __packed;
2622
2623
2624struct host_memory_chunk {
2625
2626 __le32 req_id;
2627
2628 __le32 ptr;
2629
2630 __le32 size;
2631} __packed;
2632
2633struct wmi_host_mem_chunks {
2634 __le32 count;
2635
2636 struct host_memory_chunk items[1];
2637} __packed;
2638
2639struct wmi_init_cmd {
2640 struct wmi_resource_config resource_config;
2641 struct wmi_host_mem_chunks mem_chunks;
2642} __packed;
2643
2644
2645struct wmi_init_cmd_10x {
2646 struct wmi_resource_config_10x resource_config;
2647 struct wmi_host_mem_chunks mem_chunks;
2648} __packed;
2649
2650struct wmi_init_cmd_10_2 {
2651 struct wmi_resource_config_10_2 resource_config;
2652 struct wmi_host_mem_chunks mem_chunks;
2653} __packed;
2654
2655struct wmi_init_cmd_10_4 {
2656 struct wmi_resource_config_10_4 resource_config;
2657 struct wmi_host_mem_chunks mem_chunks;
2658} __packed;
2659
2660struct wmi_chan_list_entry {
2661 __le16 freq;
2662 u8 phy_mode;
2663 u8 reserved;
2664} __packed;
2665
2666
2667struct wmi_chan_list {
2668 __le32 tag;
2669 __le32 num_chan;
2670 struct wmi_chan_list_entry channel_list[0];
2671} __packed;
2672
2673struct wmi_bssid_list {
2674 __le32 tag;
2675 __le32 num_bssid;
2676 struct wmi_mac_addr bssid_list[0];
2677} __packed;
2678
2679struct wmi_ie_data {
2680 __le32 tag;
2681 __le32 ie_len;
2682 u8 ie_data[0];
2683} __packed;
2684
2685struct wmi_ssid {
2686 __le32 ssid_len;
2687 u8 ssid[32];
2688} __packed;
2689
2690struct wmi_ssid_list {
2691 __le32 tag;
2692 __le32 num_ssids;
2693 struct wmi_ssid ssids[0];
2694} __packed;
2695
2696
2697#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
2698
2699
2700
2701#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
2702
2703#define WLAN_SCAN_PARAMS_MAX_SSID 16
2704#define WLAN_SCAN_PARAMS_MAX_BSSID 4
2705#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
2706
2707
2708
2709
2710#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
2711
2712
2713enum wmi_scan_priority {
2714 WMI_SCAN_PRIORITY_VERY_LOW = 0,
2715 WMI_SCAN_PRIORITY_LOW,
2716 WMI_SCAN_PRIORITY_MEDIUM,
2717 WMI_SCAN_PRIORITY_HIGH,
2718 WMI_SCAN_PRIORITY_VERY_HIGH,
2719 WMI_SCAN_PRIORITY_COUNT
2720};
2721
2722struct wmi_start_scan_common {
2723
2724 __le32 scan_id;
2725
2726 __le32 scan_req_id;
2727
2728 __le32 vdev_id;
2729
2730 __le32 scan_priority;
2731
2732 __le32 notify_scan_events;
2733
2734 __le32 dwell_time_active;
2735
2736 __le32 dwell_time_passive;
2737
2738
2739
2740
2741 __le32 min_rest_time;
2742
2743
2744
2745
2746
2747
2748
2749
2750
2751
2752
2753
2754
2755 __le32 max_rest_time;
2756
2757
2758
2759
2760
2761
2762
2763 __le32 repeat_probe_time;
2764
2765 __le32 probe_spacing_time;
2766
2767
2768
2769
2770 __le32 idle_time;
2771
2772 __le32 max_scan_time;
2773
2774
2775
2776
2777 __le32 probe_delay;
2778
2779 __le32 scan_ctrl_flags;
2780} __packed;
2781
2782struct wmi_start_scan_tlvs {
2783
2784
2785
2786 u8 tlvs[0];
2787} __packed;
2788
2789struct wmi_start_scan_cmd {
2790 struct wmi_start_scan_common common;
2791 __le32 burst_duration_ms;
2792 struct wmi_start_scan_tlvs tlvs;
2793} __packed;
2794
2795
2796struct wmi_10x_start_scan_cmd {
2797 struct wmi_start_scan_common common;
2798 struct wmi_start_scan_tlvs tlvs;
2799} __packed;
2800
2801struct wmi_ssid_arg {
2802 int len;
2803 const u8 *ssid;
2804};
2805
2806struct wmi_bssid_arg {
2807 const u8 *bssid;
2808};
2809
2810struct wmi_start_scan_arg {
2811 u32 scan_id;
2812 u32 scan_req_id;
2813 u32 vdev_id;
2814 u32 scan_priority;
2815 u32 notify_scan_events;
2816 u32 dwell_time_active;
2817 u32 dwell_time_passive;
2818 u32 min_rest_time;
2819 u32 max_rest_time;
2820 u32 repeat_probe_time;
2821 u32 probe_spacing_time;
2822 u32 idle_time;
2823 u32 max_scan_time;
2824 u32 probe_delay;
2825 u32 scan_ctrl_flags;
2826 u32 burst_duration_ms;
2827
2828 u32 ie_len;
2829 u32 n_channels;
2830 u32 n_ssids;
2831 u32 n_bssids;
2832
2833 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
2834 u16 channels[64];
2835 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
2836 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
2837};
2838
2839
2840
2841
2842#define WMI_SCAN_FLAG_PASSIVE 0x1
2843
2844#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
2845
2846#define WMI_SCAN_ADD_CCK_RATES 0x4
2847
2848#define WMI_SCAN_ADD_OFDM_RATES 0x8
2849
2850#define WMI_SCAN_CHAN_STAT_EVENT 0x10
2851
2852#define WMI_SCAN_FILTER_PROBE_REQ 0x20
2853
2854#define WMI_SCAN_BYPASS_DFS_CHN 0x40
2855
2856
2857#define WMI_SCAN_CONTINUE_ON_ERROR 0x80
2858
2859
2860#define WMI_SCAN_CLASS_MASK 0xFF000000
2861
2862enum wmi_stop_scan_type {
2863 WMI_SCAN_STOP_ONE = 0x00000000,
2864 WMI_SCAN_STOP_VDEV_ALL = 0x01000000,
2865 WMI_SCAN_STOP_ALL = 0x04000000,
2866};
2867
2868struct wmi_stop_scan_cmd {
2869 __le32 scan_req_id;
2870 __le32 scan_id;
2871 __le32 req_type;
2872 __le32 vdev_id;
2873} __packed;
2874
2875struct wmi_stop_scan_arg {
2876 u32 req_id;
2877 enum wmi_stop_scan_type req_type;
2878 union {
2879 u32 scan_id;
2880 u32 vdev_id;
2881 } u;
2882};
2883
2884struct wmi_scan_chan_list_cmd {
2885 __le32 num_scan_chans;
2886 struct wmi_channel chan_info[0];
2887} __packed;
2888
2889struct wmi_scan_chan_list_arg {
2890 u32 n_channels;
2891 struct wmi_channel_arg *channels;
2892};
2893
2894enum wmi_bss_filter {
2895 WMI_BSS_FILTER_NONE = 0,
2896 WMI_BSS_FILTER_ALL,
2897 WMI_BSS_FILTER_PROFILE,
2898 WMI_BSS_FILTER_ALL_BUT_PROFILE,
2899 WMI_BSS_FILTER_CURRENT_BSS,
2900 WMI_BSS_FILTER_ALL_BUT_BSS,
2901 WMI_BSS_FILTER_PROBED_SSID,
2902 WMI_BSS_FILTER_LAST_BSS,
2903};
2904
2905enum wmi_scan_event_type {
2906 WMI_SCAN_EVENT_STARTED = BIT(0),
2907 WMI_SCAN_EVENT_COMPLETED = BIT(1),
2908 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2),
2909 WMI_SCAN_EVENT_FOREIGN_CHANNEL = BIT(3),
2910 WMI_SCAN_EVENT_DEQUEUED = BIT(4),
2911
2912 WMI_SCAN_EVENT_PREEMPTED = BIT(5),
2913 WMI_SCAN_EVENT_START_FAILED = BIT(6),
2914 WMI_SCAN_EVENT_RESTARTED = BIT(7),
2915 WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT = BIT(8),
2916 WMI_SCAN_EVENT_MAX = BIT(15),
2917};
2918
2919enum wmi_scan_completion_reason {
2920 WMI_SCAN_REASON_COMPLETED,
2921 WMI_SCAN_REASON_CANCELLED,
2922 WMI_SCAN_REASON_PREEMPTED,
2923 WMI_SCAN_REASON_TIMEDOUT,
2924 WMI_SCAN_REASON_INTERNAL_FAILURE,
2925 WMI_SCAN_REASON_MAX,
2926};
2927
2928struct wmi_scan_event {
2929 __le32 event_type;
2930 __le32 reason;
2931 __le32 channel_freq;
2932 __le32 scan_req_id;
2933 __le32 scan_id;
2934 __le32 vdev_id;
2935} __packed;
2936
2937
2938
2939
2940
2941
2942
2943
2944
2945#define WMI_MGMT_RX_HDR_HEADROOM 52
2946
2947
2948
2949
2950
2951
2952
2953
2954struct wmi_mgmt_rx_hdr_v1 {
2955 __le32 channel;
2956 __le32 snr;
2957 __le32 rate;
2958 __le32 phy_mode;
2959 __le32 buf_len;
2960 __le32 status;
2961} __packed;
2962
2963struct wmi_mgmt_rx_hdr_v2 {
2964 struct wmi_mgmt_rx_hdr_v1 v1;
2965 __le32 rssi_ctl[4];
2966} __packed;
2967
2968struct wmi_mgmt_rx_event_v1 {
2969 struct wmi_mgmt_rx_hdr_v1 hdr;
2970 u8 buf[0];
2971} __packed;
2972
2973struct wmi_mgmt_rx_event_v2 {
2974 struct wmi_mgmt_rx_hdr_v2 hdr;
2975 u8 buf[0];
2976} __packed;
2977
2978struct wmi_10_4_mgmt_rx_hdr {
2979 __le32 channel;
2980 __le32 snr;
2981 u8 rssi_ctl[4];
2982 __le32 rate;
2983 __le32 phy_mode;
2984 __le32 buf_len;
2985 __le32 status;
2986} __packed;
2987
2988struct wmi_10_4_mgmt_rx_event {
2989 struct wmi_10_4_mgmt_rx_hdr hdr;
2990 u8 buf[0];
2991} __packed;
2992
2993#define WMI_RX_STATUS_OK 0x00
2994#define WMI_RX_STATUS_ERR_CRC 0x01
2995#define WMI_RX_STATUS_ERR_DECRYPT 0x08
2996#define WMI_RX_STATUS_ERR_MIC 0x10
2997#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
2998
2999#define PHY_ERROR_GEN_SPECTRAL_SCAN 0x26
3000#define PHY_ERROR_GEN_FALSE_RADAR_EXT 0x24
3001#define PHY_ERROR_GEN_RADAR 0x05
3002
3003#define PHY_ERROR_10_4_RADAR_MASK 0x4
3004#define PHY_ERROR_10_4_SPECTRAL_SCAN_MASK 0x4000000
3005
3006enum phy_err_type {
3007 PHY_ERROR_UNKNOWN,
3008 PHY_ERROR_SPECTRAL_SCAN,
3009 PHY_ERROR_FALSE_RADAR_EXT,
3010 PHY_ERROR_RADAR
3011};
3012
3013struct wmi_phyerr {
3014 __le32 tsf_timestamp;
3015 __le16 freq1;
3016 __le16 freq2;
3017 u8 rssi_combined;
3018 u8 chan_width_mhz;
3019 u8 phy_err_code;
3020 u8 rsvd0;
3021 __le32 rssi_chains[4];
3022 __le16 nf_chains[4];
3023 __le32 buf_len;
3024 u8 buf[0];
3025} __packed;
3026
3027struct wmi_phyerr_event {
3028 __le32 num_phyerrs;
3029 __le32 tsf_l32;
3030 __le32 tsf_u32;
3031 struct wmi_phyerr phyerrs[0];
3032} __packed;
3033
3034struct wmi_10_4_phyerr_event {
3035 __le32 tsf_l32;
3036 __le32 tsf_u32;
3037 __le16 freq1;
3038 __le16 freq2;
3039 u8 rssi_combined;
3040 u8 chan_width_mhz;
3041 u8 phy_err_code;
3042 u8 rsvd0;
3043 __le32 rssi_chains[4];
3044 __le16 nf_chains[4];
3045 __le32 phy_err_mask[2];
3046 __le32 tsf_timestamp;
3047 __le32 buf_len;
3048 u8 buf[0];
3049} __packed;
3050
3051#define PHYERR_TLV_SIG 0xBB
3052#define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB
3053#define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8
3054#define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9
3055
3056struct phyerr_radar_report {
3057 __le32 reg0;
3058 __le32 reg1;
3059} __packed;
3060
3061#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000
3062#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31
3063
3064#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000
3065#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30
3066
3067#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000
3068#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20
3069
3070#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000
3071#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16
3072
3073#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00
3074#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10
3075
3076#define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF
3077#define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0
3078
3079#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000
3080#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31
3081
3082#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000
3083#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24
3084
3085#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000
3086#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16
3087
3088#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00
3089#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8
3090
3091#define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF
3092#define RADAR_REPORT_REG1_PULSE_DUR_LSB 0
3093
3094struct phyerr_fft_report {
3095 __le32 reg0;
3096 __le32 reg1;
3097} __packed;
3098
3099#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000
3100#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23
3101
3102#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000
3103#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14
3104
3105#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000
3106#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12
3107
3108#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF
3109#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0
3110
3111#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000
3112#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26
3113
3114#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000
3115#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18
3116
3117#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00
3118#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8
3119
3120#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF
3121#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0
3122
3123struct phyerr_tlv {
3124 __le16 len;
3125 u8 tag;
3126 u8 sig;
3127} __packed;
3128
3129#define DFS_RSSI_POSSIBLY_FALSE 50
3130#define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40
3131
3132struct wmi_mgmt_tx_hdr {
3133 __le32 vdev_id;
3134 struct wmi_mac_addr peer_macaddr;
3135 __le32 tx_rate;
3136 __le32 tx_power;
3137 __le32 buf_len;
3138} __packed;
3139
3140struct wmi_mgmt_tx_cmd {
3141 struct wmi_mgmt_tx_hdr hdr;
3142 u8 buf[0];
3143} __packed;
3144
3145struct wmi_echo_event {
3146 __le32 value;
3147} __packed;
3148
3149struct wmi_echo_cmd {
3150 __le32 value;
3151} __packed;
3152
3153struct wmi_pdev_set_regdomain_cmd {
3154 __le32 reg_domain;
3155 __le32 reg_domain_2G;
3156 __le32 reg_domain_5G;
3157 __le32 conformance_test_limit_2G;
3158 __le32 conformance_test_limit_5G;
3159} __packed;
3160
3161enum wmi_dfs_region {
3162
3163 WMI_UNINIT_DFS_DOMAIN = 0,
3164
3165
3166 WMI_FCC_DFS_DOMAIN = 1,
3167
3168
3169 WMI_ETSI_DFS_DOMAIN = 2,
3170
3171
3172 WMI_MKK4_DFS_DOMAIN = 3,
3173};
3174
3175struct wmi_pdev_set_regdomain_cmd_10x {
3176 __le32 reg_domain;
3177 __le32 reg_domain_2G;
3178 __le32 reg_domain_5G;
3179 __le32 conformance_test_limit_2G;
3180 __le32 conformance_test_limit_5G;
3181
3182
3183 __le32 dfs_domain;
3184} __packed;
3185
3186
3187struct wmi_pdev_set_quiet_cmd {
3188
3189 __le32 period;
3190
3191
3192 __le32 duration;
3193
3194
3195 __le32 next_start;
3196
3197
3198 __le32 enabled;
3199} __packed;
3200
3201
3202
3203
3204enum ath10k_protmode {
3205 ATH10K_PROT_NONE = 0,
3206 ATH10K_PROT_CTSONLY = 1,
3207 ATH10K_PROT_RTSCTS = 2,
3208};
3209
3210enum wmi_rtscts_profile {
3211 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
3212 WMI_RTSCTS_FOR_SECOND_RATESERIES,
3213 WMI_RTSCTS_ACROSS_SW_RETRIES
3214};
3215
3216#define WMI_RTSCTS_ENABLED 1
3217#define WMI_RTSCTS_SET_MASK 0x0f
3218#define WMI_RTSCTS_SET_LSB 0
3219
3220#define WMI_RTSCTS_PROFILE_MASK 0xf0
3221#define WMI_RTSCTS_PROFILE_LSB 4
3222
3223enum wmi_beacon_gen_mode {
3224 WMI_BEACON_STAGGERED_MODE = 0,
3225 WMI_BEACON_BURST_MODE = 1
3226};
3227
3228enum wmi_csa_event_ies_present_flag {
3229 WMI_CSA_IE_PRESENT = 0x00000001,
3230 WMI_XCSA_IE_PRESENT = 0x00000002,
3231 WMI_WBW_IE_PRESENT = 0x00000004,
3232 WMI_CSWARP_IE_PRESENT = 0x00000008,
3233};
3234
3235
3236struct wmi_csa_event {
3237 __le32 i_fc_dur;
3238
3239
3240 struct wmi_mac_addr i_addr1;
3241 struct wmi_mac_addr i_addr2;
3242 __le32 csa_ie[2];
3243 __le32 xcsa_ie[2];
3244 __le32 wb_ie[2];
3245 __le32 cswarp_ie;
3246 __le32 ies_present_flag;
3247} __packed;
3248
3249
3250#define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3251#define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500
3252#define PEER_DEFAULT_STATS_UPDATE_PERIOD 500
3253
3254struct wmi_pdev_param_map {
3255 u32 tx_chain_mask;
3256 u32 rx_chain_mask;
3257 u32 txpower_limit2g;
3258 u32 txpower_limit5g;
3259 u32 txpower_scale;
3260 u32 beacon_gen_mode;
3261 u32 beacon_tx_mode;
3262 u32 resmgr_offchan_mode;
3263 u32 protection_mode;
3264 u32 dynamic_bw;
3265 u32 non_agg_sw_retry_th;
3266 u32 agg_sw_retry_th;
3267 u32 sta_kickout_th;
3268 u32 ac_aggrsize_scaling;
3269 u32 ltr_enable;
3270 u32 ltr_ac_latency_be;
3271 u32 ltr_ac_latency_bk;
3272 u32 ltr_ac_latency_vi;
3273 u32 ltr_ac_latency_vo;
3274 u32 ltr_ac_latency_timeout;
3275 u32 ltr_sleep_override;
3276 u32 ltr_rx_override;
3277 u32 ltr_tx_activity_timeout;
3278 u32 l1ss_enable;
3279 u32 dsleep_enable;
3280 u32 pcielp_txbuf_flush;
3281 u32 pcielp_txbuf_watermark;
3282 u32 pcielp_txbuf_tmo_en;
3283 u32 pcielp_txbuf_tmo_value;
3284 u32 pdev_stats_update_period;
3285 u32 vdev_stats_update_period;
3286 u32 peer_stats_update_period;
3287 u32 bcnflt_stats_update_period;
3288 u32 pmf_qos;
3289 u32 arp_ac_override;
3290 u32 dcs;
3291 u32 ani_enable;
3292 u32 ani_poll_period;
3293 u32 ani_listen_period;
3294 u32 ani_ofdm_level;
3295 u32 ani_cck_level;
3296 u32 dyntxchain;
3297 u32 proxy_sta;
3298 u32 idle_ps_config;
3299 u32 power_gating_sleep;
3300 u32 fast_channel_reset;
3301 u32 burst_dur;
3302 u32 burst_enable;
3303 u32 cal_period;
3304 u32 aggr_burst;
3305 u32 rx_decap_mode;
3306 u32 smart_antenna_default_antenna;
3307 u32 igmpmld_override;
3308 u32 igmpmld_tid;
3309 u32 antenna_gain;
3310 u32 rx_filter;
3311 u32 set_mcast_to_ucast_tid;
3312 u32 proxy_sta_mode;
3313 u32 set_mcast2ucast_mode;
3314 u32 set_mcast2ucast_buffer;
3315 u32 remove_mcast2ucast_buffer;
3316 u32 peer_sta_ps_statechg_enable;
3317 u32 igmpmld_ac_override;
3318 u32 block_interbss;
3319 u32 set_disable_reset_cmdid;
3320 u32 set_msdu_ttl_cmdid;
3321 u32 set_ppdu_duration_cmdid;
3322 u32 txbf_sound_period_cmdid;
3323 u32 set_promisc_mode_cmdid;
3324 u32 set_burst_mode_cmdid;
3325 u32 en_stats;
3326 u32 mu_group_policy;
3327 u32 noise_detection;
3328 u32 noise_threshold;
3329 u32 dpd_enable;
3330 u32 set_mcast_bcast_echo;
3331 u32 atf_strict_sch;
3332 u32 atf_sched_duration;
3333 u32 ant_plzn;
3334 u32 mgmt_retry_limit;
3335 u32 sensitivity_level;
3336 u32 signed_txpower_2g;
3337 u32 signed_txpower_5g;
3338 u32 enable_per_tid_amsdu;
3339 u32 enable_per_tid_ampdu;
3340 u32 cca_threshold;
3341 u32 rts_fixed_rate;
3342 u32 pdev_reset;
3343 u32 wapi_mbssid_offset;
3344 u32 arp_srcaddr;
3345 u32 arp_dstaddr;
3346};
3347
3348#define WMI_PDEV_PARAM_UNSUPPORTED 0
3349
3350enum wmi_pdev_param {
3351
3352 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3353
3354 WMI_PDEV_PARAM_RX_CHAIN_MASK,
3355
3356 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
3357
3358 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
3359
3360 WMI_PDEV_PARAM_TXPOWER_SCALE,
3361
3362 WMI_PDEV_PARAM_BEACON_GEN_MODE,
3363
3364 WMI_PDEV_PARAM_BEACON_TX_MODE,
3365
3366
3367
3368
3369 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3370
3371
3372
3373
3374 WMI_PDEV_PARAM_PROTECTION_MODE,
3375
3376
3377
3378
3379
3380
3381 WMI_PDEV_PARAM_DYNAMIC_BW,
3382
3383 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3384
3385 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
3386
3387 WMI_PDEV_PARAM_STA_KICKOUT_TH,
3388
3389 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3390
3391 WMI_PDEV_PARAM_LTR_ENABLE,
3392
3393 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
3394
3395 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
3396
3397 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
3398
3399 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
3400
3401 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3402
3403 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3404
3405 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
3406
3407 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3408
3409 WMI_PDEV_PARAM_L1SS_ENABLE,
3410
3411 WMI_PDEV_PARAM_DSLEEP_ENABLE,
3412
3413 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3414
3415 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3416
3417 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3418
3419 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3420
3421 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3422
3423 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3424
3425 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3426
3427 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3428
3429 WMI_PDEV_PARAM_PMF_QOS,
3430
3431 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
3432
3433 WMI_PDEV_PARAM_DCS,
3434
3435 WMI_PDEV_PARAM_ANI_ENABLE,
3436
3437 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
3438
3439 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
3440
3441 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
3442
3443 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
3444
3445 WMI_PDEV_PARAM_DYNTXCHAIN,
3446
3447 WMI_PDEV_PARAM_PROXY_STA,
3448
3449 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
3450
3451 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
3452};
3453
3454enum wmi_10x_pdev_param {
3455
3456 WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3457
3458 WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
3459
3460 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
3461
3462 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
3463
3464 WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
3465
3466 WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
3467
3468 WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
3469
3470
3471
3472
3473 WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3474
3475
3476
3477
3478 WMI_10X_PDEV_PARAM_PROTECTION_MODE,
3479
3480 WMI_10X_PDEV_PARAM_DYNAMIC_BW,
3481
3482 WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3483
3484 WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
3485
3486 WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
3487
3488 WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3489
3490 WMI_10X_PDEV_PARAM_LTR_ENABLE,
3491
3492 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
3493
3494 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
3495
3496 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
3497
3498 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
3499
3500 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3501
3502 WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3503
3504 WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
3505
3506 WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3507
3508 WMI_10X_PDEV_PARAM_L1SS_ENABLE,
3509
3510 WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
3511
3512 WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3513
3514 WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3515
3516 WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3517
3518 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3519
3520 WMI_10X_PDEV_PARAM_PMF_QOS,
3521
3522 WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
3523
3524 WMI_10X_PDEV_PARAM_DCS,
3525
3526 WMI_10X_PDEV_PARAM_ANI_ENABLE,
3527
3528 WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
3529
3530 WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
3531
3532 WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
3533
3534 WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
3535
3536 WMI_10X_PDEV_PARAM_DYNTXCHAIN,
3537
3538 WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
3539
3540 WMI_10X_PDEV_PARAM_BURST_DUR,
3541
3542 WMI_10X_PDEV_PARAM_BURST_ENABLE,
3543
3544
3545 WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
3546 WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
3547 WMI_10X_PDEV_PARAM_IGMPMLD_TID,
3548 WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
3549 WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
3550 WMI_10X_PDEV_PARAM_RX_FILTER,
3551 WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
3552 WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
3553 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
3554 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
3555 WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
3556 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
3557 WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
3558 WMI_10X_PDEV_PARAM_CAL_PERIOD
3559};
3560
3561enum wmi_10_4_pdev_param {
3562 WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
3563 WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
3564 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
3565 WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
3566 WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
3567 WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
3568 WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
3569 WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
3570 WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
3571 WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
3572 WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
3573 WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
3574 WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
3575 WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
3576 WMI_10_4_PDEV_PARAM_LTR_ENABLE,
3577 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
3578 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
3579 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
3580 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
3581 WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
3582 WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
3583 WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
3584 WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
3585 WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
3586 WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
3587 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
3588 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
3589 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
3590 WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
3591 WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
3592 WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
3593 WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
3594 WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
3595 WMI_10_4_PDEV_PARAM_PMF_QOS,
3596 WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
3597 WMI_10_4_PDEV_PARAM_DCS,
3598 WMI_10_4_PDEV_PARAM_ANI_ENABLE,
3599 WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
3600 WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
3601 WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
3602 WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
3603 WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
3604 WMI_10_4_PDEV_PARAM_PROXY_STA,
3605 WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
3606 WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
3607 WMI_10_4_PDEV_PARAM_AGGR_BURST,
3608 WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
3609 WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
3610 WMI_10_4_PDEV_PARAM_BURST_DUR,
3611 WMI_10_4_PDEV_PARAM_BURST_ENABLE,
3612 WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
3613 WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
3614 WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
3615 WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
3616 WMI_10_4_PDEV_PARAM_RX_FILTER,
3617 WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
3618 WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
3619 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
3620 WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
3621 WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
3622 WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
3623 WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
3624 WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
3625 WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
3626 WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
3627 WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
3628 WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
3629 WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
3630 WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
3631 WMI_10_4_PDEV_PARAM_EN_STATS,
3632 WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
3633 WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
3634 WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
3635 WMI_10_4_PDEV_PARAM_DPD_ENABLE,
3636 WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
3637 WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
3638 WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
3639 WMI_10_4_PDEV_PARAM_ANT_PLZN,
3640 WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
3641 WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
3642 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
3643 WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
3644 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
3645 WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
3646 WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
3647 WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
3648 WMI_10_4_PDEV_PARAM_CAL_PERIOD,
3649 WMI_10_4_PDEV_PARAM_PDEV_RESET,
3650 WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
3651 WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
3652 WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
3653};
3654
3655struct wmi_pdev_set_param_cmd {
3656 __le32 param_id;
3657 __le32 param_value;
3658} __packed;
3659
3660
3661#define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
3662
3663struct wmi_pdev_get_tpc_config_cmd {
3664
3665 __le32 param;
3666} __packed;
3667
3668#define WMI_TPC_CONFIG_PARAM 1
3669#define WMI_TPC_RATE_MAX 160
3670#define WMI_TPC_TX_N_CHAIN 4
3671#define WMI_TPC_PREAM_TABLE_MAX 10
3672#define WMI_TPC_FLAG 3
3673#define WMI_TPC_BUF_SIZE 10
3674
3675enum wmi_tpc_table_type {
3676 WMI_TPC_TABLE_TYPE_CDD = 0,
3677 WMI_TPC_TABLE_TYPE_STBC = 1,
3678 WMI_TPC_TABLE_TYPE_TXBF = 2,
3679};
3680
3681enum wmi_tpc_config_event_flag {
3682 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1,
3683 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2,
3684 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4,
3685};
3686
3687struct wmi_pdev_tpc_config_event {
3688 __le32 reg_domain;
3689 __le32 chan_freq;
3690 __le32 phy_mode;
3691 __le32 twice_antenna_reduction;
3692 __le32 twice_max_rd_power;
3693 a_sle32 twice_antenna_gain;
3694 __le32 power_limit;
3695 __le32 rate_max;
3696 __le32 num_tx_chain;
3697 __le32 ctl;
3698 __le32 flags;
3699 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
3700 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
3701 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
3702 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
3703 u8 rates_array[WMI_TPC_RATE_MAX];
3704} __packed;
3705
3706
3707enum wmi_tp_scale {
3708 WMI_TP_SCALE_MAX = 0,
3709 WMI_TP_SCALE_50 = 1,
3710 WMI_TP_SCALE_25 = 2,
3711 WMI_TP_SCALE_12 = 3,
3712 WMI_TP_SCALE_MIN = 4,
3713 WMI_TP_SCALE_SIZE = 5,
3714};
3715
3716struct wmi_pdev_chanlist_update_event {
3717
3718 __le32 num_chan;
3719
3720 struct wmi_channel channel_list[1];
3721} __packed;
3722
3723#define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
3724
3725struct wmi_debug_mesg_event {
3726
3727 char bufp[WMI_MAX_DEBUG_MESG];
3728} __packed;
3729
3730enum {
3731
3732 VDEV_SUBTYPE_P2PDEV = 0,
3733
3734 VDEV_SUBTYPE_P2PCLI,
3735
3736 VDEV_SUBTYPE_P2PGO,
3737
3738 VDEV_SUBTYPE_BT,
3739};
3740
3741struct wmi_pdev_set_channel_cmd {
3742
3743 struct wmi_channel chan;
3744} __packed;
3745
3746struct wmi_pdev_pktlog_enable_cmd {
3747 __le32 ev_bitmap;
3748} __packed;
3749
3750
3751#define WMI_DSCP_MAP_MAX (64)
3752struct wmi_pdev_set_dscp_tid_map_cmd {
3753
3754 __le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
3755} __packed;
3756
3757enum mcast_bcast_rate_id {
3758 WMI_SET_MCAST_RATE,
3759 WMI_SET_BCAST_RATE
3760};
3761
3762struct mcast_bcast_rate {
3763 enum mcast_bcast_rate_id rate_id;
3764 __le32 rate;
3765} __packed;
3766
3767struct wmi_wmm_params {
3768 __le32 cwmin;
3769 __le32 cwmax;
3770 __le32 aifs;
3771 __le32 txop;
3772 __le32 acm;
3773 __le32 no_ack;
3774} __packed;
3775
3776struct wmi_pdev_set_wmm_params {
3777 struct wmi_wmm_params ac_be;
3778 struct wmi_wmm_params ac_bk;
3779 struct wmi_wmm_params ac_vi;
3780 struct wmi_wmm_params ac_vo;
3781} __packed;
3782
3783struct wmi_wmm_params_arg {
3784 u32 cwmin;
3785 u32 cwmax;
3786 u32 aifs;
3787 u32 txop;
3788 u32 acm;
3789 u32 no_ack;
3790};
3791
3792struct wmi_wmm_params_all_arg {
3793 struct wmi_wmm_params_arg ac_be;
3794 struct wmi_wmm_params_arg ac_bk;
3795 struct wmi_wmm_params_arg ac_vi;
3796 struct wmi_wmm_params_arg ac_vo;
3797};
3798
3799struct wmi_pdev_stats_tx {
3800
3801 __le32 comp_queued;
3802
3803
3804 __le32 comp_delivered;
3805
3806
3807 __le32 msdu_enqued;
3808
3809
3810 __le32 mpdu_enqued;
3811
3812
3813 __le32 wmm_drop;
3814
3815
3816 __le32 local_enqued;
3817
3818
3819 __le32 local_freed;
3820
3821
3822 __le32 hw_queued;
3823
3824
3825 __le32 hw_reaped;
3826
3827
3828 __le32 underrun;
3829
3830
3831 __le32 tx_abort;
3832
3833
3834 __le32 mpdus_requed;
3835
3836
3837 __le32 tx_ko;
3838
3839
3840 __le32 data_rc;
3841
3842
3843 __le32 self_triggers;
3844
3845
3846 __le32 sw_retry_failure;
3847
3848
3849 __le32 illgl_rate_phy_err;
3850
3851
3852 __le32 pdev_cont_xretry;
3853
3854
3855 __le32 pdev_tx_timeout;
3856
3857
3858 __le32 pdev_resets;
3859
3860
3861 __le32 stateless_tid_alloc_failure;
3862
3863 __le32 phy_underrun;
3864
3865
3866 __le32 txop_ovf;
3867} __packed;
3868
3869struct wmi_10_4_pdev_stats_tx {
3870
3871 __le32 comp_queued;
3872
3873
3874 __le32 comp_delivered;
3875
3876
3877 __le32 msdu_enqued;
3878
3879
3880 __le32 mpdu_enqued;
3881
3882
3883 __le32 wmm_drop;
3884
3885
3886 __le32 local_enqued;
3887
3888
3889 __le32 local_freed;
3890
3891
3892 __le32 hw_queued;
3893
3894
3895 __le32 hw_reaped;
3896
3897
3898 __le32 underrun;
3899
3900
3901 __le32 hw_paused;
3902
3903
3904 __le32 tx_abort;
3905
3906
3907 __le32 mpdus_requed;
3908
3909
3910 __le32 tx_ko;
3911
3912
3913 __le32 data_rc;
3914
3915
3916 __le32 self_triggers;
3917
3918
3919 __le32 sw_retry_failure;
3920
3921
3922 __le32 illgl_rate_phy_err;
3923
3924
3925 __le32 pdev_cont_xretry;
3926
3927
3928 __le32 pdev_tx_timeout;
3929
3930
3931 __le32 pdev_resets;
3932
3933
3934 __le32 stateless_tid_alloc_failure;
3935
3936 __le32 phy_underrun;
3937
3938
3939 __le32 txop_ovf;
3940
3941
3942 __le32 seq_posted;
3943
3944
3945 __le32 seq_failed_queueing;
3946
3947
3948 __le32 seq_completed;
3949
3950
3951 __le32 seq_restarted;
3952
3953
3954 __le32 mu_seq_posted;
3955
3956
3957 __le32 mpdus_sw_flush;
3958
3959
3960 __le32 mpdus_hw_filter;
3961
3962
3963
3964
3965 __le32 mpdus_truncated;
3966
3967
3968 __le32 mpdus_ack_failed;
3969
3970
3971 __le32 mpdus_expired;
3972} __packed;
3973
3974struct wmi_pdev_stats_rx {
3975
3976 __le32 mid_ppdu_route_change;
3977
3978
3979 __le32 status_rcvd;
3980
3981
3982 __le32 r0_frags;
3983 __le32 r1_frags;
3984 __le32 r2_frags;
3985 __le32 r3_frags;
3986
3987
3988 __le32 htt_msdus;
3989 __le32 htt_mpdus;
3990
3991
3992 __le32 loc_msdus;
3993 __le32 loc_mpdus;
3994
3995
3996 __le32 oversize_amsdu;
3997
3998
3999 __le32 phy_errs;
4000
4001
4002 __le32 phy_err_drop;
4003
4004
4005 __le32 mpdu_errs;
4006} __packed;
4007
4008struct wmi_pdev_stats_peer {
4009
4010 __le32 dummy;
4011} __packed;
4012
4013enum wmi_stats_id {
4014 WMI_STAT_PEER = BIT(0),
4015 WMI_STAT_AP = BIT(1),
4016 WMI_STAT_PDEV = BIT(2),
4017 WMI_STAT_VDEV = BIT(3),
4018 WMI_STAT_BCNFLT = BIT(4),
4019 WMI_STAT_VDEV_RATE = BIT(5),
4020};
4021
4022struct wlan_inst_rssi_args {
4023 __le16 cfg_retry_count;
4024 __le16 retry_count;
4025};
4026
4027struct wmi_request_stats_cmd {
4028 __le32 stats_id;
4029
4030 __le32 vdev_id;
4031
4032
4033 struct wmi_mac_addr peer_macaddr;
4034
4035
4036 struct wlan_inst_rssi_args inst_rssi_args;
4037} __packed;
4038
4039
4040enum {
4041
4042 WMI_PDEV_SUSPEND,
4043
4044
4045 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
4046};
4047
4048struct wmi_pdev_suspend_cmd {
4049
4050 __le32 suspend_opt;
4051} __packed;
4052
4053struct wmi_stats_event {
4054 __le32 stats_id;
4055
4056
4057
4058
4059 __le32 num_pdev_stats;
4060
4061
4062
4063
4064 __le32 num_vdev_stats;
4065
4066
4067
4068
4069 __le32 num_peer_stats;
4070 __le32 num_bcnflt_stats;
4071
4072
4073
4074
4075
4076
4077
4078
4079
4080 u8 data[0];
4081} __packed;
4082
4083struct wmi_10_2_stats_event {
4084 __le32 stats_id;
4085 __le32 num_pdev_stats;
4086 __le32 num_pdev_ext_stats;
4087 __le32 num_vdev_stats;
4088 __le32 num_peer_stats;
4089 __le32 num_bcnflt_stats;
4090 u8 data[0];
4091} __packed;
4092
4093
4094
4095
4096
4097struct wmi_pdev_stats_base {
4098 __le32 chan_nf;
4099 __le32 tx_frame_count;
4100 __le32 rx_frame_count;
4101 __le32 rx_clear_count;
4102 __le32 cycle_count;
4103 __le32 phy_err_count;
4104 __le32 chan_tx_pwr;
4105} __packed;
4106
4107struct wmi_pdev_stats {
4108 struct wmi_pdev_stats_base base;
4109 struct wmi_pdev_stats_tx tx;
4110 struct wmi_pdev_stats_rx rx;
4111 struct wmi_pdev_stats_peer peer;
4112} __packed;
4113
4114struct wmi_pdev_stats_extra {
4115 __le32 ack_rx_bad;
4116 __le32 rts_bad;
4117 __le32 rts_good;
4118 __le32 fcs_bad;
4119 __le32 no_beacons;
4120 __le32 mib_int_count;
4121} __packed;
4122
4123struct wmi_10x_pdev_stats {
4124 struct wmi_pdev_stats_base base;
4125 struct wmi_pdev_stats_tx tx;
4126 struct wmi_pdev_stats_rx rx;
4127 struct wmi_pdev_stats_peer peer;
4128 struct wmi_pdev_stats_extra extra;
4129} __packed;
4130
4131struct wmi_pdev_stats_mem {
4132 __le32 dram_free;
4133 __le32 iram_free;
4134} __packed;
4135
4136struct wmi_10_2_pdev_stats {
4137 struct wmi_pdev_stats_base base;
4138 struct wmi_pdev_stats_tx tx;
4139 __le32 mc_drop;
4140 struct wmi_pdev_stats_rx rx;
4141 __le32 pdev_rx_timeout;
4142 struct wmi_pdev_stats_mem mem;
4143 struct wmi_pdev_stats_peer peer;
4144 struct wmi_pdev_stats_extra extra;
4145} __packed;
4146
4147struct wmi_10_4_pdev_stats {
4148 struct wmi_pdev_stats_base base;
4149 struct wmi_10_4_pdev_stats_tx tx;
4150 struct wmi_pdev_stats_rx rx;
4151 __le32 rx_ovfl_errs;
4152 struct wmi_pdev_stats_mem mem;
4153 __le32 sram_free_size;
4154 struct wmi_pdev_stats_extra extra;
4155} __packed;
4156
4157
4158
4159
4160
4161struct wmi_vdev_stats {
4162 __le32 vdev_id;
4163} __packed;
4164
4165
4166
4167
4168
4169struct wmi_peer_stats {
4170 struct wmi_mac_addr peer_macaddr;
4171 __le32 peer_rssi;
4172 __le32 peer_tx_rate;
4173} __packed;
4174
4175struct wmi_10x_peer_stats {
4176 struct wmi_peer_stats old;
4177 __le32 peer_rx_rate;
4178} __packed;
4179
4180struct wmi_10_2_peer_stats {
4181 struct wmi_peer_stats old;
4182 __le32 peer_rx_rate;
4183 __le32 current_per;
4184 __le32 retries;
4185 __le32 tx_rate_count;
4186 __le32 max_4ms_frame_len;
4187 __le32 total_sub_frames;
4188 __le32 tx_bytes;
4189 __le32 num_pkt_loss_overflow[4];
4190 __le32 num_pkt_loss_excess_retry[4];
4191} __packed;
4192
4193struct wmi_10_2_4_peer_stats {
4194 struct wmi_10_2_peer_stats common;
4195 __le32 unknown_value;
4196} __packed;
4197
4198struct wmi_10_4_peer_stats {
4199 struct wmi_mac_addr peer_macaddr;
4200 __le32 peer_rssi;
4201 __le32 peer_rssi_seq_num;
4202 __le32 peer_tx_rate;
4203 __le32 peer_rx_rate;
4204 __le32 current_per;
4205 __le32 retries;
4206 __le32 tx_rate_count;
4207 __le32 max_4ms_frame_len;
4208 __le32 total_sub_frames;
4209 __le32 tx_bytes;
4210 __le32 num_pkt_loss_overflow[4];
4211 __le32 num_pkt_loss_excess_retry[4];
4212 __le32 peer_rssi_changed;
4213} __packed;
4214
4215struct wmi_10_2_pdev_ext_stats {
4216 __le32 rx_rssi_comb;
4217 __le32 rx_rssi[4];
4218 __le32 rx_mcs[10];
4219 __le32 tx_mcs[10];
4220 __le32 ack_rssi;
4221} __packed;
4222
4223struct wmi_vdev_create_cmd {
4224 __le32 vdev_id;
4225 __le32 vdev_type;
4226 __le32 vdev_subtype;
4227 struct wmi_mac_addr vdev_macaddr;
4228} __packed;
4229
4230enum wmi_vdev_type {
4231 WMI_VDEV_TYPE_AP = 1,
4232 WMI_VDEV_TYPE_STA = 2,
4233 WMI_VDEV_TYPE_IBSS = 3,
4234 WMI_VDEV_TYPE_MONITOR = 4,
4235};
4236
4237enum wmi_vdev_subtype {
4238 WMI_VDEV_SUBTYPE_NONE = 0,
4239 WMI_VDEV_SUBTYPE_P2P_DEVICE = 1,
4240 WMI_VDEV_SUBTYPE_P2P_CLIENT = 2,
4241 WMI_VDEV_SUBTYPE_P2P_GO = 3,
4242};
4243
4244
4245
4246
4247
4248
4249
4250#define WMI_VDEV_START_HIDDEN_SSID (1<<0)
4251
4252
4253
4254
4255
4256
4257#define WMI_VDEV_START_PMF_ENABLED (1<<1)
4258
4259struct wmi_p2p_noa_descriptor {
4260 __le32 type_count;
4261 __le32 duration;
4262 __le32 interval;
4263 __le32 start_time;
4264} __packed;
4265
4266struct wmi_vdev_start_request_cmd {
4267
4268 struct wmi_channel chan;
4269
4270 __le32 vdev_id;
4271
4272 __le32 requestor_id;
4273
4274 __le32 beacon_interval;
4275
4276 __le32 dtim_period;
4277
4278 __le32 flags;
4279
4280 struct wmi_ssid ssid;
4281
4282 __le32 bcn_tx_rate;
4283
4284 __le32 bcn_tx_power;
4285
4286 __le32 num_noa_descriptors;
4287
4288
4289
4290
4291 __le32 disable_hw_ack;
4292
4293 struct wmi_p2p_noa_descriptor noa_descriptors[2];
4294} __packed;
4295
4296struct wmi_vdev_restart_request_cmd {
4297 struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
4298} __packed;
4299
4300struct wmi_vdev_start_request_arg {
4301 u32 vdev_id;
4302 struct wmi_channel_arg channel;
4303 u32 bcn_intval;
4304 u32 dtim_period;
4305 u8 *ssid;
4306 u32 ssid_len;
4307 u32 bcn_tx_rate;
4308 u32 bcn_tx_power;
4309 bool disable_hw_ack;
4310 bool hidden_ssid;
4311 bool pmf_enabled;
4312};
4313
4314struct wmi_vdev_delete_cmd {
4315
4316 __le32 vdev_id;
4317} __packed;
4318
4319struct wmi_vdev_up_cmd {
4320 __le32 vdev_id;
4321 __le32 vdev_assoc_id;
4322 struct wmi_mac_addr vdev_bssid;
4323} __packed;
4324
4325struct wmi_vdev_stop_cmd {
4326 __le32 vdev_id;
4327} __packed;
4328
4329struct wmi_vdev_down_cmd {
4330 __le32 vdev_id;
4331} __packed;
4332
4333struct wmi_vdev_standby_response_cmd {
4334
4335 __le32 vdev_id;
4336} __packed;
4337
4338struct wmi_vdev_resume_response_cmd {
4339
4340 __le32 vdev_id;
4341} __packed;
4342
4343struct wmi_vdev_set_param_cmd {
4344 __le32 vdev_id;
4345 __le32 param_id;
4346 __le32 param_value;
4347} __packed;
4348
4349#define WMI_MAX_KEY_INDEX 3
4350#define WMI_MAX_KEY_LEN 32
4351
4352#define WMI_KEY_PAIRWISE 0x00
4353#define WMI_KEY_GROUP 0x01
4354#define WMI_KEY_TX_USAGE 0x02
4355
4356struct wmi_key_seq_counter {
4357 __le32 key_seq_counter_l;
4358 __le32 key_seq_counter_h;
4359} __packed;
4360
4361#define WMI_CIPHER_NONE 0x0
4362#define WMI_CIPHER_WEP 0x1
4363#define WMI_CIPHER_TKIP 0x2
4364#define WMI_CIPHER_AES_OCB 0x3
4365#define WMI_CIPHER_AES_CCM 0x4
4366#define WMI_CIPHER_WAPI 0x5
4367#define WMI_CIPHER_CKIP 0x6
4368#define WMI_CIPHER_AES_CMAC 0x7
4369
4370struct wmi_vdev_install_key_cmd {
4371 __le32 vdev_id;
4372 struct wmi_mac_addr peer_macaddr;
4373 __le32 key_idx;
4374 __le32 key_flags;
4375 __le32 key_cipher;
4376 struct wmi_key_seq_counter key_rsc_counter;
4377 struct wmi_key_seq_counter key_global_rsc_counter;
4378 struct wmi_key_seq_counter key_tsc_counter;
4379 u8 wpi_key_rsc_counter[16];
4380 u8 wpi_key_tsc_counter[16];
4381 __le32 key_len;
4382 __le32 key_txmic_len;
4383 __le32 key_rxmic_len;
4384
4385
4386 u8 key_data[0];
4387} __packed;
4388
4389struct wmi_vdev_install_key_arg {
4390 u32 vdev_id;
4391 const u8 *macaddr;
4392 u32 key_idx;
4393 u32 key_flags;
4394 u32 key_cipher;
4395 u32 key_len;
4396 u32 key_txmic_len;
4397 u32 key_rxmic_len;
4398 const void *key_data;
4399};
4400
4401
4402
4403
4404
4405
4406
4407
4408
4409
4410
4411
4412
4413
4414enum wmi_rate_preamble {
4415 WMI_RATE_PREAMBLE_OFDM,
4416 WMI_RATE_PREAMBLE_CCK,
4417 WMI_RATE_PREAMBLE_HT,
4418 WMI_RATE_PREAMBLE_VHT,
4419};
4420
4421#define ATH10K_HW_NSS(rate) (1 + (((rate) >> 4) & 0x3))
4422#define ATH10K_HW_PREAMBLE(rate) (((rate) >> 6) & 0x3)
4423#define ATH10K_HW_RATECODE(rate, nss, preamble) \
4424 (((preamble) << 6) | ((nss) << 4) | (rate))
4425
4426
4427#define WMI_FIXED_RATE_NONE (0xff)
4428
4429struct wmi_vdev_param_map {
4430 u32 rts_threshold;
4431 u32 fragmentation_threshold;
4432 u32 beacon_interval;
4433 u32 listen_interval;
4434 u32 multicast_rate;
4435 u32 mgmt_tx_rate;
4436 u32 slot_time;
4437 u32 preamble;
4438 u32 swba_time;
4439 u32 wmi_vdev_stats_update_period;
4440 u32 wmi_vdev_pwrsave_ageout_time;
4441 u32 wmi_vdev_host_swba_interval;
4442 u32 dtim_period;
4443 u32 wmi_vdev_oc_scheduler_air_time_limit;
4444 u32 wds;
4445 u32 atim_window;
4446 u32 bmiss_count_max;
4447 u32 bmiss_first_bcnt;
4448 u32 bmiss_final_bcnt;
4449 u32 feature_wmm;
4450 u32 chwidth;
4451 u32 chextoffset;
4452 u32 disable_htprotection;
4453 u32 sta_quickkickout;
4454 u32 mgmt_rate;
4455 u32 protection_mode;
4456 u32 fixed_rate;
4457 u32 sgi;
4458 u32 ldpc;
4459 u32 tx_stbc;
4460 u32 rx_stbc;
4461 u32 intra_bss_fwd;
4462 u32 def_keyid;
4463 u32 nss;
4464 u32 bcast_data_rate;
4465 u32 mcast_data_rate;
4466 u32 mcast_indicate;
4467 u32 dhcp_indicate;
4468 u32 unknown_dest_indicate;
4469 u32 ap_keepalive_min_idle_inactive_time_secs;
4470 u32 ap_keepalive_max_idle_inactive_time_secs;
4471 u32 ap_keepalive_max_unresponsive_time_secs;
4472 u32 ap_enable_nawds;
4473 u32 mcast2ucast_set;
4474 u32 enable_rtscts;
4475 u32 txbf;
4476 u32 packet_powersave;
4477 u32 drop_unencry;
4478 u32 tx_encap_type;
4479 u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
4480 u32 rc_num_retries;
4481 u32 cabq_maxdur;
4482 u32 mfptest_set;
4483 u32 rts_fixed_rate;
4484 u32 vht_sgimask;
4485 u32 vht80_ratemask;
4486 u32 early_rx_adjust_enable;
4487 u32 early_rx_tgt_bmiss_num;
4488 u32 early_rx_bmiss_sample_cycle;
4489 u32 early_rx_slop_step;
4490 u32 early_rx_init_slop;
4491 u32 early_rx_adjust_pause;
4492 u32 proxy_sta;
4493 u32 meru_vc;
4494 u32 rx_decap_type;
4495 u32 bw_nss_ratemask;
4496};
4497
4498#define WMI_VDEV_PARAM_UNSUPPORTED 0
4499
4500
4501enum wmi_vdev_param {
4502
4503 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
4504
4505 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
4506
4507 WMI_VDEV_PARAM_BEACON_INTERVAL,
4508
4509 WMI_VDEV_PARAM_LISTEN_INTERVAL,
4510
4511 WMI_VDEV_PARAM_MULTICAST_RATE,
4512
4513 WMI_VDEV_PARAM_MGMT_TX_RATE,
4514
4515 WMI_VDEV_PARAM_SLOT_TIME,
4516
4517 WMI_VDEV_PARAM_PREAMBLE,
4518
4519 WMI_VDEV_PARAM_SWBA_TIME,
4520
4521 WMI_VDEV_STATS_UPDATE_PERIOD,
4522
4523 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
4524
4525
4526
4527
4528 WMI_VDEV_HOST_SWBA_INTERVAL,
4529
4530 WMI_VDEV_PARAM_DTIM_PERIOD,
4531
4532
4533
4534
4535 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
4536
4537 WMI_VDEV_PARAM_WDS,
4538
4539 WMI_VDEV_PARAM_ATIM_WINDOW,
4540
4541 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
4542
4543 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
4544
4545 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
4546
4547 WMI_VDEV_PARAM_FEATURE_WMM,
4548
4549 WMI_VDEV_PARAM_CHWIDTH,
4550
4551 WMI_VDEV_PARAM_CHEXTOFFSET,
4552
4553 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
4554
4555 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
4556
4557 WMI_VDEV_PARAM_MGMT_RATE,
4558
4559 WMI_VDEV_PARAM_PROTECTION_MODE,
4560
4561 WMI_VDEV_PARAM_FIXED_RATE,
4562
4563 WMI_VDEV_PARAM_SGI,
4564
4565 WMI_VDEV_PARAM_LDPC,
4566
4567 WMI_VDEV_PARAM_TX_STBC,
4568
4569 WMI_VDEV_PARAM_RX_STBC,
4570
4571 WMI_VDEV_PARAM_INTRA_BSS_FWD,
4572
4573 WMI_VDEV_PARAM_DEF_KEYID,
4574
4575 WMI_VDEV_PARAM_NSS,
4576
4577 WMI_VDEV_PARAM_BCAST_DATA_RATE,
4578
4579 WMI_VDEV_PARAM_MCAST_DATA_RATE,
4580
4581 WMI_VDEV_PARAM_MCAST_INDICATE,
4582
4583 WMI_VDEV_PARAM_DHCP_INDICATE,
4584
4585 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
4586
4587
4588 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
4589
4590
4591
4592
4593
4594
4595
4596
4597
4598
4599
4600 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
4601
4602
4603
4604
4605
4606
4607 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
4608
4609
4610 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
4611
4612 WMI_VDEV_PARAM_ENABLE_RTSCTS,
4613
4614 WMI_VDEV_PARAM_TXBF,
4615
4616
4617 WMI_VDEV_PARAM_PACKET_POWERSAVE,
4618
4619
4620
4621
4622
4623 WMI_VDEV_PARAM_DROP_UNENCRY,
4624
4625
4626
4627
4628 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
4629};
4630
4631
4632enum wmi_10x_vdev_param {
4633
4634 WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
4635
4636 WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
4637
4638 WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
4639
4640 WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
4641
4642 WMI_10X_VDEV_PARAM_MULTICAST_RATE,
4643
4644 WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
4645
4646 WMI_10X_VDEV_PARAM_SLOT_TIME,
4647
4648 WMI_10X_VDEV_PARAM_PREAMBLE,
4649
4650 WMI_10X_VDEV_PARAM_SWBA_TIME,
4651
4652 WMI_10X_VDEV_STATS_UPDATE_PERIOD,
4653
4654 WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
4655
4656
4657
4658
4659 WMI_10X_VDEV_HOST_SWBA_INTERVAL,
4660
4661 WMI_10X_VDEV_PARAM_DTIM_PERIOD,
4662
4663
4664
4665
4666 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
4667
4668 WMI_10X_VDEV_PARAM_WDS,
4669
4670 WMI_10X_VDEV_PARAM_ATIM_WINDOW,
4671
4672 WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
4673
4674 WMI_10X_VDEV_PARAM_FEATURE_WMM,
4675
4676 WMI_10X_VDEV_PARAM_CHWIDTH,
4677
4678 WMI_10X_VDEV_PARAM_CHEXTOFFSET,
4679
4680 WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
4681
4682 WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
4683
4684 WMI_10X_VDEV_PARAM_MGMT_RATE,
4685
4686 WMI_10X_VDEV_PARAM_PROTECTION_MODE,
4687
4688 WMI_10X_VDEV_PARAM_FIXED_RATE,
4689
4690 WMI_10X_VDEV_PARAM_SGI,
4691
4692 WMI_10X_VDEV_PARAM_LDPC,
4693
4694 WMI_10X_VDEV_PARAM_TX_STBC,
4695
4696 WMI_10X_VDEV_PARAM_RX_STBC,
4697
4698 WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
4699
4700 WMI_10X_VDEV_PARAM_DEF_KEYID,
4701
4702 WMI_10X_VDEV_PARAM_NSS,
4703
4704 WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
4705
4706 WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
4707
4708 WMI_10X_VDEV_PARAM_MCAST_INDICATE,
4709
4710 WMI_10X_VDEV_PARAM_DHCP_INDICATE,
4711
4712 WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
4713
4714
4715 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
4716
4717
4718
4719
4720
4721
4722
4723
4724
4725
4726
4727 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
4728
4729
4730
4731
4732
4733
4734 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
4735
4736
4737 WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
4738
4739 WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
4740
4741 WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
4742
4743 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
4744
4745
4746 WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
4747 WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
4748 WMI_10X_VDEV_PARAM_MFPTEST_SET,
4749 WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
4750 WMI_10X_VDEV_PARAM_VHT_SGIMASK,
4751 WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
4752};
4753
4754enum wmi_10_4_vdev_param {
4755 WMI_10_4_VDEV_PARAM_RTS_THRESHOLD = 0x1,
4756 WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
4757 WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
4758 WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
4759 WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
4760 WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
4761 WMI_10_4_VDEV_PARAM_SLOT_TIME,
4762 WMI_10_4_VDEV_PARAM_PREAMBLE,
4763 WMI_10_4_VDEV_PARAM_SWBA_TIME,
4764 WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
4765 WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
4766 WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
4767 WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
4768 WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
4769 WMI_10_4_VDEV_PARAM_WDS,
4770 WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
4771 WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
4772 WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
4773 WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
4774 WMI_10_4_VDEV_PARAM_FEATURE_WMM,
4775 WMI_10_4_VDEV_PARAM_CHWIDTH,
4776 WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
4777 WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
4778 WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
4779 WMI_10_4_VDEV_PARAM_MGMT_RATE,
4780 WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
4781 WMI_10_4_VDEV_PARAM_FIXED_RATE,
4782 WMI_10_4_VDEV_PARAM_SGI,
4783 WMI_10_4_VDEV_PARAM_LDPC,
4784 WMI_10_4_VDEV_PARAM_TX_STBC,
4785 WMI_10_4_VDEV_PARAM_RX_STBC,
4786 WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
4787 WMI_10_4_VDEV_PARAM_DEF_KEYID,
4788 WMI_10_4_VDEV_PARAM_NSS,
4789 WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
4790 WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
4791 WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
4792 WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
4793 WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
4794 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
4795 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
4796 WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
4797 WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
4798 WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
4799 WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
4800 WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
4801 WMI_10_4_VDEV_PARAM_TXBF,
4802 WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
4803 WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
4804 WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
4805 WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
4806 WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
4807 WMI_10_4_VDEV_PARAM_MFPTEST_SET,
4808 WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
4809 WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
4810 WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
4811 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
4812 WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
4813 WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
4814 WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
4815 WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
4816 WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
4817 WMI_10_4_VDEV_PARAM_PROXY_STA,
4818 WMI_10_4_VDEV_PARAM_MERU_VC,
4819 WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
4820 WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
4821};
4822
4823#define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0)
4824#define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1)
4825#define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2)
4826#define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3)
4827
4828#define WMI_TXBF_STS_CAP_OFFSET_LSB 4
4829#define WMI_TXBF_STS_CAP_OFFSET_MASK 0xf0
4830#define WMI_BF_SOUND_DIM_OFFSET_LSB 8
4831#define WMI_BF_SOUND_DIM_OFFSET_MASK 0xf00
4832
4833
4834#define WMI_VDEV_SLOT_TIME_LONG 0x1
4835
4836#define WMI_VDEV_SLOT_TIME_SHORT 0x2
4837
4838#define WMI_VDEV_PREAMBLE_LONG 0x1
4839
4840#define WMI_VDEV_PREAMBLE_SHORT 0x2
4841
4842enum wmi_start_event_param {
4843 WMI_VDEV_RESP_START_EVENT = 0,
4844 WMI_VDEV_RESP_RESTART_EVENT,
4845};
4846
4847struct wmi_vdev_start_response_event {
4848 __le32 vdev_id;
4849 __le32 req_id;
4850 __le32 resp_type;
4851 __le32 status;
4852} __packed;
4853
4854struct wmi_vdev_standby_req_event {
4855
4856 __le32 vdev_id;
4857} __packed;
4858
4859struct wmi_vdev_resume_req_event {
4860
4861 __le32 vdev_id;
4862} __packed;
4863
4864struct wmi_vdev_stopped_event {
4865
4866 __le32 vdev_id;
4867} __packed;
4868
4869
4870
4871
4872
4873struct wmi_vdev_simple_event {
4874
4875 __le32 vdev_id;
4876} __packed;
4877
4878
4879
4880#define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0
4881
4882
4883#define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1
4884
4885
4886#define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2
4887
4888
4889struct wmi_vdev_spectral_conf_cmd {
4890 __le32 vdev_id;
4891
4892
4893 __le32 scan_count;
4894 __le32 scan_period;
4895 __le32 scan_priority;
4896
4897
4898 __le32 scan_fft_size;
4899 __le32 scan_gc_ena;
4900 __le32 scan_restart_ena;
4901 __le32 scan_noise_floor_ref;
4902 __le32 scan_init_delay;
4903 __le32 scan_nb_tone_thr;
4904 __le32 scan_str_bin_thr;
4905 __le32 scan_wb_rpt_mode;
4906 __le32 scan_rssi_rpt_mode;
4907 __le32 scan_rssi_thr;
4908 __le32 scan_pwr_format;
4909
4910
4911
4912
4913
4914
4915
4916
4917
4918
4919
4920
4921 __le32 scan_rpt_mode;
4922 __le32 scan_bin_scale;
4923 __le32 scan_dbm_adj;
4924 __le32 scan_chn_mask;
4925} __packed;
4926
4927struct wmi_vdev_spectral_conf_arg {
4928 u32 vdev_id;
4929 u32 scan_count;
4930 u32 scan_period;
4931 u32 scan_priority;
4932 u32 scan_fft_size;
4933 u32 scan_gc_ena;
4934 u32 scan_restart_ena;
4935 u32 scan_noise_floor_ref;
4936 u32 scan_init_delay;
4937 u32 scan_nb_tone_thr;
4938 u32 scan_str_bin_thr;
4939 u32 scan_wb_rpt_mode;
4940 u32 scan_rssi_rpt_mode;
4941 u32 scan_rssi_thr;
4942 u32 scan_pwr_format;
4943 u32 scan_rpt_mode;
4944 u32 scan_bin_scale;
4945 u32 scan_dbm_adj;
4946 u32 scan_chn_mask;
4947};
4948
4949#define WMI_SPECTRAL_ENABLE_DEFAULT 0
4950#define WMI_SPECTRAL_COUNT_DEFAULT 0
4951#define WMI_SPECTRAL_PERIOD_DEFAULT 35
4952#define WMI_SPECTRAL_PRIORITY_DEFAULT 1
4953#define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
4954#define WMI_SPECTRAL_GC_ENA_DEFAULT 1
4955#define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
4956#define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
4957#define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
4958#define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
4959#define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
4960#define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
4961#define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
4962#define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
4963#define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
4964#define WMI_SPECTRAL_RPT_MODE_DEFAULT 2
4965#define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
4966#define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
4967#define WMI_SPECTRAL_CHN_MASK_DEFAULT 1
4968
4969struct wmi_vdev_spectral_enable_cmd {
4970 __le32 vdev_id;
4971 __le32 trigger_cmd;
4972 __le32 enable_cmd;
4973} __packed;
4974
4975#define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
4976#define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
4977#define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
4978#define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
4979
4980
4981struct wmi_bcn_tx_hdr {
4982 __le32 vdev_id;
4983 __le32 tx_rate;
4984 __le32 tx_power;
4985 __le32 bcn_len;
4986} __packed;
4987
4988struct wmi_bcn_tx_cmd {
4989 struct wmi_bcn_tx_hdr hdr;
4990 u8 *bcn[0];
4991} __packed;
4992
4993struct wmi_bcn_tx_arg {
4994 u32 vdev_id;
4995 u32 tx_rate;
4996 u32 tx_power;
4997 u32 bcn_len;
4998 const void *bcn;
4999};
5000
5001enum wmi_bcn_tx_ref_flags {
5002 WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
5003 WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
5004};
5005
5006
5007
5008
5009#define WMI_BCN_TX_REF_DEF_ANTENNA 0
5010
5011struct wmi_bcn_tx_ref_cmd {
5012 __le32 vdev_id;
5013 __le32 data_len;
5014
5015 __le32 data_ptr;
5016
5017 __le32 msdu_id;
5018
5019 __le32 frame_control;
5020
5021 __le32 flags;
5022
5023 __le32 antenna_mask;
5024} __packed;
5025
5026
5027#define WMI_BCN_FILTER_ALL 0
5028#define WMI_BCN_FILTER_NONE 1
5029#define WMI_BCN_FILTER_RSSI 2
5030#define WMI_BCN_FILTER_BSSID 3
5031#define WMI_BCN_FILTER_SSID 4
5032
5033struct wmi_bcn_filter_rx_cmd {
5034
5035 __le32 bcn_filter_id;
5036
5037 __le32 bcn_filter;
5038
5039 __le32 bcn_filter_len;
5040
5041 u8 *bcn_filter_buf;
5042} __packed;
5043
5044
5045struct wmi_bcn_prb_info {
5046
5047 __le32 caps;
5048
5049 __le32 erp;
5050
5051
5052
5053
5054
5055
5056
5057
5058
5059} __packed;
5060
5061struct wmi_bcn_tmpl_cmd {
5062
5063 __le32 vdev_id;
5064
5065 __le32 tim_ie_offset;
5066
5067 struct wmi_bcn_prb_info bcn_prb_info;
5068
5069 __le32 buf_len;
5070
5071 u8 data[1];
5072} __packed;
5073
5074struct wmi_prb_tmpl_cmd {
5075
5076 __le32 vdev_id;
5077
5078 struct wmi_bcn_prb_info bcn_prb_info;
5079
5080 __le32 buf_len;
5081
5082 u8 data[1];
5083} __packed;
5084
5085enum wmi_sta_ps_mode {
5086
5087 WMI_STA_PS_MODE_DISABLED = 0,
5088
5089 WMI_STA_PS_MODE_ENABLED = 1,
5090};
5091
5092struct wmi_sta_powersave_mode_cmd {
5093
5094 __le32 vdev_id;
5095
5096
5097
5098
5099
5100 __le32 sta_ps_mode;
5101} __packed;
5102
5103enum wmi_csa_offload_en {
5104 WMI_CSA_OFFLOAD_DISABLE = 0,
5105 WMI_CSA_OFFLOAD_ENABLE = 1,
5106};
5107
5108struct wmi_csa_offload_enable_cmd {
5109 __le32 vdev_id;
5110 __le32 csa_offload_enable;
5111} __packed;
5112
5113struct wmi_csa_offload_chanswitch_cmd {
5114 __le32 vdev_id;
5115 struct wmi_channel chan;
5116} __packed;
5117
5118
5119
5120
5121
5122
5123
5124enum wmi_sta_ps_param_rx_wake_policy {
5125
5126
5127
5128
5129
5130
5131 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
5132
5133
5134
5135
5136
5137
5138
5139
5140 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
5141};
5142
5143
5144
5145
5146
5147
5148
5149
5150
5151enum wmi_sta_ps_param_tx_wake_threshold {
5152 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
5153 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
5154
5155
5156
5157
5158
5159};
5160
5161
5162
5163
5164
5165
5166
5167
5168
5169
5170enum wmi_sta_ps_param_pspoll_count {
5171 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
5172
5173
5174
5175
5176
5177
5178
5179
5180
5181
5182 WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
5183};
5184
5185
5186
5187
5188
5189
5190
5191#define WMI_UAPSD_AC_TYPE_DELI 0
5192#define WMI_UAPSD_AC_TYPE_TRIG 1
5193
5194#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
5195 ((type == WMI_UAPSD_AC_TYPE_DELI) ? (1<<(ac<<1)) : (1<<((ac<<1)+1)))
5196
5197enum wmi_sta_ps_param_uapsd {
5198 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5199 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5200 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5201 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5202 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5203 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5204 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5205 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5206};
5207
5208#define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
5209
5210struct wmi_sta_uapsd_auto_trig_param {
5211 __le32 wmm_ac;
5212 __le32 user_priority;
5213 __le32 service_interval;
5214 __le32 suspend_interval;
5215 __le32 delay_interval;
5216};
5217
5218struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
5219 __le32 vdev_id;
5220 struct wmi_mac_addr peer_macaddr;
5221 __le32 num_ac;
5222};
5223
5224struct wmi_sta_uapsd_auto_trig_arg {
5225 u32 wmm_ac;
5226 u32 user_priority;
5227 u32 service_interval;
5228 u32 suspend_interval;
5229 u32 delay_interval;
5230};
5231
5232enum wmi_sta_powersave_param {
5233
5234
5235
5236
5237
5238 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
5239
5240
5241
5242
5243
5244
5245 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
5246
5247
5248
5249
5250
5251
5252
5253 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
5254
5255
5256
5257
5258
5259
5260
5261
5262 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
5263
5264
5265
5266
5267
5268
5269 WMI_STA_PS_PARAM_UAPSD = 4,
5270};
5271
5272struct wmi_sta_powersave_param_cmd {
5273 __le32 vdev_id;
5274 __le32 param_id;
5275 __le32 param_value;
5276} __packed;
5277
5278
5279#define WMI_STA_MIMO_PS_MODE_DISABLE
5280
5281#define WMI_STA_MIMO_PS_MODE_STATIC
5282
5283#define WMI_STA_MIMO_PS_MODE_DYNAMIC
5284
5285struct wmi_sta_mimo_ps_mode_cmd {
5286
5287 __le32 vdev_id;
5288
5289 __le32 mimo_pwrsave_mode;
5290} __packed;
5291
5292
5293enum wmi_ap_ps_param_uapsd {
5294 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
5295 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
5296 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
5297 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
5298 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
5299 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
5300 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
5301 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
5302};
5303
5304
5305enum wmi_ap_ps_peer_param_max_sp {
5306 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
5307 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
5308 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
5309 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
5310 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
5311};
5312
5313
5314
5315
5316
5317enum wmi_ap_ps_peer_param {
5318
5319
5320
5321
5322
5323
5324
5325
5326
5327
5328
5329 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
5330
5331
5332
5333
5334
5335
5336
5337
5338 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
5339
5340
5341 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
5342};
5343
5344struct wmi_ap_ps_peer_cmd {
5345
5346 __le32 vdev_id;
5347
5348
5349 struct wmi_mac_addr peer_macaddr;
5350
5351
5352 __le32 param_id;
5353
5354
5355 __le32 param_value;
5356} __packed;
5357
5358
5359#define WMI_TIM_BITMAP_ARRAY_SIZE 4
5360
5361struct wmi_tim_info {
5362 __le32 tim_len;
5363 __le32 tim_mcast;
5364 __le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
5365 __le32 tim_changed;
5366 __le32 tim_num_ps_pending;
5367} __packed;
5368
5369struct wmi_tim_info_arg {
5370 __le32 tim_len;
5371 __le32 tim_mcast;
5372 const __le32 *tim_bitmap;
5373 __le32 tim_changed;
5374 __le32 tim_num_ps_pending;
5375} __packed;
5376
5377
5378#define WMI_P2P_MAX_NOA_DESCRIPTORS 4
5379#define WMI_P2P_OPPPS_ENABLE_BIT BIT(0)
5380#define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1
5381#define WMI_P2P_NOA_CHANGED_BIT BIT(0)
5382
5383struct wmi_p2p_noa_info {
5384
5385
5386 u8 changed;
5387
5388 u8 index;
5389
5390
5391 u8 ctwindow_oppps;
5392
5393 u8 num_descriptors;
5394
5395 struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
5396} __packed;
5397
5398struct wmi_bcn_info {
5399 struct wmi_tim_info tim_info;
5400 struct wmi_p2p_noa_info p2p_noa_info;
5401} __packed;
5402
5403struct wmi_host_swba_event {
5404 __le32 vdev_map;
5405 struct wmi_bcn_info bcn_info[0];
5406} __packed;
5407
5408
5409#define WMI_10_4_TIM_BITMAP_ARRAY_SIZE 17
5410
5411struct wmi_10_4_tim_info {
5412 __le32 tim_len;
5413 __le32 tim_mcast;
5414 __le32 tim_bitmap[WMI_10_4_TIM_BITMAP_ARRAY_SIZE];
5415 __le32 tim_changed;
5416 __le32 tim_num_ps_pending;
5417} __packed;
5418
5419#define WMI_10_4_P2P_MAX_NOA_DESCRIPTORS 1
5420
5421struct wmi_10_4_p2p_noa_info {
5422
5423
5424
5425 u8 changed;
5426
5427 u8 index;
5428
5429
5430
5431 u8 ctwindow_oppps;
5432
5433 u8 num_descriptors;
5434
5435 struct wmi_p2p_noa_descriptor
5436 noa_descriptors[WMI_10_4_P2P_MAX_NOA_DESCRIPTORS];
5437} __packed;
5438
5439struct wmi_10_4_bcn_info {
5440 struct wmi_10_4_tim_info tim_info;
5441 struct wmi_10_4_p2p_noa_info p2p_noa_info;
5442} __packed;
5443
5444struct wmi_10_4_host_swba_event {
5445 __le32 vdev_map;
5446 struct wmi_10_4_bcn_info bcn_info[0];
5447} __packed;
5448
5449#define WMI_MAX_AP_VDEV 16
5450
5451struct wmi_tbtt_offset_event {
5452 __le32 vdev_map;
5453 __le32 tbttoffset_list[WMI_MAX_AP_VDEV];
5454} __packed;
5455
5456struct wmi_peer_create_cmd {
5457 __le32 vdev_id;
5458 struct wmi_mac_addr peer_macaddr;
5459} __packed;
5460
5461enum wmi_peer_type {
5462 WMI_PEER_TYPE_DEFAULT = 0,
5463 WMI_PEER_TYPE_BSS = 1,
5464 WMI_PEER_TYPE_TDLS = 2,
5465};
5466
5467struct wmi_peer_delete_cmd {
5468 __le32 vdev_id;
5469 struct wmi_mac_addr peer_macaddr;
5470} __packed;
5471
5472struct wmi_peer_flush_tids_cmd {
5473 __le32 vdev_id;
5474 struct wmi_mac_addr peer_macaddr;
5475 __le32 peer_tid_bitmap;
5476} __packed;
5477
5478struct wmi_fixed_rate {
5479
5480
5481
5482
5483
5484
5485 __le32 rate_mode;
5486
5487
5488
5489
5490 __le32 rate_series;
5491
5492
5493
5494
5495
5496 __le32 rate_retries;
5497} __packed;
5498
5499struct wmi_peer_fixed_rate_cmd {
5500
5501 __le32 vdev_id;
5502
5503 struct wmi_mac_addr peer_macaddr;
5504
5505 struct wmi_fixed_rate peer_fixed_rate;
5506} __packed;
5507
5508#define WMI_MGMT_TID 17
5509
5510struct wmi_addba_clear_resp_cmd {
5511
5512 __le32 vdev_id;
5513
5514 struct wmi_mac_addr peer_macaddr;
5515} __packed;
5516
5517struct wmi_addba_send_cmd {
5518
5519 __le32 vdev_id;
5520
5521 struct wmi_mac_addr peer_macaddr;
5522
5523 __le32 tid;
5524
5525 __le32 buffersize;
5526} __packed;
5527
5528struct wmi_delba_send_cmd {
5529
5530 __le32 vdev_id;
5531
5532 struct wmi_mac_addr peer_macaddr;
5533
5534 __le32 tid;
5535
5536 __le32 initiator;
5537
5538 __le32 reasoncode;
5539} __packed;
5540
5541struct wmi_addba_setresponse_cmd {
5542
5543 __le32 vdev_id;
5544
5545 struct wmi_mac_addr peer_macaddr;
5546
5547 __le32 tid;
5548
5549 __le32 statuscode;
5550} __packed;
5551
5552struct wmi_send_singleamsdu_cmd {
5553
5554 __le32 vdev_id;
5555
5556 struct wmi_mac_addr peer_macaddr;
5557
5558 __le32 tid;
5559} __packed;
5560
5561enum wmi_peer_smps_state {
5562 WMI_PEER_SMPS_PS_NONE = 0x0,
5563 WMI_PEER_SMPS_STATIC = 0x1,
5564 WMI_PEER_SMPS_DYNAMIC = 0x2
5565};
5566
5567enum wmi_peer_chwidth {
5568 WMI_PEER_CHWIDTH_20MHZ = 0,
5569 WMI_PEER_CHWIDTH_40MHZ = 1,
5570 WMI_PEER_CHWIDTH_80MHZ = 2,
5571};
5572
5573enum wmi_peer_param {
5574 WMI_PEER_SMPS_STATE = 0x1,
5575 WMI_PEER_AMPDU = 0x2,
5576 WMI_PEER_AUTHORIZE = 0x3,
5577 WMI_PEER_CHAN_WIDTH = 0x4,
5578 WMI_PEER_NSS = 0x5,
5579 WMI_PEER_USE_4ADDR = 0x6,
5580 WMI_PEER_DUMMY_VAR = 0xff,
5581};
5582
5583struct wmi_peer_set_param_cmd {
5584 __le32 vdev_id;
5585 struct wmi_mac_addr peer_macaddr;
5586 __le32 param_id;
5587 __le32 param_value;
5588} __packed;
5589
5590#define MAX_SUPPORTED_RATES 128
5591
5592struct wmi_rate_set {
5593
5594 __le32 num_rates;
5595
5596
5597
5598
5599
5600 __le32 rates[(MAX_SUPPORTED_RATES/4)+1];
5601} __packed;
5602
5603struct wmi_rate_set_arg {
5604 unsigned int num_rates;
5605 u8 rates[MAX_SUPPORTED_RATES];
5606};
5607
5608
5609
5610
5611
5612
5613struct wmi_vht_rate_set {
5614 __le32 rx_max_rate;
5615 __le32 rx_mcs_set;
5616 __le32 tx_max_rate;
5617 __le32 tx_mcs_set;
5618} __packed;
5619
5620struct wmi_vht_rate_set_arg {
5621 u32 rx_max_rate;
5622 u32 rx_mcs_set;
5623 u32 tx_max_rate;
5624 u32 tx_mcs_set;
5625};
5626
5627struct wmi_peer_set_rates_cmd {
5628
5629 struct wmi_mac_addr peer_macaddr;
5630
5631 struct wmi_rate_set peer_legacy_rates;
5632
5633 struct wmi_rate_set peer_ht_rates;
5634} __packed;
5635
5636struct wmi_peer_set_q_empty_callback_cmd {
5637
5638 __le32 vdev_id;
5639
5640 struct wmi_mac_addr peer_macaddr;
5641 __le32 callback_enable;
5642} __packed;
5643
5644#define WMI_PEER_AUTH 0x00000001
5645#define WMI_PEER_QOS 0x00000002
5646#define WMI_PEER_NEED_PTK_4_WAY 0x00000004
5647#define WMI_PEER_NEED_GTK_2_WAY 0x00000010
5648#define WMI_PEER_APSD 0x00000800
5649#define WMI_PEER_HT 0x00001000
5650#define WMI_PEER_40MHZ 0x00002000
5651#define WMI_PEER_STBC 0x00008000
5652#define WMI_PEER_LDPC 0x00010000
5653#define WMI_PEER_DYN_MIMOPS 0x00020000
5654#define WMI_PEER_STATIC_MIMOPS 0x00040000
5655#define WMI_PEER_SPATIAL_MUX 0x00200000
5656#define WMI_PEER_VHT 0x02000000
5657#define WMI_PEER_80MHZ 0x04000000
5658#define WMI_PEER_VHT_2G 0x08000000
5659
5660
5661
5662
5663
5664
5665
5666
5667#define WMI_RC_DS_FLAG 0x01
5668#define WMI_RC_CW40_FLAG 0x02
5669#define WMI_RC_SGI_FLAG 0x04
5670#define WMI_RC_HT_FLAG 0x08
5671#define WMI_RC_RTSCTS_FLAG 0x10
5672#define WMI_RC_TX_STBC_FLAG 0x20
5673#define WMI_RC_RX_STBC_FLAG 0xC0
5674#define WMI_RC_RX_STBC_FLAG_S 6
5675#define WMI_RC_WEP_TKIP_FLAG 0x100
5676#define WMI_RC_TS_FLAG 0x200
5677#define WMI_RC_UAPSD_FLAG 0x400
5678
5679
5680#define ATH10K_MAX_HW_LISTEN_INTERVAL 5
5681
5682struct wmi_common_peer_assoc_complete_cmd {
5683 struct wmi_mac_addr peer_macaddr;
5684 __le32 vdev_id;
5685 __le32 peer_new_assoc;
5686 __le32 peer_associd;
5687 __le32 peer_flags;
5688 __le32 peer_caps;
5689 __le32 peer_listen_intval;
5690 __le32 peer_ht_caps;
5691 __le32 peer_max_mpdu;
5692 __le32 peer_mpdu_density;
5693 __le32 peer_rate_caps;
5694 struct wmi_rate_set peer_legacy_rates;
5695 struct wmi_rate_set peer_ht_rates;
5696 __le32 peer_nss;
5697 __le32 peer_vht_caps;
5698 __le32 peer_phymode;
5699 struct wmi_vht_rate_set peer_vht_rates;
5700};
5701
5702struct wmi_main_peer_assoc_complete_cmd {
5703 struct wmi_common_peer_assoc_complete_cmd cmd;
5704
5705
5706
5707 __le32 peer_ht_info[2];
5708} __packed;
5709
5710struct wmi_10_1_peer_assoc_complete_cmd {
5711 struct wmi_common_peer_assoc_complete_cmd cmd;
5712} __packed;
5713
5714#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
5715#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
5716#define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
5717#define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
5718
5719struct wmi_10_2_peer_assoc_complete_cmd {
5720 struct wmi_common_peer_assoc_complete_cmd cmd;
5721 __le32 info0;
5722} __packed;
5723
5724struct wmi_peer_assoc_complete_arg {
5725 u8 addr[ETH_ALEN];
5726 u32 vdev_id;
5727 bool peer_reassoc;
5728 u16 peer_aid;
5729 u32 peer_flags;
5730 u16 peer_caps;
5731 u32 peer_listen_intval;
5732 u32 peer_ht_caps;
5733 u32 peer_max_mpdu;
5734 u32 peer_mpdu_density;
5735 u32 peer_rate_caps;
5736 struct wmi_rate_set_arg peer_legacy_rates;
5737 struct wmi_rate_set_arg peer_ht_rates;
5738 u32 peer_num_spatial_streams;
5739 u32 peer_vht_caps;
5740 enum wmi_phy_mode peer_phymode;
5741 struct wmi_vht_rate_set_arg peer_vht_rates;
5742};
5743
5744struct wmi_peer_add_wds_entry_cmd {
5745
5746 struct wmi_mac_addr peer_macaddr;
5747
5748 struct wmi_mac_addr wds_macaddr;
5749} __packed;
5750
5751struct wmi_peer_remove_wds_entry_cmd {
5752
5753 struct wmi_mac_addr wds_macaddr;
5754} __packed;
5755
5756struct wmi_peer_q_empty_callback_event {
5757
5758 struct wmi_mac_addr peer_macaddr;
5759} __packed;
5760
5761
5762
5763
5764struct wmi_chan_info_event {
5765 __le32 err_code;
5766 __le32 freq;
5767 __le32 cmd_flags;
5768 __le32 noise_floor;
5769 __le32 rx_clear_count;
5770 __le32 cycle_count;
5771} __packed;
5772
5773struct wmi_10_4_chan_info_event {
5774 __le32 err_code;
5775 __le32 freq;
5776 __le32 cmd_flags;
5777 __le32 noise_floor;
5778 __le32 rx_clear_count;
5779 __le32 cycle_count;
5780 __le32 chan_tx_pwr_range;
5781 __le32 chan_tx_pwr_tp;
5782 __le32 rx_frame_count;
5783} __packed;
5784
5785struct wmi_peer_sta_kickout_event {
5786 struct wmi_mac_addr peer_macaddr;
5787} __packed;
5788
5789#define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
5790#define WMI_CHAN_INFO_FLAG_PRE_COMPLETE BIT(1)
5791
5792
5793#define BCN_FLT_MAX_SUPPORTED_IES 256
5794#define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32)
5795
5796struct bss_bcn_stats {
5797 __le32 vdev_id;
5798 __le32 bss_bcnsdropped;
5799 __le32 bss_bcnsdelivered;
5800} __packed;
5801
5802struct bcn_filter_stats {
5803 __le32 bcns_dropped;
5804 __le32 bcns_delivered;
5805 __le32 activefilters;
5806 struct bss_bcn_stats bss_stats;
5807} __packed;
5808
5809struct wmi_add_bcn_filter_cmd {
5810 u32 vdev_id;
5811 u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
5812} __packed;
5813
5814enum wmi_sta_keepalive_method {
5815 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
5816 WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
5817};
5818
5819#define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
5820
5821
5822#define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
5823
5824
5825struct wmi_sta_keepalive_arp_resp {
5826 __be32 src_ip4_addr;
5827 __be32 dest_ip4_addr;
5828 struct wmi_mac_addr dest_mac_addr;
5829} __packed;
5830
5831struct wmi_sta_keepalive_cmd {
5832 __le32 vdev_id;
5833 __le32 enabled;
5834 __le32 method;
5835 __le32 interval;
5836 struct wmi_sta_keepalive_arp_resp arp_resp;
5837} __packed;
5838
5839struct wmi_sta_keepalive_arg {
5840 u32 vdev_id;
5841 u32 enabled;
5842 u32 method;
5843 u32 interval;
5844 __be32 src_ip4_addr;
5845 __be32 dest_ip4_addr;
5846 const u8 dest_mac_addr[ETH_ALEN];
5847};
5848
5849enum wmi_force_fw_hang_type {
5850 WMI_FORCE_FW_HANG_ASSERT = 1,
5851 WMI_FORCE_FW_HANG_NO_DETECT,
5852 WMI_FORCE_FW_HANG_CTRL_EP_FULL,
5853 WMI_FORCE_FW_HANG_EMPTY_POINT,
5854 WMI_FORCE_FW_HANG_STACK_OVERFLOW,
5855 WMI_FORCE_FW_HANG_INFINITE_LOOP,
5856};
5857
5858#define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
5859
5860struct wmi_force_fw_hang_cmd {
5861 __le32 type;
5862 __le32 delay_ms;
5863} __packed;
5864
5865enum ath10k_dbglog_level {
5866 ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
5867 ATH10K_DBGLOG_LEVEL_INFO = 1,
5868 ATH10K_DBGLOG_LEVEL_WARN = 2,
5869 ATH10K_DBGLOG_LEVEL_ERR = 3,
5870};
5871
5872
5873#define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0
5874#define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff
5875
5876
5877#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16
5878#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000
5879
5880
5881#define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17
5882#define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000
5883
5884
5885#define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20
5886#define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000
5887
5888
5889
5890
5891
5892#define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28
5893#define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000
5894
5895
5896
5897
5898
5899struct wmi_dbglog_cfg_cmd {
5900
5901 __le32 module_enable;
5902
5903
5904 __le32 config_enable;
5905
5906
5907 __le32 module_valid;
5908
5909
5910 __le32 config_valid;
5911} __packed;
5912
5913enum wmi_roam_reason {
5914 WMI_ROAM_REASON_BETTER_AP = 1,
5915 WMI_ROAM_REASON_BEACON_MISS = 2,
5916 WMI_ROAM_REASON_LOW_RSSI = 3,
5917 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4,
5918 WMI_ROAM_REASON_HO_FAILED = 5,
5919
5920
5921 WMI_ROAM_REASON_MAX,
5922};
5923
5924struct wmi_roam_ev {
5925 __le32 vdev_id;
5926 __le32 reason;
5927} __packed;
5928
5929#define ATH10K_FRAGMT_THRESHOLD_MIN 540
5930#define ATH10K_FRAGMT_THRESHOLD_MAX 2346
5931
5932#define WMI_MAX_EVENT 0x1000
5933
5934#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
5935
5936
5937#define ATH10K_DEFAULT_ATIM 0
5938
5939#define WMI_MAX_MEM_REQS 16
5940
5941struct wmi_scan_ev_arg {
5942 __le32 event_type;
5943 __le32 reason;
5944 __le32 channel_freq;
5945 __le32 scan_req_id;
5946 __le32 scan_id;
5947 __le32 vdev_id;
5948};
5949
5950struct wmi_mgmt_rx_ev_arg {
5951 __le32 channel;
5952 __le32 snr;
5953 __le32 rate;
5954 __le32 phy_mode;
5955 __le32 buf_len;
5956 __le32 status;
5957};
5958
5959struct wmi_ch_info_ev_arg {
5960 __le32 err_code;
5961 __le32 freq;
5962 __le32 cmd_flags;
5963 __le32 noise_floor;
5964 __le32 rx_clear_count;
5965 __le32 cycle_count;
5966 __le32 chan_tx_pwr_range;
5967 __le32 chan_tx_pwr_tp;
5968 __le32 rx_frame_count;
5969};
5970
5971struct wmi_vdev_start_ev_arg {
5972 __le32 vdev_id;
5973 __le32 req_id;
5974 __le32 resp_type;
5975 __le32 status;
5976};
5977
5978struct wmi_peer_kick_ev_arg {
5979 const u8 *mac_addr;
5980};
5981
5982struct wmi_swba_ev_arg {
5983 __le32 vdev_map;
5984 struct wmi_tim_info_arg tim_info[WMI_MAX_AP_VDEV];
5985 const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
5986};
5987
5988struct wmi_phyerr_ev_arg {
5989 u32 tsf_timestamp;
5990 u16 freq1;
5991 u16 freq2;
5992 u8 rssi_combined;
5993 u8 chan_width_mhz;
5994 u8 phy_err_code;
5995 u16 nf_chains[4];
5996 u32 buf_len;
5997 const u8 *buf;
5998 u8 hdr_len;
5999};
6000
6001struct wmi_phyerr_hdr_arg {
6002 u32 num_phyerrs;
6003 u32 tsf_l32;
6004 u32 tsf_u32;
6005 u32 buf_len;
6006 const void *phyerrs;
6007};
6008
6009struct wmi_svc_rdy_ev_arg {
6010 __le32 min_tx_power;
6011 __le32 max_tx_power;
6012 __le32 ht_cap;
6013 __le32 vht_cap;
6014 __le32 sw_ver0;
6015 __le32 sw_ver1;
6016 __le32 fw_build;
6017 __le32 phy_capab;
6018 __le32 num_rf_chains;
6019 __le32 eeprom_rd;
6020 __le32 num_mem_reqs;
6021 const __le32 *service_map;
6022 size_t service_map_len;
6023 const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
6024};
6025
6026struct wmi_rdy_ev_arg {
6027 __le32 sw_version;
6028 __le32 abi_version;
6029 __le32 status;
6030 const u8 *mac_addr;
6031};
6032
6033struct wmi_roam_ev_arg {
6034 __le32 vdev_id;
6035 __le32 reason;
6036 __le32 rssi;
6037};
6038
6039struct wmi_pdev_temperature_event {
6040
6041 __le32 temperature;
6042} __packed;
6043
6044
6045enum wmi_wow_wakeup_event {
6046 WOW_BMISS_EVENT = 0,
6047 WOW_BETTER_AP_EVENT,
6048 WOW_DEAUTH_RECVD_EVENT,
6049 WOW_MAGIC_PKT_RECVD_EVENT,
6050 WOW_GTK_ERR_EVENT,
6051 WOW_FOURWAY_HSHAKE_EVENT,
6052 WOW_EAPOL_RECVD_EVENT,
6053 WOW_NLO_DETECTED_EVENT,
6054 WOW_DISASSOC_RECVD_EVENT,
6055 WOW_PATTERN_MATCH_EVENT,
6056 WOW_CSA_IE_EVENT,
6057 WOW_PROBE_REQ_WPS_IE_EVENT,
6058 WOW_AUTH_REQ_EVENT,
6059 WOW_ASSOC_REQ_EVENT,
6060 WOW_HTT_EVENT,
6061 WOW_RA_MATCH_EVENT,
6062 WOW_HOST_AUTO_SHUTDOWN_EVENT,
6063 WOW_IOAC_MAGIC_EVENT,
6064 WOW_IOAC_SHORT_EVENT,
6065 WOW_IOAC_EXTEND_EVENT,
6066 WOW_IOAC_TIMER_EVENT,
6067 WOW_DFS_PHYERR_RADAR_EVENT,
6068 WOW_BEACON_EVENT,
6069 WOW_CLIENT_KICKOUT_EVENT,
6070 WOW_EVENT_MAX,
6071};
6072
6073#define C2S(x) case x: return #x
6074
6075static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev)
6076{
6077 switch (ev) {
6078 C2S(WOW_BMISS_EVENT);
6079 C2S(WOW_BETTER_AP_EVENT);
6080 C2S(WOW_DEAUTH_RECVD_EVENT);
6081 C2S(WOW_MAGIC_PKT_RECVD_EVENT);
6082 C2S(WOW_GTK_ERR_EVENT);
6083 C2S(WOW_FOURWAY_HSHAKE_EVENT);
6084 C2S(WOW_EAPOL_RECVD_EVENT);
6085 C2S(WOW_NLO_DETECTED_EVENT);
6086 C2S(WOW_DISASSOC_RECVD_EVENT);
6087 C2S(WOW_PATTERN_MATCH_EVENT);
6088 C2S(WOW_CSA_IE_EVENT);
6089 C2S(WOW_PROBE_REQ_WPS_IE_EVENT);
6090 C2S(WOW_AUTH_REQ_EVENT);
6091 C2S(WOW_ASSOC_REQ_EVENT);
6092 C2S(WOW_HTT_EVENT);
6093 C2S(WOW_RA_MATCH_EVENT);
6094 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT);
6095 C2S(WOW_IOAC_MAGIC_EVENT);
6096 C2S(WOW_IOAC_SHORT_EVENT);
6097 C2S(WOW_IOAC_EXTEND_EVENT);
6098 C2S(WOW_IOAC_TIMER_EVENT);
6099 C2S(WOW_DFS_PHYERR_RADAR_EVENT);
6100 C2S(WOW_BEACON_EVENT);
6101 C2S(WOW_CLIENT_KICKOUT_EVENT);
6102 C2S(WOW_EVENT_MAX);
6103 default:
6104 return NULL;
6105 }
6106}
6107
6108enum wmi_wow_wake_reason {
6109 WOW_REASON_UNSPECIFIED = -1,
6110 WOW_REASON_NLOD = 0,
6111 WOW_REASON_AP_ASSOC_LOST,
6112 WOW_REASON_LOW_RSSI,
6113 WOW_REASON_DEAUTH_RECVD,
6114 WOW_REASON_DISASSOC_RECVD,
6115 WOW_REASON_GTK_HS_ERR,
6116 WOW_REASON_EAP_REQ,
6117 WOW_REASON_FOURWAY_HS_RECV,
6118 WOW_REASON_TIMER_INTR_RECV,
6119 WOW_REASON_PATTERN_MATCH_FOUND,
6120 WOW_REASON_RECV_MAGIC_PATTERN,
6121 WOW_REASON_P2P_DISC,
6122 WOW_REASON_WLAN_HB,
6123 WOW_REASON_CSA_EVENT,
6124 WOW_REASON_PROBE_REQ_WPS_IE_RECV,
6125 WOW_REASON_AUTH_REQ_RECV,
6126 WOW_REASON_ASSOC_REQ_RECV,
6127 WOW_REASON_HTT_EVENT,
6128 WOW_REASON_RA_MATCH,
6129 WOW_REASON_HOST_AUTO_SHUTDOWN,
6130 WOW_REASON_IOAC_MAGIC_EVENT,
6131 WOW_REASON_IOAC_SHORT_EVENT,
6132 WOW_REASON_IOAC_EXTEND_EVENT,
6133 WOW_REASON_IOAC_TIMER_EVENT,
6134 WOW_REASON_ROAM_HO,
6135 WOW_REASON_DFS_PHYERR_RADADR_EVENT,
6136 WOW_REASON_BEACON_RECV,
6137 WOW_REASON_CLIENT_KICKOUT_EVENT,
6138 WOW_REASON_DEBUG_TEST = 0xFF,
6139};
6140
6141static inline const char *wow_reason(enum wmi_wow_wake_reason reason)
6142{
6143 switch (reason) {
6144 C2S(WOW_REASON_UNSPECIFIED);
6145 C2S(WOW_REASON_NLOD);
6146 C2S(WOW_REASON_AP_ASSOC_LOST);
6147 C2S(WOW_REASON_LOW_RSSI);
6148 C2S(WOW_REASON_DEAUTH_RECVD);
6149 C2S(WOW_REASON_DISASSOC_RECVD);
6150 C2S(WOW_REASON_GTK_HS_ERR);
6151 C2S(WOW_REASON_EAP_REQ);
6152 C2S(WOW_REASON_FOURWAY_HS_RECV);
6153 C2S(WOW_REASON_TIMER_INTR_RECV);
6154 C2S(WOW_REASON_PATTERN_MATCH_FOUND);
6155 C2S(WOW_REASON_RECV_MAGIC_PATTERN);
6156 C2S(WOW_REASON_P2P_DISC);
6157 C2S(WOW_REASON_WLAN_HB);
6158 C2S(WOW_REASON_CSA_EVENT);
6159 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV);
6160 C2S(WOW_REASON_AUTH_REQ_RECV);
6161 C2S(WOW_REASON_ASSOC_REQ_RECV);
6162 C2S(WOW_REASON_HTT_EVENT);
6163 C2S(WOW_REASON_RA_MATCH);
6164 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN);
6165 C2S(WOW_REASON_IOAC_MAGIC_EVENT);
6166 C2S(WOW_REASON_IOAC_SHORT_EVENT);
6167 C2S(WOW_REASON_IOAC_EXTEND_EVENT);
6168 C2S(WOW_REASON_IOAC_TIMER_EVENT);
6169 C2S(WOW_REASON_ROAM_HO);
6170 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT);
6171 C2S(WOW_REASON_BEACON_RECV);
6172 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT);
6173 C2S(WOW_REASON_DEBUG_TEST);
6174 default:
6175 return NULL;
6176 }
6177}
6178
6179#undef C2S
6180
6181struct wmi_wow_ev_arg {
6182 u32 vdev_id;
6183 u32 flag;
6184 enum wmi_wow_wake_reason wake_reason;
6185 u32 data_len;
6186};
6187
6188#define WOW_MIN_PATTERN_SIZE 1
6189#define WOW_MAX_PATTERN_SIZE 148
6190#define WOW_MAX_PKT_OFFSET 128
6191
6192enum wmi_tdls_state {
6193 WMI_TDLS_DISABLE,
6194 WMI_TDLS_ENABLE_PASSIVE,
6195 WMI_TDLS_ENABLE_ACTIVE,
6196};
6197
6198enum wmi_tdls_peer_state {
6199 WMI_TDLS_PEER_STATE_PEERING,
6200 WMI_TDLS_PEER_STATE_CONNECTED,
6201 WMI_TDLS_PEER_STATE_TEARDOWN,
6202};
6203
6204struct wmi_tdls_peer_update_cmd_arg {
6205 u32 vdev_id;
6206 enum wmi_tdls_peer_state peer_state;
6207 u8 addr[ETH_ALEN];
6208};
6209
6210#define WMI_TDLS_MAX_SUPP_OPER_CLASSES 32
6211
6212struct wmi_tdls_peer_capab_arg {
6213 u8 peer_uapsd_queues;
6214 u8 peer_max_sp;
6215 u32 buff_sta_support;
6216 u32 off_chan_support;
6217 u32 peer_curr_operclass;
6218 u32 self_curr_operclass;
6219 u32 peer_chan_len;
6220 u32 peer_operclass_len;
6221 u8 peer_operclass[WMI_TDLS_MAX_SUPP_OPER_CLASSES];
6222 u32 is_peer_responder;
6223 u32 pref_offchan_num;
6224 u32 pref_offchan_bw;
6225};
6226
6227enum wmi_txbf_conf {
6228 WMI_TXBF_CONF_UNSUPPORTED,
6229 WMI_TXBF_CONF_BEFORE_ASSOC,
6230 WMI_TXBF_CONF_AFTER_ASSOC,
6231};
6232
6233#define WMI_CCA_DETECT_LEVEL_AUTO 0
6234#define WMI_CCA_DETECT_MARGIN_AUTO 0
6235
6236struct wmi_pdev_set_adaptive_cca_params {
6237 __le32 enable;
6238 __le32 cca_detect_level;
6239 __le32 cca_detect_margin;
6240} __packed;
6241
6242struct ath10k;
6243struct ath10k_vif;
6244struct ath10k_fw_stats_pdev;
6245struct ath10k_fw_stats_peer;
6246struct ath10k_fw_stats;
6247
6248int ath10k_wmi_attach(struct ath10k *ar);
6249void ath10k_wmi_detach(struct ath10k *ar);
6250void ath10k_wmi_free_host_mem(struct ath10k *ar);
6251int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
6252int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
6253
6254struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
6255int ath10k_wmi_connect(struct ath10k *ar);
6256
6257struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
6258int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
6259int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
6260 u32 cmd_id);
6261void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *);
6262
6263void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
6264 struct ath10k_fw_stats_pdev *dst);
6265void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
6266 struct ath10k_fw_stats_pdev *dst);
6267void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
6268 struct ath10k_fw_stats_pdev *dst);
6269void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
6270 struct ath10k_fw_stats_pdev *dst);
6271void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
6272 struct ath10k_fw_stats_peer *dst);
6273void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
6274 struct wmi_host_mem_chunks *chunks);
6275void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
6276 const struct wmi_start_scan_arg *arg);
6277void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
6278 const struct wmi_wmm_params_arg *arg);
6279void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
6280 const struct wmi_channel_arg *arg);
6281int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
6282
6283int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
6284int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
6285void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
6286void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
6287int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
6288void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
6289void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
6290void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
6291void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
6292void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
6293void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
6294void ath10k_wmi_event_dfs(struct ath10k *ar,
6295 struct wmi_phyerr_ev_arg *phyerr, u64 tsf);
6296void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
6297 struct wmi_phyerr_ev_arg *phyerr,
6298 u64 tsf);
6299void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
6300void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
6301void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
6302void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
6303void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
6304void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
6305void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
6306 struct sk_buff *skb);
6307void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
6308 struct sk_buff *skb);
6309void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
6310void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
6311void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
6312void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
6313void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
6314void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
6315 struct sk_buff *skb);
6316void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
6317void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
6318void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
6319void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
6320 struct sk_buff *skb);
6321void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
6322void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
6323void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
6324void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
6325int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
6326int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, const void *phyerr_buf,
6327 int left_len, struct wmi_phyerr_ev_arg *arg);
6328void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
6329 struct ath10k_fw_stats *fw_stats,
6330 char *buf);
6331void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
6332 struct ath10k_fw_stats *fw_stats,
6333 char *buf);
6334size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head);
6335size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head);
6336void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
6337 struct ath10k_fw_stats *fw_stats,
6338 char *buf);
6339
6340#endif
6341