LXR linux/arch/metag/include/asm/barrier.h

   1#ifndef _ASM_METAG_BARRIER_H
   2#define _ASM_METAG_BARRIER_H
   3
   4#include <asm/metag_mem.h>
   5
   6#define nop()           asm volatile ("NOP")
   7
   8#ifdef CONFIG_METAG_META21
   9
  10/* HTP and above have a system event to fence writes */
  11static inline void wr_fence(void)
  12{
  13        volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_FENCE;
  14        barrier();
  15        *flushptr = 0;
  16        barrier();
  17}
  18
  19#else /* CONFIG_METAG_META21 */
  20
  21/*
  22 * ATP doesn't have system event to fence writes, so it is necessary to flush
  23 * the processor write queues as well as possibly the write combiner (depending
  24 * on the page being written).
  25 * To ensure the write queues are flushed we do 4 writes to a system event
  26 * register (in this case write combiner flush) which will also flush the write
  27 * combiner.
  28 */
  29static inline void wr_fence(void)
  30{
  31        volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_COMBINE_FLUSH;
  32        barrier();
  33        *flushptr = 0;
  34        *flushptr = 0;
  35        *flushptr = 0;
  36        *flushptr = 0;
  37        barrier();
  38}
  39
  40#endif /* !CONFIG_METAG_META21 */
  41
  42/* flush writes through the write combiner */
  43#define mb()            wr_fence()
  44#define rmb()           barrier()
  45#define wmb()           mb()
  46
  47#ifdef CONFIG_METAG_SMP_WRITE_REORDERING
  48/*
  49 * Write to the atomic memory unlock system event register (command 0). This is
  50 * needed before a write to shared memory in a critical section, to prevent
  51 * external reordering of writes before the fence on other threads with writes
  52 * after the fence on this thread (and to prevent the ensuing cache-memory
  53 * incoherence). It is therefore ineffective if used after and on the same
  54 * thread as a write.
  55 */
  56static inline void metag_fence(void)
  57{
  58        volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_ATOMIC_UNLOCK;
  59        barrier();
  60        *flushptr = 0;
  61        barrier();
  62}
  63#define __smp_mb()      metag_fence()
  64#define __smp_rmb()     metag_fence()
  65#define __smp_wmb()     barrier()
  66#else
  67#define metag_fence()   do { } while (0)
  68#define __smp_mb()      barrier()
  69#define __smp_rmb()     barrier()
  70#define __smp_wmb()     barrier()
  71#endif
  72
  73#ifdef CONFIG_SMP
  74#define fence()         metag_fence()
  75#else
  76#define fence()         do { } while (0)
  77#endif
  78
  79#define __smp_mb__before_atomic()       barrier()
  80#define __smp_mb__after_atomic()        barrier()
  81
  82#include <asm-generic/barrier.h>
  83
  84#endif /* _ASM_METAG_BARRIER_H */
  85