LXR linux/arch/metag/include/asm/io.h

   1#ifndef _ASM_METAG_IO_H
   2#define _ASM_METAG_IO_H
   3
   4#include <linux/types.h>
   5#include <asm/pgtable-bits.h>
   6
   7#define IO_SPACE_LIMIT  0
   8
   9#define page_to_bus page_to_phys
  10#define bus_to_page phys_to_page
  11
  12/*
  13 * Generic I/O
  14 */
  15
  16#define __raw_readb __raw_readb
  17static inline u8 __raw_readb(const volatile void __iomem *addr)
  18{
  19        u8 ret;
  20        asm volatile("GETB %0,[%1]"
  21                     : "=da" (ret)
  22                     : "da" (addr)
  23                     : "memory");
  24        return ret;
  25}
  26
  27#define __raw_readw __raw_readw
  28static inline u16 __raw_readw(const volatile void __iomem *addr)
  29{
  30        u16 ret;
  31        asm volatile("GETW %0,[%1]"
  32                     : "=da" (ret)
  33                     : "da" (addr)
  34                     : "memory");
  35        return ret;
  36}
  37
  38#define __raw_readl __raw_readl
  39static inline u32 __raw_readl(const volatile void __iomem *addr)
  40{
  41        u32 ret;
  42        asm volatile("GETD %0,[%1]"
  43                     : "=da" (ret)
  44                     : "da" (addr)
  45                     : "memory");
  46        return ret;
  47}
  48
  49#define __raw_readq __raw_readq
  50static inline u64 __raw_readq(const volatile void __iomem *addr)
  51{
  52        u64 ret;
  53        asm volatile("GETL %0,%t0,[%1]"
  54                     : "=da" (ret)
  55                     : "da" (addr)
  56                     : "memory");
  57        return ret;
  58}
  59
  60#define __raw_writeb __raw_writeb
  61static inline void __raw_writeb(u8 b, volatile void __iomem *addr)
  62{
  63        asm volatile("SETB [%0],%1"
  64                     :
  65                     : "da" (addr),
  66                       "da" (b)
  67                     : "memory");
  68}
  69
  70#define __raw_writew __raw_writew
  71static inline void __raw_writew(u16 b, volatile void __iomem *addr)
  72{
  73        asm volatile("SETW [%0],%1"
  74                     :
  75                     : "da" (addr),
  76                       "da" (b)
  77                     : "memory");
  78}
  79
  80#define __raw_writel __raw_writel
  81static inline void __raw_writel(u32 b, volatile void __iomem *addr)
  82{
  83        asm volatile("SETD [%0],%1"
  84                     :
  85                     : "da" (addr),
  86                       "da" (b)
  87                     : "memory");
  88}
  89
  90#define __raw_writeq __raw_writeq
  91static inline void __raw_writeq(u64 b, volatile void __iomem *addr)
  92{
  93        asm volatile("SETL [%0],%1,%t1"
  94                     :
  95                     : "da" (addr),
  96                       "da" (b)
  97                     : "memory");
  98}
  99
 100/*
 101 * The generic io.h can define all the other generic accessors
 102 */
 103
 104#include <asm-generic/io.h>
 105
 106/*
 107 * Despite being a 32bit architecture, Meta can do 64bit memory accesses
 108 * (assuming the bus supports it).
 109 */
 110
 111#define readq   __raw_readq
 112#define writeq  __raw_writeq
 113
 114/*
 115 * Meta specific I/O for accessing non-MMU areas.
 116 *
 117 * These can be provided with a physical address rather than an __iomem pointer
 118 * and should only be used by core architecture code for accessing fixed core
 119 * registers. Generic drivers should use ioremap and the generic I/O accessors.
 120 */
 121
 122#define metag_in8(addr)         __raw_readb((volatile void __iomem *)(addr))
 123#define metag_in16(addr)        __raw_readw((volatile void __iomem *)(addr))
 124#define metag_in32(addr)        __raw_readl((volatile void __iomem *)(addr))
 125#define metag_in64(addr)        __raw_readq((volatile void __iomem *)(addr))
 126
 127#define metag_out8(b, addr)     __raw_writeb(b, (volatile void __iomem *)(addr))
 128#define metag_out16(b, addr)    __raw_writew(b, (volatile void __iomem *)(addr))
 129#define metag_out32(b, addr)    __raw_writel(b, (volatile void __iomem *)(addr))
 130#define metag_out64(b, addr)    __raw_writeq(b, (volatile void __iomem *)(addr))
 131
 132/*
 133 * io remapping functions
 134 */
 135
 136extern void __iomem *__ioremap(unsigned long offset,
 137                               size_t size, unsigned long flags);
 138extern void __iounmap(void __iomem *addr);
 139
 140/**
 141 *      ioremap         -       map bus memory into CPU space
 142 *      @offset:        bus address of the memory
 143 *      @size:          size of the resource to map
 144 *
 145 *      ioremap performs a platform specific sequence of operations to
 146 *      make bus memory CPU accessible via the readb/readw/readl/writeb/
 147 *      writew/writel functions and the other mmio helpers. The returned
 148 *      address is not guaranteed to be usable directly as a virtual
 149 *      address.
 150 */
 151#define ioremap(offset, size)                   \
 152        __ioremap((offset), (size), 0)
 153
 154#define ioremap_nocache(offset, size)           \
 155        __ioremap((offset), (size), 0)
 156
 157#define ioremap_cached(offset, size)            \
 158        __ioremap((offset), (size), _PAGE_CACHEABLE)
 159
 160#define ioremap_wc(offset, size)                \
 161        __ioremap((offset), (size), _PAGE_WR_COMBINE)
 162
 163#define ioremap_wt(offset, size)                \
 164        __ioremap((offset), (size), 0)
 165
 166#define iounmap(addr)                           \
 167        __iounmap(addr)
 168
 169#endif  /* _ASM_METAG_IO_H */
 170