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13#ifndef __NET_TULIP_H__
14#define __NET_TULIP_H__
15
16#include <linux/kernel.h>
17#include <linux/types.h>
18#include <linux/spinlock.h>
19#include <linux/netdevice.h>
20#include <linux/ethtool.h>
21#include <linux/timer.h>
22#include <linux/delay.h>
23#include <linux/pci.h>
24#include <asm/io.h>
25#include <asm/irq.h>
26#include <asm/unaligned.h>
27
28
29
30
31#define TULIP_DEBUG 1
32
33#ifdef CONFIG_TULIP_MMIO
34#define TULIP_BAR 1
35#else
36#define TULIP_BAR 0
37#endif
38
39
40
41struct tulip_chip_table {
42 char *chip_name;
43 int io_size;
44 int valid_intrs;
45 int flags;
46 void (*media_timer) (unsigned long);
47 work_func_t media_task;
48};
49
50
51enum tbl_flag {
52 HAS_MII = 0x00001,
53 HAS_MEDIA_TABLE = 0x00002,
54 CSR12_IN_SROM = 0x00004,
55 ALWAYS_CHECK_MII = 0x00008,
56 HAS_ACPI = 0x00010,
57 MC_HASH_ONLY = 0x00020,
58 HAS_PNICNWAY = 0x00080,
59 HAS_NWAY = 0x00040,
60 HAS_INTR_MITIGATION = 0x00100,
61 IS_ASIX = 0x00200,
62 HAS_8023X = 0x00400,
63 COMET_MAC_ADDR = 0x00800,
64 HAS_PCI_MWI = 0x01000,
65 HAS_PHY_IRQ = 0x02000,
66 HAS_SWAPPED_SEEPROM = 0x04000,
67 NEEDS_FAKE_MEDIA_TABLE = 0x08000,
68 COMET_PM = 0x10000,
69};
70
71
72
73
74
75enum chips {
76 DC21040 = 0,
77 DC21041 = 1,
78 DC21140 = 2,
79 DC21142 = 3, DC21143 = 3,
80 LC82C168,
81 MX98713,
82 MX98715,
83 MX98725,
84 AX88140,
85 PNIC2,
86 COMET,
87 COMPEX9881,
88 I21145,
89 DM910X,
90 CONEXANT,
91};
92
93
94enum MediaIs {
95 MediaIsFD = 1,
96 MediaAlwaysFD = 2,
97 MediaIsMII = 4,
98 MediaIsFx = 8,
99 MediaIs100 = 16
100};
101
102
103
104
105enum tulip_offsets {
106 CSR0 = 0,
107 CSR1 = 0x08,
108 CSR2 = 0x10,
109 CSR3 = 0x18,
110 CSR4 = 0x20,
111 CSR5 = 0x28,
112 CSR6 = 0x30,
113 CSR7 = 0x38,
114 CSR8 = 0x40,
115 CSR9 = 0x48,
116 CSR10 = 0x50,
117 CSR11 = 0x58,
118 CSR12 = 0x60,
119 CSR13 = 0x68,
120 CSR14 = 0x70,
121 CSR15 = 0x78,
122 CSR18 = 0x88,
123 CSR19 = 0x8c,
124 CSR20 = 0x90,
125 CSR27 = 0xAC,
126 CSR28 = 0xB0,
127};
128
129
130enum pci_cfg_driver_reg {
131 CFDD = 0x40,
132 CFDD_Sleep = (1 << 31),
133 CFDD_Snooze = (1 << 30),
134};
135
136#define RxPollInt (RxIntr|RxNoBuf|RxDied|RxJabber)
137
138
139enum status_bits {
140 TimerInt = 0x800,
141 SystemError = 0x2000,
142 TPLnkFail = 0x1000,
143 TPLnkPass = 0x10,
144 NormalIntr = 0x10000,
145 AbnormalIntr = 0x8000,
146 RxJabber = 0x200,
147 RxDied = 0x100,
148 RxNoBuf = 0x80,
149 RxIntr = 0x40,
150 TxFIFOUnderflow = 0x20,
151 RxErrIntr = 0x10,
152 TxJabber = 0x08,
153 TxNoBuf = 0x04,
154 TxDied = 0x02,
155 TxIntr = 0x01,
156};
157
158
159#define CSR5_TS 0x00700000
160#define CSR5_RS 0x000e0000
161
162enum tulip_mode_bits {
163 TxThreshold = (1 << 22),
164 FullDuplex = (1 << 9),
165 TxOn = 0x2000,
166 AcceptBroadcast = 0x0100,
167 AcceptAllMulticast = 0x0080,
168 AcceptAllPhys = 0x0040,
169 AcceptRunt = 0x0008,
170 RxOn = 0x0002,
171 RxTx = (TxOn | RxOn),
172};
173
174
175enum tulip_busconfig_bits {
176 MWI = (1 << 24),
177 MRL = (1 << 23),
178 MRM = (1 << 21),
179 CALShift = 14,
180 BurstLenShift = 8,
181};
182
183
184
185struct tulip_rx_desc {
186 __le32 status;
187 __le32 length;
188 __le32 buffer1;
189 __le32 buffer2;
190};
191
192
193struct tulip_tx_desc {
194 __le32 status;
195 __le32 length;
196 __le32 buffer1;
197 __le32 buffer2;
198};
199
200
201enum desc_status_bits {
202 DescOwned = 0x80000000,
203 DescWholePkt = 0x60000000,
204 DescEndPkt = 0x40000000,
205 DescStartPkt = 0x20000000,
206 DescEndRing = 0x02000000,
207 DescUseLink = 0x01000000,
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214 RxDescErrorSummary = 0x8000,
215 RxDescCRCError = 0x0002,
216 RxDescCollisionSeen = 0x0040,
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229 RxDescFrameTooLong = 0x0080,
230 RxDescRunt = 0x0800,
231 RxDescDescErr = 0x4000,
232 RxWholePkt = 0x00000300,
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239 RxLengthOver2047 = 0x38000010
240};
241
242
243enum t21143_csr6_bits {
244 csr6_sc = (1<<31),
245 csr6_ra = (1<<30),
246 csr6_ign_dest_msb = (1<<26),
247 csr6_mbo = (1<<25),
248 csr6_scr = (1<<24),
249 csr6_pcs = (1<<23),
250 csr6_ttm = (1<<22),
251 csr6_sf = (1<<21),
252 csr6_hbd = (1<<19),
253 csr6_ps = (1<<18),
254 csr6_ca = (1<<17),
255 csr6_trh = (1<<15),
256 csr6_trl = (1<<14),
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272
273 csr6_fc = (1<<12),
274 csr6_om_int_loop = (1<<10),
275 csr6_om_ext_loop = (1<<11),
276
277 csr6_fd = (1<<9),
278 csr6_pm = (1<<7),
279 csr6_pr = (1<<6),
280 csr6_sb = (1<<5),
281 csr6_if = (1<<4),
282 csr6_pb = (1<<3),
283 csr6_ho = (1<<2),
284 csr6_hp = (1<<0),
285
286 csr6_mask_capture = (csr6_sc | csr6_ca),
287 csr6_mask_defstate = (csr6_mask_capture | csr6_mbo),
288 csr6_mask_hdcap = (csr6_mask_defstate | csr6_hbd | csr6_ps),
289 csr6_mask_hdcaptt = (csr6_mask_hdcap | csr6_trh | csr6_trl),
290 csr6_mask_fullcap = (csr6_mask_hdcaptt | csr6_fd),
291 csr6_mask_fullpromisc = (csr6_pr | csr6_pm),
292 csr6_mask_filters = (csr6_hp | csr6_ho | csr6_if),
293 csr6_mask_100bt = (csr6_scr | csr6_pcs | csr6_hbd),
294};
295
296enum tulip_comet_csr13_bits {
297
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299
300 comet_csr13_linkoffe = (1 << 17),
301 comet_csr13_linkone = (1 << 16),
302 comet_csr13_wfre = (1 << 10),
303 comet_csr13_mpre = (1 << 9),
304 comet_csr13_lsce = (1 << 8),
305 comet_csr13_wfr = (1 << 2),
306 comet_csr13_mpr = (1 << 1),
307 comet_csr13_lsc = (1 << 0),
308};
309
310enum tulip_comet_csr18_bits {
311 comet_csr18_pmes_sticky = (1 << 24),
312 comet_csr18_pm_mode = (1 << 19),
313 comet_csr18_apm_mode = (1 << 18),
314 comet_csr18_d3a = (1 << 7)
315};
316
317enum tulip_comet_csr20_bits {
318 comet_csr20_pmes = (1 << 15),
319};
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325
326#define TX_RING_SIZE 32
327#define RX_RING_SIZE 128
328#define MEDIA_MASK 31
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335#define PKT_BUF_SZ (1536 + 4)
336
337#define TULIP_MIN_CACHE_LINE 8
338
339#if defined(__sparc__) || defined(__hppa__)
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344#define TULIP_MAX_CACHE_LINE 16
345#else
346#define TULIP_MAX_CACHE_LINE 32
347#endif
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357
358#define DESC_RING_WRAP 0x02000000
359
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361#define EEPROM_SIZE 512
362
363
364#define RUN_AT(x) (jiffies + (x))
365
366#define get_u16(ptr) get_unaligned_le16((ptr))
367
368struct medialeaf {
369 u8 type;
370 u8 media;
371 unsigned char *leafdata;
372};
373
374
375struct mediatable {
376 u16 defaultmedia;
377 u8 leafcount;
378 u8 csr12dir;
379 unsigned has_mii:1;
380 unsigned has_nonmii:1;
381 unsigned has_reset:6;
382 u32 csr15dir;
383 u32 csr15val;
384 struct medialeaf mleaf[0];
385};
386
387
388struct mediainfo {
389 struct mediainfo *next;
390 int info_type;
391 int index;
392 unsigned char *info;
393};
394
395struct ring_info {
396 struct sk_buff *skb;
397 dma_addr_t mapping;
398};
399
400
401struct tulip_private {
402 const char *product_name;
403 struct net_device *next_module;
404 struct tulip_rx_desc *rx_ring;
405 struct tulip_tx_desc *tx_ring;
406 dma_addr_t rx_ring_dma;
407 dma_addr_t tx_ring_dma;
408
409 struct ring_info tx_buffers[TX_RING_SIZE];
410
411 struct ring_info rx_buffers[RX_RING_SIZE];
412 u16 setup_frame[96];
413 int chip_id;
414 int revision;
415 int flags;
416 struct napi_struct napi;
417 struct timer_list timer;
418 struct timer_list oom_timer;
419 u32 mc_filter[2];
420 spinlock_t lock;
421 spinlock_t mii_lock;
422 unsigned int cur_rx, cur_tx;
423 unsigned int dirty_rx, dirty_tx;
424
425#ifdef CONFIG_TULIP_NAPI_HW_MITIGATION
426 int mit_on;
427#endif
428 unsigned int full_duplex:1;
429 unsigned int full_duplex_lock:1;
430 unsigned int fake_addr:1;
431 unsigned int default_port:4;
432 unsigned int media2:4;
433 unsigned int medialock:1;
434 unsigned int mediasense:1;
435 unsigned int nway:1, nwayset:1;
436 unsigned int timeout_recovery:1;
437 unsigned int csr0;
438 unsigned int csr6;
439 unsigned char eeprom[EEPROM_SIZE];
440 void (*link_change) (struct net_device * dev, int csr5);
441 struct ethtool_wolinfo wolinfo;
442 u16 sym_advertise, mii_advertise;
443 u16 lpar;
444 u16 advertising[4];
445 signed char phys[4], mii_cnt;
446 struct mediatable *mtable;
447 int cur_index;
448 int saved_if_port;
449 struct pci_dev *pdev;
450 int ttimer;
451 int susp_rx;
452 unsigned long nir;
453 void __iomem *base_addr;
454 int csr12_shadow;
455 int pad0;
456 struct work_struct media_work;
457 struct net_device *dev;
458};
459
460
461struct eeprom_fixup {
462 char *name;
463 unsigned char addr0;
464 unsigned char addr1;
465 unsigned char addr2;
466 u16 newtable[32];
467};
468
469
470
471extern u16 t21142_csr14[];
472void t21142_media_task(struct work_struct *work);
473void t21142_start_nway(struct net_device *dev);
474void t21142_lnk_change(struct net_device *dev, int csr5);
475
476
477
478void pnic2_lnk_change(struct net_device *dev, int csr5);
479void pnic2_timer(unsigned long data);
480void pnic2_start_nway(struct net_device *dev);
481void pnic2_lnk_change(struct net_device *dev, int csr5);
482
483
484void tulip_parse_eeprom(struct net_device *dev);
485int tulip_read_eeprom(struct net_device *dev, int location, int addr_len);
486
487
488extern unsigned int tulip_max_interrupt_work;
489extern int tulip_rx_copybreak;
490irqreturn_t tulip_interrupt(int irq, void *dev_instance);
491int tulip_refill_rx(struct net_device *dev);
492#ifdef CONFIG_TULIP_NAPI
493int tulip_poll(struct napi_struct *napi, int budget);
494#endif
495
496
497
498int tulip_mdio_read(struct net_device *dev, int phy_id, int location);
499void tulip_mdio_write(struct net_device *dev, int phy_id, int location, int value);
500void tulip_select_media(struct net_device *dev, int startup);
501int tulip_check_duplex(struct net_device *dev);
502void tulip_find_mii (struct net_device *dev, int board_idx);
503
504
505void pnic_do_nway(struct net_device *dev);
506void pnic_lnk_change(struct net_device *dev, int csr5);
507void pnic_timer(unsigned long data);
508
509
510void tulip_media_task(struct work_struct *work);
511void mxic_timer(unsigned long data);
512void comet_timer(unsigned long data);
513
514
515extern int tulip_debug;
516extern const char * const medianame[];
517extern const char tulip_media_cap[];
518extern struct tulip_chip_table tulip_tbl[];
519void oom_timer(unsigned long data);
520extern u8 t21040_csr13[];
521
522static inline void tulip_start_rxtx(struct tulip_private *tp)
523{
524 void __iomem *ioaddr = tp->base_addr;
525 iowrite32(tp->csr6 | RxTx, ioaddr + CSR6);
526 barrier();
527 (void) ioread32(ioaddr + CSR6);
528}
529
530static inline void tulip_stop_rxtx(struct tulip_private *tp)
531{
532 void __iomem *ioaddr = tp->base_addr;
533 u32 csr6 = ioread32(ioaddr + CSR6);
534
535 if (csr6 & RxTx) {
536 unsigned i=1300/10;
537 iowrite32(csr6 & ~RxTx, ioaddr + CSR6);
538 barrier();
539
540
541
542
543 while (--i && (ioread32(ioaddr + CSR5) & (CSR5_TS|CSR5_RS)))
544 udelay(10);
545
546 if (!i)
547 netdev_dbg(tp->dev, "tulip_stop_rxtx() failed (CSR5 0x%x CSR6 0x%x)\n",
548 ioread32(ioaddr + CSR5),
549 ioread32(ioaddr + CSR6));
550 }
551}
552
553static inline void tulip_restart_rxtx(struct tulip_private *tp)
554{
555 tulip_stop_rxtx(tp);
556 udelay(5);
557 tulip_start_rxtx(tp);
558}
559
560static inline void tulip_tx_timeout_complete(struct tulip_private *tp, void __iomem *ioaddr)
561{
562
563 tulip_restart_rxtx(tp);
564
565 iowrite32(0, ioaddr + CSR1);
566
567 tp->dev->stats.tx_errors++;
568}
569
570#endif
571