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34#include <linux/etherdevice.h>
35#include <linux/tcp.h>
36#include <linux/if_vlan.h>
37#include <linux/delay.h>
38#include <linux/slab.h>
39#include <linux/hash.h>
40#include <net/ip.h>
41#include <net/busy_poll.h>
42#include <net/vxlan.h>
43
44#include <linux/mlx4/driver.h>
45#include <linux/mlx4/device.h>
46#include <linux/mlx4/cmd.h>
47#include <linux/mlx4/cq.h>
48
49#include "mlx4_en.h"
50#include "en_port.h"
51
52int mlx4_en_setup_tc(struct net_device *dev, u8 up)
53{
54 struct mlx4_en_priv *priv = netdev_priv(dev);
55 int i;
56 unsigned int offset = 0;
57
58 if (up && up != MLX4_EN_NUM_UP)
59 return -EINVAL;
60
61 netdev_set_num_tc(dev, up);
62
63
64 for (i = 0; i < up; i++) {
65 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
66 offset += priv->num_tx_rings_p_up;
67 }
68
69 return 0;
70}
71
72#ifdef CONFIG_RFS_ACCEL
73
74struct mlx4_en_filter {
75 struct list_head next;
76 struct work_struct work;
77
78 u8 ip_proto;
79 __be32 src_ip;
80 __be32 dst_ip;
81 __be16 src_port;
82 __be16 dst_port;
83
84 int rxq_index;
85 struct mlx4_en_priv *priv;
86 u32 flow_id;
87 int id;
88 u64 reg_id;
89 u8 activated;
90
91
92 struct hlist_node filter_chain;
93};
94
95static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
96
97static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
98{
99 switch (ip_proto) {
100 case IPPROTO_UDP:
101 return MLX4_NET_TRANS_RULE_ID_UDP;
102 case IPPROTO_TCP:
103 return MLX4_NET_TRANS_RULE_ID_TCP;
104 default:
105 return MLX4_NET_TRANS_RULE_NUM;
106 }
107};
108
109static void mlx4_en_filter_work(struct work_struct *work)
110{
111 struct mlx4_en_filter *filter = container_of(work,
112 struct mlx4_en_filter,
113 work);
114 struct mlx4_en_priv *priv = filter->priv;
115 struct mlx4_spec_list spec_tcp_udp = {
116 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
117 {
118 .tcp_udp = {
119 .dst_port = filter->dst_port,
120 .dst_port_msk = (__force __be16)-1,
121 .src_port = filter->src_port,
122 .src_port_msk = (__force __be16)-1,
123 },
124 },
125 };
126 struct mlx4_spec_list spec_ip = {
127 .id = MLX4_NET_TRANS_RULE_ID_IPV4,
128 {
129 .ipv4 = {
130 .dst_ip = filter->dst_ip,
131 .dst_ip_msk = (__force __be32)-1,
132 .src_ip = filter->src_ip,
133 .src_ip_msk = (__force __be32)-1,
134 },
135 },
136 };
137 struct mlx4_spec_list spec_eth = {
138 .id = MLX4_NET_TRANS_RULE_ID_ETH,
139 };
140 struct mlx4_net_trans_rule rule = {
141 .list = LIST_HEAD_INIT(rule.list),
142 .queue_mode = MLX4_NET_TRANS_Q_LIFO,
143 .exclusive = 1,
144 .allow_loopback = 1,
145 .promisc_mode = MLX4_FS_REGULAR,
146 .port = priv->port,
147 .priority = MLX4_DOMAIN_RFS,
148 };
149 int rc;
150 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
151
152 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
153 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
154 filter->ip_proto);
155 goto ignore;
156 }
157 list_add_tail(&spec_eth.list, &rule.list);
158 list_add_tail(&spec_ip.list, &rule.list);
159 list_add_tail(&spec_tcp_udp.list, &rule.list);
160
161 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
162 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
163 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
164
165 filter->activated = 0;
166
167 if (filter->reg_id) {
168 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
169 if (rc && rc != -ENOENT)
170 en_err(priv, "Error detaching flow. rc = %d\n", rc);
171 }
172
173 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
174 if (rc)
175 en_err(priv, "Error attaching flow. err = %d\n", rc);
176
177ignore:
178 mlx4_en_filter_rfs_expire(priv);
179
180 filter->activated = 1;
181}
182
183static inline struct hlist_head *
184filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
185 __be16 src_port, __be16 dst_port)
186{
187 unsigned long l;
188 int bucket_idx;
189
190 l = (__force unsigned long)src_port |
191 ((__force unsigned long)dst_port << 2);
192 l ^= (__force unsigned long)(src_ip ^ dst_ip);
193
194 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
195
196 return &priv->filter_hash[bucket_idx];
197}
198
199static struct mlx4_en_filter *
200mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
201 __be32 dst_ip, u8 ip_proto, __be16 src_port,
202 __be16 dst_port, u32 flow_id)
203{
204 struct mlx4_en_filter *filter = NULL;
205
206 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
207 if (!filter)
208 return NULL;
209
210 filter->priv = priv;
211 filter->rxq_index = rxq_index;
212 INIT_WORK(&filter->work, mlx4_en_filter_work);
213
214 filter->src_ip = src_ip;
215 filter->dst_ip = dst_ip;
216 filter->ip_proto = ip_proto;
217 filter->src_port = src_port;
218 filter->dst_port = dst_port;
219
220 filter->flow_id = flow_id;
221
222 filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
223
224 list_add_tail(&filter->next, &priv->filters);
225 hlist_add_head(&filter->filter_chain,
226 filter_hash_bucket(priv, src_ip, dst_ip, src_port,
227 dst_port));
228
229 return filter;
230}
231
232static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
233{
234 struct mlx4_en_priv *priv = filter->priv;
235 int rc;
236
237 list_del(&filter->next);
238
239 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
240 if (rc && rc != -ENOENT)
241 en_err(priv, "Error detaching flow. rc = %d\n", rc);
242
243 kfree(filter);
244}
245
246static inline struct mlx4_en_filter *
247mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
248 u8 ip_proto, __be16 src_port, __be16 dst_port)
249{
250 struct mlx4_en_filter *filter;
251 struct mlx4_en_filter *ret = NULL;
252
253 hlist_for_each_entry(filter,
254 filter_hash_bucket(priv, src_ip, dst_ip,
255 src_port, dst_port),
256 filter_chain) {
257 if (filter->src_ip == src_ip &&
258 filter->dst_ip == dst_ip &&
259 filter->ip_proto == ip_proto &&
260 filter->src_port == src_port &&
261 filter->dst_port == dst_port) {
262 ret = filter;
263 break;
264 }
265 }
266
267 return ret;
268}
269
270static int
271mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
272 u16 rxq_index, u32 flow_id)
273{
274 struct mlx4_en_priv *priv = netdev_priv(net_dev);
275 struct mlx4_en_filter *filter;
276 const struct iphdr *ip;
277 const __be16 *ports;
278 u8 ip_proto;
279 __be32 src_ip;
280 __be32 dst_ip;
281 __be16 src_port;
282 __be16 dst_port;
283 int nhoff = skb_network_offset(skb);
284 int ret = 0;
285
286 if (skb->protocol != htons(ETH_P_IP))
287 return -EPROTONOSUPPORT;
288
289 ip = (const struct iphdr *)(skb->data + nhoff);
290 if (ip_is_fragment(ip))
291 return -EPROTONOSUPPORT;
292
293 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
294 return -EPROTONOSUPPORT;
295 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
296
297 ip_proto = ip->protocol;
298 src_ip = ip->saddr;
299 dst_ip = ip->daddr;
300 src_port = ports[0];
301 dst_port = ports[1];
302
303 spin_lock_bh(&priv->filters_lock);
304 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
305 src_port, dst_port);
306 if (filter) {
307 if (filter->rxq_index == rxq_index)
308 goto out;
309
310 filter->rxq_index = rxq_index;
311 } else {
312 filter = mlx4_en_filter_alloc(priv, rxq_index,
313 src_ip, dst_ip, ip_proto,
314 src_port, dst_port, flow_id);
315 if (!filter) {
316 ret = -ENOMEM;
317 goto err;
318 }
319 }
320
321 queue_work(priv->mdev->workqueue, &filter->work);
322
323out:
324 ret = filter->id;
325err:
326 spin_unlock_bh(&priv->filters_lock);
327
328 return ret;
329}
330
331void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
332{
333 struct mlx4_en_filter *filter, *tmp;
334 LIST_HEAD(del_list);
335
336 spin_lock_bh(&priv->filters_lock);
337 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
338 list_move(&filter->next, &del_list);
339 hlist_del(&filter->filter_chain);
340 }
341 spin_unlock_bh(&priv->filters_lock);
342
343 list_for_each_entry_safe(filter, tmp, &del_list, next) {
344 cancel_work_sync(&filter->work);
345 mlx4_en_filter_free(filter);
346 }
347}
348
349static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
350{
351 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
352 LIST_HEAD(del_list);
353 int i = 0;
354
355 spin_lock_bh(&priv->filters_lock);
356 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
357 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
358 break;
359
360 if (filter->activated &&
361 !work_pending(&filter->work) &&
362 rps_may_expire_flow(priv->dev,
363 filter->rxq_index, filter->flow_id,
364 filter->id)) {
365 list_move(&filter->next, &del_list);
366 hlist_del(&filter->filter_chain);
367 } else
368 last_filter = filter;
369
370 i++;
371 }
372
373 if (last_filter && (&last_filter->next != priv->filters.next))
374 list_move(&priv->filters, &last_filter->next);
375
376 spin_unlock_bh(&priv->filters_lock);
377
378 list_for_each_entry_safe(filter, tmp, &del_list, next)
379 mlx4_en_filter_free(filter);
380}
381#endif
382
383static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
384 __be16 proto, u16 vid)
385{
386 struct mlx4_en_priv *priv = netdev_priv(dev);
387 struct mlx4_en_dev *mdev = priv->mdev;
388 int err;
389 int idx;
390
391 en_dbg(HW, priv, "adding VLAN:%d\n", vid);
392
393 set_bit(vid, priv->active_vlans);
394
395
396 mutex_lock(&mdev->state_lock);
397 if (mdev->device_up && priv->port_up) {
398 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
399 if (err)
400 en_err(priv, "Failed configuring VLAN filter\n");
401 }
402 if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
403 en_dbg(HW, priv, "failed adding vlan %d\n", vid);
404 mutex_unlock(&mdev->state_lock);
405
406 return 0;
407}
408
409static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
410 __be16 proto, u16 vid)
411{
412 struct mlx4_en_priv *priv = netdev_priv(dev);
413 struct mlx4_en_dev *mdev = priv->mdev;
414 int err;
415
416 en_dbg(HW, priv, "Killing VID:%d\n", vid);
417
418 clear_bit(vid, priv->active_vlans);
419
420
421 mutex_lock(&mdev->state_lock);
422 mlx4_unregister_vlan(mdev->dev, priv->port, vid);
423
424 if (mdev->device_up && priv->port_up) {
425 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
426 if (err)
427 en_err(priv, "Failed configuring VLAN filter\n");
428 }
429 mutex_unlock(&mdev->state_lock);
430
431 return 0;
432}
433
434static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
435{
436 int i;
437 for (i = ETH_ALEN - 1; i >= 0; --i) {
438 dst_mac[i] = src_mac & 0xff;
439 src_mac >>= 8;
440 }
441 memset(&dst_mac[ETH_ALEN], 0, 2);
442}
443
444
445static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
446 int qpn, u64 *reg_id)
447{
448 int err;
449
450 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
451 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
452 return 0;
453
454 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
455 MLX4_DOMAIN_NIC, reg_id);
456 if (err) {
457 en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
458 return err;
459 }
460 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
461 return 0;
462}
463
464
465static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
466 unsigned char *mac, int *qpn, u64 *reg_id)
467{
468 struct mlx4_en_dev *mdev = priv->mdev;
469 struct mlx4_dev *dev = mdev->dev;
470 int err;
471
472 switch (dev->caps.steering_mode) {
473 case MLX4_STEERING_MODE_B0: {
474 struct mlx4_qp qp;
475 u8 gid[16] = {0};
476
477 qp.qpn = *qpn;
478 memcpy(&gid[10], mac, ETH_ALEN);
479 gid[5] = priv->port;
480
481 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
482 break;
483 }
484 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
485 struct mlx4_spec_list spec_eth = { {NULL} };
486 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
487
488 struct mlx4_net_trans_rule rule = {
489 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
490 .exclusive = 0,
491 .allow_loopback = 1,
492 .promisc_mode = MLX4_FS_REGULAR,
493 .priority = MLX4_DOMAIN_NIC,
494 };
495
496 rule.port = priv->port;
497 rule.qpn = *qpn;
498 INIT_LIST_HEAD(&rule.list);
499
500 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
501 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
502 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
503 list_add_tail(&spec_eth.list, &rule.list);
504
505 err = mlx4_flow_attach(dev, &rule, reg_id);
506 break;
507 }
508 default:
509 return -EINVAL;
510 }
511 if (err)
512 en_warn(priv, "Failed Attaching Unicast\n");
513
514 return err;
515}
516
517static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
518 unsigned char *mac, int qpn, u64 reg_id)
519{
520 struct mlx4_en_dev *mdev = priv->mdev;
521 struct mlx4_dev *dev = mdev->dev;
522
523 switch (dev->caps.steering_mode) {
524 case MLX4_STEERING_MODE_B0: {
525 struct mlx4_qp qp;
526 u8 gid[16] = {0};
527
528 qp.qpn = qpn;
529 memcpy(&gid[10], mac, ETH_ALEN);
530 gid[5] = priv->port;
531
532 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
533 break;
534 }
535 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
536 mlx4_flow_detach(dev, reg_id);
537 break;
538 }
539 default:
540 en_err(priv, "Invalid steering mode.\n");
541 }
542}
543
544static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
545{
546 struct mlx4_en_dev *mdev = priv->mdev;
547 struct mlx4_dev *dev = mdev->dev;
548 int index = 0;
549 int err = 0;
550 int *qpn = &priv->base_qpn;
551 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
552
553 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
554 priv->dev->dev_addr);
555 index = mlx4_register_mac(dev, priv->port, mac);
556 if (index < 0) {
557 err = index;
558 en_err(priv, "Failed adding MAC: %pM\n",
559 priv->dev->dev_addr);
560 return err;
561 }
562
563 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
564 int base_qpn = mlx4_get_base_qpn(dev, priv->port);
565 *qpn = base_qpn + index;
566 return 0;
567 }
568
569 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP);
570 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
571 if (err) {
572 en_err(priv, "Failed to reserve qp for mac registration\n");
573 mlx4_unregister_mac(dev, priv->port, mac);
574 return err;
575 }
576
577 return 0;
578}
579
580static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
581{
582 struct mlx4_en_dev *mdev = priv->mdev;
583 struct mlx4_dev *dev = mdev->dev;
584 int qpn = priv->base_qpn;
585
586 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
587 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
588 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
589 priv->dev->dev_addr);
590 mlx4_unregister_mac(dev, priv->port, mac);
591 } else {
592 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
593 priv->port, qpn);
594 mlx4_qp_release_range(dev, qpn, 1);
595 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
596 }
597}
598
599static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
600 unsigned char *new_mac, unsigned char *prev_mac)
601{
602 struct mlx4_en_dev *mdev = priv->mdev;
603 struct mlx4_dev *dev = mdev->dev;
604 int err = 0;
605 u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
606
607 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
608 struct hlist_head *bucket;
609 unsigned int mac_hash;
610 struct mlx4_mac_entry *entry;
611 struct hlist_node *tmp;
612 u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
613
614 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
615 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
616 if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
617 mlx4_en_uc_steer_release(priv, entry->mac,
618 qpn, entry->reg_id);
619 mlx4_unregister_mac(dev, priv->port,
620 prev_mac_u64);
621 hlist_del_rcu(&entry->hlist);
622 synchronize_rcu();
623 memcpy(entry->mac, new_mac, ETH_ALEN);
624 entry->reg_id = 0;
625 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
626 hlist_add_head_rcu(&entry->hlist,
627 &priv->mac_hash[mac_hash]);
628 mlx4_register_mac(dev, priv->port, new_mac_u64);
629 err = mlx4_en_uc_steer_add(priv, new_mac,
630 &qpn,
631 &entry->reg_id);
632 if (err)
633 return err;
634 if (priv->tunnel_reg_id) {
635 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
636 priv->tunnel_reg_id = 0;
637 }
638 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
639 &priv->tunnel_reg_id);
640 return err;
641 }
642 }
643 return -EINVAL;
644 }
645
646 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
647}
648
649static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
650 unsigned char new_mac[ETH_ALEN + 2])
651{
652 int err = 0;
653
654 if (priv->port_up) {
655
656 err = mlx4_en_replace_mac(priv, priv->base_qpn,
657 new_mac, priv->current_mac);
658 if (err)
659 en_err(priv, "Failed changing HW MAC address\n");
660 } else
661 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
662
663 if (!err)
664 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
665
666 return err;
667}
668
669static int mlx4_en_set_mac(struct net_device *dev, void *addr)
670{
671 struct mlx4_en_priv *priv = netdev_priv(dev);
672 struct mlx4_en_dev *mdev = priv->mdev;
673 struct sockaddr *saddr = addr;
674 unsigned char new_mac[ETH_ALEN + 2];
675 int err;
676
677 if (!is_valid_ether_addr(saddr->sa_data))
678 return -EADDRNOTAVAIL;
679
680 mutex_lock(&mdev->state_lock);
681 memcpy(new_mac, saddr->sa_data, ETH_ALEN);
682 err = mlx4_en_do_set_mac(priv, new_mac);
683 if (!err)
684 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
685 mutex_unlock(&mdev->state_lock);
686
687 return err;
688}
689
690static void mlx4_en_clear_list(struct net_device *dev)
691{
692 struct mlx4_en_priv *priv = netdev_priv(dev);
693 struct mlx4_en_mc_list *tmp, *mc_to_del;
694
695 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
696 list_del(&mc_to_del->list);
697 kfree(mc_to_del);
698 }
699}
700
701static void mlx4_en_cache_mclist(struct net_device *dev)
702{
703 struct mlx4_en_priv *priv = netdev_priv(dev);
704 struct netdev_hw_addr *ha;
705 struct mlx4_en_mc_list *tmp;
706
707 mlx4_en_clear_list(dev);
708 netdev_for_each_mc_addr(ha, dev) {
709 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
710 if (!tmp) {
711 mlx4_en_clear_list(dev);
712 return;
713 }
714 memcpy(tmp->addr, ha->addr, ETH_ALEN);
715 list_add_tail(&tmp->list, &priv->mc_list);
716 }
717}
718
719static void update_mclist_flags(struct mlx4_en_priv *priv,
720 struct list_head *dst,
721 struct list_head *src)
722{
723 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
724 bool found;
725
726
727
728
729 list_for_each_entry(dst_tmp, dst, list) {
730 found = false;
731 list_for_each_entry(src_tmp, src, list) {
732 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
733 found = true;
734 break;
735 }
736 }
737 if (!found)
738 dst_tmp->action = MCLIST_REM;
739 }
740
741
742
743
744 list_for_each_entry(src_tmp, src, list) {
745 found = false;
746 list_for_each_entry(dst_tmp, dst, list) {
747 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
748 dst_tmp->action = MCLIST_NONE;
749 found = true;
750 break;
751 }
752 }
753 if (!found) {
754 new_mc = kmemdup(src_tmp,
755 sizeof(struct mlx4_en_mc_list),
756 GFP_KERNEL);
757 if (!new_mc)
758 return;
759
760 new_mc->action = MCLIST_ADD;
761 list_add_tail(&new_mc->list, dst);
762 }
763 }
764}
765
766static void mlx4_en_set_rx_mode(struct net_device *dev)
767{
768 struct mlx4_en_priv *priv = netdev_priv(dev);
769
770 if (!priv->port_up)
771 return;
772
773 queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
774}
775
776static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
777 struct mlx4_en_dev *mdev)
778{
779 int err = 0;
780
781 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
782 if (netif_msg_rx_status(priv))
783 en_warn(priv, "Entering promiscuous mode\n");
784 priv->flags |= MLX4_EN_FLAG_PROMISC;
785
786
787 switch (mdev->dev->caps.steering_mode) {
788 case MLX4_STEERING_MODE_DEVICE_MANAGED:
789 err = mlx4_flow_steer_promisc_add(mdev->dev,
790 priv->port,
791 priv->base_qpn,
792 MLX4_FS_ALL_DEFAULT);
793 if (err)
794 en_err(priv, "Failed enabling promiscuous mode\n");
795 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
796 break;
797
798 case MLX4_STEERING_MODE_B0:
799 err = mlx4_unicast_promisc_add(mdev->dev,
800 priv->base_qpn,
801 priv->port);
802 if (err)
803 en_err(priv, "Failed enabling unicast promiscuous mode\n");
804
805
806
807
808 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
809 err = mlx4_multicast_promisc_add(mdev->dev,
810 priv->base_qpn,
811 priv->port);
812 if (err)
813 en_err(priv, "Failed enabling multicast promiscuous mode\n");
814 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
815 }
816 break;
817
818 case MLX4_STEERING_MODE_A0:
819 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
820 priv->port,
821 priv->base_qpn,
822 1);
823 if (err)
824 en_err(priv, "Failed enabling promiscuous mode\n");
825 break;
826 }
827
828
829 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
830 0, MLX4_MCAST_DISABLE);
831 if (err)
832 en_err(priv, "Failed disabling multicast filter\n");
833 }
834}
835
836static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
837 struct mlx4_en_dev *mdev)
838{
839 int err = 0;
840
841 if (netif_msg_rx_status(priv))
842 en_warn(priv, "Leaving promiscuous mode\n");
843 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
844
845
846 switch (mdev->dev->caps.steering_mode) {
847 case MLX4_STEERING_MODE_DEVICE_MANAGED:
848 err = mlx4_flow_steer_promisc_remove(mdev->dev,
849 priv->port,
850 MLX4_FS_ALL_DEFAULT);
851 if (err)
852 en_err(priv, "Failed disabling promiscuous mode\n");
853 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
854 break;
855
856 case MLX4_STEERING_MODE_B0:
857 err = mlx4_unicast_promisc_remove(mdev->dev,
858 priv->base_qpn,
859 priv->port);
860 if (err)
861 en_err(priv, "Failed disabling unicast promiscuous mode\n");
862
863 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
864 err = mlx4_multicast_promisc_remove(mdev->dev,
865 priv->base_qpn,
866 priv->port);
867 if (err)
868 en_err(priv, "Failed disabling multicast promiscuous mode\n");
869 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
870 }
871 break;
872
873 case MLX4_STEERING_MODE_A0:
874 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
875 priv->port,
876 priv->base_qpn, 0);
877 if (err)
878 en_err(priv, "Failed disabling promiscuous mode\n");
879 break;
880 }
881}
882
883static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
884 struct net_device *dev,
885 struct mlx4_en_dev *mdev)
886{
887 struct mlx4_en_mc_list *mclist, *tmp;
888 u64 mcast_addr = 0;
889 u8 mc_list[16] = {0};
890 int err = 0;
891
892
893 if (dev->flags & IFF_ALLMULTI) {
894 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
895 0, MLX4_MCAST_DISABLE);
896 if (err)
897 en_err(priv, "Failed disabling multicast filter\n");
898
899
900 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
901 switch (mdev->dev->caps.steering_mode) {
902 case MLX4_STEERING_MODE_DEVICE_MANAGED:
903 err = mlx4_flow_steer_promisc_add(mdev->dev,
904 priv->port,
905 priv->base_qpn,
906 MLX4_FS_MC_DEFAULT);
907 break;
908
909 case MLX4_STEERING_MODE_B0:
910 err = mlx4_multicast_promisc_add(mdev->dev,
911 priv->base_qpn,
912 priv->port);
913 break;
914
915 case MLX4_STEERING_MODE_A0:
916 break;
917 }
918 if (err)
919 en_err(priv, "Failed entering multicast promisc mode\n");
920 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
921 }
922 } else {
923
924 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
925 switch (mdev->dev->caps.steering_mode) {
926 case MLX4_STEERING_MODE_DEVICE_MANAGED:
927 err = mlx4_flow_steer_promisc_remove(mdev->dev,
928 priv->port,
929 MLX4_FS_MC_DEFAULT);
930 break;
931
932 case MLX4_STEERING_MODE_B0:
933 err = mlx4_multicast_promisc_remove(mdev->dev,
934 priv->base_qpn,
935 priv->port);
936 break;
937
938 case MLX4_STEERING_MODE_A0:
939 break;
940 }
941 if (err)
942 en_err(priv, "Failed disabling multicast promiscuous mode\n");
943 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
944 }
945
946 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
947 0, MLX4_MCAST_DISABLE);
948 if (err)
949 en_err(priv, "Failed disabling multicast filter\n");
950
951
952 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
953 1, MLX4_MCAST_CONFIG);
954
955
956
957 netif_addr_lock_bh(dev);
958 mlx4_en_cache_mclist(dev);
959 netif_addr_unlock_bh(dev);
960 list_for_each_entry(mclist, &priv->mc_list, list) {
961 mcast_addr = mlx4_mac_to_u64(mclist->addr);
962 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
963 mcast_addr, 0, MLX4_MCAST_CONFIG);
964 }
965 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
966 0, MLX4_MCAST_ENABLE);
967 if (err)
968 en_err(priv, "Failed enabling multicast filter\n");
969
970 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
971 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
972 if (mclist->action == MCLIST_REM) {
973
974 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
975 mc_list[5] = priv->port;
976 err = mlx4_multicast_detach(mdev->dev,
977 &priv->rss_map.indir_qp,
978 mc_list,
979 MLX4_PROT_ETH,
980 mclist->reg_id);
981 if (err)
982 en_err(priv, "Fail to detach multicast address\n");
983
984 if (mclist->tunnel_reg_id) {
985 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
986 if (err)
987 en_err(priv, "Failed to detach multicast address\n");
988 }
989
990
991 list_del(&mclist->list);
992 kfree(mclist);
993 } else if (mclist->action == MCLIST_ADD) {
994
995 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
996
997 mc_list[5] = priv->port;
998 err = mlx4_multicast_attach(mdev->dev,
999 &priv->rss_map.indir_qp,
1000 mc_list,
1001 priv->port, 0,
1002 MLX4_PROT_ETH,
1003 &mclist->reg_id);
1004 if (err)
1005 en_err(priv, "Fail to attach multicast address\n");
1006
1007 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
1008 &mclist->tunnel_reg_id);
1009 if (err)
1010 en_err(priv, "Failed to attach multicast address\n");
1011 }
1012 }
1013 }
1014}
1015
1016static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
1017 struct net_device *dev,
1018 struct mlx4_en_dev *mdev)
1019{
1020 struct netdev_hw_addr *ha;
1021 struct mlx4_mac_entry *entry;
1022 struct hlist_node *tmp;
1023 bool found;
1024 u64 mac;
1025 int err = 0;
1026 struct hlist_head *bucket;
1027 unsigned int i;
1028 int removed = 0;
1029 u32 prev_flags;
1030
1031
1032
1033
1034
1035
1036 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1037 bucket = &priv->mac_hash[i];
1038 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1039 found = false;
1040 netdev_for_each_uc_addr(ha, dev) {
1041 if (ether_addr_equal_64bits(entry->mac,
1042 ha->addr)) {
1043 found = true;
1044 break;
1045 }
1046 }
1047
1048
1049 if (ether_addr_equal_64bits(entry->mac,
1050 priv->current_mac))
1051 found = true;
1052
1053 if (!found) {
1054 mac = mlx4_mac_to_u64(entry->mac);
1055 mlx4_en_uc_steer_release(priv, entry->mac,
1056 priv->base_qpn,
1057 entry->reg_id);
1058 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1059
1060 hlist_del_rcu(&entry->hlist);
1061 kfree_rcu(entry, rcu);
1062 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
1063 entry->mac, priv->port);
1064 ++removed;
1065 }
1066 }
1067 }
1068
1069
1070
1071
1072 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
1073 return;
1074
1075 prev_flags = priv->flags;
1076 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
1077
1078
1079 netdev_for_each_uc_addr(ha, dev) {
1080 found = false;
1081 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
1082 hlist_for_each_entry(entry, bucket, hlist) {
1083 if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
1084 found = true;
1085 break;
1086 }
1087 }
1088
1089 if (!found) {
1090 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1091 if (!entry) {
1092 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
1093 ha->addr, priv->port);
1094 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1095 break;
1096 }
1097 mac = mlx4_mac_to_u64(ha->addr);
1098 memcpy(entry->mac, ha->addr, ETH_ALEN);
1099 err = mlx4_register_mac(mdev->dev, priv->port, mac);
1100 if (err < 0) {
1101 en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
1102 ha->addr, priv->port, err);
1103 kfree(entry);
1104 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1105 break;
1106 }
1107 err = mlx4_en_uc_steer_add(priv, ha->addr,
1108 &priv->base_qpn,
1109 &entry->reg_id);
1110 if (err) {
1111 en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
1112 ha->addr, priv->port, err);
1113 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1114 kfree(entry);
1115 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1116 break;
1117 } else {
1118 unsigned int mac_hash;
1119 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
1120 ha->addr, priv->port);
1121 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
1122 bucket = &priv->mac_hash[mac_hash];
1123 hlist_add_head_rcu(&entry->hlist, bucket);
1124 }
1125 }
1126 }
1127
1128 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1129 en_warn(priv, "Forcing promiscuous mode on port:%d\n",
1130 priv->port);
1131 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1132 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
1133 priv->port);
1134 }
1135}
1136
1137static void mlx4_en_do_set_rx_mode(struct work_struct *work)
1138{
1139 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1140 rx_mode_task);
1141 struct mlx4_en_dev *mdev = priv->mdev;
1142 struct net_device *dev = priv->dev;
1143
1144 mutex_lock(&mdev->state_lock);
1145 if (!mdev->device_up) {
1146 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
1147 goto out;
1148 }
1149 if (!priv->port_up) {
1150 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
1151 goto out;
1152 }
1153
1154 if (!netif_carrier_ok(dev)) {
1155 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
1156 if (priv->port_state.link_state) {
1157 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
1158 netif_carrier_on(dev);
1159 en_dbg(LINK, priv, "Link Up\n");
1160 }
1161 }
1162 }
1163
1164 if (dev->priv_flags & IFF_UNICAST_FLT)
1165 mlx4_en_do_uc_filter(priv, dev, mdev);
1166
1167
1168 if ((dev->flags & IFF_PROMISC) ||
1169 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
1170 mlx4_en_set_promisc_mode(priv, mdev);
1171 goto out;
1172 }
1173
1174
1175 if (priv->flags & MLX4_EN_FLAG_PROMISC)
1176 mlx4_en_clear_promisc_mode(priv, mdev);
1177
1178 mlx4_en_do_multicast(priv, dev, mdev);
1179out:
1180 mutex_unlock(&mdev->state_lock);
1181}
1182
1183#ifdef CONFIG_NET_POLL_CONTROLLER
1184static void mlx4_en_netpoll(struct net_device *dev)
1185{
1186 struct mlx4_en_priv *priv = netdev_priv(dev);
1187 struct mlx4_en_cq *cq;
1188 int i;
1189
1190 for (i = 0; i < priv->rx_ring_num; i++) {
1191 cq = priv->rx_cq[i];
1192 napi_schedule(&cq->napi);
1193 }
1194}
1195#endif
1196
1197static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
1198{
1199 u64 reg_id;
1200 int err = 0;
1201 int *qpn = &priv->base_qpn;
1202 struct mlx4_mac_entry *entry;
1203
1204 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id);
1205 if (err)
1206 return err;
1207
1208 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
1209 &priv->tunnel_reg_id);
1210 if (err)
1211 goto tunnel_err;
1212
1213 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1214 if (!entry) {
1215 err = -ENOMEM;
1216 goto alloc_err;
1217 }
1218
1219 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
1220 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
1221 entry->reg_id = reg_id;
1222 hlist_add_head_rcu(&entry->hlist,
1223 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
1224
1225 return 0;
1226
1227alloc_err:
1228 if (priv->tunnel_reg_id)
1229 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1230
1231tunnel_err:
1232 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
1233 return err;
1234}
1235
1236static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)
1237{
1238 u64 mac;
1239 unsigned int i;
1240 int qpn = priv->base_qpn;
1241 struct hlist_head *bucket;
1242 struct hlist_node *tmp;
1243 struct mlx4_mac_entry *entry;
1244
1245 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1246 bucket = &priv->mac_hash[i];
1247 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1248 mac = mlx4_mac_to_u64(entry->mac);
1249 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",
1250 entry->mac);
1251 mlx4_en_uc_steer_release(priv, entry->mac,
1252 qpn, entry->reg_id);
1253
1254 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);
1255 hlist_del_rcu(&entry->hlist);
1256 kfree_rcu(entry, rcu);
1257 }
1258 }
1259
1260 if (priv->tunnel_reg_id) {
1261 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1262 priv->tunnel_reg_id = 0;
1263 }
1264}
1265
1266static void mlx4_en_tx_timeout(struct net_device *dev)
1267{
1268 struct mlx4_en_priv *priv = netdev_priv(dev);
1269 struct mlx4_en_dev *mdev = priv->mdev;
1270 int i;
1271
1272 if (netif_msg_timer(priv))
1273 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
1274
1275 for (i = 0; i < priv->tx_ring_num; i++) {
1276 if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
1277 continue;
1278 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
1279 i, priv->tx_ring[i]->qpn, priv->tx_ring[i]->cqn,
1280 priv->tx_ring[i]->cons, priv->tx_ring[i]->prod);
1281 }
1282
1283 priv->port_stats.tx_timeout++;
1284 en_dbg(DRV, priv, "Scheduling watchdog\n");
1285 queue_work(mdev->workqueue, &priv->watchdog_task);
1286}
1287
1288
1289static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
1290{
1291 struct mlx4_en_priv *priv = netdev_priv(dev);
1292
1293 spin_lock_bh(&priv->stats_lock);
1294 memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
1295 spin_unlock_bh(&priv->stats_lock);
1296
1297 return &priv->ret_stats;
1298}
1299
1300static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
1301{
1302 struct mlx4_en_cq *cq;
1303 int i;
1304
1305
1306
1307
1308
1309
1310
1311 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
1312 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
1313 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
1314 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
1315 en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
1316 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
1317
1318
1319 for (i = 0; i < priv->rx_ring_num; i++) {
1320 cq = priv->rx_cq[i];
1321 cq->moder_cnt = priv->rx_frames;
1322 cq->moder_time = priv->rx_usecs;
1323 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
1324 priv->last_moder_packets[i] = 0;
1325 priv->last_moder_bytes[i] = 0;
1326 }
1327
1328 for (i = 0; i < priv->tx_ring_num; i++) {
1329 cq = priv->tx_cq[i];
1330 cq->moder_cnt = priv->tx_frames;
1331 cq->moder_time = priv->tx_usecs;
1332 }
1333
1334
1335 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
1336 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
1337 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
1338 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
1339 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
1340 priv->adaptive_rx_coal = 1;
1341 priv->last_moder_jiffies = 0;
1342 priv->last_moder_tx_packets = 0;
1343}
1344
1345static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
1346{
1347 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
1348 struct mlx4_en_cq *cq;
1349 unsigned long packets;
1350 unsigned long rate;
1351 unsigned long avg_pkt_size;
1352 unsigned long rx_packets;
1353 unsigned long rx_bytes;
1354 unsigned long rx_pkt_diff;
1355 int moder_time;
1356 int ring, err;
1357
1358 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
1359 return;
1360
1361 for (ring = 0; ring < priv->rx_ring_num; ring++) {
1362 spin_lock_bh(&priv->stats_lock);
1363 rx_packets = priv->rx_ring[ring]->packets;
1364 rx_bytes = priv->rx_ring[ring]->bytes;
1365 spin_unlock_bh(&priv->stats_lock);
1366
1367 rx_pkt_diff = ((unsigned long) (rx_packets -
1368 priv->last_moder_packets[ring]));
1369 packets = rx_pkt_diff;
1370 rate = packets * HZ / period;
1371 avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
1372 priv->last_moder_bytes[ring])) / packets : 0;
1373
1374
1375
1376 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
1377 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
1378 if (rate < priv->pkt_rate_low)
1379 moder_time = priv->rx_usecs_low;
1380 else if (rate > priv->pkt_rate_high)
1381 moder_time = priv->rx_usecs_high;
1382 else
1383 moder_time = (rate - priv->pkt_rate_low) *
1384 (priv->rx_usecs_high - priv->rx_usecs_low) /
1385 (priv->pkt_rate_high - priv->pkt_rate_low) +
1386 priv->rx_usecs_low;
1387 } else {
1388 moder_time = priv->rx_usecs_low;
1389 }
1390
1391 if (moder_time != priv->last_moder_time[ring]) {
1392 priv->last_moder_time[ring] = moder_time;
1393 cq = priv->rx_cq[ring];
1394 cq->moder_time = moder_time;
1395 cq->moder_cnt = priv->rx_frames;
1396 err = mlx4_en_set_cq_moder(priv, cq);
1397 if (err)
1398 en_err(priv, "Failed modifying moderation for cq:%d\n",
1399 ring);
1400 }
1401 priv->last_moder_packets[ring] = rx_packets;
1402 priv->last_moder_bytes[ring] = rx_bytes;
1403 }
1404
1405 priv->last_moder_jiffies = jiffies;
1406}
1407
1408static void mlx4_en_do_get_stats(struct work_struct *work)
1409{
1410 struct delayed_work *delay = to_delayed_work(work);
1411 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1412 stats_task);
1413 struct mlx4_en_dev *mdev = priv->mdev;
1414 int err;
1415
1416 mutex_lock(&mdev->state_lock);
1417 if (mdev->device_up) {
1418 if (priv->port_up) {
1419 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
1420 if (err)
1421 en_dbg(HW, priv, "Could not update stats\n");
1422
1423 mlx4_en_auto_moderation(priv);
1424 }
1425
1426 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1427 }
1428 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
1429 mlx4_en_do_set_mac(priv, priv->current_mac);
1430 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
1431 }
1432 mutex_unlock(&mdev->state_lock);
1433}
1434
1435
1436
1437
1438static void mlx4_en_service_task(struct work_struct *work)
1439{
1440 struct delayed_work *delay = to_delayed_work(work);
1441 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1442 service_task);
1443 struct mlx4_en_dev *mdev = priv->mdev;
1444
1445 mutex_lock(&mdev->state_lock);
1446 if (mdev->device_up) {
1447 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
1448 mlx4_en_ptp_overflow_check(mdev);
1449
1450 mlx4_en_recover_from_oom(priv);
1451 queue_delayed_work(mdev->workqueue, &priv->service_task,
1452 SERVICE_TASK_DELAY);
1453 }
1454 mutex_unlock(&mdev->state_lock);
1455}
1456
1457static void mlx4_en_linkstate(struct work_struct *work)
1458{
1459 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1460 linkstate_task);
1461 struct mlx4_en_dev *mdev = priv->mdev;
1462 int linkstate = priv->link_state;
1463
1464 mutex_lock(&mdev->state_lock);
1465
1466
1467 if (priv->last_link_state != linkstate) {
1468 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
1469 en_info(priv, "Link Down\n");
1470 netif_carrier_off(priv->dev);
1471 } else {
1472 en_info(priv, "Link Up\n");
1473 netif_carrier_on(priv->dev);
1474 }
1475 }
1476 priv->last_link_state = linkstate;
1477 mutex_unlock(&mdev->state_lock);
1478}
1479
1480static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1481{
1482 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
1483 int numa_node = priv->mdev->dev->numa_node;
1484
1485 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
1486 return -ENOMEM;
1487
1488 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
1489 ring->affinity_mask);
1490 return 0;
1491}
1492
1493static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1494{
1495 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
1496}
1497
1498int mlx4_en_start_port(struct net_device *dev)
1499{
1500 struct mlx4_en_priv *priv = netdev_priv(dev);
1501 struct mlx4_en_dev *mdev = priv->mdev;
1502 struct mlx4_en_cq *cq;
1503 struct mlx4_en_tx_ring *tx_ring;
1504 int rx_index = 0;
1505 int tx_index = 0;
1506 int err = 0;
1507 int i;
1508 int j;
1509 u8 mc_list[16] = {0};
1510
1511 if (priv->port_up) {
1512 en_dbg(DRV, priv, "start port called while port already up\n");
1513 return 0;
1514 }
1515
1516 INIT_LIST_HEAD(&priv->mc_list);
1517 INIT_LIST_HEAD(&priv->curr_list);
1518 INIT_LIST_HEAD(&priv->ethtool_list);
1519 memset(&priv->ethtool_rules[0], 0,
1520 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
1521
1522
1523 dev->mtu = min(dev->mtu, priv->max_mtu);
1524 mlx4_en_calc_rx_buf(dev);
1525 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
1526
1527
1528 err = mlx4_en_activate_rx_rings(priv);
1529 if (err) {
1530 en_err(priv, "Failed to activate RX rings\n");
1531 return err;
1532 }
1533 for (i = 0; i < priv->rx_ring_num; i++) {
1534 cq = priv->rx_cq[i];
1535
1536 err = mlx4_en_init_affinity_hint(priv, i);
1537 if (err) {
1538 en_err(priv, "Failed preparing IRQ affinity hint\n");
1539 goto cq_err;
1540 }
1541
1542 err = mlx4_en_activate_cq(priv, cq, i);
1543 if (err) {
1544 en_err(priv, "Failed activating Rx CQ\n");
1545 mlx4_en_free_affinity_hint(priv, i);
1546 goto cq_err;
1547 }
1548
1549 for (j = 0; j < cq->size; j++) {
1550 struct mlx4_cqe *cqe = NULL;
1551
1552 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
1553 priv->cqe_factor;
1554 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
1555 }
1556
1557 err = mlx4_en_set_cq_moder(priv, cq);
1558 if (err) {
1559 en_err(priv, "Failed setting cq moderation parameters\n");
1560 mlx4_en_deactivate_cq(priv, cq);
1561 mlx4_en_free_affinity_hint(priv, i);
1562 goto cq_err;
1563 }
1564 mlx4_en_arm_cq(priv, cq);
1565 priv->rx_ring[i]->cqn = cq->mcq.cqn;
1566 ++rx_index;
1567 }
1568
1569
1570 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
1571 err = mlx4_en_get_qp(priv);
1572 if (err) {
1573 en_err(priv, "Failed getting eth qp\n");
1574 goto cq_err;
1575 }
1576 mdev->mac_removed[priv->port] = 0;
1577
1578 priv->counter_index =
1579 mlx4_get_default_counter_index(mdev->dev, priv->port);
1580
1581 err = mlx4_en_config_rss_steer(priv);
1582 if (err) {
1583 en_err(priv, "Failed configuring rss steering\n");
1584 goto mac_err;
1585 }
1586
1587 err = mlx4_en_create_drop_qp(priv);
1588 if (err)
1589 goto rss_err;
1590
1591
1592 for (i = 0; i < priv->tx_ring_num; i++) {
1593
1594 cq = priv->tx_cq[i];
1595 err = mlx4_en_activate_cq(priv, cq, i);
1596 if (err) {
1597 en_err(priv, "Failed allocating Tx CQ\n");
1598 goto tx_err;
1599 }
1600 err = mlx4_en_set_cq_moder(priv, cq);
1601 if (err) {
1602 en_err(priv, "Failed setting cq moderation parameters\n");
1603 mlx4_en_deactivate_cq(priv, cq);
1604 goto tx_err;
1605 }
1606 en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
1607 cq->buf->wqe_index = cpu_to_be16(0xffff);
1608
1609
1610 tx_ring = priv->tx_ring[i];
1611 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
1612 i / priv->num_tx_rings_p_up);
1613 if (err) {
1614 en_err(priv, "Failed allocating Tx ring\n");
1615 mlx4_en_deactivate_cq(priv, cq);
1616 goto tx_err;
1617 }
1618 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
1619
1620
1621 mlx4_en_arm_cq(priv, cq);
1622
1623
1624 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
1625 *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
1626 ++tx_index;
1627 }
1628
1629
1630 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1631 priv->rx_skb_size + ETH_FCS_LEN,
1632 priv->prof->tx_pause,
1633 priv->prof->tx_ppp,
1634 priv->prof->rx_pause,
1635 priv->prof->rx_ppp);
1636 if (err) {
1637 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
1638 priv->port, err);
1639 goto tx_err;
1640 }
1641
1642 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
1643 if (err) {
1644 en_err(priv, "Failed setting default qp numbers\n");
1645 goto tx_err;
1646 }
1647
1648 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
1649 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
1650 if (err) {
1651 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
1652 err);
1653 goto tx_err;
1654 }
1655 }
1656
1657
1658 en_dbg(HW, priv, "Initializing port\n");
1659 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1660 if (err) {
1661 en_err(priv, "Failed Initializing port\n");
1662 goto tx_err;
1663 }
1664
1665
1666 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&
1667 mlx4_en_set_rss_steer_rules(priv))
1668 mlx4_warn(mdev, "Failed setting steering rules\n");
1669
1670
1671 eth_broadcast_addr(&mc_list[10]);
1672 mc_list[5] = priv->port;
1673 if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
1674 priv->port, 0, MLX4_PROT_ETH,
1675 &priv->broadcast_id))
1676 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
1677
1678
1679 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
1680
1681
1682 queue_work(mdev->workqueue, &priv->rx_mode_task);
1683
1684#ifdef CONFIG_MLX4_EN_VXLAN
1685 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
1686 vxlan_get_rx_port(dev);
1687#endif
1688 priv->port_up = true;
1689 netif_tx_start_all_queues(dev);
1690 netif_device_attach(dev);
1691
1692 return 0;
1693
1694tx_err:
1695 while (tx_index--) {
1696 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[tx_index]);
1697 mlx4_en_deactivate_cq(priv, priv->tx_cq[tx_index]);
1698 }
1699 mlx4_en_destroy_drop_qp(priv);
1700rss_err:
1701 mlx4_en_release_rss_steer(priv);
1702mac_err:
1703 mlx4_en_put_qp(priv);
1704cq_err:
1705 while (rx_index--) {
1706 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
1707 mlx4_en_free_affinity_hint(priv, rx_index);
1708 }
1709 for (i = 0; i < priv->rx_ring_num; i++)
1710 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1711
1712 return err;
1713}
1714
1715
1716void mlx4_en_stop_port(struct net_device *dev, int detach)
1717{
1718 struct mlx4_en_priv *priv = netdev_priv(dev);
1719 struct mlx4_en_dev *mdev = priv->mdev;
1720 struct mlx4_en_mc_list *mclist, *tmp;
1721 struct ethtool_flow_id *flow, *tmp_flow;
1722 int i;
1723 u8 mc_list[16] = {0};
1724
1725 if (!priv->port_up) {
1726 en_dbg(DRV, priv, "stop port called while port already down\n");
1727 return;
1728 }
1729
1730
1731 mlx4_CLOSE_PORT(mdev->dev, priv->port);
1732
1733
1734 netif_tx_lock_bh(dev);
1735 if (detach)
1736 netif_device_detach(dev);
1737 netif_tx_stop_all_queues(dev);
1738 netif_tx_unlock_bh(dev);
1739
1740 netif_tx_disable(dev);
1741
1742
1743 priv->port_up = false;
1744 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
1745
1746
1747 if (mdev->dev->caps.steering_mode ==
1748 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1749 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
1750 MLX4_EN_FLAG_MC_PROMISC);
1751 mlx4_flow_steer_promisc_remove(mdev->dev,
1752 priv->port,
1753 MLX4_FS_ALL_DEFAULT);
1754 mlx4_flow_steer_promisc_remove(mdev->dev,
1755 priv->port,
1756 MLX4_FS_MC_DEFAULT);
1757 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
1758 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
1759
1760
1761 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
1762 priv->port);
1763
1764
1765 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1766 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
1767 priv->port);
1768 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1769 }
1770 }
1771
1772
1773 eth_broadcast_addr(&mc_list[10]);
1774 mc_list[5] = priv->port;
1775 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
1776 MLX4_PROT_ETH, priv->broadcast_id);
1777 list_for_each_entry(mclist, &priv->curr_list, list) {
1778 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1779 mc_list[5] = priv->port;
1780 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
1781 mc_list, MLX4_PROT_ETH, mclist->reg_id);
1782 if (mclist->tunnel_reg_id)
1783 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
1784 }
1785 mlx4_en_clear_list(dev);
1786 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1787 list_del(&mclist->list);
1788 kfree(mclist);
1789 }
1790
1791
1792 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
1793
1794
1795 if (mdev->dev->caps.steering_mode ==
1796 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1797 ASSERT_RTNL();
1798 list_for_each_entry_safe(flow, tmp_flow,
1799 &priv->ethtool_list, list) {
1800 mlx4_flow_detach(mdev->dev, flow->id);
1801 list_del(&flow->list);
1802 }
1803 }
1804
1805 mlx4_en_destroy_drop_qp(priv);
1806
1807
1808 for (i = 0; i < priv->tx_ring_num; i++) {
1809 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[i]);
1810 mlx4_en_deactivate_cq(priv, priv->tx_cq[i]);
1811 }
1812 msleep(10);
1813
1814 for (i = 0; i < priv->tx_ring_num; i++)
1815 mlx4_en_free_tx_buf(dev, priv->tx_ring[i]);
1816
1817 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
1818 mlx4_en_delete_rss_steer_rules(priv);
1819
1820
1821 mlx4_en_release_rss_steer(priv);
1822
1823
1824 mlx4_en_put_qp(priv);
1825 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
1826 mdev->mac_removed[priv->port] = 1;
1827
1828
1829 for (i = 0; i < priv->rx_ring_num; i++) {
1830 struct mlx4_en_cq *cq = priv->rx_cq[i];
1831
1832 napi_synchronize(&cq->napi);
1833 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1834 mlx4_en_deactivate_cq(priv, cq);
1835
1836 mlx4_en_free_affinity_hint(priv, i);
1837 }
1838}
1839
1840static void mlx4_en_restart(struct work_struct *work)
1841{
1842 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1843 watchdog_task);
1844 struct mlx4_en_dev *mdev = priv->mdev;
1845 struct net_device *dev = priv->dev;
1846
1847 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
1848
1849 mutex_lock(&mdev->state_lock);
1850 if (priv->port_up) {
1851 mlx4_en_stop_port(dev, 1);
1852 if (mlx4_en_start_port(dev))
1853 en_err(priv, "Failed restarting port %d\n", priv->port);
1854 }
1855 mutex_unlock(&mdev->state_lock);
1856}
1857
1858static void mlx4_en_clear_stats(struct net_device *dev)
1859{
1860 struct mlx4_en_priv *priv = netdev_priv(dev);
1861 struct mlx4_en_dev *mdev = priv->mdev;
1862 int i;
1863
1864 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
1865 en_dbg(HW, priv, "Failed dumping statistics\n");
1866
1867 memset(&priv->stats, 0, sizeof(priv->stats));
1868 memset(&priv->pstats, 0, sizeof(priv->pstats));
1869 memset(&priv->pkstats, 0, sizeof(priv->pkstats));
1870 memset(&priv->port_stats, 0, sizeof(priv->port_stats));
1871 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
1872 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
1873 memset(&priv->rx_priority_flowstats, 0,
1874 sizeof(priv->rx_priority_flowstats));
1875 memset(&priv->tx_priority_flowstats, 0,
1876 sizeof(priv->tx_priority_flowstats));
1877 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));
1878
1879 for (i = 0; i < priv->tx_ring_num; i++) {
1880 priv->tx_ring[i]->bytes = 0;
1881 priv->tx_ring[i]->packets = 0;
1882 priv->tx_ring[i]->tx_csum = 0;
1883 }
1884 for (i = 0; i < priv->rx_ring_num; i++) {
1885 priv->rx_ring[i]->bytes = 0;
1886 priv->rx_ring[i]->packets = 0;
1887 priv->rx_ring[i]->csum_ok = 0;
1888 priv->rx_ring[i]->csum_none = 0;
1889 priv->rx_ring[i]->csum_complete = 0;
1890 }
1891}
1892
1893static int mlx4_en_open(struct net_device *dev)
1894{
1895 struct mlx4_en_priv *priv = netdev_priv(dev);
1896 struct mlx4_en_dev *mdev = priv->mdev;
1897 int err = 0;
1898
1899 mutex_lock(&mdev->state_lock);
1900
1901 if (!mdev->device_up) {
1902 en_err(priv, "Cannot open - device down/disabled\n");
1903 err = -EBUSY;
1904 goto out;
1905 }
1906
1907
1908 mlx4_en_clear_stats(dev);
1909
1910 err = mlx4_en_start_port(dev);
1911 if (err)
1912 en_err(priv, "Failed starting port:%d\n", priv->port);
1913
1914out:
1915 mutex_unlock(&mdev->state_lock);
1916 return err;
1917}
1918
1919
1920static int mlx4_en_close(struct net_device *dev)
1921{
1922 struct mlx4_en_priv *priv = netdev_priv(dev);
1923 struct mlx4_en_dev *mdev = priv->mdev;
1924
1925 en_dbg(IFDOWN, priv, "Close port called\n");
1926
1927 mutex_lock(&mdev->state_lock);
1928
1929 mlx4_en_stop_port(dev, 0);
1930 netif_carrier_off(dev);
1931
1932 mutex_unlock(&mdev->state_lock);
1933 return 0;
1934}
1935
1936void mlx4_en_free_resources(struct mlx4_en_priv *priv)
1937{
1938 int i;
1939
1940#ifdef CONFIG_RFS_ACCEL
1941 priv->dev->rx_cpu_rmap = NULL;
1942#endif
1943
1944 for (i = 0; i < priv->tx_ring_num; i++) {
1945 if (priv->tx_ring && priv->tx_ring[i])
1946 mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
1947 if (priv->tx_cq && priv->tx_cq[i])
1948 mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
1949 }
1950
1951 for (i = 0; i < priv->rx_ring_num; i++) {
1952 if (priv->rx_ring[i])
1953 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
1954 priv->prof->rx_ring_size, priv->stride);
1955 if (priv->rx_cq[i])
1956 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
1957 }
1958
1959}
1960
1961int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
1962{
1963 struct mlx4_en_port_profile *prof = priv->prof;
1964 int i;
1965 int node;
1966
1967
1968 for (i = 0; i < priv->tx_ring_num; i++) {
1969 node = cpu_to_node(i % num_online_cpus());
1970 if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
1971 prof->tx_ring_size, i, TX, node))
1972 goto err;
1973
1974 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i],
1975 prof->tx_ring_size, TXBB_SIZE,
1976 node, i))
1977 goto err;
1978 }
1979
1980
1981 for (i = 0; i < priv->rx_ring_num; i++) {
1982 node = cpu_to_node(i % num_online_cpus());
1983 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
1984 prof->rx_ring_size, i, RX, node))
1985 goto err;
1986
1987 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
1988 prof->rx_ring_size, priv->stride,
1989 node))
1990 goto err;
1991 }
1992
1993#ifdef CONFIG_RFS_ACCEL
1994 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);
1995#endif
1996
1997 return 0;
1998
1999err:
2000 en_err(priv, "Failed to allocate NIC resources\n");
2001 for (i = 0; i < priv->rx_ring_num; i++) {
2002 if (priv->rx_ring[i])
2003 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2004 prof->rx_ring_size,
2005 priv->stride);
2006 if (priv->rx_cq[i])
2007 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2008 }
2009 for (i = 0; i < priv->tx_ring_num; i++) {
2010 if (priv->tx_ring[i])
2011 mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
2012 if (priv->tx_cq[i])
2013 mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
2014 }
2015 return -ENOMEM;
2016}
2017
2018
2019void mlx4_en_destroy_netdev(struct net_device *dev)
2020{
2021 struct mlx4_en_priv *priv = netdev_priv(dev);
2022 struct mlx4_en_dev *mdev = priv->mdev;
2023
2024 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
2025
2026
2027 if (priv->registered)
2028 unregister_netdev(dev);
2029
2030 if (priv->allocated)
2031 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
2032
2033 cancel_delayed_work(&priv->stats_task);
2034 cancel_delayed_work(&priv->service_task);
2035
2036 flush_workqueue(mdev->workqueue);
2037
2038 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
2039 mlx4_en_remove_timestamp(mdev);
2040
2041
2042 mutex_lock(&mdev->state_lock);
2043 mdev->pndev[priv->port] = NULL;
2044 mdev->upper[priv->port] = NULL;
2045 mutex_unlock(&mdev->state_lock);
2046
2047 mlx4_en_free_resources(priv);
2048
2049 kfree(priv->tx_ring);
2050 kfree(priv->tx_cq);
2051
2052 free_netdev(dev);
2053}
2054
2055static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
2056{
2057 struct mlx4_en_priv *priv = netdev_priv(dev);
2058 struct mlx4_en_dev *mdev = priv->mdev;
2059 int err = 0;
2060
2061 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
2062 dev->mtu, new_mtu);
2063
2064 if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
2065 en_err(priv, "Bad MTU size:%d.\n", new_mtu);
2066 return -EPERM;
2067 }
2068 dev->mtu = new_mtu;
2069
2070 if (netif_running(dev)) {
2071 mutex_lock(&mdev->state_lock);
2072 if (!mdev->device_up) {
2073
2074
2075 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
2076 } else {
2077 mlx4_en_stop_port(dev, 1);
2078 err = mlx4_en_start_port(dev);
2079 if (err) {
2080 en_err(priv, "Failed restarting port:%d\n",
2081 priv->port);
2082 queue_work(mdev->workqueue, &priv->watchdog_task);
2083 }
2084 }
2085 mutex_unlock(&mdev->state_lock);
2086 }
2087 return 0;
2088}
2089
2090static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
2091{
2092 struct mlx4_en_priv *priv = netdev_priv(dev);
2093 struct mlx4_en_dev *mdev = priv->mdev;
2094 struct hwtstamp_config config;
2095
2096 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
2097 return -EFAULT;
2098
2099
2100 if (config.flags)
2101 return -EINVAL;
2102
2103
2104 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
2105 return -EINVAL;
2106
2107
2108 switch (config.tx_type) {
2109 case HWTSTAMP_TX_OFF:
2110 case HWTSTAMP_TX_ON:
2111 break;
2112 default:
2113 return -ERANGE;
2114 }
2115
2116
2117 switch (config.rx_filter) {
2118 case HWTSTAMP_FILTER_NONE:
2119 break;
2120 case HWTSTAMP_FILTER_ALL:
2121 case HWTSTAMP_FILTER_SOME:
2122 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
2123 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
2124 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
2125 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
2126 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
2127 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
2128 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
2129 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
2130 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
2131 case HWTSTAMP_FILTER_PTP_V2_EVENT:
2132 case HWTSTAMP_FILTER_PTP_V2_SYNC:
2133 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
2134 config.rx_filter = HWTSTAMP_FILTER_ALL;
2135 break;
2136 default:
2137 return -ERANGE;
2138 }
2139
2140 if (mlx4_en_reset_config(dev, config, dev->features)) {
2141 config.tx_type = HWTSTAMP_TX_OFF;
2142 config.rx_filter = HWTSTAMP_FILTER_NONE;
2143 }
2144
2145 return copy_to_user(ifr->ifr_data, &config,
2146 sizeof(config)) ? -EFAULT : 0;
2147}
2148
2149static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
2150{
2151 struct mlx4_en_priv *priv = netdev_priv(dev);
2152
2153 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
2154 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
2155}
2156
2157static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2158{
2159 switch (cmd) {
2160 case SIOCSHWTSTAMP:
2161 return mlx4_en_hwtstamp_set(dev, ifr);
2162 case SIOCGHWTSTAMP:
2163 return mlx4_en_hwtstamp_get(dev, ifr);
2164 default:
2165 return -EOPNOTSUPP;
2166 }
2167}
2168
2169static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,
2170 netdev_features_t features)
2171{
2172 struct mlx4_en_priv *en_priv = netdev_priv(netdev);
2173 struct mlx4_en_dev *mdev = en_priv->mdev;
2174
2175
2176
2177
2178
2179 if (features & NETIF_F_HW_VLAN_CTAG_RX &&
2180 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
2181 features |= NETIF_F_HW_VLAN_STAG_RX;
2182 else
2183 features &= ~NETIF_F_HW_VLAN_STAG_RX;
2184
2185 return features;
2186}
2187
2188static int mlx4_en_set_features(struct net_device *netdev,
2189 netdev_features_t features)
2190{
2191 struct mlx4_en_priv *priv = netdev_priv(netdev);
2192 bool reset = false;
2193 int ret = 0;
2194
2195 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
2196 en_info(priv, "Turn %s RX-FCS\n",
2197 (features & NETIF_F_RXFCS) ? "ON" : "OFF");
2198 reset = true;
2199 }
2200
2201 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
2202 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
2203
2204 en_info(priv, "Turn %s RX-ALL\n",
2205 ignore_fcs_value ? "ON" : "OFF");
2206 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
2207 priv->port, ignore_fcs_value);
2208 if (ret)
2209 return ret;
2210 }
2211
2212 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
2213 en_info(priv, "Turn %s RX vlan strip offload\n",
2214 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
2215 reset = true;
2216 }
2217
2218 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
2219 en_info(priv, "Turn %s TX vlan strip offload\n",
2220 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
2221
2222 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))
2223 en_info(priv, "Turn %s TX S-VLAN strip offload\n",
2224 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");
2225
2226 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
2227 en_info(priv, "Turn %s loopback\n",
2228 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
2229 mlx4_en_update_loopback_state(netdev, features);
2230 }
2231
2232 if (reset) {
2233 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
2234 features);
2235 if (ret)
2236 return ret;
2237 }
2238
2239 return 0;
2240}
2241
2242static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
2243{
2244 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2245 struct mlx4_en_dev *mdev = en_priv->mdev;
2246 u64 mac_u64 = mlx4_mac_to_u64(mac);
2247
2248 if (is_multicast_ether_addr(mac))
2249 return -EINVAL;
2250
2251 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64);
2252}
2253
2254static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos)
2255{
2256 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2257 struct mlx4_en_dev *mdev = en_priv->mdev;
2258
2259 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos);
2260}
2261
2262static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,
2263 int max_tx_rate)
2264{
2265 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2266 struct mlx4_en_dev *mdev = en_priv->mdev;
2267
2268 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
2269 max_tx_rate);
2270}
2271
2272static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
2273{
2274 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2275 struct mlx4_en_dev *mdev = en_priv->mdev;
2276
2277 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
2278}
2279
2280static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
2281{
2282 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2283 struct mlx4_en_dev *mdev = en_priv->mdev;
2284
2285 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
2286}
2287
2288static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
2289{
2290 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2291 struct mlx4_en_dev *mdev = en_priv->mdev;
2292
2293 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
2294}
2295
2296static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,
2297 struct ifla_vf_stats *vf_stats)
2298{
2299 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2300 struct mlx4_en_dev *mdev = en_priv->mdev;
2301
2302 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);
2303}
2304
2305#define PORT_ID_BYTE_LEN 8
2306static int mlx4_en_get_phys_port_id(struct net_device *dev,
2307 struct netdev_phys_item_id *ppid)
2308{
2309 struct mlx4_en_priv *priv = netdev_priv(dev);
2310 struct mlx4_dev *mdev = priv->mdev->dev;
2311 int i;
2312 u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
2313
2314 if (!phys_port_id)
2315 return -EOPNOTSUPP;
2316
2317 ppid->id_len = sizeof(phys_port_id);
2318 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
2319 ppid->id[i] = phys_port_id & 0xff;
2320 phys_port_id >>= 8;
2321 }
2322 return 0;
2323}
2324
2325#ifdef CONFIG_MLX4_EN_VXLAN
2326static void mlx4_en_add_vxlan_offloads(struct work_struct *work)
2327{
2328 int ret;
2329 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2330 vxlan_add_task);
2331
2332 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
2333 if (ret)
2334 goto out;
2335
2336 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
2337 VXLAN_STEER_BY_OUTER_MAC, 1);
2338out:
2339 if (ret) {
2340 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
2341 return;
2342 }
2343
2344
2345 priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
2346 NETIF_F_TSO | NETIF_F_GSO_UDP_TUNNEL;
2347}
2348
2349static void mlx4_en_del_vxlan_offloads(struct work_struct *work)
2350{
2351 int ret;
2352 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2353 vxlan_del_task);
2354
2355 priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
2356 NETIF_F_TSO | NETIF_F_GSO_UDP_TUNNEL);
2357
2358 ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
2359 VXLAN_STEER_BY_OUTER_MAC, 0);
2360 if (ret)
2361 en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
2362
2363 priv->vxlan_port = 0;
2364}
2365
2366static void mlx4_en_add_vxlan_port(struct net_device *dev,
2367 sa_family_t sa_family, __be16 port)
2368{
2369 struct mlx4_en_priv *priv = netdev_priv(dev);
2370 __be16 current_port;
2371
2372 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
2373 return;
2374
2375 if (sa_family == AF_INET6)
2376 return;
2377
2378 current_port = priv->vxlan_port;
2379 if (current_port && current_port != port) {
2380 en_warn(priv, "vxlan port %d configured, can't add port %d\n",
2381 ntohs(current_port), ntohs(port));
2382 return;
2383 }
2384
2385 priv->vxlan_port = port;
2386 queue_work(priv->mdev->workqueue, &priv->vxlan_add_task);
2387}
2388
2389static void mlx4_en_del_vxlan_port(struct net_device *dev,
2390 sa_family_t sa_family, __be16 port)
2391{
2392 struct mlx4_en_priv *priv = netdev_priv(dev);
2393 __be16 current_port;
2394
2395 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
2396 return;
2397
2398 if (sa_family == AF_INET6)
2399 return;
2400
2401 current_port = priv->vxlan_port;
2402 if (current_port != port) {
2403 en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port));
2404 return;
2405 }
2406
2407 queue_work(priv->mdev->workqueue, &priv->vxlan_del_task);
2408}
2409
2410static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
2411 struct net_device *dev,
2412 netdev_features_t features)
2413{
2414 features = vlan_features_check(skb, features);
2415 return vxlan_features_check(skb, features);
2416}
2417#endif
2418
2419static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
2420{
2421 struct mlx4_en_priv *priv = netdev_priv(dev);
2422 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[queue_index];
2423 struct mlx4_update_qp_params params;
2424 int err;
2425
2426 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
2427 return -EOPNOTSUPP;
2428
2429
2430 if (maxrate >> 12) {
2431 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
2432 params.rate_val = maxrate / 1000;
2433 } else if (maxrate) {
2434 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
2435 params.rate_val = maxrate;
2436 } else {
2437 params.rate_unit = 0;
2438 params.rate_val = 0;
2439 }
2440
2441 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
2442 ¶ms);
2443 return err;
2444}
2445
2446static const struct net_device_ops mlx4_netdev_ops = {
2447 .ndo_open = mlx4_en_open,
2448 .ndo_stop = mlx4_en_close,
2449 .ndo_start_xmit = mlx4_en_xmit,
2450 .ndo_select_queue = mlx4_en_select_queue,
2451 .ndo_get_stats = mlx4_en_get_stats,
2452 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2453 .ndo_set_mac_address = mlx4_en_set_mac,
2454 .ndo_validate_addr = eth_validate_addr,
2455 .ndo_change_mtu = mlx4_en_change_mtu,
2456 .ndo_do_ioctl = mlx4_en_ioctl,
2457 .ndo_tx_timeout = mlx4_en_tx_timeout,
2458 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2459 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2460#ifdef CONFIG_NET_POLL_CONTROLLER
2461 .ndo_poll_controller = mlx4_en_netpoll,
2462#endif
2463 .ndo_set_features = mlx4_en_set_features,
2464 .ndo_fix_features = mlx4_en_fix_features,
2465 .ndo_setup_tc = mlx4_en_setup_tc,
2466#ifdef CONFIG_RFS_ACCEL
2467 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2468#endif
2469 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2470#ifdef CONFIG_MLX4_EN_VXLAN
2471 .ndo_add_vxlan_port = mlx4_en_add_vxlan_port,
2472 .ndo_del_vxlan_port = mlx4_en_del_vxlan_port,
2473 .ndo_features_check = mlx4_en_features_check,
2474#endif
2475 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2476};
2477
2478static const struct net_device_ops mlx4_netdev_ops_master = {
2479 .ndo_open = mlx4_en_open,
2480 .ndo_stop = mlx4_en_close,
2481 .ndo_start_xmit = mlx4_en_xmit,
2482 .ndo_select_queue = mlx4_en_select_queue,
2483 .ndo_get_stats = mlx4_en_get_stats,
2484 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2485 .ndo_set_mac_address = mlx4_en_set_mac,
2486 .ndo_validate_addr = eth_validate_addr,
2487 .ndo_change_mtu = mlx4_en_change_mtu,
2488 .ndo_tx_timeout = mlx4_en_tx_timeout,
2489 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2490 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2491 .ndo_set_vf_mac = mlx4_en_set_vf_mac,
2492 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
2493 .ndo_set_vf_rate = mlx4_en_set_vf_rate,
2494 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
2495 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
2496 .ndo_get_vf_stats = mlx4_en_get_vf_stats,
2497 .ndo_get_vf_config = mlx4_en_get_vf_config,
2498#ifdef CONFIG_NET_POLL_CONTROLLER
2499 .ndo_poll_controller = mlx4_en_netpoll,
2500#endif
2501 .ndo_set_features = mlx4_en_set_features,
2502 .ndo_fix_features = mlx4_en_fix_features,
2503 .ndo_setup_tc = mlx4_en_setup_tc,
2504#ifdef CONFIG_RFS_ACCEL
2505 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2506#endif
2507 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2508#ifdef CONFIG_MLX4_EN_VXLAN
2509 .ndo_add_vxlan_port = mlx4_en_add_vxlan_port,
2510 .ndo_del_vxlan_port = mlx4_en_del_vxlan_port,
2511 .ndo_features_check = mlx4_en_features_check,
2512#endif
2513 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2514};
2515
2516struct mlx4_en_bond {
2517 struct work_struct work;
2518 struct mlx4_en_priv *priv;
2519 int is_bonded;
2520 struct mlx4_port_map port_map;
2521};
2522
2523static void mlx4_en_bond_work(struct work_struct *work)
2524{
2525 struct mlx4_en_bond *bond = container_of(work,
2526 struct mlx4_en_bond,
2527 work);
2528 int err = 0;
2529 struct mlx4_dev *dev = bond->priv->mdev->dev;
2530
2531 if (bond->is_bonded) {
2532 if (!mlx4_is_bonded(dev)) {
2533 err = mlx4_bond(dev);
2534 if (err)
2535 en_err(bond->priv, "Fail to bond device\n");
2536 }
2537 if (!err) {
2538 err = mlx4_port_map_set(dev, &bond->port_map);
2539 if (err)
2540 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
2541 bond->port_map.port1,
2542 bond->port_map.port2,
2543 err);
2544 }
2545 } else if (mlx4_is_bonded(dev)) {
2546 err = mlx4_unbond(dev);
2547 if (err)
2548 en_err(bond->priv, "Fail to unbond device\n");
2549 }
2550 dev_put(bond->priv->dev);
2551 kfree(bond);
2552}
2553
2554static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
2555 u8 v2p_p1, u8 v2p_p2)
2556{
2557 struct mlx4_en_bond *bond = NULL;
2558
2559 bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
2560 if (!bond)
2561 return -ENOMEM;
2562
2563 INIT_WORK(&bond->work, mlx4_en_bond_work);
2564 bond->priv = priv;
2565 bond->is_bonded = is_bonded;
2566 bond->port_map.port1 = v2p_p1;
2567 bond->port_map.port2 = v2p_p2;
2568 dev_hold(priv->dev);
2569 queue_work(priv->mdev->workqueue, &bond->work);
2570 return 0;
2571}
2572
2573int mlx4_en_netdev_event(struct notifier_block *this,
2574 unsigned long event, void *ptr)
2575{
2576 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
2577 u8 port = 0;
2578 struct mlx4_en_dev *mdev;
2579 struct mlx4_dev *dev;
2580 int i, num_eth_ports = 0;
2581 bool do_bond = true;
2582 struct mlx4_en_priv *priv;
2583 u8 v2p_port1 = 0;
2584 u8 v2p_port2 = 0;
2585
2586 if (!net_eq(dev_net(ndev), &init_net))
2587 return NOTIFY_DONE;
2588
2589 mdev = container_of(this, struct mlx4_en_dev, nb);
2590 dev = mdev->dev;
2591
2592
2593
2594
2595 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
2596 ++num_eth_ports;
2597 if (!port && (mdev->pndev[i] == ndev))
2598 port = i;
2599 mdev->upper[i] = mdev->pndev[i] ?
2600 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
2601
2602 if (!mdev->upper[i])
2603 do_bond = false;
2604 if (num_eth_ports < 2)
2605 continue;
2606
2607 if (mdev->upper[i] != mdev->upper[i-1])
2608 do_bond = false;
2609 }
2610
2611 do_bond = (num_eth_ports == 2) ? do_bond : false;
2612
2613
2614 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
2615 return NOTIFY_DONE;
2616
2617 priv = netdev_priv(ndev);
2618 if (do_bond) {
2619 struct netdev_notifier_bonding_info *notifier_info = ptr;
2620 struct netdev_bonding_info *bonding_info =
2621 ¬ifier_info->bonding_info;
2622
2623
2624 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
2625 (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
2626 (bonding_info->master.bond_mode != BOND_MODE_8023AD))
2627 do_bond = false;
2628
2629
2630 if (bonding_info->master.num_slaves != 2)
2631 do_bond = false;
2632
2633
2634 if (do_bond) {
2635 if (bonding_info->master.bond_mode ==
2636 BOND_MODE_ACTIVEBACKUP) {
2637
2638
2639
2640 if (bonding_info->slave.state ==
2641 BOND_STATE_BACKUP) {
2642 if (port == 1) {
2643 v2p_port1 = 2;
2644 v2p_port2 = 2;
2645 } else {
2646 v2p_port1 = 1;
2647 v2p_port2 = 1;
2648 }
2649 } else {
2650 if (port == 1) {
2651 v2p_port1 = 1;
2652 v2p_port2 = 1;
2653 } else {
2654 v2p_port1 = 2;
2655 v2p_port2 = 2;
2656 }
2657 }
2658 } else {
2659
2660
2661
2662 __s8 link = bonding_info->slave.link;
2663
2664 if (port == 1)
2665 v2p_port2 = 2;
2666 else
2667 v2p_port1 = 1;
2668 if ((link == BOND_LINK_UP) ||
2669 (link == BOND_LINK_FAIL)) {
2670 if (port == 1)
2671 v2p_port1 = 1;
2672 else
2673 v2p_port2 = 2;
2674 } else {
2675 if (port == 1)
2676 v2p_port1 = 2;
2677 else
2678 v2p_port2 = 1;
2679 }
2680 }
2681 }
2682 }
2683
2684 mlx4_en_queue_bond_work(priv, do_bond,
2685 v2p_port1, v2p_port2);
2686
2687 return NOTIFY_DONE;
2688}
2689
2690void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
2691 struct mlx4_en_stats_bitmap *stats_bitmap,
2692 u8 rx_ppp, u8 rx_pause,
2693 u8 tx_ppp, u8 tx_pause)
2694{
2695 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;
2696
2697 if (!mlx4_is_slave(dev) &&
2698 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
2699 mutex_lock(&stats_bitmap->mutex);
2700 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
2701
2702 if (rx_ppp)
2703 bitmap_set(stats_bitmap->bitmap, last_i,
2704 NUM_FLOW_PRIORITY_STATS_RX);
2705 last_i += NUM_FLOW_PRIORITY_STATS_RX;
2706
2707 if (rx_pause && !(rx_ppp))
2708 bitmap_set(stats_bitmap->bitmap, last_i,
2709 NUM_FLOW_STATS_RX);
2710 last_i += NUM_FLOW_STATS_RX;
2711
2712 if (tx_ppp)
2713 bitmap_set(stats_bitmap->bitmap, last_i,
2714 NUM_FLOW_PRIORITY_STATS_TX);
2715 last_i += NUM_FLOW_PRIORITY_STATS_TX;
2716
2717 if (tx_pause && !(tx_ppp))
2718 bitmap_set(stats_bitmap->bitmap, last_i,
2719 NUM_FLOW_STATS_TX);
2720 last_i += NUM_FLOW_STATS_TX;
2721
2722 mutex_unlock(&stats_bitmap->mutex);
2723 }
2724}
2725
2726void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
2727 struct mlx4_en_stats_bitmap *stats_bitmap,
2728 u8 rx_ppp, u8 rx_pause,
2729 u8 tx_ppp, u8 tx_pause)
2730{
2731 int last_i = 0;
2732
2733 mutex_init(&stats_bitmap->mutex);
2734 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
2735
2736 if (mlx4_is_slave(dev)) {
2737 bitmap_set(stats_bitmap->bitmap, last_i +
2738 MLX4_FIND_NETDEV_STAT(rx_packets), 1);
2739 bitmap_set(stats_bitmap->bitmap, last_i +
2740 MLX4_FIND_NETDEV_STAT(tx_packets), 1);
2741 bitmap_set(stats_bitmap->bitmap, last_i +
2742 MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
2743 bitmap_set(stats_bitmap->bitmap, last_i +
2744 MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
2745 bitmap_set(stats_bitmap->bitmap, last_i +
2746 MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
2747 bitmap_set(stats_bitmap->bitmap, last_i +
2748 MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
2749 } else {
2750 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
2751 }
2752 last_i += NUM_MAIN_STATS;
2753
2754 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
2755 last_i += NUM_PORT_STATS;
2756
2757 if (mlx4_is_master(dev))
2758 bitmap_set(stats_bitmap->bitmap, last_i,
2759 NUM_PF_STATS);
2760 last_i += NUM_PF_STATS;
2761
2762 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
2763 rx_ppp, rx_pause,
2764 tx_ppp, tx_pause);
2765 last_i += NUM_FLOW_STATS;
2766
2767 if (!mlx4_is_slave(dev))
2768 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
2769}
2770
2771int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
2772 struct mlx4_en_port_profile *prof)
2773{
2774 struct net_device *dev;
2775 struct mlx4_en_priv *priv;
2776 int i;
2777 int err;
2778
2779 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
2780 MAX_TX_RINGS, MAX_RX_RINGS);
2781 if (dev == NULL)
2782 return -ENOMEM;
2783
2784 netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
2785 netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
2786
2787 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
2788 dev->dev_port = port - 1;
2789
2790
2791
2792
2793
2794 priv = netdev_priv(dev);
2795 memset(priv, 0, sizeof(struct mlx4_en_priv));
2796 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
2797 spin_lock_init(&priv->stats_lock);
2798 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
2799 INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
2800 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
2801 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
2802 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
2803#ifdef CONFIG_MLX4_EN_VXLAN
2804 INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads);
2805 INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads);
2806#endif
2807#ifdef CONFIG_RFS_ACCEL
2808 INIT_LIST_HEAD(&priv->filters);
2809 spin_lock_init(&priv->filters_lock);
2810#endif
2811
2812 priv->dev = dev;
2813 priv->mdev = mdev;
2814 priv->ddev = &mdev->pdev->dev;
2815 priv->prof = prof;
2816 priv->port = port;
2817 priv->port_up = false;
2818 priv->flags = prof->flags;
2819 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
2820 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
2821 MLX4_WQE_CTRL_SOLICITED);
2822 priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
2823 priv->tx_ring_num = prof->tx_ring_num;
2824 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
2825 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
2826
2827 priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring *) * MAX_TX_RINGS,
2828 GFP_KERNEL);
2829 if (!priv->tx_ring) {
2830 err = -ENOMEM;
2831 goto out;
2832 }
2833 priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq *) * MAX_TX_RINGS,
2834 GFP_KERNEL);
2835 if (!priv->tx_cq) {
2836 err = -ENOMEM;
2837 goto out;
2838 }
2839 priv->rx_ring_num = prof->rx_ring_num;
2840 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
2841 priv->cqe_size = mdev->dev->caps.cqe_size;
2842 priv->mac_index = -1;
2843 priv->msg_enable = MLX4_EN_MSG_LEVEL;
2844#ifdef CONFIG_MLX4_EN_DCB
2845 if (!mlx4_is_slave(priv->mdev->dev)) {
2846 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
2847 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
2848 } else {
2849 en_info(priv, "enabling only PFC DCB ops\n");
2850 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
2851 }
2852 }
2853#endif
2854
2855 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
2856 INIT_HLIST_HEAD(&priv->mac_hash[i]);
2857
2858
2859 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
2860
2861 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
2862 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
2863 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
2864
2865
2866 dev->addr_len = ETH_ALEN;
2867 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
2868 if (!is_valid_ether_addr(dev->dev_addr)) {
2869 en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
2870 priv->port, dev->dev_addr);
2871 err = -EINVAL;
2872 goto out;
2873 } else if (mlx4_is_slave(priv->mdev->dev) &&
2874 (priv->mdev->dev->port_random_macs & 1 << priv->port)) {
2875
2876
2877
2878 dev->addr_assign_type |= NET_ADDR_RANDOM;
2879 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
2880 }
2881
2882 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
2883
2884 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
2885 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
2886 err = mlx4_en_alloc_resources(priv);
2887 if (err)
2888 goto out;
2889
2890
2891 priv->hwtstamp_config.flags = 0;
2892 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
2893 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
2894
2895
2896 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
2897 MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
2898 if (err) {
2899 en_err(priv, "Failed to allocate page for rx qps\n");
2900 goto out;
2901 }
2902 priv->allocated = 1;
2903
2904
2905
2906
2907 if (mlx4_is_master(priv->mdev->dev))
2908 dev->netdev_ops = &mlx4_netdev_ops_master;
2909 else
2910 dev->netdev_ops = &mlx4_netdev_ops;
2911 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
2912 netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
2913 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
2914
2915 dev->ethtool_ops = &mlx4_en_ethtool_ops;
2916
2917
2918
2919
2920 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2921 if (mdev->LSO_support)
2922 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
2923
2924 dev->vlan_features = dev->hw_features;
2925
2926 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
2927 dev->features = dev->hw_features | NETIF_F_HIGHDMA |
2928 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2929 NETIF_F_HW_VLAN_CTAG_FILTER;
2930 dev->hw_features |= NETIF_F_LOOPBACK |
2931 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
2932
2933 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {
2934 dev->features |= NETIF_F_HW_VLAN_STAG_RX |
2935 NETIF_F_HW_VLAN_STAG_FILTER;
2936 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;
2937 }
2938
2939 if (mlx4_is_slave(mdev->dev)) {
2940 int phv;
2941
2942 err = get_phv_bit(mdev->dev, port, &phv);
2943 if (!err && phv) {
2944 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
2945 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
2946 }
2947 } else {
2948 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&
2949 !(mdev->dev->caps.flags2 &
2950 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
2951 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
2952 }
2953
2954 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
2955 dev->hw_features |= NETIF_F_RXFCS;
2956
2957 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
2958 dev->hw_features |= NETIF_F_RXALL;
2959
2960 if (mdev->dev->caps.steering_mode ==
2961 MLX4_STEERING_MODE_DEVICE_MANAGED &&
2962 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
2963 dev->hw_features |= NETIF_F_NTUPLE;
2964
2965 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
2966 dev->priv_flags |= IFF_UNICAST_FLT;
2967
2968
2969 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
2970 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
2971 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
2972 priv->rss_hash_fn = ETH_RSS_HASH_XOR;
2973 } else {
2974 en_warn(priv,
2975 "No RSS hash capabilities exposed, using Toeplitz\n");
2976 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
2977 }
2978
2979 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
2980 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL;
2981 dev->features |= NETIF_F_GSO_UDP_TUNNEL;
2982 }
2983
2984 mdev->pndev[port] = dev;
2985 mdev->upper[port] = NULL;
2986
2987 netif_carrier_off(dev);
2988 mlx4_en_set_default_moderation(priv);
2989
2990 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
2991 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
2992
2993 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
2994
2995
2996 mlx4_en_calc_rx_buf(dev);
2997 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
2998 priv->rx_skb_size + ETH_FCS_LEN,
2999 prof->tx_pause, prof->tx_ppp,
3000 prof->rx_pause, prof->rx_ppp);
3001 if (err) {
3002 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
3003 priv->port, err);
3004 goto out;
3005 }
3006
3007 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3008 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
3009 if (err) {
3010 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
3011 err);
3012 goto out;
3013 }
3014 }
3015
3016
3017 en_warn(priv, "Initializing port\n");
3018 err = mlx4_INIT_PORT(mdev->dev, priv->port);
3019 if (err) {
3020 en_err(priv, "Failed Initializing port\n");
3021 goto out;
3022 }
3023 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
3024
3025
3026 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
3027 mlx4_en_init_timestamp(mdev);
3028
3029 queue_delayed_work(mdev->workqueue, &priv->service_task,
3030 SERVICE_TASK_DELAY);
3031
3032 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
3033 mdev->profile.prof[priv->port].rx_ppp,
3034 mdev->profile.prof[priv->port].rx_pause,
3035 mdev->profile.prof[priv->port].tx_ppp,
3036 mdev->profile.prof[priv->port].tx_pause);
3037
3038 err = register_netdev(dev);
3039 if (err) {
3040 en_err(priv, "Netdev registration failed for port %d\n", port);
3041 goto out;
3042 }
3043
3044 priv->registered = 1;
3045
3046 return 0;
3047
3048out:
3049 mlx4_en_destroy_netdev(dev);
3050 return err;
3051}
3052
3053int mlx4_en_reset_config(struct net_device *dev,
3054 struct hwtstamp_config ts_config,
3055 netdev_features_t features)
3056{
3057 struct mlx4_en_priv *priv = netdev_priv(dev);
3058 struct mlx4_en_dev *mdev = priv->mdev;
3059 int port_up = 0;
3060 int err = 0;
3061
3062 if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
3063 priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
3064 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3065 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))
3066 return 0;
3067
3068 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3069 (features & NETIF_F_HW_VLAN_CTAG_RX) &&
3070 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
3071 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
3072 return -EINVAL;
3073 }
3074
3075 mutex_lock(&mdev->state_lock);
3076 if (priv->port_up) {
3077 port_up = 1;
3078 mlx4_en_stop_port(dev, 1);
3079 }
3080
3081 mlx4_en_free_resources(priv);
3082
3083 en_warn(priv, "Changing device configuration rx filter(%x) rx vlan(%x)\n",
3084 ts_config.rx_filter, !!(features & NETIF_F_HW_VLAN_CTAG_RX));
3085
3086 priv->hwtstamp_config.tx_type = ts_config.tx_type;
3087 priv->hwtstamp_config.rx_filter = ts_config.rx_filter;
3088
3089 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
3090 if (features & NETIF_F_HW_VLAN_CTAG_RX)
3091 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3092 else
3093 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3094 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
3095
3096
3097
3098 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
3099 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3100 else
3101 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3102 }
3103
3104 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {
3105 if (features & NETIF_F_RXFCS)
3106 dev->features |= NETIF_F_RXFCS;
3107 else
3108 dev->features &= ~NETIF_F_RXFCS;
3109 }
3110
3111
3112
3113
3114
3115 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
3116 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
3117 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
3118 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3119 }
3120
3121 err = mlx4_en_alloc_resources(priv);
3122 if (err) {
3123 en_err(priv, "Failed reallocating port resources\n");
3124 goto out;
3125 }
3126 if (port_up) {
3127 err = mlx4_en_start_port(dev);
3128 if (err)
3129 en_err(priv, "Failed starting port\n");
3130 }
3131
3132out:
3133 mutex_unlock(&mdev->state_lock);
3134 netdev_features_change(dev);
3135 return err;
3136}
3137
