LXR linux/include/linux/platform_data/mtd-nand-omap2.h

   1/*
   2 * Copyright (C) 2006 Micron Technology Inc.
   3 *
   4 * This program is free software; you can redistribute it and/or modify
   5 * it under the terms of the GNU General Public License version 2 as
   6 * published by the Free Software Foundation.
   7 */
   8
   9#ifndef _MTD_NAND_OMAP2_H
  10#define _MTD_NAND_OMAP2_H
  11
  12#include <linux/mtd/partitions.h>
  13
  14#define GPMC_BCH_NUM_REMAINDER  8
  15
  16enum nand_io {
  17        NAND_OMAP_PREFETCH_POLLED = 0,  /* prefetch polled mode, default */
  18        NAND_OMAP_POLLED,               /* polled mode, without prefetch */
  19        NAND_OMAP_PREFETCH_DMA,         /* prefetch enabled sDMA mode */
  20        NAND_OMAP_PREFETCH_IRQ          /* prefetch enabled irq mode */
  21};
  22
  23enum omap_ecc {
  24        /*
  25         * 1-bit ECC: calculation and correction by SW
  26         * ECC stored at end of spare area
  27         */
  28        OMAP_ECC_HAM1_CODE_SW = 0,
  29
  30        /*
  31         * 1-bit ECC: calculation by GPMC, Error detection by Software
  32         * ECC layout compatible with ROM code layout
  33         */
  34        OMAP_ECC_HAM1_CODE_HW,
  35        /* 4-bit  ECC calculation by GPMC, Error detection by Software */
  36        OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
  37        /* 4-bit  ECC calculation by GPMC, Error detection by ELM */
  38        OMAP_ECC_BCH4_CODE_HW,
  39        /* 8-bit  ECC calculation by GPMC, Error detection by Software */
  40        OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
  41        /* 8-bit  ECC calculation by GPMC, Error detection by ELM */
  42        OMAP_ECC_BCH8_CODE_HW,
  43        /* 16-bit ECC calculation by GPMC, Error detection by ELM */
  44        OMAP_ECC_BCH16_CODE_HW,
  45};
  46
  47struct gpmc_nand_regs {
  48        void __iomem    *gpmc_status;
  49        void __iomem    *gpmc_nand_command;
  50        void __iomem    *gpmc_nand_address;
  51        void __iomem    *gpmc_nand_data;
  52        void __iomem    *gpmc_prefetch_config1;
  53        void __iomem    *gpmc_prefetch_config2;
  54        void __iomem    *gpmc_prefetch_control;
  55        void __iomem    *gpmc_prefetch_status;
  56        void __iomem    *gpmc_ecc_config;
  57        void __iomem    *gpmc_ecc_control;
  58        void __iomem    *gpmc_ecc_size_config;
  59        void __iomem    *gpmc_ecc1_result;
  60        void __iomem    *gpmc_bch_result0[GPMC_BCH_NUM_REMAINDER];
  61        void __iomem    *gpmc_bch_result1[GPMC_BCH_NUM_REMAINDER];
  62        void __iomem    *gpmc_bch_result2[GPMC_BCH_NUM_REMAINDER];
  63        void __iomem    *gpmc_bch_result3[GPMC_BCH_NUM_REMAINDER];
  64        void __iomem    *gpmc_bch_result4[GPMC_BCH_NUM_REMAINDER];
  65        void __iomem    *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER];
  66        void __iomem    *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER];
  67};
  68
  69struct omap_nand_platform_data {
  70        int                     cs;
  71        struct mtd_partition    *parts;
  72        int                     nr_parts;
  73        bool                    dev_ready;
  74        bool                    flash_bbt;
  75        enum nand_io            xfer_type;
  76        int                     devsize;
  77        enum omap_ecc           ecc_opt;
  78        struct gpmc_nand_regs   reg;
  79
  80        /* for passing the partitions */
  81        struct device_node      *of_node;
  82        struct device_node      *elm_of_node;
  83};
  84#endif
  85