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6#ifndef _LINUX_WM97XX_H
7#define _LINUX_WM97XX_H
8
9#include <sound/core.h>
10#include <sound/pcm.h>
11#include <sound/ac97_codec.h>
12#include <sound/initval.h>
13#include <linux/types.h>
14#include <linux/list.h>
15#include <linux/input.h>
16#include <linux/platform_device.h>
17
18
19
20
21#define WM97xx_GENERIC 0x0000
22#define WM97xx_WM1613 0x1613
23
24
25
26
27#define AC97_WM97XX_DIGITISER1 0x76
28#define AC97_WM97XX_DIGITISER2 0x78
29#define AC97_WM97XX_DIGITISER_RD 0x7a
30#define AC97_WM9713_DIG1 0x74
31#define AC97_WM9713_DIG2 AC97_WM97XX_DIGITISER1
32#define AC97_WM9713_DIG3 AC97_WM97XX_DIGITISER2
33
34
35
36
37#define WM97XX_POLL 0x8000
38#define WM97XX_ADCSEL_X 0x1000
39#define WM97XX_ADCSEL_Y 0x2000
40#define WM97XX_ADCSEL_PRES 0x3000
41#define WM97XX_AUX_ID1 0x4000
42#define WM97XX_AUX_ID2 0x5000
43#define WM97XX_AUX_ID3 0x6000
44#define WM97XX_AUX_ID4 0x7000
45#define WM97XX_ADCSEL_MASK 0x7000
46#define WM97XX_COO 0x0800
47#define WM97XX_CTC 0x0400
48#define WM97XX_CM_RATE_93 0x0000
49#define WM97XX_CM_RATE_187 0x0100
50#define WM97XX_CM_RATE_375 0x0200
51#define WM97XX_CM_RATE_750 0x0300
52#define WM97XX_CM_RATE_8K 0x00f0
53#define WM97XX_CM_RATE_12K 0x01f0
54#define WM97XX_CM_RATE_24K 0x02f0
55#define WM97XX_CM_RATE_48K 0x03f0
56#define WM97XX_CM_RATE_MASK 0x03f0
57#define WM97XX_RATE(i) (((i & 3) << 8) | ((i & 4) ? 0xf0 : 0))
58#define WM97XX_DELAY(i) ((i << 4) & 0x00f0)
59#define WM97XX_DELAY_MASK 0x00f0
60#define WM97XX_SLEN 0x0008
61#define WM97XX_SLT(i) ((i - 5) & 0x7)
62#define WM97XX_SLT_MASK 0x0007
63#define WM97XX_PRP_DETW 0x4000
64#define WM97XX_PRP_DET 0x8000
65#define WM97XX_PRP_DET_DIG 0xc000
66#define WM97XX_RPR 0x2000
67#define WM97XX_PEN_DOWN 0x8000
68
69
70#define WM9712_45W 0x1000
71#define WM9712_PDEN 0x0800
72#define WM9712_WAIT 0x0200
73#define WM9712_PIL 0x0100
74#define WM9712_MASK_HI 0x0040
75#define WM9712_MASK_EDGE 0x0080
76#define WM9712_MASK_SYNC 0x00c0
77#define WM9712_RPU(i) (i&0x3f)
78#define WM9712_PD(i) (0x1 << i)
79
80
81#define AC97_WM9712_POWER 0x24
82#define AC97_WM9712_REV 0x58
83
84
85#define WM9705_PDEN 0x1000
86#define WM9705_PINV 0x0800
87#define WM9705_BSEN 0x0400
88#define WM9705_BINV 0x0200
89#define WM9705_WAIT 0x0100
90#define WM9705_PIL 0x0080
91#define WM9705_PHIZ 0x0040
92#define WM9705_MASK_HI 0x0010
93#define WM9705_MASK_EDGE 0x0020
94#define WM9705_MASK_SYNC 0x0030
95#define WM9705_PDD(i) (i & 0x000f)
96
97
98
99#define WM9713_PDPOL 0x0400
100#define WM9713_POLL 0x0200
101#define WM9713_CTC 0x0100
102#define WM9713_ADCSEL_X 0x0002
103#define WM9713_ADCSEL_Y 0x0004
104#define WM9713_ADCSEL_PRES 0x0008
105#define WM9713_COO 0x0001
106#define WM9713_45W 0x1000
107#define WM9713_PDEN 0x0800
108#define WM9713_ADCSEL_MASK 0x00fe
109#define WM9713_WAIT 0x0200
110
111
112#define TS_COMP1 0x0
113#define TS_COMP2 0x1
114#define TS_BMON 0x2
115#define TS_WIPER 0x3
116
117
118#define WM97XX_ID1 0x574d
119#define WM9712_ID2 0x4c12
120#define WM9705_ID2 0x4c05
121#define WM9713_ID2 0x4c13
122
123
124#define WM97XX_MAX_GPIO 16
125#define WM97XX_GPIO_1 (1 << 1)
126#define WM97XX_GPIO_2 (1 << 2)
127#define WM97XX_GPIO_3 (1 << 3)
128#define WM97XX_GPIO_4 (1 << 4)
129#define WM97XX_GPIO_5 (1 << 5)
130#define WM97XX_GPIO_6 (1 << 6)
131#define WM97XX_GPIO_7 (1 << 7)
132#define WM97XX_GPIO_8 (1 << 8)
133#define WM97XX_GPIO_9 (1 << 9)
134#define WM97XX_GPIO_10 (1 << 10)
135#define WM97XX_GPIO_11 (1 << 11)
136#define WM97XX_GPIO_12 (1 << 12)
137#define WM97XX_GPIO_13 (1 << 13)
138#define WM97XX_GPIO_14 (1 << 14)
139#define WM97XX_GPIO_15 (1 << 15)
140
141
142#define AC97_LINK_FRAME 21
143
144
145
146
147
148#define RC_AGAIN 0x00000001
149
150#define RC_VALID 0x00000002
151
152#define RC_PENUP 0x00000004
153
154
155
156#define RC_PENDOWN 0x00000008
157
158
159
160
161
162
163
164struct wm97xx_data {
165 int x;
166 int y;
167 int p;
168};
169
170
171
172
173enum wm97xx_gpio_status {
174 WM97XX_GPIO_HIGH,
175 WM97XX_GPIO_LOW
176};
177
178
179
180
181enum wm97xx_gpio_dir {
182 WM97XX_GPIO_IN,
183 WM97XX_GPIO_OUT
184};
185
186
187
188
189enum wm97xx_gpio_pol {
190 WM97XX_GPIO_POL_HIGH,
191 WM97XX_GPIO_POL_LOW
192};
193
194
195
196
197enum wm97xx_gpio_sticky {
198 WM97XX_GPIO_STICKY,
199 WM97XX_GPIO_NOTSTICKY
200};
201
202
203
204
205enum wm97xx_gpio_wake {
206 WM97XX_GPIO_WAKE,
207 WM97XX_GPIO_NOWAKE
208};
209
210
211
212
213#define WM97XX_DIG_START 0x1
214#define WM97XX_DIG_STOP 0x2
215#define WM97XX_PHY_INIT 0x3
216#define WM97XX_AUX_PREPARE 0x4
217#define WM97XX_DIG_RESTORE 0x5
218
219struct wm97xx;
220
221extern struct wm97xx_codec_drv wm9705_codec;
222extern struct wm97xx_codec_drv wm9712_codec;
223extern struct wm97xx_codec_drv wm9713_codec;
224
225
226
227
228struct wm97xx_codec_drv {
229 u16 id;
230 char *name;
231
232
233 int (*poll_sample) (struct wm97xx *, int adcsel, int *sample);
234
235
236 int (*poll_touch) (struct wm97xx *, struct wm97xx_data *);
237
238 int (*acc_enable) (struct wm97xx *, int enable);
239 void (*phy_init) (struct wm97xx *);
240 void (*dig_enable) (struct wm97xx *, int enable);
241 void (*dig_restore) (struct wm97xx *);
242 void (*aux_prepare) (struct wm97xx *);
243};
244
245
246
247struct wm97xx_mach_ops {
248
249
250 int acc_enabled;
251 void (*acc_pen_up) (struct wm97xx *);
252 int (*acc_pen_down) (struct wm97xx *);
253 int (*acc_startup) (struct wm97xx *);
254 void (*acc_shutdown) (struct wm97xx *);
255
256
257 void (*irq_enable) (struct wm97xx *, int enable);
258
259
260 int irq_gpio;
261
262
263 void (*pre_sample) (int);
264 void (*post_sample) (int);
265};
266
267struct wm97xx {
268 u16 dig[3], id, gpio[6], misc;
269 u16 dig_save[3];
270 struct wm97xx_codec_drv *codec;
271 struct input_dev *input_dev;
272 struct snd_ac97 *ac97;
273 struct device *dev;
274 struct platform_device *battery_dev;
275 struct platform_device *touch_dev;
276 struct wm97xx_mach_ops *mach_ops;
277 struct mutex codec_mutex;
278 struct delayed_work ts_reader;
279 unsigned long ts_reader_interval;
280 unsigned long ts_reader_min_interval;
281 unsigned int pen_irq;
282 struct workqueue_struct *ts_workq;
283 struct work_struct pen_event_work;
284 u16 acc_slot;
285 u16 acc_rate;
286 unsigned pen_is_down:1;
287 unsigned aux_waiting:1;
288 unsigned pen_probably_down:1;
289 u16 variant;
290 u16 suspend_mode;
291};
292
293struct wm97xx_batt_pdata {
294 int batt_aux;
295 int temp_aux;
296 int charge_gpio;
297 int min_voltage;
298 int max_voltage;
299 int batt_div;
300 int batt_mult;
301 int temp_div;
302 int temp_mult;
303 int batt_tech;
304 char *batt_name;
305};
306
307struct wm97xx_pdata {
308 struct wm97xx_batt_pdata *batt_pdata;
309};
310
311
312
313
314
315enum wm97xx_gpio_status wm97xx_get_gpio(struct wm97xx *wm, u32 gpio);
316void wm97xx_set_gpio(struct wm97xx *wm, u32 gpio,
317 enum wm97xx_gpio_status status);
318void wm97xx_config_gpio(struct wm97xx *wm, u32 gpio,
319 enum wm97xx_gpio_dir dir,
320 enum wm97xx_gpio_pol pol,
321 enum wm97xx_gpio_sticky sticky,
322 enum wm97xx_gpio_wake wake);
323
324void wm97xx_set_suspend_mode(struct wm97xx *wm, u16 mode);
325
326
327int wm97xx_reg_read(struct wm97xx *wm, u16 reg);
328void wm97xx_reg_write(struct wm97xx *wm, u16 reg, u16 val);
329
330
331int wm97xx_read_aux_adc(struct wm97xx *wm, u16 adcsel);
332
333
334int wm97xx_register_mach_ops(struct wm97xx *, struct wm97xx_mach_ops *);
335void wm97xx_unregister_mach_ops(struct wm97xx *);
336
337#endif
338