linux/sound/soc/codecs/rt298.c
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   1/*
   2 * rt298.c  --  RT298 ALSA SoC audio codec driver
   3 *
   4 * Copyright 2015 Realtek Semiconductor Corp.
   5 * Author: Bard Liao <bardliao@realtek.com>
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License version 2 as
   9 * published by the Free Software Foundation.
  10 */
  11
  12#include <linux/module.h>
  13#include <linux/moduleparam.h>
  14#include <linux/init.h>
  15#include <linux/delay.h>
  16#include <linux/pm.h>
  17#include <linux/i2c.h>
  18#include <linux/platform_device.h>
  19#include <linux/spi/spi.h>
  20#include <linux/acpi.h>
  21#include <sound/core.h>
  22#include <sound/pcm.h>
  23#include <sound/pcm_params.h>
  24#include <sound/soc.h>
  25#include <sound/soc-dapm.h>
  26#include <sound/initval.h>
  27#include <sound/tlv.h>
  28#include <sound/jack.h>
  29#include <linux/workqueue.h>
  30#include <sound/rt298.h>
  31
  32#include "rl6347a.h"
  33#include "rt298.h"
  34
  35#define RT298_VENDOR_ID 0x10ec0298
  36
  37struct rt298_priv {
  38        struct reg_default *index_cache;
  39        int index_cache_size;
  40        struct regmap *regmap;
  41        struct snd_soc_codec *codec;
  42        struct rt298_platform_data pdata;
  43        struct i2c_client *i2c;
  44        struct snd_soc_jack *jack;
  45        struct delayed_work jack_detect_work;
  46        int sys_clk;
  47        int clk_id;
  48        int is_hp_in;
  49};
  50
  51static const struct reg_default rt298_index_def[] = {
  52        { 0x01, 0xa5a8 },
  53        { 0x02, 0x8e95 },
  54        { 0x03, 0x0002 },
  55        { 0x04, 0xaf67 },
  56        { 0x08, 0x200f },
  57        { 0x09, 0xd010 },
  58        { 0x0a, 0x0100 },
  59        { 0x0b, 0x0000 },
  60        { 0x0d, 0x2800 },
  61        { 0x0f, 0x0022 },
  62        { 0x19, 0x0217 },
  63        { 0x20, 0x0020 },
  64        { 0x33, 0x0208 },
  65        { 0x46, 0x0300 },
  66        { 0x49, 0x4004 },
  67        { 0x4f, 0x50c9 },
  68        { 0x50, 0x3000 },
  69        { 0x63, 0x1b02 },
  70        { 0x67, 0x1111 },
  71        { 0x68, 0x1016 },
  72        { 0x69, 0x273f },
  73};
  74#define INDEX_CACHE_SIZE ARRAY_SIZE(rt298_index_def)
  75
  76static const struct reg_default rt298_reg[] = {
  77        { 0x00170500, 0x00000400 },
  78        { 0x00220000, 0x00000031 },
  79        { 0x00239000, 0x0000007f },
  80        { 0x0023a000, 0x0000007f },
  81        { 0x00270500, 0x00000400 },
  82        { 0x00370500, 0x00000400 },
  83        { 0x00870500, 0x00000400 },
  84        { 0x00920000, 0x00000031 },
  85        { 0x00935000, 0x000000c3 },
  86        { 0x00936000, 0x000000c3 },
  87        { 0x00970500, 0x00000400 },
  88        { 0x00b37000, 0x00000097 },
  89        { 0x00b37200, 0x00000097 },
  90        { 0x00b37300, 0x00000097 },
  91        { 0x00c37000, 0x00000000 },
  92        { 0x00c37100, 0x00000080 },
  93        { 0x01270500, 0x00000400 },
  94        { 0x01370500, 0x00000400 },
  95        { 0x01371f00, 0x411111f0 },
  96        { 0x01439000, 0x00000080 },
  97        { 0x0143a000, 0x00000080 },
  98        { 0x01470700, 0x00000000 },
  99        { 0x01470500, 0x00000400 },
 100        { 0x01470c00, 0x00000000 },
 101        { 0x01470100, 0x00000000 },
 102        { 0x01837000, 0x00000000 },
 103        { 0x01870500, 0x00000400 },
 104        { 0x02050000, 0x00000000 },
 105        { 0x02139000, 0x00000080 },
 106        { 0x0213a000, 0x00000080 },
 107        { 0x02170100, 0x00000000 },
 108        { 0x02170500, 0x00000400 },
 109        { 0x02170700, 0x00000000 },
 110        { 0x02270100, 0x00000000 },
 111        { 0x02370100, 0x00000000 },
 112        { 0x01870700, 0x00000020 },
 113        { 0x00830000, 0x000000c3 },
 114        { 0x00930000, 0x000000c3 },
 115        { 0x01270700, 0x00000000 },
 116};
 117
 118static bool rt298_volatile_register(struct device *dev, unsigned int reg)
 119{
 120        switch (reg) {
 121        case 0 ... 0xff:
 122        case RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
 123        case RT298_GET_HP_SENSE:
 124        case RT298_GET_MIC1_SENSE:
 125        case RT298_PROC_COEF:
 126        case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_MIC1, 0):
 127        case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_SPK_OUT, 0):
 128        case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_HP_OUT, 0):
 129                return true;
 130        default:
 131                return false;
 132        }
 133
 134
 135}
 136
 137static bool rt298_readable_register(struct device *dev, unsigned int reg)
 138{
 139        switch (reg) {
 140        case 0 ... 0xff:
 141        case RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID):
 142        case RT298_GET_HP_SENSE:
 143        case RT298_GET_MIC1_SENSE:
 144        case RT298_SET_AUDIO_POWER:
 145        case RT298_SET_HPO_POWER:
 146        case RT298_SET_SPK_POWER:
 147        case RT298_SET_DMIC1_POWER:
 148        case RT298_SPK_MUX:
 149        case RT298_HPO_MUX:
 150        case RT298_ADC0_MUX:
 151        case RT298_ADC1_MUX:
 152        case RT298_SET_MIC1:
 153        case RT298_SET_PIN_HPO:
 154        case RT298_SET_PIN_SPK:
 155        case RT298_SET_PIN_DMIC1:
 156        case RT298_SPK_EAPD:
 157        case RT298_SET_AMP_GAIN_HPO:
 158        case RT298_SET_DMIC2_DEFAULT:
 159        case RT298_DACL_GAIN:
 160        case RT298_DACR_GAIN:
 161        case RT298_ADCL_GAIN:
 162        case RT298_ADCR_GAIN:
 163        case RT298_MIC_GAIN:
 164        case RT298_SPOL_GAIN:
 165        case RT298_SPOR_GAIN:
 166        case RT298_HPOL_GAIN:
 167        case RT298_HPOR_GAIN:
 168        case RT298_F_DAC_SWITCH:
 169        case RT298_F_RECMIX_SWITCH:
 170        case RT298_REC_MIC_SWITCH:
 171        case RT298_REC_I2S_SWITCH:
 172        case RT298_REC_LINE_SWITCH:
 173        case RT298_REC_BEEP_SWITCH:
 174        case RT298_DAC_FORMAT:
 175        case RT298_ADC_FORMAT:
 176        case RT298_COEF_INDEX:
 177        case RT298_PROC_COEF:
 178        case RT298_SET_AMP_GAIN_ADC_IN1:
 179        case RT298_SET_AMP_GAIN_ADC_IN2:
 180        case RT298_SET_POWER(RT298_DAC_OUT1):
 181        case RT298_SET_POWER(RT298_DAC_OUT2):
 182        case RT298_SET_POWER(RT298_ADC_IN1):
 183        case RT298_SET_POWER(RT298_ADC_IN2):
 184        case RT298_SET_POWER(RT298_DMIC2):
 185        case RT298_SET_POWER(RT298_MIC1):
 186        case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_MIC1, 0):
 187        case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_SPK_OUT, 0):
 188        case VERB_CMD(AC_VERB_GET_EAPD_BTLENABLE, RT298_HP_OUT, 0):
 189                return true;
 190        default:
 191                return false;
 192        }
 193}
 194
 195#ifdef CONFIG_PM
 196static void rt298_index_sync(struct snd_soc_codec *codec)
 197{
 198        struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
 199        int i;
 200
 201        for (i = 0; i < INDEX_CACHE_SIZE; i++) {
 202                snd_soc_write(codec, rt298->index_cache[i].reg,
 203                                  rt298->index_cache[i].def);
 204        }
 205}
 206#endif
 207
 208static int rt298_support_power_controls[] = {
 209        RT298_DAC_OUT1,
 210        RT298_DAC_OUT2,
 211        RT298_ADC_IN1,
 212        RT298_ADC_IN2,
 213        RT298_MIC1,
 214        RT298_DMIC1,
 215        RT298_DMIC2,
 216        RT298_SPK_OUT,
 217        RT298_HP_OUT,
 218};
 219#define RT298_POWER_REG_LEN ARRAY_SIZE(rt298_support_power_controls)
 220
 221static int rt298_jack_detect(struct rt298_priv *rt298, bool *hp, bool *mic)
 222{
 223        struct snd_soc_dapm_context *dapm;
 224        unsigned int val, buf;
 225
 226        *hp = false;
 227        *mic = false;
 228
 229        if (!rt298->codec)
 230                return -EINVAL;
 231
 232        dapm = snd_soc_codec_get_dapm(rt298->codec);
 233
 234        if (rt298->pdata.cbj_en) {
 235                regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf);
 236                *hp = buf & 0x80000000;
 237                if (*hp == rt298->is_hp_in)
 238                        return -1;
 239                rt298->is_hp_in = *hp;
 240                if (*hp) {
 241                        /* power on HV,VERF */
 242                        regmap_update_bits(rt298->regmap,
 243                                RT298_DC_GAIN, 0x200, 0x200);
 244
 245                        snd_soc_dapm_force_enable_pin(dapm, "HV");
 246                        snd_soc_dapm_force_enable_pin(dapm, "VREF");
 247                        /* power LDO1 */
 248                        snd_soc_dapm_force_enable_pin(dapm, "LDO1");
 249                        snd_soc_dapm_sync(dapm);
 250
 251                        regmap_write(rt298->regmap, RT298_SET_MIC1, 0x24);
 252                        msleep(50);
 253
 254                        regmap_update_bits(rt298->regmap,
 255                                RT298_CBJ_CTRL1, 0xfcc0, 0xd400);
 256                        msleep(300);
 257                        regmap_read(rt298->regmap, RT298_CBJ_CTRL2, &val);
 258
 259                        if (0x0070 == (val & 0x0070)) {
 260                                *mic = true;
 261                        } else {
 262                                regmap_update_bits(rt298->regmap,
 263                                        RT298_CBJ_CTRL1, 0xfcc0, 0xe400);
 264                                msleep(300);
 265                                regmap_read(rt298->regmap,
 266                                        RT298_CBJ_CTRL2, &val);
 267                                if (0x0070 == (val & 0x0070))
 268                                        *mic = true;
 269                                else
 270                                        *mic = false;
 271                        }
 272                        regmap_update_bits(rt298->regmap,
 273                                RT298_DC_GAIN, 0x200, 0x0);
 274
 275                } else {
 276                        *mic = false;
 277                        regmap_write(rt298->regmap, RT298_SET_MIC1, 0x20);
 278                }
 279        } else {
 280                regmap_read(rt298->regmap, RT298_GET_HP_SENSE, &buf);
 281                *hp = buf & 0x80000000;
 282                regmap_read(rt298->regmap, RT298_GET_MIC1_SENSE, &buf);
 283                *mic = buf & 0x80000000;
 284        }
 285
 286        snd_soc_dapm_disable_pin(dapm, "HV");
 287        snd_soc_dapm_disable_pin(dapm, "VREF");
 288        if (!*hp)
 289                snd_soc_dapm_disable_pin(dapm, "LDO1");
 290        snd_soc_dapm_sync(dapm);
 291
 292        pr_debug("*hp = %d *mic = %d\n", *hp, *mic);
 293
 294        return 0;
 295}
 296
 297static void rt298_jack_detect_work(struct work_struct *work)
 298{
 299        struct rt298_priv *rt298 =
 300                container_of(work, struct rt298_priv, jack_detect_work.work);
 301        int status = 0;
 302        bool hp = false;
 303        bool mic = false;
 304
 305        if (rt298_jack_detect(rt298, &hp, &mic) < 0)
 306                return;
 307
 308        if (hp == true)
 309                status |= SND_JACK_HEADPHONE;
 310
 311        if (mic == true)
 312                status |= SND_JACK_MICROPHONE;
 313
 314        snd_soc_jack_report(rt298->jack, status,
 315                SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 316}
 317
 318int rt298_mic_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack)
 319{
 320        struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
 321
 322        rt298->jack = jack;
 323
 324        /* Send an initial empty report */
 325        snd_soc_jack_report(rt298->jack, 0,
 326                SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 327
 328        return 0;
 329}
 330EXPORT_SYMBOL_GPL(rt298_mic_detect);
 331
 332static int is_mclk_mode(struct snd_soc_dapm_widget *source,
 333                         struct snd_soc_dapm_widget *sink)
 334{
 335        struct snd_soc_codec *codec = snd_soc_dapm_to_codec(source->dapm);
 336        struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
 337
 338        if (rt298->clk_id == RT298_SCLK_S_MCLK)
 339                return 1;
 340        else
 341                return 0;
 342}
 343
 344static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6350, 50, 0);
 345static const DECLARE_TLV_DB_SCALE(mic_vol_tlv, 0, 1000, 0);
 346
 347static const struct snd_kcontrol_new rt298_snd_controls[] = {
 348        SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT298_DACL_GAIN,
 349                            RT298_DACR_GAIN, 0, 0x7f, 0, out_vol_tlv),
 350        SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT298_ADCL_GAIN,
 351                            RT298_ADCR_GAIN, 0, 0x7f, 0, out_vol_tlv),
 352        SOC_SINGLE_TLV("AMIC Volume", RT298_MIC_GAIN,
 353                            0, 0x3, 0, mic_vol_tlv),
 354        SOC_DOUBLE_R("Speaker Playback Switch", RT298_SPOL_GAIN,
 355                            RT298_SPOR_GAIN, RT298_MUTE_SFT, 1, 1),
 356};
 357
 358/* Digital Mixer */
 359static const struct snd_kcontrol_new rt298_front_mix[] = {
 360        SOC_DAPM_SINGLE("DAC Switch",  RT298_F_DAC_SWITCH,
 361                        RT298_MUTE_SFT, 1, 1),
 362        SOC_DAPM_SINGLE("RECMIX Switch", RT298_F_RECMIX_SWITCH,
 363                        RT298_MUTE_SFT, 1, 1),
 364};
 365
 366/* Analog Input Mixer */
 367static const struct snd_kcontrol_new rt298_rec_mix[] = {
 368        SOC_DAPM_SINGLE("Mic1 Switch", RT298_REC_MIC_SWITCH,
 369                        RT298_MUTE_SFT, 1, 1),
 370        SOC_DAPM_SINGLE("I2S Switch", RT298_REC_I2S_SWITCH,
 371                        RT298_MUTE_SFT, 1, 1),
 372        SOC_DAPM_SINGLE("Line1 Switch", RT298_REC_LINE_SWITCH,
 373                        RT298_MUTE_SFT, 1, 1),
 374        SOC_DAPM_SINGLE("Beep Switch", RT298_REC_BEEP_SWITCH,
 375                        RT298_MUTE_SFT, 1, 1),
 376};
 377
 378static const struct snd_kcontrol_new spo_enable_control =
 379        SOC_DAPM_SINGLE("Switch", RT298_SET_PIN_SPK,
 380                        RT298_SET_PIN_SFT, 1, 0);
 381
 382static const struct snd_kcontrol_new hpol_enable_control =
 383        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT298_HPOL_GAIN,
 384                        RT298_MUTE_SFT, 1, 1);
 385
 386static const struct snd_kcontrol_new hpor_enable_control =
 387        SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT298_HPOR_GAIN,
 388                        RT298_MUTE_SFT, 1, 1);
 389
 390/* ADC0 source */
 391static const char * const rt298_adc_src[] = {
 392        "Mic", "RECMIX", "Dmic"
 393};
 394
 395static const int rt298_adc_values[] = {
 396        0, 4, 5,
 397};
 398
 399static SOC_VALUE_ENUM_SINGLE_DECL(
 400        rt298_adc0_enum, RT298_ADC0_MUX, RT298_ADC_SEL_SFT,
 401        RT298_ADC_SEL_MASK, rt298_adc_src, rt298_adc_values);
 402
 403static const struct snd_kcontrol_new rt298_adc0_mux =
 404        SOC_DAPM_ENUM("ADC 0 source", rt298_adc0_enum);
 405
 406static SOC_VALUE_ENUM_SINGLE_DECL(
 407        rt298_adc1_enum, RT298_ADC1_MUX, RT298_ADC_SEL_SFT,
 408        RT298_ADC_SEL_MASK, rt298_adc_src, rt298_adc_values);
 409
 410static const struct snd_kcontrol_new rt298_adc1_mux =
 411        SOC_DAPM_ENUM("ADC 1 source", rt298_adc1_enum);
 412
 413static const char * const rt298_dac_src[] = {
 414        "Front", "Surround"
 415};
 416/* HP-OUT source */
 417static SOC_ENUM_SINGLE_DECL(rt298_hpo_enum, RT298_HPO_MUX,
 418                                0, rt298_dac_src);
 419
 420static const struct snd_kcontrol_new rt298_hpo_mux =
 421SOC_DAPM_ENUM("HPO source", rt298_hpo_enum);
 422
 423/* SPK-OUT source */
 424static SOC_ENUM_SINGLE_DECL(rt298_spo_enum, RT298_SPK_MUX,
 425                                0, rt298_dac_src);
 426
 427static const struct snd_kcontrol_new rt298_spo_mux =
 428SOC_DAPM_ENUM("SPO source", rt298_spo_enum);
 429
 430static int rt298_spk_event(struct snd_soc_dapm_widget *w,
 431                            struct snd_kcontrol *kcontrol, int event)
 432{
 433        struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 434
 435        switch (event) {
 436        case SND_SOC_DAPM_POST_PMU:
 437                snd_soc_write(codec,
 438                        RT298_SPK_EAPD, RT298_SET_EAPD_HIGH);
 439                break;
 440        case SND_SOC_DAPM_PRE_PMD:
 441                snd_soc_write(codec,
 442                        RT298_SPK_EAPD, RT298_SET_EAPD_LOW);
 443                break;
 444
 445        default:
 446                return 0;
 447        }
 448
 449        return 0;
 450}
 451
 452static int rt298_set_dmic1_event(struct snd_soc_dapm_widget *w,
 453                                  struct snd_kcontrol *kcontrol, int event)
 454{
 455        struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 456
 457        switch (event) {
 458        case SND_SOC_DAPM_POST_PMU:
 459                snd_soc_write(codec, RT298_SET_PIN_DMIC1, 0x20);
 460                break;
 461        case SND_SOC_DAPM_PRE_PMD:
 462                snd_soc_write(codec, RT298_SET_PIN_DMIC1, 0);
 463                break;
 464        default:
 465                return 0;
 466        }
 467
 468        return 0;
 469}
 470
 471static int rt298_adc_event(struct snd_soc_dapm_widget *w,
 472                             struct snd_kcontrol *kcontrol, int event)
 473{
 474        struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 475        unsigned int nid;
 476
 477        nid = (w->reg >> 20) & 0xff;
 478
 479        switch (event) {
 480        case SND_SOC_DAPM_POST_PMU:
 481                snd_soc_update_bits(codec,
 482                        VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
 483                        0x7080, 0x7000);
 484                break;
 485        case SND_SOC_DAPM_PRE_PMD:
 486                snd_soc_update_bits(codec,
 487                        VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE, nid, 0),
 488                        0x7080, 0x7080);
 489                break;
 490        default:
 491                return 0;
 492        }
 493
 494        return 0;
 495}
 496
 497static int rt298_mic1_event(struct snd_soc_dapm_widget *w,
 498                             struct snd_kcontrol *kcontrol, int event)
 499{
 500        struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 501
 502        switch (event) {
 503        case SND_SOC_DAPM_PRE_PMU:
 504                snd_soc_update_bits(codec,
 505                        RT298_A_BIAS_CTRL3, 0xc000, 0x8000);
 506                snd_soc_update_bits(codec,
 507                        RT298_A_BIAS_CTRL2, 0xc000, 0x8000);
 508                break;
 509        case SND_SOC_DAPM_POST_PMD:
 510                snd_soc_update_bits(codec,
 511                        RT298_A_BIAS_CTRL3, 0xc000, 0x0000);
 512                snd_soc_update_bits(codec,
 513                        RT298_A_BIAS_CTRL2, 0xc000, 0x0000);
 514                break;
 515        default:
 516                return 0;
 517        }
 518
 519        return 0;
 520}
 521
 522static int rt298_vref_event(struct snd_soc_dapm_widget *w,
 523                             struct snd_kcontrol *kcontrol, int event)
 524{
 525        struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
 526
 527        switch (event) {
 528        case SND_SOC_DAPM_PRE_PMU:
 529                snd_soc_update_bits(codec,
 530                        RT298_CBJ_CTRL1, 0x0400, 0x0000);
 531                mdelay(50);
 532                break;
 533        default:
 534                return 0;
 535        }
 536
 537        return 0;
 538}
 539
 540static const struct snd_soc_dapm_widget rt298_dapm_widgets[] = {
 541
 542        SND_SOC_DAPM_SUPPLY_S("HV", 1, RT298_POWER_CTRL1,
 543                12, 1, NULL, 0),
 544        SND_SOC_DAPM_SUPPLY("VREF", RT298_POWER_CTRL1,
 545                0, 1, rt298_vref_event, SND_SOC_DAPM_PRE_PMU),
 546        SND_SOC_DAPM_SUPPLY_S("BG_MBIAS", 1, RT298_POWER_CTRL2,
 547                1, 0, NULL, 0),
 548        SND_SOC_DAPM_SUPPLY_S("LDO1", 1, RT298_POWER_CTRL2,
 549                2, 0, NULL, 0),
 550        SND_SOC_DAPM_SUPPLY_S("LDO2", 1, RT298_POWER_CTRL2,
 551                3, 0, NULL, 0),
 552        SND_SOC_DAPM_SUPPLY_S("VREF1", 1, RT298_POWER_CTRL2,
 553                4, 1, NULL, 0),
 554        SND_SOC_DAPM_SUPPLY_S("LV", 2, RT298_POWER_CTRL1,
 555                13, 1, NULL, 0),
 556
 557
 558        SND_SOC_DAPM_SUPPLY("MCLK MODE", RT298_PLL_CTRL1,
 559                5, 0, NULL, 0),
 560        SND_SOC_DAPM_SUPPLY("MIC1 Input Buffer", SND_SOC_NOPM,
 561                0, 0, rt298_mic1_event, SND_SOC_DAPM_PRE_PMU |
 562                SND_SOC_DAPM_POST_PMD),
 563
 564        /* Input Lines */
 565        SND_SOC_DAPM_INPUT("DMIC1 Pin"),
 566        SND_SOC_DAPM_INPUT("DMIC2 Pin"),
 567        SND_SOC_DAPM_INPUT("MIC1"),
 568        SND_SOC_DAPM_INPUT("LINE1"),
 569        SND_SOC_DAPM_INPUT("Beep"),
 570
 571        /* DMIC */
 572        SND_SOC_DAPM_PGA_E("DMIC1", RT298_SET_POWER(RT298_DMIC1), 0, 1,
 573                NULL, 0, rt298_set_dmic1_event,
 574                SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 575        SND_SOC_DAPM_PGA("DMIC2", RT298_SET_POWER(RT298_DMIC2), 0, 1,
 576                NULL, 0),
 577        SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM,
 578                0, 0, NULL, 0),
 579
 580        /* REC Mixer */
 581        SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM, 0, 0,
 582                rt298_rec_mix, ARRAY_SIZE(rt298_rec_mix)),
 583
 584        /* ADCs */
 585        SND_SOC_DAPM_ADC("ADC 0", NULL, SND_SOC_NOPM, 0, 0),
 586        SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
 587
 588        /* ADC Mux */
 589        SND_SOC_DAPM_MUX_E("ADC 0 Mux", RT298_SET_POWER(RT298_ADC_IN1), 0, 1,
 590                &rt298_adc0_mux, rt298_adc_event, SND_SOC_DAPM_PRE_PMD |
 591                SND_SOC_DAPM_POST_PMU),
 592        SND_SOC_DAPM_MUX_E("ADC 1 Mux", RT298_SET_POWER(RT298_ADC_IN2), 0, 1,
 593                &rt298_adc1_mux, rt298_adc_event, SND_SOC_DAPM_PRE_PMD |
 594                SND_SOC_DAPM_POST_PMU),
 595
 596        /* Audio Interface */
 597        SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
 598        SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
 599        SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
 600        SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
 601
 602        /* Output Side */
 603        /* DACs */
 604        SND_SOC_DAPM_DAC("DAC 0", NULL, SND_SOC_NOPM, 0, 0),
 605        SND_SOC_DAPM_DAC("DAC 1", NULL, SND_SOC_NOPM, 0, 0),
 606
 607        /* Output Mux */
 608        SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM, 0, 0, &rt298_spo_mux),
 609        SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM, 0, 0, &rt298_hpo_mux),
 610
 611        SND_SOC_DAPM_SUPPLY("HP Power", RT298_SET_PIN_HPO,
 612                RT298_SET_PIN_SFT, 0, NULL, 0),
 613
 614        /* Output Mixer */
 615        SND_SOC_DAPM_MIXER("Front", RT298_SET_POWER(RT298_DAC_OUT1), 0, 1,
 616                        rt298_front_mix, ARRAY_SIZE(rt298_front_mix)),
 617        SND_SOC_DAPM_PGA("Surround", RT298_SET_POWER(RT298_DAC_OUT2), 0, 1,
 618                        NULL, 0),
 619
 620        /* Output Pga */
 621        SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM, 0, 0,
 622                &spo_enable_control, rt298_spk_event,
 623                SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
 624        SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM, 0, 0,
 625                &hpol_enable_control),
 626        SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM, 0, 0,
 627                &hpor_enable_control),
 628
 629        /* Output Lines */
 630        SND_SOC_DAPM_OUTPUT("SPOL"),
 631        SND_SOC_DAPM_OUTPUT("SPOR"),
 632        SND_SOC_DAPM_OUTPUT("HPO Pin"),
 633        SND_SOC_DAPM_OUTPUT("SPDIF"),
 634};
 635
 636static const struct snd_soc_dapm_route rt298_dapm_routes[] = {
 637
 638        {"ADC 0", NULL, "MCLK MODE", is_mclk_mode},
 639        {"ADC 1", NULL, "MCLK MODE", is_mclk_mode},
 640        {"Front", NULL, "MCLK MODE", is_mclk_mode},
 641        {"Surround", NULL, "MCLK MODE", is_mclk_mode},
 642
 643        {"HP Power", NULL, "LDO1"},
 644        {"HP Power", NULL, "LDO2"},
 645        {"HP Power", NULL, "LV"},
 646        {"HP Power", NULL, "VREF1"},
 647        {"HP Power", NULL, "BG_MBIAS"},
 648
 649        {"MIC1", NULL, "LDO1"},
 650        {"MIC1", NULL, "LDO2"},
 651        {"MIC1", NULL, "HV"},
 652        {"MIC1", NULL, "LV"},
 653        {"MIC1", NULL, "VREF"},
 654        {"MIC1", NULL, "VREF1"},
 655        {"MIC1", NULL, "BG_MBIAS"},
 656        {"MIC1", NULL, "MIC1 Input Buffer"},
 657
 658        {"SPO", NULL, "LDO1"},
 659        {"SPO", NULL, "LDO2"},
 660        {"SPO", NULL, "HV"},
 661        {"SPO", NULL, "LV"},
 662        {"SPO", NULL, "VREF"},
 663        {"SPO", NULL, "VREF1"},
 664        {"SPO", NULL, "BG_MBIAS"},
 665
 666        {"DMIC1", NULL, "DMIC1 Pin"},
 667        {"DMIC2", NULL, "DMIC2 Pin"},
 668        {"DMIC1", NULL, "DMIC Receiver"},
 669        {"DMIC2", NULL, "DMIC Receiver"},
 670
 671        {"RECMIX", "Beep Switch", "Beep"},
 672        {"RECMIX", "Line1 Switch", "LINE1"},
 673        {"RECMIX", "Mic1 Switch", "MIC1"},
 674
 675        {"ADC 0 Mux", "Dmic", "DMIC1"},
 676        {"ADC 0 Mux", "RECMIX", "RECMIX"},
 677        {"ADC 0 Mux", "Mic", "MIC1"},
 678        {"ADC 1 Mux", "Dmic", "DMIC2"},
 679        {"ADC 1 Mux", "RECMIX", "RECMIX"},
 680        {"ADC 1 Mux", "Mic", "MIC1"},
 681
 682        {"ADC 0", NULL, "ADC 0 Mux"},
 683        {"ADC 1", NULL, "ADC 1 Mux"},
 684
 685        {"AIF1TX", NULL, "ADC 0"},
 686        {"AIF2TX", NULL, "ADC 1"},
 687
 688        {"DAC 0", NULL, "AIF1RX"},
 689        {"DAC 1", NULL, "AIF2RX"},
 690
 691        {"Front", "DAC Switch", "DAC 0"},
 692        {"Front", "RECMIX Switch", "RECMIX"},
 693
 694        {"Surround", NULL, "DAC 1"},
 695
 696        {"SPK Mux", "Front", "Front"},
 697        {"SPK Mux", "Surround", "Surround"},
 698
 699        {"HPO Mux", "Front", "Front"},
 700        {"HPO Mux", "Surround", "Surround"},
 701
 702        {"SPO", "Switch", "SPK Mux"},
 703        {"HPO L", "Switch", "HPO Mux"},
 704        {"HPO R", "Switch", "HPO Mux"},
 705        {"HPO L", NULL, "HP Power"},
 706        {"HPO R", NULL, "HP Power"},
 707
 708        {"SPOL", NULL, "SPO"},
 709        {"SPOR", NULL, "SPO"},
 710        {"HPO Pin", NULL, "HPO L"},
 711        {"HPO Pin", NULL, "HPO R"},
 712};
 713
 714static int rt298_hw_params(struct snd_pcm_substream *substream,
 715                            struct snd_pcm_hw_params *params,
 716                            struct snd_soc_dai *dai)
 717{
 718        struct snd_soc_codec *codec = dai->codec;
 719        struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
 720        unsigned int val = 0;
 721        int d_len_code;
 722
 723        switch (params_rate(params)) {
 724        /* bit 14 0:48K 1:44.1K */
 725        case 44100:
 726        case 48000:
 727                break;
 728        default:
 729                dev_err(codec->dev, "Unsupported sample rate %d\n",
 730                                        params_rate(params));
 731                return -EINVAL;
 732        }
 733        switch (rt298->sys_clk) {
 734        case 12288000:
 735        case 24576000:
 736                if (params_rate(params) != 48000) {
 737                        dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
 738                                        params_rate(params), rt298->sys_clk);
 739                        return -EINVAL;
 740                }
 741                break;
 742        case 11289600:
 743        case 22579200:
 744                if (params_rate(params) != 44100) {
 745                        dev_err(codec->dev, "Sys_clk is not matched (%d %d)\n",
 746                                        params_rate(params), rt298->sys_clk);
 747                        return -EINVAL;
 748                }
 749                break;
 750        }
 751
 752        if (params_channels(params) <= 16) {
 753                /* bit 3:0 Number of Channel */
 754                val |= (params_channels(params) - 1);
 755        } else {
 756                dev_err(codec->dev, "Unsupported channels %d\n",
 757                                        params_channels(params));
 758                return -EINVAL;
 759        }
 760
 761        d_len_code = 0;
 762        switch (params_width(params)) {
 763        /* bit 6:4 Bits per Sample */
 764        case 16:
 765                d_len_code = 0;
 766                val |= (0x1 << 4);
 767                break;
 768        case 32:
 769                d_len_code = 2;
 770                val |= (0x4 << 4);
 771                break;
 772        case 20:
 773                d_len_code = 1;
 774                val |= (0x2 << 4);
 775                break;
 776        case 24:
 777                d_len_code = 2;
 778                val |= (0x3 << 4);
 779                break;
 780        case 8:
 781                d_len_code = 3;
 782                break;
 783        default:
 784                return -EINVAL;
 785        }
 786
 787        snd_soc_update_bits(codec,
 788                RT298_I2S_CTRL1, 0x0018, d_len_code << 3);
 789        dev_dbg(codec->dev, "format val = 0x%x\n", val);
 790
 791        snd_soc_update_bits(codec, RT298_DAC_FORMAT, 0x407f, val);
 792        snd_soc_update_bits(codec, RT298_ADC_FORMAT, 0x407f, val);
 793
 794        return 0;
 795}
 796
 797static int rt298_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 798{
 799        struct snd_soc_codec *codec = dai->codec;
 800
 801        switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 802        case SND_SOC_DAIFMT_CBM_CFM:
 803                snd_soc_update_bits(codec,
 804                        RT298_I2S_CTRL1, 0x800, 0x800);
 805                break;
 806        case SND_SOC_DAIFMT_CBS_CFS:
 807                snd_soc_update_bits(codec,
 808                        RT298_I2S_CTRL1, 0x800, 0x0);
 809                break;
 810        default:
 811                return -EINVAL;
 812        }
 813
 814        switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 815        case SND_SOC_DAIFMT_I2S:
 816                snd_soc_update_bits(codec,
 817                        RT298_I2S_CTRL1, 0x300, 0x0);
 818                break;
 819        case SND_SOC_DAIFMT_LEFT_J:
 820                snd_soc_update_bits(codec,
 821                        RT298_I2S_CTRL1, 0x300, 0x1 << 8);
 822                break;
 823        case SND_SOC_DAIFMT_DSP_A:
 824                snd_soc_update_bits(codec,
 825                        RT298_I2S_CTRL1, 0x300, 0x2 << 8);
 826                break;
 827        case SND_SOC_DAIFMT_DSP_B:
 828                snd_soc_update_bits(codec,
 829                        RT298_I2S_CTRL1, 0x300, 0x3 << 8);
 830                break;
 831        default:
 832                return -EINVAL;
 833        }
 834        /* bit 15 Stream Type 0:PCM 1:Non-PCM */
 835        snd_soc_update_bits(codec, RT298_DAC_FORMAT, 0x8000, 0);
 836        snd_soc_update_bits(codec, RT298_ADC_FORMAT, 0x8000, 0);
 837
 838        return 0;
 839}
 840
 841static int rt298_set_dai_sysclk(struct snd_soc_dai *dai,
 842                                int clk_id, unsigned int freq, int dir)
 843{
 844        struct snd_soc_codec *codec = dai->codec;
 845        struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
 846
 847        dev_dbg(codec->dev, "%s freq=%d\n", __func__, freq);
 848
 849        if (RT298_SCLK_S_MCLK == clk_id) {
 850                snd_soc_update_bits(codec,
 851                        RT298_I2S_CTRL2, 0x0100, 0x0);
 852                snd_soc_update_bits(codec,
 853                        RT298_PLL_CTRL1, 0x20, 0x20);
 854        } else {
 855                snd_soc_update_bits(codec,
 856                        RT298_I2S_CTRL2, 0x0100, 0x0100);
 857                snd_soc_update_bits(codec,
 858                        RT298_PLL_CTRL1, 0x20, 0x0);
 859        }
 860
 861        switch (freq) {
 862        case 19200000:
 863                if (RT298_SCLK_S_MCLK == clk_id) {
 864                        dev_err(codec->dev, "Should not use MCLK\n");
 865                        return -EINVAL;
 866                }
 867                snd_soc_update_bits(codec,
 868                        RT298_I2S_CTRL2, 0x40, 0x40);
 869                break;
 870        case 24000000:
 871                if (RT298_SCLK_S_MCLK == clk_id) {
 872                        dev_err(codec->dev, "Should not use MCLK\n");
 873                        return -EINVAL;
 874                }
 875                snd_soc_update_bits(codec,
 876                        RT298_I2S_CTRL2, 0x40, 0x0);
 877                break;
 878        case 12288000:
 879        case 11289600:
 880                snd_soc_update_bits(codec,
 881                        RT298_I2S_CTRL2, 0x8, 0x0);
 882                snd_soc_update_bits(codec,
 883                        RT298_CLK_DIV, 0xfc1e, 0x0004);
 884                break;
 885        case 24576000:
 886        case 22579200:
 887                snd_soc_update_bits(codec,
 888                        RT298_I2S_CTRL2, 0x8, 0x8);
 889                snd_soc_update_bits(codec,
 890                        RT298_CLK_DIV, 0xfc1e, 0x5406);
 891                break;
 892        default:
 893                dev_err(codec->dev, "Unsupported system clock\n");
 894                return -EINVAL;
 895        }
 896
 897        rt298->sys_clk = freq;
 898        rt298->clk_id = clk_id;
 899
 900        return 0;
 901}
 902
 903static int rt298_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
 904{
 905        struct snd_soc_codec *codec = dai->codec;
 906
 907        dev_dbg(codec->dev, "%s ratio=%d\n", __func__, ratio);
 908        if (50 == ratio)
 909                snd_soc_update_bits(codec,
 910                        RT298_I2S_CTRL1, 0x1000, 0x1000);
 911        else
 912                snd_soc_update_bits(codec,
 913                        RT298_I2S_CTRL1, 0x1000, 0x0);
 914
 915
 916        return 0;
 917}
 918
 919static int rt298_set_bias_level(struct snd_soc_codec *codec,
 920                                 enum snd_soc_bias_level level)
 921{
 922        switch (level) {
 923        case SND_SOC_BIAS_PREPARE:
 924                if (SND_SOC_BIAS_STANDBY ==
 925                        snd_soc_codec_get_bias_level(codec)) {
 926                        snd_soc_write(codec,
 927                                RT298_SET_AUDIO_POWER, AC_PWRST_D0);
 928                        snd_soc_update_bits(codec, 0x0d, 0x200, 0x200);
 929                        snd_soc_update_bits(codec, 0x52, 0x80, 0x0);
 930                        mdelay(20);
 931                        snd_soc_update_bits(codec, 0x0d, 0x200, 0x0);
 932                        snd_soc_update_bits(codec, 0x52, 0x80, 0x80);
 933                }
 934                break;
 935
 936        case SND_SOC_BIAS_ON:
 937                mdelay(30);
 938                snd_soc_update_bits(codec,
 939                        RT298_CBJ_CTRL1, 0x0400, 0x0400);
 940
 941                break;
 942
 943        case SND_SOC_BIAS_STANDBY:
 944                snd_soc_write(codec,
 945                        RT298_SET_AUDIO_POWER, AC_PWRST_D3);
 946                snd_soc_update_bits(codec,
 947                        RT298_CBJ_CTRL1, 0x0400, 0x0000);
 948                break;
 949
 950        default:
 951                break;
 952        }
 953
 954        return 0;
 955}
 956
 957static irqreturn_t rt298_irq(int irq, void *data)
 958{
 959        struct rt298_priv *rt298 = data;
 960        bool hp = false;
 961        bool mic = false;
 962        int ret, status = 0;
 963
 964        ret = rt298_jack_detect(rt298, &hp, &mic);
 965
 966        /* Clear IRQ */
 967        regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x1, 0x1);
 968
 969        if (ret == 0) {
 970                if (hp == true)
 971                        status |= SND_JACK_HEADPHONE;
 972
 973                if (mic == true)
 974                        status |= SND_JACK_MICROPHONE;
 975
 976                snd_soc_jack_report(rt298->jack, status,
 977                        SND_JACK_MICROPHONE | SND_JACK_HEADPHONE);
 978
 979                pm_wakeup_event(&rt298->i2c->dev, 300);
 980        }
 981
 982        return IRQ_HANDLED;
 983}
 984
 985static int rt298_probe(struct snd_soc_codec *codec)
 986{
 987        struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
 988
 989        rt298->codec = codec;
 990
 991        if (rt298->i2c->irq) {
 992                regmap_update_bits(rt298->regmap,
 993                                        RT298_IRQ_CTRL, 0x2, 0x2);
 994
 995                INIT_DELAYED_WORK(&rt298->jack_detect_work,
 996                                        rt298_jack_detect_work);
 997                schedule_delayed_work(&rt298->jack_detect_work,
 998                                        msecs_to_jiffies(1250));
 999        }
1000
1001        return 0;
1002}
1003
1004static int rt298_remove(struct snd_soc_codec *codec)
1005{
1006        struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
1007
1008        cancel_delayed_work_sync(&rt298->jack_detect_work);
1009
1010        return 0;
1011}
1012
1013#ifdef CONFIG_PM
1014static int rt298_suspend(struct snd_soc_codec *codec)
1015{
1016        struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
1017
1018        rt298->is_hp_in = -1;
1019        regcache_cache_only(rt298->regmap, true);
1020        regcache_mark_dirty(rt298->regmap);
1021
1022        return 0;
1023}
1024
1025static int rt298_resume(struct snd_soc_codec *codec)
1026{
1027        struct rt298_priv *rt298 = snd_soc_codec_get_drvdata(codec);
1028
1029        regcache_cache_only(rt298->regmap, false);
1030        rt298_index_sync(codec);
1031        regcache_sync(rt298->regmap);
1032
1033        return 0;
1034}
1035#else
1036#define rt298_suspend NULL
1037#define rt298_resume NULL
1038#endif
1039
1040#define RT298_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
1041#define RT298_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1042                        SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1043
1044static const struct snd_soc_dai_ops rt298_aif_dai_ops = {
1045        .hw_params = rt298_hw_params,
1046        .set_fmt = rt298_set_dai_fmt,
1047        .set_sysclk = rt298_set_dai_sysclk,
1048        .set_bclk_ratio = rt298_set_bclk_ratio,
1049};
1050
1051static struct snd_soc_dai_driver rt298_dai[] = {
1052        {
1053                .name = "rt298-aif1",
1054                .id = RT298_AIF1,
1055                .playback = {
1056                        .stream_name = "AIF1 Playback",
1057                        .channels_min = 1,
1058                        .channels_max = 2,
1059                        .rates = RT298_STEREO_RATES,
1060                        .formats = RT298_FORMATS,
1061                },
1062                .capture = {
1063                        .stream_name = "AIF1 Capture",
1064                        .channels_min = 1,
1065                        .channels_max = 2,
1066                        .rates = RT298_STEREO_RATES,
1067                        .formats = RT298_FORMATS,
1068                },
1069                .ops = &rt298_aif_dai_ops,
1070                .symmetric_rates = 1,
1071        },
1072        {
1073                .name = "rt298-aif2",
1074                .id = RT298_AIF2,
1075                .playback = {
1076                        .stream_name = "AIF2 Playback",
1077                        .channels_min = 1,
1078                        .channels_max = 2,
1079                        .rates = RT298_STEREO_RATES,
1080                        .formats = RT298_FORMATS,
1081                },
1082                .capture = {
1083                        .stream_name = "AIF2 Capture",
1084                        .channels_min = 1,
1085                        .channels_max = 2,
1086                        .rates = RT298_STEREO_RATES,
1087                        .formats = RT298_FORMATS,
1088                },
1089                .ops = &rt298_aif_dai_ops,
1090                .symmetric_rates = 1,
1091        },
1092
1093};
1094
1095static struct snd_soc_codec_driver soc_codec_dev_rt298 = {
1096        .probe = rt298_probe,
1097        .remove = rt298_remove,
1098        .suspend = rt298_suspend,
1099        .resume = rt298_resume,
1100        .set_bias_level = rt298_set_bias_level,
1101        .idle_bias_off = true,
1102        .controls = rt298_snd_controls,
1103        .num_controls = ARRAY_SIZE(rt298_snd_controls),
1104        .dapm_widgets = rt298_dapm_widgets,
1105        .num_dapm_widgets = ARRAY_SIZE(rt298_dapm_widgets),
1106        .dapm_routes = rt298_dapm_routes,
1107        .num_dapm_routes = ARRAY_SIZE(rt298_dapm_routes),
1108};
1109
1110static const struct regmap_config rt298_regmap = {
1111        .reg_bits = 32,
1112        .val_bits = 32,
1113        .max_register = 0x02370100,
1114        .volatile_reg = rt298_volatile_register,
1115        .readable_reg = rt298_readable_register,
1116        .reg_write = rl6347a_hw_write,
1117        .reg_read = rl6347a_hw_read,
1118        .cache_type = REGCACHE_RBTREE,
1119        .reg_defaults = rt298_reg,
1120        .num_reg_defaults = ARRAY_SIZE(rt298_reg),
1121};
1122
1123static const struct i2c_device_id rt298_i2c_id[] = {
1124        {"rt298", 0},
1125        {}
1126};
1127MODULE_DEVICE_TABLE(i2c, rt298_i2c_id);
1128
1129static const struct acpi_device_id rt298_acpi_match[] = {
1130        { "INT343A", 0 },
1131        {},
1132};
1133MODULE_DEVICE_TABLE(acpi, rt298_acpi_match);
1134
1135static int rt298_i2c_probe(struct i2c_client *i2c,
1136                           const struct i2c_device_id *id)
1137{
1138        struct rt298_platform_data *pdata = dev_get_platdata(&i2c->dev);
1139        struct rt298_priv *rt298;
1140        struct device *dev = &i2c->dev;
1141        const struct acpi_device_id *acpiid;
1142        int i, ret;
1143
1144        rt298 = devm_kzalloc(&i2c->dev, sizeof(*rt298),
1145                                GFP_KERNEL);
1146        if (NULL == rt298)
1147                return -ENOMEM;
1148
1149        rt298->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt298_regmap);
1150        if (IS_ERR(rt298->regmap)) {
1151                ret = PTR_ERR(rt298->regmap);
1152                dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1153                        ret);
1154                return ret;
1155        }
1156
1157        regmap_read(rt298->regmap,
1158                RT298_GET_PARAM(AC_NODE_ROOT, AC_PAR_VENDOR_ID), &ret);
1159        if (ret != RT298_VENDOR_ID) {
1160                dev_err(&i2c->dev,
1161                        "Device with ID register %#x is not rt298\n", ret);
1162                return -ENODEV;
1163        }
1164
1165        rt298->index_cache = devm_kmemdup(&i2c->dev, rt298_index_def,
1166                                          sizeof(rt298_index_def), GFP_KERNEL);
1167        if (!rt298->index_cache)
1168                return -ENOMEM;
1169
1170        rt298->index_cache_size = INDEX_CACHE_SIZE;
1171        rt298->i2c = i2c;
1172        i2c_set_clientdata(i2c, rt298);
1173
1174        /* restore codec default */
1175        for (i = 0; i < INDEX_CACHE_SIZE; i++)
1176                regmap_write(rt298->regmap, rt298->index_cache[i].reg,
1177                                rt298->index_cache[i].def);
1178        for (i = 0; i < ARRAY_SIZE(rt298_reg); i++)
1179                regmap_write(rt298->regmap, rt298_reg[i].reg,
1180                                rt298_reg[i].def);
1181
1182        if (pdata)
1183                rt298->pdata = *pdata;
1184
1185        /* enable jack combo mode on supported devices */
1186        acpiid = acpi_match_device(dev->driver->acpi_match_table, dev);
1187        if (acpiid) {
1188                rt298->pdata = *(struct rt298_platform_data *)
1189                                acpiid->driver_data;
1190        }
1191
1192        /* VREF Charging */
1193        regmap_update_bits(rt298->regmap, 0x04, 0x80, 0x80);
1194        regmap_update_bits(rt298->regmap, 0x1b, 0x860, 0x860);
1195        /* Vref2 */
1196        regmap_update_bits(rt298->regmap, 0x08, 0x20, 0x20);
1197
1198        regmap_write(rt298->regmap, RT298_SET_AUDIO_POWER, AC_PWRST_D3);
1199
1200        for (i = 0; i < RT298_POWER_REG_LEN; i++)
1201                regmap_write(rt298->regmap,
1202                        RT298_SET_POWER(rt298_support_power_controls[i]),
1203                        AC_PWRST_D1);
1204
1205        if (!rt298->pdata.cbj_en) {
1206                regmap_write(rt298->regmap, RT298_CBJ_CTRL2, 0x0000);
1207                regmap_write(rt298->regmap, RT298_MIC1_DET_CTRL, 0x0816);
1208                regmap_update_bits(rt298->regmap,
1209                                        RT298_CBJ_CTRL1, 0xf000, 0xb000);
1210        } else {
1211                regmap_update_bits(rt298->regmap,
1212                                        RT298_CBJ_CTRL1, 0xf000, 0x5000);
1213        }
1214
1215        mdelay(10);
1216
1217        if (!rt298->pdata.gpio2_en)
1218                regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0x40);
1219        else
1220                regmap_write(rt298->regmap, RT298_SET_DMIC2_DEFAULT, 0);
1221
1222        mdelay(10);
1223
1224        regmap_write(rt298->regmap, RT298_MISC_CTRL1, 0x0000);
1225        regmap_update_bits(rt298->regmap,
1226                                RT298_WIND_FILTER_CTRL, 0x0082, 0x0082);
1227        regmap_update_bits(rt298->regmap, RT298_IRQ_CTRL, 0x2, 0x2);
1228        rt298->is_hp_in = -1;
1229
1230        if (rt298->i2c->irq) {
1231                ret = request_threaded_irq(rt298->i2c->irq, NULL, rt298_irq,
1232                        IRQF_TRIGGER_HIGH | IRQF_ONESHOT, "rt298", rt298);
1233                if (ret != 0) {
1234                        dev_err(&i2c->dev,
1235                                "Failed to reguest IRQ: %d\n", ret);
1236                        return ret;
1237                }
1238        }
1239
1240        ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt298,
1241                                     rt298_dai, ARRAY_SIZE(rt298_dai));
1242
1243        return ret;
1244}
1245
1246static int rt298_i2c_remove(struct i2c_client *i2c)
1247{
1248        struct rt298_priv *rt298 = i2c_get_clientdata(i2c);
1249
1250        if (i2c->irq)
1251                free_irq(i2c->irq, rt298);
1252        snd_soc_unregister_codec(&i2c->dev);
1253
1254        return 0;
1255}
1256
1257
1258static struct i2c_driver rt298_i2c_driver = {
1259        .driver = {
1260                   .name = "rt298",
1261                   .acpi_match_table = ACPI_PTR(rt298_acpi_match),
1262                   },
1263        .probe = rt298_i2c_probe,
1264        .remove = rt298_i2c_remove,
1265        .id_table = rt298_i2c_id,
1266};
1267
1268module_i2c_driver(rt298_i2c_driver);
1269
1270MODULE_DESCRIPTION("ASoC RT298 driver");
1271MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1272MODULE_LICENSE("GPL");
1273